Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
79.42 93.91 81.32 87.69 74.36 82.67 98.42 37.60


Total tests in report: 315
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
52.06 52.06 82.28 82.28 49.18 49.18 24.46 24.46 46.15 46.15 64.50 64.50 91.97 91.97 5.90 5.90 /workspace/coverage/default/25.rv_dm_stress_all.1397792311
59.16 7.10 85.90 3.63 54.81 5.63 46.66 22.20 56.41 10.26 70.33 5.83 93.45 1.48 6.54 0.64 /workspace/coverage/default/19.rv_dm_bad_sba_tl_access.3032248613
64.55 5.39 86.05 0.15 59.34 4.53 49.64 2.98 64.10 7.69 71.67 1.33 94.51 1.06 26.52 19.98 /workspace/coverage/cover_reg_top/36.rv_dm_tap_fsm_rand_reset.103516953
68.74 4.19 86.25 0.20 62.36 3.02 70.03 20.39 67.95 3.85 72.17 0.50 94.51 0.00 27.88 1.36 /workspace/coverage/default/7.rv_dm_stress_all.666469584
72.25 3.52 90.48 4.23 69.78 7.42 78.04 8.00 67.95 0.00 74.67 2.50 95.88 1.37 28.97 1.09 /workspace/coverage/default/29.rv_dm_alert_test.72595471
75.42 3.17 92.75 2.27 75.69 5.91 83.11 5.07 73.08 5.13 78.50 3.83 95.88 0.00 28.97 0.00 /workspace/coverage/default/6.rv_dm_stress_all.3373471722
77.19 1.76 93.00 0.25 78.43 2.75 84.35 1.25 73.08 0.00 79.50 1.00 95.88 0.00 36.06 7.08 /workspace/coverage/cover_reg_top/0.rv_dm_tl_intg_err.2081762813
77.64 0.45 93.00 0.00 79.40 0.96 85.28 0.93 74.36 1.28 79.50 0.00 95.88 0.00 36.06 0.00 /workspace/coverage/default/0.rv_dm_tap_fsm.342596065
77.89 0.25 93.05 0.05 79.53 0.14 86.48 1.21 74.36 0.00 79.83 0.33 95.88 0.00 36.06 0.00 /workspace/coverage/default/11.rv_dm_autoincr_sba_tl_access.840320542
78.05 0.17 93.05 0.00 79.53 0.00 86.73 0.24 74.36 0.00 79.83 0.00 96.09 0.21 36.78 0.73 /workspace/coverage/cover_reg_top/10.rv_dm_tl_intg_err.3394972879
78.19 0.14 93.05 0.00 79.53 0.00 86.73 0.00 74.36 0.00 79.83 0.00 97.04 0.95 36.78 0.00 /workspace/coverage/cover_reg_top/1.rv_dm_csr_aliasing.2302751716
78.32 0.13 93.05 0.00 79.95 0.41 86.97 0.24 74.36 0.00 79.83 0.00 97.15 0.11 36.97 0.18 /workspace/coverage/default/0.rv_dm_sec_cm.1037855085
78.45 0.13 93.05 0.00 80.36 0.41 86.97 0.00 74.36 0.00 80.33 0.50 97.15 0.00 36.97 0.00 /workspace/coverage/default/7.rv_dm_delayed_resp_sba_tl_access.2370557237
78.57 0.12 93.05 0.00 80.36 0.00 87.17 0.20 74.36 0.00 80.33 0.00 97.78 0.63 36.97 0.00 /workspace/coverage/cover_reg_top/7.rv_dm_same_csr_outstanding.3914059008
78.69 0.11 93.35 0.30 80.36 0.00 87.17 0.00 74.36 0.00 80.83 0.50 97.78 0.00 36.97 0.00 /workspace/coverage/default/0.rv_dm_abstractcmd_status.2994956272
78.79 0.11 93.45 0.10 80.49 0.14 87.17 0.00 74.36 0.00 81.33 0.50 97.78 0.00 36.97 0.00 /workspace/coverage/default/0.rv_dm_rom_read_access.3094980378
78.89 0.10 93.66 0.20 80.49 0.00 87.17 0.00 74.36 0.00 81.83 0.50 97.78 0.00 36.97 0.00 /workspace/coverage/default/0.rv_dm_cmderr_exception.3703314898
78.98 0.09 93.71 0.05 80.77 0.27 87.29 0.12 74.36 0.00 82.00 0.17 97.78 0.00 36.97 0.00 /workspace/coverage/default/0.rv_dm_progbuf_busy.1266389534
79.04 0.06 93.81 0.10 80.77 0.00 87.29 0.00 74.36 0.00 82.33 0.33 97.78 0.00 36.97 0.00 /workspace/coverage/default/0.rv_dm_progbuf_read_write_execute.1809413301
79.11 0.06 93.81 0.00 80.77 0.00 87.45 0.16 74.36 0.00 82.33 0.00 97.78 0.00 37.24 0.27 /workspace/coverage/cover_reg_top/13.rv_dm_tl_intg_err.3285557727
79.16 0.05 93.86 0.05 80.91 0.14 87.45 0.00 74.36 0.00 82.50 0.17 97.78 0.00 37.24 0.00 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_aliasing.2632861580
79.21 0.05 93.91 0.05 81.04 0.14 87.45 0.00 74.36 0.00 82.67 0.17 97.78 0.00 37.24 0.00 /workspace/coverage/cover_reg_top/11.rv_dm_csr_mem_rw_with_rand_reset.3244555750
79.25 0.05 93.91 0.00 81.04 0.00 87.45 0.00 74.36 0.00 82.67 0.00 98.10 0.32 37.24 0.00 /workspace/coverage/cover_reg_top/0.rv_dm_csr_bit_bash.3978002296
79.29 0.04 93.91 0.00 81.04 0.00 87.61 0.16 74.36 0.00 82.67 0.00 98.10 0.00 37.33 0.09 /workspace/coverage/cover_reg_top/5.rv_dm_tl_intg_err.183610986
79.32 0.03 93.91 0.00 81.04 0.00 87.61 0.00 74.36 0.00 82.67 0.00 98.31 0.21 37.33 0.00 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_hw_reset.1275463381
79.35 0.03 93.91 0.00 81.04 0.00 87.61 0.00 74.36 0.00 82.67 0.00 98.42 0.11 37.42 0.09 /workspace/coverage/default/12.rv_dm_alert_test.1824802265
79.37 0.02 93.91 0.00 81.04 0.00 87.69 0.08 74.36 0.00 82.67 0.00 98.42 0.00 37.51 0.09 /workspace/coverage/cover_reg_top/17.rv_dm_tl_intg_err.3176410029
79.39 0.02 93.91 0.00 81.18 0.14 87.69 0.00 74.36 0.00 82.67 0.00 98.42 0.00 37.51 0.00 /workspace/coverage/default/1.rv_dm_cmderr_busy.2221135832
79.41 0.02 93.91 0.00 81.32 0.14 87.69 0.00 74.36 0.00 82.67 0.00 98.42 0.00 37.51 0.00 /workspace/coverage/default/1.rv_dm_cmderr_halt_resume.3782515712
79.42 0.01 93.91 0.00 81.32 0.00 87.69 0.00 74.36 0.00 82.67 0.00 98.42 0.00 37.60 0.09 /workspace/coverage/cover_reg_top/11.rv_dm_tap_fsm_rand_reset.1587224157

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.rv_dm_csr_aliasing.1205945370
/workspace/coverage/cover_reg_top/0.rv_dm_csr_hw_reset.4098397075
/workspace/coverage/cover_reg_top/0.rv_dm_csr_mem_rw_with_rand_reset.1320269015
/workspace/coverage/cover_reg_top/0.rv_dm_csr_rw.2685689754
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_aliasing.4260640925
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_bit_bash.1791201510
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_rw.3991564278
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_bit_bash.824547827
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_hw_reset.1517101028
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_rw.3339528447
/workspace/coverage/cover_reg_top/0.rv_dm_mem_partial_access.2478539481
/workspace/coverage/cover_reg_top/0.rv_dm_mem_walk.820463018
/workspace/coverage/cover_reg_top/0.rv_dm_same_csr_outstanding.498921502
/workspace/coverage/cover_reg_top/0.rv_dm_tap_fsm_rand_reset.100588898
/workspace/coverage/cover_reg_top/0.rv_dm_tl_errors.3622538679
/workspace/coverage/cover_reg_top/1.rv_dm_csr_bit_bash.3046090877
/workspace/coverage/cover_reg_top/1.rv_dm_csr_hw_reset.3909480856
/workspace/coverage/cover_reg_top/1.rv_dm_csr_mem_rw_with_rand_reset.702291975
/workspace/coverage/cover_reg_top/1.rv_dm_csr_rw.2599170403
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_aliasing.1433036131
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_bit_bash.367303101
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_hw_reset.4291185722
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_rw.983088906
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_aliasing.3718871200
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_bit_bash.1808112464
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_hw_reset.1010875925
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_rw.3127106298
/workspace/coverage/cover_reg_top/1.rv_dm_mem_partial_access.3316483249
/workspace/coverage/cover_reg_top/1.rv_dm_mem_walk.3943448639
/workspace/coverage/cover_reg_top/1.rv_dm_same_csr_outstanding.2391237000
/workspace/coverage/cover_reg_top/1.rv_dm_tl_errors.1304061388
/workspace/coverage/cover_reg_top/1.rv_dm_tl_intg_err.3369980073
/workspace/coverage/cover_reg_top/10.rv_dm_csr_mem_rw_with_rand_reset.1174983527
/workspace/coverage/cover_reg_top/10.rv_dm_csr_rw.2697853065
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_rw.2393110340
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dtm_csr_rw.847858666
/workspace/coverage/cover_reg_top/10.rv_dm_same_csr_outstanding.2397782145
/workspace/coverage/cover_reg_top/10.rv_dm_tap_fsm_rand_reset.1004152678
/workspace/coverage/cover_reg_top/10.rv_dm_tl_errors.2053341897
/workspace/coverage/cover_reg_top/11.rv_dm_csr_rw.3734223936
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_rw.1024169083
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dtm_csr_rw.4080062884
/workspace/coverage/cover_reg_top/11.rv_dm_same_csr_outstanding.993008334
/workspace/coverage/cover_reg_top/11.rv_dm_tl_errors.1833888078
/workspace/coverage/cover_reg_top/11.rv_dm_tl_intg_err.266502346
/workspace/coverage/cover_reg_top/12.rv_dm_csr_mem_rw_with_rand_reset.2080281124
/workspace/coverage/cover_reg_top/12.rv_dm_csr_rw.1328326410
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dmi_csr_rw.3191584675
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dtm_csr_rw.478359322
/workspace/coverage/cover_reg_top/12.rv_dm_same_csr_outstanding.88364662
/workspace/coverage/cover_reg_top/12.rv_dm_tl_errors.1969775483
/workspace/coverage/cover_reg_top/12.rv_dm_tl_intg_err.2471491035
/workspace/coverage/cover_reg_top/13.rv_dm_csr_mem_rw_with_rand_reset.2498665017
/workspace/coverage/cover_reg_top/13.rv_dm_csr_rw.3453989600
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_rw.3682252908
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dtm_csr_rw.1949688822
/workspace/coverage/cover_reg_top/13.rv_dm_same_csr_outstanding.2694660581
/workspace/coverage/cover_reg_top/13.rv_dm_tl_errors.1081064497
/workspace/coverage/cover_reg_top/14.rv_dm_csr_mem_rw_with_rand_reset.2318044144
/workspace/coverage/cover_reg_top/14.rv_dm_csr_rw.2178667501
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dmi_csr_rw.1121890418
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dtm_csr_rw.927294009
/workspace/coverage/cover_reg_top/14.rv_dm_same_csr_outstanding.3521142825
/workspace/coverage/cover_reg_top/14.rv_dm_tap_fsm_rand_reset.970125152
/workspace/coverage/cover_reg_top/14.rv_dm_tl_errors.1396975360
/workspace/coverage/cover_reg_top/14.rv_dm_tl_intg_err.1910158919
/workspace/coverage/cover_reg_top/15.rv_dm_csr_mem_rw_with_rand_reset.424185683
/workspace/coverage/cover_reg_top/15.rv_dm_csr_rw.3976849520
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_rw.3869013413
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dtm_csr_rw.875102771
/workspace/coverage/cover_reg_top/15.rv_dm_same_csr_outstanding.1345921859
/workspace/coverage/cover_reg_top/15.rv_dm_tl_errors.776870294
/workspace/coverage/cover_reg_top/15.rv_dm_tl_intg_err.2108128330
/workspace/coverage/cover_reg_top/16.rv_dm_csr_mem_rw_with_rand_reset.527770952
/workspace/coverage/cover_reg_top/16.rv_dm_csr_rw.914670109
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_rw.2150654404
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dtm_csr_rw.41552071
/workspace/coverage/cover_reg_top/16.rv_dm_same_csr_outstanding.2715243275
/workspace/coverage/cover_reg_top/16.rv_dm_tap_fsm_rand_reset.2011273084
/workspace/coverage/cover_reg_top/16.rv_dm_tl_errors.1890923226
/workspace/coverage/cover_reg_top/16.rv_dm_tl_intg_err.3503335852
/workspace/coverage/cover_reg_top/17.rv_dm_csr_mem_rw_with_rand_reset.2956194021
/workspace/coverage/cover_reg_top/17.rv_dm_csr_rw.887932807
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dmi_csr_rw.3138391257
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dtm_csr_rw.781614078
/workspace/coverage/cover_reg_top/17.rv_dm_same_csr_outstanding.2743558115
/workspace/coverage/cover_reg_top/17.rv_dm_tap_fsm_rand_reset.2899139569
/workspace/coverage/cover_reg_top/17.rv_dm_tl_errors.361471540
/workspace/coverage/cover_reg_top/18.rv_dm_csr_mem_rw_with_rand_reset.3415582361
/workspace/coverage/cover_reg_top/18.rv_dm_csr_rw.3766313634
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_rw.3244723185
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dtm_csr_rw.3122984917
/workspace/coverage/cover_reg_top/18.rv_dm_same_csr_outstanding.3190188257
/workspace/coverage/cover_reg_top/18.rv_dm_tl_errors.4126587012
/workspace/coverage/cover_reg_top/18.rv_dm_tl_intg_err.3534207965
/workspace/coverage/cover_reg_top/19.rv_dm_csr_mem_rw_with_rand_reset.3603152354
/workspace/coverage/cover_reg_top/19.rv_dm_csr_rw.4079166008
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_rw.2870123343
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dtm_csr_rw.2959132259
/workspace/coverage/cover_reg_top/19.rv_dm_same_csr_outstanding.2681157934
/workspace/coverage/cover_reg_top/19.rv_dm_tl_intg_err.3221740849
/workspace/coverage/cover_reg_top/2.rv_dm_csr_aliasing.4254447169
/workspace/coverage/cover_reg_top/2.rv_dm_csr_bit_bash.185227202
/workspace/coverage/cover_reg_top/2.rv_dm_csr_hw_reset.2741350826
/workspace/coverage/cover_reg_top/2.rv_dm_csr_mem_rw_with_rand_reset.1244185359
/workspace/coverage/cover_reg_top/2.rv_dm_csr_rw.2818199431
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_aliasing.1322718893
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_bit_bash.470953167
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_hw_reset.1842111647
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_rw.348556283
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_aliasing.2141549463
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_bit_bash.1391954688
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_hw_reset.1005725327
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_rw.1488691998
/workspace/coverage/cover_reg_top/2.rv_dm_mem_partial_access.2281091173
/workspace/coverage/cover_reg_top/2.rv_dm_mem_walk.2403320836
/workspace/coverage/cover_reg_top/2.rv_dm_same_csr_outstanding.1137012275
/workspace/coverage/cover_reg_top/2.rv_dm_tl_errors.459175411
/workspace/coverage/cover_reg_top/2.rv_dm_tl_intg_err.135910270
/workspace/coverage/cover_reg_top/20.rv_dm_tap_fsm_rand_reset.2130848605
/workspace/coverage/cover_reg_top/21.rv_dm_tap_fsm_rand_reset.1514525806
/workspace/coverage/cover_reg_top/25.rv_dm_tap_fsm_rand_reset.2613296911
/workspace/coverage/cover_reg_top/26.rv_dm_tap_fsm_rand_reset.3558655038
/workspace/coverage/cover_reg_top/3.rv_dm_csr_aliasing.2984670898
/workspace/coverage/cover_reg_top/3.rv_dm_csr_bit_bash.2121989533
/workspace/coverage/cover_reg_top/3.rv_dm_csr_hw_reset.1405768686
/workspace/coverage/cover_reg_top/3.rv_dm_csr_mem_rw_with_rand_reset.2543341225
/workspace/coverage/cover_reg_top/3.rv_dm_csr_rw.2606469176
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_aliasing.454821631
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_bit_bash.3145139152
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_hw_reset.877801307
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_rw.2890982014
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_aliasing.1551359438
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_bit_bash.1653170431
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_hw_reset.1388086130
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_rw.11323408
/workspace/coverage/cover_reg_top/3.rv_dm_mem_partial_access.3420895619
/workspace/coverage/cover_reg_top/3.rv_dm_mem_walk.1970428643
/workspace/coverage/cover_reg_top/3.rv_dm_same_csr_outstanding.1456019675
/workspace/coverage/cover_reg_top/3.rv_dm_tl_errors.324393740
/workspace/coverage/cover_reg_top/3.rv_dm_tl_intg_err.441140190
/workspace/coverage/cover_reg_top/32.rv_dm_tap_fsm_rand_reset.3316006703
/workspace/coverage/cover_reg_top/33.rv_dm_tap_fsm_rand_reset.1796937085
/workspace/coverage/cover_reg_top/34.rv_dm_tap_fsm_rand_reset.342752406
/workspace/coverage/cover_reg_top/35.rv_dm_tap_fsm_rand_reset.3730626445
/workspace/coverage/cover_reg_top/4.rv_dm_csr_aliasing.804913428
/workspace/coverage/cover_reg_top/4.rv_dm_csr_bit_bash.4015978883
/workspace/coverage/cover_reg_top/4.rv_dm_csr_hw_reset.2243760972
/workspace/coverage/cover_reg_top/4.rv_dm_csr_mem_rw_with_rand_reset.4003260585
/workspace/coverage/cover_reg_top/4.rv_dm_csr_rw.1915015065
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_aliasing.3640471224
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_bit_bash.1673134327
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_hw_reset.4038745646
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_rw.3585930718
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_aliasing.1054824484
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_bit_bash.1565665450
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_hw_reset.1490257832
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_rw.1937357399
/workspace/coverage/cover_reg_top/4.rv_dm_mem_partial_access.1650525006
/workspace/coverage/cover_reg_top/4.rv_dm_mem_walk.2694724669
/workspace/coverage/cover_reg_top/4.rv_dm_same_csr_outstanding.61986959
/workspace/coverage/cover_reg_top/4.rv_dm_tl_errors.917047296
/workspace/coverage/cover_reg_top/4.rv_dm_tl_intg_err.1156096931
/workspace/coverage/cover_reg_top/5.rv_dm_csr_mem_rw_with_rand_reset.709784058
/workspace/coverage/cover_reg_top/5.rv_dm_csr_rw.604351888
/workspace/coverage/cover_reg_top/5.rv_dm_jtag_dmi_csr_rw.2340355786
/workspace/coverage/cover_reg_top/5.rv_dm_jtag_dtm_csr_rw.1218052341
/workspace/coverage/cover_reg_top/5.rv_dm_same_csr_outstanding.3484207120
/workspace/coverage/cover_reg_top/5.rv_dm_tl_errors.3027824957
/workspace/coverage/cover_reg_top/6.rv_dm_csr_mem_rw_with_rand_reset.2047896989
/workspace/coverage/cover_reg_top/6.rv_dm_csr_rw.2568652726
/workspace/coverage/cover_reg_top/6.rv_dm_jtag_dmi_csr_rw.3531782386
/workspace/coverage/cover_reg_top/6.rv_dm_jtag_dtm_csr_rw.4137235759
/workspace/coverage/cover_reg_top/6.rv_dm_same_csr_outstanding.641086281
/workspace/coverage/cover_reg_top/6.rv_dm_tl_errors.4259595016
/workspace/coverage/cover_reg_top/6.rv_dm_tl_intg_err.1427372294
/workspace/coverage/cover_reg_top/7.rv_dm_csr_mem_rw_with_rand_reset.2018468078
/workspace/coverage/cover_reg_top/7.rv_dm_csr_rw.2799144496
/workspace/coverage/cover_reg_top/7.rv_dm_jtag_dmi_csr_rw.3343046445
/workspace/coverage/cover_reg_top/7.rv_dm_jtag_dtm_csr_rw.3896757824
/workspace/coverage/cover_reg_top/7.rv_dm_tap_fsm_rand_reset.4124291670
/workspace/coverage/cover_reg_top/7.rv_dm_tl_errors.2772529689
/workspace/coverage/cover_reg_top/7.rv_dm_tl_intg_err.572060708
/workspace/coverage/cover_reg_top/8.rv_dm_csr_mem_rw_with_rand_reset.3808461729
/workspace/coverage/cover_reg_top/8.rv_dm_csr_rw.354825111
/workspace/coverage/cover_reg_top/8.rv_dm_jtag_dmi_csr_rw.22150968
/workspace/coverage/cover_reg_top/8.rv_dm_jtag_dtm_csr_rw.2023297791
/workspace/coverage/cover_reg_top/8.rv_dm_same_csr_outstanding.4131946155
/workspace/coverage/cover_reg_top/8.rv_dm_tl_errors.1949306961
/workspace/coverage/cover_reg_top/8.rv_dm_tl_intg_err.3596337264
/workspace/coverage/cover_reg_top/9.rv_dm_csr_mem_rw_with_rand_reset.2041227754
/workspace/coverage/cover_reg_top/9.rv_dm_csr_rw.2194720903
/workspace/coverage/cover_reg_top/9.rv_dm_jtag_dmi_csr_rw.3473680280
/workspace/coverage/cover_reg_top/9.rv_dm_jtag_dtm_csr_rw.1473526451
/workspace/coverage/cover_reg_top/9.rv_dm_same_csr_outstanding.3221494966
/workspace/coverage/cover_reg_top/9.rv_dm_tap_fsm_rand_reset.2595086613
/workspace/coverage/cover_reg_top/9.rv_dm_tl_errors.2001534627
/workspace/coverage/cover_reg_top/9.rv_dm_tl_intg_err.27889640
/workspace/coverage/default/0.rv_dm_alert_test.3231433566
/workspace/coverage/default/0.rv_dm_cmderr_busy.1189582150
/workspace/coverage/default/0.rv_dm_cmderr_not_supported.570318284
/workspace/coverage/default/0.rv_dm_dataaddr_rw_access.810800649
/workspace/coverage/default/0.rv_dm_hart_unavail.1835642458
/workspace/coverage/default/0.rv_dm_jtag_dmi_debug_disabled.2044578458
/workspace/coverage/default/0.rv_dm_jtag_dmi_dm_inactive.1337312437
/workspace/coverage/default/0.rv_dm_jtag_dtm_hard_reset.2587925125
/workspace/coverage/default/0.rv_dm_mem_tl_access_halted.3915284059
/workspace/coverage/default/0.rv_dm_mem_tl_access_resuming.1035972821
/workspace/coverage/default/0.rv_dm_ndmreset_req.2537344822
/workspace/coverage/default/0.rv_dm_smoke.2429785391
/workspace/coverage/default/0.rv_dm_stress_all.1556068918
/workspace/coverage/default/1.rv_dm_abstractcmd_status.2585858216
/workspace/coverage/default/1.rv_dm_alert_test.3424396961
/workspace/coverage/default/1.rv_dm_cmderr_exception.2132632547
/workspace/coverage/default/1.rv_dm_cmderr_not_supported.3521540860
/workspace/coverage/default/1.rv_dm_dataaddr_rw_access.3920055314
/workspace/coverage/default/1.rv_dm_hart_unavail.4008021268
/workspace/coverage/default/1.rv_dm_jtag_dmi_dm_inactive.3507263714
/workspace/coverage/default/1.rv_dm_jtag_dtm_hard_reset.4060898075
/workspace/coverage/default/1.rv_dm_mem_tl_access_halted.1199978346
/workspace/coverage/default/1.rv_dm_mem_tl_access_resuming.3703112959
/workspace/coverage/default/1.rv_dm_ndmreset_req.3946717194
/workspace/coverage/default/1.rv_dm_progbuf_busy.138285920
/workspace/coverage/default/1.rv_dm_progbuf_read_write_execute.3903239653
/workspace/coverage/default/1.rv_dm_rom_read_access.988190723
/workspace/coverage/default/1.rv_dm_sec_cm.1881082748
/workspace/coverage/default/1.rv_dm_smoke.2151431083
/workspace/coverage/default/10.rv_dm_alert_test.794154422
/workspace/coverage/default/11.rv_dm_alert_test.217196312
/workspace/coverage/default/13.rv_dm_alert_test.2834124190
/workspace/coverage/default/13.rv_dm_delayed_resp_sba_tl_access.1229481491
/workspace/coverage/default/14.rv_dm_alert_test.2879626248
/workspace/coverage/default/14.rv_dm_stress_all.2229339844
/workspace/coverage/default/15.rv_dm_alert_test.2944885985
/workspace/coverage/default/16.rv_dm_alert_test.3445668487
/workspace/coverage/default/17.rv_dm_alert_test.3241431245
/workspace/coverage/default/18.rv_dm_alert_test.3876451557
/workspace/coverage/default/19.rv_dm_alert_test.1175909801
/workspace/coverage/default/2.rv_dm_alert_test.3996727408
/workspace/coverage/default/2.rv_dm_hart_unavail.948432315
/workspace/coverage/default/2.rv_dm_sec_cm.629558898
/workspace/coverage/default/20.rv_dm_alert_test.1356518302
/workspace/coverage/default/21.rv_dm_alert_test.977784615
/workspace/coverage/default/22.rv_dm_alert_test.2878984457
/workspace/coverage/default/23.rv_dm_alert_test.2308407349
/workspace/coverage/default/24.rv_dm_alert_test.1808689438
/workspace/coverage/default/25.rv_dm_alert_test.2485064724
/workspace/coverage/default/26.rv_dm_alert_test.2500521540
/workspace/coverage/default/27.rv_dm_alert_test.420205768
/workspace/coverage/default/28.rv_dm_alert_test.2766986004
/workspace/coverage/default/3.rv_dm_alert_test.2380906324
/workspace/coverage/default/3.rv_dm_hart_unavail.4000392487
/workspace/coverage/default/3.rv_dm_sec_cm.2139040963
/workspace/coverage/default/30.rv_dm_alert_test.242142004
/workspace/coverage/default/31.rv_dm_alert_test.2760856962
/workspace/coverage/default/31.rv_dm_stress_all.1021312172
/workspace/coverage/default/32.rv_dm_alert_test.842166700
/workspace/coverage/default/33.rv_dm_alert_test.1845154592
/workspace/coverage/default/34.rv_dm_alert_test.1370622033
/workspace/coverage/default/35.rv_dm_alert_test.2370467143
/workspace/coverage/default/36.rv_dm_alert_test.1252123742
/workspace/coverage/default/37.rv_dm_alert_test.3496446910
/workspace/coverage/default/38.rv_dm_alert_test.419413685
/workspace/coverage/default/39.rv_dm_alert_test.2912755097
/workspace/coverage/default/4.rv_dm_alert_test.751152730
/workspace/coverage/default/4.rv_dm_hart_unavail.826847177
/workspace/coverage/default/4.rv_dm_sec_cm.2077586085
/workspace/coverage/default/40.rv_dm_alert_test.3815308924
/workspace/coverage/default/41.rv_dm_alert_test.4183537634
/workspace/coverage/default/42.rv_dm_alert_test.2269791178
/workspace/coverage/default/43.rv_dm_alert_test.3987028218
/workspace/coverage/default/44.rv_dm_alert_test.2935382615
/workspace/coverage/default/45.rv_dm_alert_test.2756906615
/workspace/coverage/default/46.rv_dm_alert_test.2526808165
/workspace/coverage/default/46.rv_dm_stress_all.3488525214
/workspace/coverage/default/47.rv_dm_alert_test.3460991139
/workspace/coverage/default/48.rv_dm_alert_test.4165772557
/workspace/coverage/default/49.rv_dm_alert_test.2318425522
/workspace/coverage/default/5.rv_dm_alert_test.4180955231
/workspace/coverage/default/5.rv_dm_stress_all.1314408784
/workspace/coverage/default/6.rv_dm_alert_test.4159294591
/workspace/coverage/default/7.rv_dm_alert_test.17482378
/workspace/coverage/default/8.rv_dm_alert_test.1755985907
/workspace/coverage/default/9.rv_dm_alert_test.2296389948
/workspace/coverage/default/9.rv_dm_sba_tl_access.2615079580



Total test records in report: 315
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/1.rv_dm_dataaddr_rw_access.3920055314 May 05 01:04:34 PM PDT 24 May 05 01:04:36 PM PDT 24 233244612 ps
T2 /workspace/coverage/default/13.rv_dm_alert_test.2834124190 May 05 01:04:47 PM PDT 24 May 05 01:04:48 PM PDT 24 32594789 ps
T3 /workspace/coverage/default/1.rv_dm_ndmreset_req.3946717194 May 05 01:04:25 PM PDT 24 May 05 01:04:26 PM PDT 24 66785475 ps
T4 /workspace/coverage/default/30.rv_dm_alert_test.242142004 May 05 01:05:12 PM PDT 24 May 05 01:05:13 PM PDT 24 76037440 ps
T5 /workspace/coverage/default/0.rv_dm_mem_tl_access_halted.3915284059 May 05 01:04:15 PM PDT 24 May 05 01:04:17 PM PDT 24 85841273 ps
T6 /workspace/coverage/default/5.rv_dm_stress_all.1314408784 May 05 01:04:39 PM PDT 24 May 05 01:04:52 PM PDT 24 4117236020 ps
T15 /workspace/coverage/default/0.rv_dm_rom_read_access.3094980378 May 05 01:04:22 PM PDT 24 May 05 01:04:23 PM PDT 24 52310085 ps
T32 /workspace/coverage/default/9.rv_dm_alert_test.2296389948 May 05 01:04:44 PM PDT 24 May 05 01:04:46 PM PDT 24 43031210 ps
T7 /workspace/coverage/default/25.rv_dm_stress_all.1397792311 May 05 01:05:03 PM PDT 24 May 05 01:05:12 PM PDT 24 10428508253 ps
T33 /workspace/coverage/default/29.rv_dm_alert_test.72595471 May 05 01:05:10 PM PDT 24 May 05 01:05:11 PM PDT 24 32794963 ps
T29 /workspace/coverage/default/2.rv_dm_sec_cm.629558898 May 05 01:04:32 PM PDT 24 May 05 01:04:34 PM PDT 24 511572899 ps
T25 /workspace/coverage/default/19.rv_dm_bad_sba_tl_access.3032248613 May 05 01:04:56 PM PDT 24 May 05 01:05:02 PM PDT 24 2519298897 ps
T9 /workspace/coverage/default/46.rv_dm_stress_all.3488525214 May 05 01:05:12 PM PDT 24 May 05 01:05:20 PM PDT 24 3677524733 ps
T55 /workspace/coverage/default/24.rv_dm_alert_test.1808689438 May 05 01:05:00 PM PDT 24 May 05 01:05:01 PM PDT 24 58864136 ps
T21 /workspace/coverage/default/1.rv_dm_progbuf_read_write_execute.3903239653 May 05 01:04:29 PM PDT 24 May 05 01:04:31 PM PDT 24 76361495 ps
T56 /workspace/coverage/default/12.rv_dm_alert_test.1824802265 May 05 01:04:48 PM PDT 24 May 05 01:04:50 PM PDT 24 49728673 ps
T50 /workspace/coverage/default/15.rv_dm_alert_test.2944885985 May 05 01:04:49 PM PDT 24 May 05 01:04:51 PM PDT 24 25847848 ps
T57 /workspace/coverage/default/1.rv_dm_jtag_dmi_dm_inactive.3507263714 May 05 01:04:34 PM PDT 24 May 05 01:04:36 PM PDT 24 126183225 ps
T13 /workspace/coverage/default/1.rv_dm_mem_tl_access_resuming.3703112959 May 05 01:04:27 PM PDT 24 May 05 01:04:29 PM PDT 24 455067211 ps
T48 /workspace/coverage/default/0.rv_dm_alert_test.3231433566 May 05 01:04:22 PM PDT 24 May 05 01:04:24 PM PDT 24 36566574 ps
T66 /workspace/coverage/default/0.rv_dm_jtag_dmi_dm_inactive.1337312437 May 05 01:04:18 PM PDT 24 May 05 01:04:19 PM PDT 24 156695610 ps
T65 /workspace/coverage/default/42.rv_dm_alert_test.2269791178 May 05 01:05:14 PM PDT 24 May 05 01:05:15 PM PDT 24 17664162 ps
T46 /workspace/coverage/default/4.rv_dm_alert_test.751152730 May 05 01:04:41 PM PDT 24 May 05 01:04:43 PM PDT 24 20700779 ps
T47 /workspace/coverage/default/21.rv_dm_alert_test.977784615 May 05 01:05:00 PM PDT 24 May 05 01:05:02 PM PDT 24 58381484 ps
T52 /workspace/coverage/default/45.rv_dm_alert_test.2756906615 May 05 01:05:13 PM PDT 24 May 05 01:05:14 PM PDT 24 204940110 ps
T26 /workspace/coverage/default/7.rv_dm_delayed_resp_sba_tl_access.2370557237 May 05 01:04:39 PM PDT 24 May 05 01:04:46 PM PDT 24 3304354316 ps
T10 /workspace/coverage/default/6.rv_dm_stress_all.3373471722 May 05 01:04:39 PM PDT 24 May 05 01:04:47 PM PDT 24 3116748930 ps
T51 /workspace/coverage/default/7.rv_dm_alert_test.17482378 May 05 01:04:39 PM PDT 24 May 05 01:04:40 PM PDT 24 28992990 ps
T11 /workspace/coverage/default/0.rv_dm_abstractcmd_status.2994956272 May 05 01:04:26 PM PDT 24 May 05 01:04:27 PM PDT 24 110137198 ps
T44 /workspace/coverage/default/19.rv_dm_alert_test.1175909801 May 05 01:04:58 PM PDT 24 May 05 01:05:00 PM PDT 24 149539402 ps
T27 /workspace/coverage/default/13.rv_dm_delayed_resp_sba_tl_access.1229481491 May 05 01:04:46 PM PDT 24 May 05 01:04:52 PM PDT 24 2412883731 ps
T12 /workspace/coverage/default/0.rv_dm_progbuf_busy.1266389534 May 05 01:04:22 PM PDT 24 May 05 01:04:25 PM PDT 24 653853336 ps
T133 /workspace/coverage/default/48.rv_dm_alert_test.4165772557 May 05 01:05:18 PM PDT 24 May 05 01:05:20 PM PDT 24 39261540 ps
T45 /workspace/coverage/default/0.rv_dm_cmderr_not_supported.570318284 May 05 01:04:23 PM PDT 24 May 05 01:04:27 PM PDT 24 3779086034 ps
T156 /workspace/coverage/default/1.rv_dm_hart_unavail.4008021268 May 05 01:04:26 PM PDT 24 May 05 01:04:28 PM PDT 24 81211345 ps
T34 /workspace/coverage/default/7.rv_dm_stress_all.666469584 May 05 01:04:39 PM PDT 24 May 05 01:04:54 PM PDT 24 4356474355 ps
T135 /workspace/coverage/default/44.rv_dm_alert_test.2935382615 May 05 01:05:15 PM PDT 24 May 05 01:05:17 PM PDT 24 42814037 ps
T154 /workspace/coverage/default/27.rv_dm_alert_test.420205768 May 05 01:05:00 PM PDT 24 May 05 01:05:02 PM PDT 24 21363958 ps
T36 /workspace/coverage/default/31.rv_dm_alert_test.2760856962 May 05 01:05:09 PM PDT 24 May 05 01:05:11 PM PDT 24 39330897 ps
T37 /workspace/coverage/default/49.rv_dm_alert_test.2318425522 May 05 01:05:20 PM PDT 24 May 05 01:05:22 PM PDT 24 34250964 ps
T111 /workspace/coverage/default/20.rv_dm_alert_test.1356518302 May 05 01:05:03 PM PDT 24 May 05 01:05:04 PM PDT 24 57542929 ps
T49 /workspace/coverage/default/34.rv_dm_alert_test.1370622033 May 05 01:05:07 PM PDT 24 May 05 01:05:08 PM PDT 24 24619593 ps
T59 /workspace/coverage/default/1.rv_dm_jtag_dtm_hard_reset.4060898075 May 05 01:04:27 PM PDT 24 May 05 01:04:29 PM PDT 24 385312025 ps
T30 /workspace/coverage/default/0.rv_dm_sec_cm.1037855085 May 05 01:04:22 PM PDT 24 May 05 01:04:24 PM PDT 24 308948019 ps
T18 /workspace/coverage/default/1.rv_dm_cmderr_exception.2132632547 May 05 01:04:26 PM PDT 24 May 05 01:04:28 PM PDT 24 473916895 ps
T157 /workspace/coverage/default/1.rv_dm_smoke.2151431083 May 05 01:04:20 PM PDT 24 May 05 01:04:22 PM PDT 24 443727232 ps
T131 /workspace/coverage/default/2.rv_dm_alert_test.3996727408 May 05 01:04:34 PM PDT 24 May 05 01:04:35 PM PDT 24 74542039 ps
T113 /workspace/coverage/default/43.rv_dm_alert_test.3987028218 May 05 01:05:21 PM PDT 24 May 05 01:05:22 PM PDT 24 48558974 ps
T137 /workspace/coverage/default/5.rv_dm_alert_test.4180955231 May 05 01:04:41 PM PDT 24 May 05 01:04:42 PM PDT 24 17737158 ps
T110 /workspace/coverage/default/31.rv_dm_stress_all.1021312172 May 05 01:05:08 PM PDT 24 May 05 01:05:13 PM PDT 24 1286992332 ps
T132 /workspace/coverage/default/3.rv_dm_alert_test.2380906324 May 05 01:04:34 PM PDT 24 May 05 01:04:35 PM PDT 24 72304521 ps
T64 /workspace/coverage/default/9.rv_dm_sba_tl_access.2615079580 May 05 01:04:44 PM PDT 24 May 05 01:04:53 PM PDT 24 3250135963 ps
T153 /workspace/coverage/default/32.rv_dm_alert_test.842166700 May 05 01:05:08 PM PDT 24 May 05 01:05:09 PM PDT 24 25745481 ps
T58 /workspace/coverage/default/0.rv_dm_tap_fsm.342596065 May 05 01:04:10 PM PDT 24 May 05 01:04:18 PM PDT 24 1902370103 ps
T145 /workspace/coverage/default/35.rv_dm_alert_test.2370467143 May 05 01:05:05 PM PDT 24 May 05 01:05:07 PM PDT 24 18007931 ps
T19 /workspace/coverage/default/14.rv_dm_stress_all.2229339844 May 05 01:04:53 PM PDT 24 May 05 01:05:08 PM PDT 24 4749014826 ps
T138 /workspace/coverage/default/26.rv_dm_alert_test.2500521540 May 05 01:05:04 PM PDT 24 May 05 01:05:05 PM PDT 24 20083813 ps
T31 /workspace/coverage/default/3.rv_dm_sec_cm.2139040963 May 05 01:04:35 PM PDT 24 May 05 01:04:37 PM PDT 24 389632189 ps
T24 /workspace/coverage/default/1.rv_dm_cmderr_busy.2221135832 May 05 01:04:28 PM PDT 24 May 05 01:04:32 PM PDT 24 6560011652 ps
T158 /workspace/coverage/default/2.rv_dm_hart_unavail.948432315 May 05 01:04:31 PM PDT 24 May 05 01:04:33 PM PDT 24 262314371 ps
T22 /workspace/coverage/default/0.rv_dm_progbuf_read_write_execute.1809413301 May 05 01:04:21 PM PDT 24 May 05 01:04:22 PM PDT 24 60434100 ps
T149 /workspace/coverage/default/23.rv_dm_alert_test.2308407349 May 05 01:05:01 PM PDT 24 May 05 01:05:03 PM PDT 24 25682824 ps
T147 /workspace/coverage/default/47.rv_dm_alert_test.3460991139 May 05 01:05:17 PM PDT 24 May 05 01:05:19 PM PDT 24 29948003 ps
T20 /workspace/coverage/default/0.rv_dm_cmderr_exception.3703314898 May 05 01:04:14 PM PDT 24 May 05 01:04:15 PM PDT 24 783554176 ps
T14 /workspace/coverage/default/0.rv_dm_stress_all.1556068918 May 05 01:04:21 PM PDT 24 May 05 01:04:34 PM PDT 24 3254075234 ps
T151 /workspace/coverage/default/37.rv_dm_alert_test.3496446910 May 05 01:05:17 PM PDT 24 May 05 01:05:19 PM PDT 24 24993063 ps
T159 /workspace/coverage/default/38.rv_dm_alert_test.419413685 May 05 01:05:17 PM PDT 24 May 05 01:05:18 PM PDT 24 21639572 ps
T160 /workspace/coverage/default/0.rv_dm_hart_unavail.1835642458 May 05 01:04:15 PM PDT 24 May 05 01:04:17 PM PDT 24 74239216 ps
T161 /workspace/coverage/default/0.rv_dm_jtag_dtm_hard_reset.2587925125 May 05 01:04:21 PM PDT 24 May 05 01:04:23 PM PDT 24 160996093 ps
T162 /workspace/coverage/default/36.rv_dm_alert_test.1252123742 May 05 01:05:07 PM PDT 24 May 05 01:05:08 PM PDT 24 50459064 ps
T146 /workspace/coverage/default/46.rv_dm_alert_test.2526808165 May 05 01:05:15 PM PDT 24 May 05 01:05:17 PM PDT 24 21416021 ps
T152 /workspace/coverage/default/41.rv_dm_alert_test.4183537634 May 05 01:05:18 PM PDT 24 May 05 01:05:19 PM PDT 24 44712501 ps
T142 /workspace/coverage/default/14.rv_dm_alert_test.2879626248 May 05 01:04:51 PM PDT 24 May 05 01:04:52 PM PDT 24 59474825 ps
T155 /workspace/coverage/default/8.rv_dm_alert_test.1755985907 May 05 01:04:46 PM PDT 24 May 05 01:04:47 PM PDT 24 14839329 ps
T163 /workspace/coverage/default/33.rv_dm_alert_test.1845154592 May 05 01:05:09 PM PDT 24 May 05 01:05:11 PM PDT 24 35035664 ps
T141 /workspace/coverage/default/11.rv_dm_alert_test.217196312 May 05 01:04:53 PM PDT 24 May 05 01:04:55 PM PDT 24 45832716 ps
T164 /workspace/coverage/default/17.rv_dm_alert_test.3241431245 May 05 01:04:54 PM PDT 24 May 05 01:04:55 PM PDT 24 61321842 ps
T165 /workspace/coverage/default/1.rv_dm_mem_tl_access_halted.1199978346 May 05 01:04:25 PM PDT 24 May 05 01:04:26 PM PDT 24 70006345 ps
T166 /workspace/coverage/default/3.rv_dm_hart_unavail.4000392487 May 05 01:04:35 PM PDT 24 May 05 01:04:37 PM PDT 24 67333246 ps
T128 /workspace/coverage/default/0.rv_dm_cmderr_busy.1189582150 May 05 01:04:18 PM PDT 24 May 05 01:04:32 PM PDT 24 3962579209 ps
T167 /workspace/coverage/default/4.rv_dm_hart_unavail.826847177 May 05 01:04:32 PM PDT 24 May 05 01:04:33 PM PDT 24 51882138 ps
T139 /workspace/coverage/default/40.rv_dm_alert_test.3815308924 May 05 01:05:11 PM PDT 24 May 05 01:05:12 PM PDT 24 30593463 ps
T140 /workspace/coverage/default/16.rv_dm_alert_test.3445668487 May 05 01:04:48 PM PDT 24 May 05 01:04:49 PM PDT 24 34368957 ps
T130 /workspace/coverage/default/0.rv_dm_ndmreset_req.2537344822 May 05 01:04:22 PM PDT 24 May 05 01:04:25 PM PDT 24 1088752560 ps
T143 /workspace/coverage/default/10.rv_dm_alert_test.794154422 May 05 01:04:46 PM PDT 24 May 05 01:04:47 PM PDT 24 25812174 ps
T168 /workspace/coverage/default/0.rv_dm_smoke.2429785391 May 05 01:04:22 PM PDT 24 May 05 01:04:25 PM PDT 24 330467858 ps
T169 /workspace/coverage/default/18.rv_dm_alert_test.3876451557 May 05 01:04:55 PM PDT 24 May 05 01:04:57 PM PDT 24 34119418 ps
T148 /workspace/coverage/default/1.rv_dm_alert_test.3424396961 May 05 01:04:34 PM PDT 24 May 05 01:04:36 PM PDT 24 43758801 ps
T129 /workspace/coverage/default/1.rv_dm_cmderr_not_supported.3521540860 May 05 01:04:26 PM PDT 24 May 05 01:04:30 PM PDT 24 2175292175 ps
T53 /workspace/coverage/default/1.rv_dm_sec_cm.1881082748 May 05 01:04:28 PM PDT 24 May 05 01:04:30 PM PDT 24 432077534 ps
T8 /workspace/coverage/default/1.rv_dm_cmderr_halt_resume.3782515712 May 05 01:04:28 PM PDT 24 May 05 01:04:30 PM PDT 24 377381759 ps
T16 /workspace/coverage/default/1.rv_dm_rom_read_access.988190723 May 05 01:04:34 PM PDT 24 May 05 01:04:36 PM PDT 24 119138415 ps
T17 /workspace/coverage/default/1.rv_dm_progbuf_busy.138285920 May 05 01:04:29 PM PDT 24 May 05 01:04:31 PM PDT 24 102193583 ps
T134 /workspace/coverage/default/6.rv_dm_alert_test.4159294591 May 05 01:04:39 PM PDT 24 May 05 01:04:40 PM PDT 24 34877656 ps
T28 /workspace/coverage/default/11.rv_dm_autoincr_sba_tl_access.840320542 May 05 01:04:46 PM PDT 24 May 05 01:05:04 PM PDT 24 28356436281 ps
T54 /workspace/coverage/default/4.rv_dm_sec_cm.2077586085 May 05 01:04:40 PM PDT 24 May 05 01:04:42 PM PDT 24 286362697 ps
T35 /workspace/coverage/default/0.rv_dm_jtag_dmi_debug_disabled.2044578458 May 05 01:04:14 PM PDT 24 May 05 01:04:16 PM PDT 24 442694043 ps
T170 /workspace/coverage/default/28.rv_dm_alert_test.2766986004 May 05 01:05:02 PM PDT 24 May 05 01:05:03 PM PDT 24 19728869 ps
T23 /workspace/coverage/default/1.rv_dm_abstractcmd_status.2585858216 May 05 01:04:31 PM PDT 24 May 05 01:04:33 PM PDT 24 89566322 ps
T171 /workspace/coverage/default/25.rv_dm_alert_test.2485064724 May 05 01:05:02 PM PDT 24 May 05 01:05:04 PM PDT 24 29032818 ps
T144 /workspace/coverage/default/22.rv_dm_alert_test.2878984457 May 05 01:05:01 PM PDT 24 May 05 01:05:02 PM PDT 24 35157452 ps
T150 /workspace/coverage/default/39.rv_dm_alert_test.2912755097 May 05 01:05:18 PM PDT 24 May 05 01:05:19 PM PDT 24 22985400 ps
T172 /workspace/coverage/default/0.rv_dm_mem_tl_access_resuming.1035972821 May 05 01:04:15 PM PDT 24 May 05 01:04:16 PM PDT 24 166090318 ps
T173 /workspace/coverage/default/0.rv_dm_dataaddr_rw_access.810800649 May 05 01:04:16 PM PDT 24 May 05 01:04:17 PM PDT 24 130315193 ps
T38 /workspace/coverage/cover_reg_top/33.rv_dm_tap_fsm_rand_reset.1796937085 May 05 01:04:10 PM PDT 24 May 05 01:04:36 PM PDT 24 7478622992 ps
T41 /workspace/coverage/cover_reg_top/7.rv_dm_tl_errors.2772529689 May 05 01:03:42 PM PDT 24 May 05 01:03:45 PM PDT 24 338586659 ps
T39 /workspace/coverage/cover_reg_top/36.rv_dm_tap_fsm_rand_reset.103516953 May 05 01:04:11 PM PDT 24 May 05 01:04:34 PM PDT 24 6496832568 ps
T174 /workspace/coverage/cover_reg_top/17.rv_dm_jtag_dmi_csr_rw.3138391257 May 05 01:04:06 PM PDT 24 May 05 01:04:08 PM PDT 24 437644508 ps
T61 /workspace/coverage/cover_reg_top/10.rv_dm_jtag_dtm_csr_rw.847858666 May 05 01:03:53 PM PDT 24 May 05 01:03:55 PM PDT 24 80289948 ps
T42 /workspace/coverage/cover_reg_top/9.rv_dm_same_csr_outstanding.3221494966 May 05 01:03:47 PM PDT 24 May 05 01:03:52 PM PDT 24 287554748 ps
T40 /workspace/coverage/cover_reg_top/0.rv_dm_tap_fsm_rand_reset.100588898 May 05 01:03:17 PM PDT 24 May 05 01:04:04 PM PDT 24 14783636041 ps
T43 /workspace/coverage/cover_reg_top/10.rv_dm_tl_intg_err.3394972879 May 05 01:03:55 PM PDT 24 May 05 01:04:14 PM PDT 24 1153646390 ps
T74 /workspace/coverage/cover_reg_top/4.rv_dm_csr_rw.1915015065 May 05 01:03:38 PM PDT 24 May 05 01:03:40 PM PDT 24 98546676 ps
T67 /workspace/coverage/cover_reg_top/1.rv_dm_tl_errors.1304061388 May 05 01:03:28 PM PDT 24 May 05 01:03:32 PM PDT 24 60762555 ps
T75 /workspace/coverage/cover_reg_top/11.rv_dm_csr_rw.3734223936 May 05 01:03:56 PM PDT 24 May 05 01:03:59 PM PDT 24 94699520 ps
T175 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_bit_bash.1673134327 May 05 01:03:33 PM PDT 24 May 05 01:04:02 PM PDT 24 34427990452 ps
T68 /workspace/coverage/cover_reg_top/0.rv_dm_tl_intg_err.2081762813 May 05 01:03:23 PM PDT 24 May 05 01:03:39 PM PDT 24 481552987 ps
T62 /workspace/coverage/cover_reg_top/5.rv_dm_jtag_dtm_csr_rw.1218052341 May 05 01:03:37 PM PDT 24 May 05 01:03:38 PM PDT 24 42492685 ps
T69 /workspace/coverage/cover_reg_top/26.rv_dm_tap_fsm_rand_reset.3558655038 May 05 01:04:10 PM PDT 24 May 05 01:04:20 PM PDT 24 7621972063 ps
T176 /workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_rw.3244723185 May 05 01:04:10 PM PDT 24 May 05 01:04:12 PM PDT 24 1163858079 ps
T63 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_aliasing.1551359438 May 05 01:03:28 PM PDT 24 May 05 01:03:30 PM PDT 24 107317393 ps
T76 /workspace/coverage/cover_reg_top/12.rv_dm_csr_rw.1328326410 May 05 01:03:53 PM PDT 24 May 05 01:03:55 PM PDT 24 161538273 ps
T177 /workspace/coverage/cover_reg_top/4.rv_dm_mem_walk.2694724669 May 05 01:03:41 PM PDT 24 May 05 01:03:43 PM PDT 24 37020913 ps
T77 /workspace/coverage/cover_reg_top/7.rv_dm_same_csr_outstanding.3914059008 May 05 01:03:49 PM PDT 24 May 05 01:03:54 PM PDT 24 808565096 ps
T70 /workspace/coverage/cover_reg_top/13.rv_dm_tl_errors.1081064497 May 05 01:04:01 PM PDT 24 May 05 01:04:07 PM PDT 24 622462834 ps
T71 /workspace/coverage/cover_reg_top/3.rv_dm_csr_mem_rw_with_rand_reset.2543341225 May 05 01:03:32 PM PDT 24 May 05 01:03:36 PM PDT 24 1570615111 ps
T178 /workspace/coverage/cover_reg_top/0.rv_dm_mem_walk.820463018 May 05 01:03:27 PM PDT 24 May 05 01:03:29 PM PDT 24 22396263 ps
T179 /workspace/coverage/cover_reg_top/13.rv_dm_jtag_dtm_csr_rw.1949688822 May 05 01:03:59 PM PDT 24 May 05 01:04:01 PM PDT 24 70398830 ps
T72 /workspace/coverage/cover_reg_top/10.rv_dm_tl_errors.2053341897 May 05 01:03:54 PM PDT 24 May 05 01:03:59 PM PDT 24 1048822640 ps
T180 /workspace/coverage/cover_reg_top/7.rv_dm_jtag_dmi_csr_rw.3343046445 May 05 01:03:43 PM PDT 24 May 05 01:03:44 PM PDT 24 150350331 ps
T73 /workspace/coverage/cover_reg_top/4.rv_dm_csr_mem_rw_with_rand_reset.4003260585 May 05 01:03:40 PM PDT 24 May 05 01:03:45 PM PDT 24 404609983 ps
T181 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_bit_bash.470953167 May 05 01:03:22 PM PDT 24 May 05 01:03:39 PM PDT 24 8849734257 ps
T78 /workspace/coverage/cover_reg_top/13.rv_dm_same_csr_outstanding.2694660581 May 05 01:04:01 PM PDT 24 May 05 01:04:08 PM PDT 24 157176471 ps
T182 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_aliasing.2632861580 May 05 01:03:21 PM PDT 24 May 05 01:03:22 PM PDT 24 348244297 ps
T183 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_hw_reset.1842111647 May 05 01:03:21 PM PDT 24 May 05 01:03:23 PM PDT 24 281914266 ps
T79 /workspace/coverage/cover_reg_top/1.rv_dm_csr_hw_reset.3909480856 May 05 01:03:16 PM PDT 24 May 05 01:03:19 PM PDT 24 143870357 ps
T184 /workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_rw.2150654404 May 05 01:04:02 PM PDT 24 May 05 01:04:04 PM PDT 24 918404035 ps
T185 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_bit_bash.367303101 May 05 01:03:17 PM PDT 24 May 05 01:03:34 PM PDT 24 14487769274 ps
T136 /workspace/coverage/cover_reg_top/14.rv_dm_tl_errors.1396975360 May 05 01:03:59 PM PDT 24 May 05 01:04:04 PM PDT 24 187619426 ps
T186 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_bit_bash.1653170431 May 05 01:03:27 PM PDT 24 May 05 01:03:30 PM PDT 24 913890109 ps
T114 /workspace/coverage/cover_reg_top/16.rv_dm_tl_errors.1890923226 May 05 01:04:03 PM PDT 24 May 05 01:04:07 PM PDT 24 482653553 ps
T187 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_rw.11323408 May 05 01:03:26 PM PDT 24 May 05 01:03:27 PM PDT 24 26678766 ps
T112 /workspace/coverage/cover_reg_top/19.rv_dm_tl_intg_err.3221740849 May 05 01:04:06 PM PDT 24 May 05 01:04:18 PM PDT 24 558322126 ps
T80 /workspace/coverage/cover_reg_top/12.rv_dm_same_csr_outstanding.88364662 May 05 01:03:54 PM PDT 24 May 05 01:03:59 PM PDT 24 207810420 ps
T81 /workspace/coverage/cover_reg_top/1.rv_dm_csr_bit_bash.3046090877 May 05 01:03:21 PM PDT 24 May 05 01:04:31 PM PDT 24 7367086905 ps
T188 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_aliasing.3640471224 May 05 01:03:33 PM PDT 24 May 05 01:03:57 PM PDT 24 9280459227 ps
T189 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_aliasing.3718871200 May 05 01:03:18 PM PDT 24 May 05 01:03:20 PM PDT 24 73065450 ps
T82 /workspace/coverage/cover_reg_top/19.rv_dm_same_csr_outstanding.2681157934 May 05 01:04:09 PM PDT 24 May 05 01:04:17 PM PDT 24 1026036417 ps
T190 /workspace/coverage/cover_reg_top/13.rv_dm_csr_mem_rw_with_rand_reset.2498665017 May 05 01:04:04 PM PDT 24 May 05 01:04:10 PM PDT 24 2334970026 ps
T117 /workspace/coverage/cover_reg_top/17.rv_dm_tl_intg_err.3176410029 May 05 01:04:07 PM PDT 24 May 05 01:04:27 PM PDT 24 3932670521 ps
T191 /workspace/coverage/cover_reg_top/25.rv_dm_tap_fsm_rand_reset.2613296911 May 05 01:04:10 PM PDT 24 May 05 01:04:27 PM PDT 24 13509907529 ps
T192 /workspace/coverage/cover_reg_top/1.rv_dm_mem_partial_access.3316483249 May 05 01:03:28 PM PDT 24 May 05 01:03:30 PM PDT 24 21112766 ps
T193 /workspace/coverage/cover_reg_top/0.rv_dm_csr_mem_rw_with_rand_reset.1320269015 May 05 01:03:16 PM PDT 24 May 05 01:03:20 PM PDT 24 488019911 ps
T194 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_rw.3991564278 May 05 01:03:18 PM PDT 24 May 05 01:03:20 PM PDT 24 324581016 ps
T60 /workspace/coverage/cover_reg_top/11.rv_dm_csr_mem_rw_with_rand_reset.3244555750 May 05 01:03:54 PM PDT 24 May 05 01:03:59 PM PDT 24 3422888749 ps
T195 /workspace/coverage/cover_reg_top/7.rv_dm_csr_rw.2799144496 May 05 01:03:43 PM PDT 24 May 05 01:03:46 PM PDT 24 67081382 ps
T196 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_aliasing.4260640925 May 05 01:03:16 PM PDT 24 May 05 01:03:32 PM PDT 24 12696704845 ps
T121 /workspace/coverage/cover_reg_top/13.rv_dm_tl_intg_err.3285557727 May 05 01:04:00 PM PDT 24 May 05 01:04:10 PM PDT 24 362874962 ps
T87 /workspace/coverage/cover_reg_top/5.rv_dm_same_csr_outstanding.3484207120 May 05 01:03:37 PM PDT 24 May 05 01:03:45 PM PDT 24 1111740601 ps
T197 /workspace/coverage/cover_reg_top/18.rv_dm_tl_errors.4126587012 May 05 01:04:08 PM PDT 24 May 05 01:04:11 PM PDT 24 580210615 ps
T198 /workspace/coverage/cover_reg_top/8.rv_dm_jtag_dtm_csr_rw.2023297791 May 05 01:03:50 PM PDT 24 May 05 01:03:51 PM PDT 24 54908169 ps
T199 /workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_rw.3869013413 May 05 01:03:58 PM PDT 24 May 05 01:04:02 PM PDT 24 518650115 ps
T83 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_hw_reset.1275463381 May 05 01:03:17 PM PDT 24 May 05 01:03:22 PM PDT 24 3022580528 ps
T200 /workspace/coverage/cover_reg_top/2.rv_dm_mem_walk.2403320836 May 05 01:03:29 PM PDT 24 May 05 01:03:31 PM PDT 24 23366438 ps
T109 /workspace/coverage/cover_reg_top/17.rv_dm_csr_mem_rw_with_rand_reset.2956194021 May 05 01:04:04 PM PDT 24 May 05 01:04:09 PM PDT 24 2614759268 ps
T201 /workspace/coverage/cover_reg_top/9.rv_dm_jtag_dmi_csr_rw.3473680280 May 05 01:03:52 PM PDT 24 May 05 01:03:54 PM PDT 24 388955865 ps
T88 /workspace/coverage/cover_reg_top/4.rv_dm_same_csr_outstanding.61986959 May 05 01:03:38 PM PDT 24 May 05 01:03:47 PM PDT 24 536839130 ps
T202 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_bit_bash.1808112464 May 05 01:03:19 PM PDT 24 May 05 01:03:24 PM PDT 24 1515341470 ps
T203 /workspace/coverage/cover_reg_top/0.rv_dm_tl_errors.3622538679 May 05 01:03:19 PM PDT 24 May 05 01:03:25 PM PDT 24 309612500 ps
T204 /workspace/coverage/cover_reg_top/7.rv_dm_tap_fsm_rand_reset.4124291670 May 05 01:03:45 PM PDT 24 May 05 01:04:01 PM PDT 24 7817244624 ps
T89 /workspace/coverage/cover_reg_top/3.rv_dm_csr_rw.2606469176 May 05 01:03:33 PM PDT 24 May 05 01:03:36 PM PDT 24 76319276 ps
T90 /workspace/coverage/cover_reg_top/6.rv_dm_same_csr_outstanding.641086281 May 05 01:03:42 PM PDT 24 May 05 01:03:46 PM PDT 24 426791437 ps
T205 /workspace/coverage/cover_reg_top/9.rv_dm_tl_intg_err.27889640 May 05 01:03:50 PM PDT 24 May 05 01:04:00 PM PDT 24 2188517506 ps
T206 /workspace/coverage/cover_reg_top/1.rv_dm_csr_mem_rw_with_rand_reset.702291975 May 05 01:03:21 PM PDT 24 May 05 01:03:25 PM PDT 24 1580595950 ps
T207 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_rw.1937357399 May 05 01:03:35 PM PDT 24 May 05 01:03:37 PM PDT 24 69507558 ps
T208 /workspace/coverage/cover_reg_top/3.rv_dm_mem_walk.1970428643 May 05 01:03:34 PM PDT 24 May 05 01:03:36 PM PDT 24 39776085 ps
T209 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_aliasing.454821631 May 05 01:03:28 PM PDT 24 May 05 01:04:01 PM PDT 24 20493054792 ps
T210 /workspace/coverage/cover_reg_top/2.rv_dm_csr_mem_rw_with_rand_reset.1244185359 May 05 01:03:29 PM PDT 24 May 05 01:03:32 PM PDT 24 46067367 ps
T211 /workspace/coverage/cover_reg_top/15.rv_dm_jtag_dtm_csr_rw.875102771 May 05 01:04:00 PM PDT 24 May 05 01:04:02 PM PDT 24 61140664 ps
T212 /workspace/coverage/cover_reg_top/12.rv_dm_jtag_dtm_csr_rw.478359322 May 05 01:03:56 PM PDT 24 May 05 01:03:58 PM PDT 24 99604298 ps
T213 /workspace/coverage/cover_reg_top/6.rv_dm_jtag_dtm_csr_rw.4137235759 May 05 01:03:39 PM PDT 24 May 05 01:03:40 PM PDT 24 48704458 ps
T214 /workspace/coverage/cover_reg_top/0.rv_dm_mem_partial_access.2478539481 May 05 01:03:28 PM PDT 24 May 05 01:03:30 PM PDT 24 218995621 ps
T122 /workspace/coverage/cover_reg_top/12.rv_dm_tl_intg_err.2471491035 May 05 01:03:54 PM PDT 24 May 05 01:04:11 PM PDT 24 2233633303 ps
T91 /workspace/coverage/cover_reg_top/0.rv_dm_same_csr_outstanding.498921502 May 05 01:03:18 PM PDT 24 May 05 01:03:23 PM PDT 24 2030530978 ps
T215 /workspace/coverage/cover_reg_top/14.rv_dm_tap_fsm_rand_reset.970125152 May 05 01:03:59 PM PDT 24 May 05 01:04:17 PM PDT 24 8439619157 ps
T124 /workspace/coverage/cover_reg_top/11.rv_dm_tl_intg_err.266502346 May 05 01:03:55 PM PDT 24 May 05 01:04:06 PM PDT 24 683883760 ps
T216 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_hw_reset.1517101028 May 05 01:03:17 PM PDT 24 May 05 01:03:19 PM PDT 24 72600380 ps
T217 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_rw.983088906 May 05 01:03:20 PM PDT 24 May 05 01:03:22 PM PDT 24 832368533 ps
T218 /workspace/coverage/cover_reg_top/10.rv_dm_csr_rw.2697853065 May 05 01:03:53 PM PDT 24 May 05 01:03:55 PM PDT 24 89878892 ps
T219 /workspace/coverage/cover_reg_top/6.rv_dm_csr_rw.2568652726 May 05 01:03:43 PM PDT 24 May 05 01:03:46 PM PDT 24 184022873 ps
T108 /workspace/coverage/cover_reg_top/15.rv_dm_same_csr_outstanding.1345921859 May 05 01:03:59 PM PDT 24 May 05 01:04:08 PM PDT 24 442149919 ps
T220 /workspace/coverage/cover_reg_top/16.rv_dm_tap_fsm_rand_reset.2011273084 May 05 01:03:59 PM PDT 24 May 05 01:04:18 PM PDT 24 13585696465 ps
T221 /workspace/coverage/cover_reg_top/6.rv_dm_tl_intg_err.1427372294 May 05 01:03:43 PM PDT 24 May 05 01:04:00 PM PDT 24 608443304 ps
T222 /workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_rw.3682252908 May 05 01:03:59 PM PDT 24 May 05 01:04:01 PM PDT 24 259467224 ps
T223 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_bit_bash.1565665450 May 05 01:03:32 PM PDT 24 May 05 01:03:35 PM PDT 24 577120756 ps
T99 /workspace/coverage/cover_reg_top/1.rv_dm_csr_rw.2599170403 May 05 01:03:19 PM PDT 24 May 05 01:03:22 PM PDT 24 50916659 ps
T100 /workspace/coverage/cover_reg_top/5.rv_dm_csr_rw.604351888 May 05 01:03:40 PM PDT 24 May 05 01:03:43 PM PDT 24 318316394 ps
T224 /workspace/coverage/cover_reg_top/3.rv_dm_tl_intg_err.441140190 May 05 01:03:36 PM PDT 24 May 05 01:03:46 PM PDT 24 1669366167 ps
T225 /workspace/coverage/cover_reg_top/8.rv_dm_tl_errors.1949306961 May 05 01:03:48 PM PDT 24 May 05 01:03:52 PM PDT 24 489231251 ps
T226 /workspace/coverage/cover_reg_top/17.rv_dm_tl_errors.361471540 May 05 01:04:05 PM PDT 24 May 05 01:04:11 PM PDT 24 146570570 ps
T227 /workspace/coverage/cover_reg_top/13.rv_dm_csr_rw.3453989600 May 05 01:04:00 PM PDT 24 May 05 01:04:03 PM PDT 24 133996046 ps
T228 /workspace/coverage/cover_reg_top/17.rv_dm_same_csr_outstanding.2743558115 May 05 01:04:05 PM PDT 24 May 05 01:04:10 PM PDT 24 497518957 ps
T229 /workspace/coverage/cover_reg_top/6.rv_dm_csr_mem_rw_with_rand_reset.2047896989 May 05 01:03:42 PM PDT 24 May 05 01:03:46 PM PDT 24 1064752893 ps
T101 /workspace/coverage/cover_reg_top/4.rv_dm_csr_hw_reset.2243760972 May 05 01:03:38 PM PDT 24 May 05 01:03:40 PM PDT 24 60691668 ps
T92 /workspace/coverage/cover_reg_top/0.rv_dm_csr_aliasing.1205945370 May 05 01:03:19 PM PDT 24 May 05 01:03:50 PM PDT 24 1881357296 ps
T125 /workspace/coverage/cover_reg_top/7.rv_dm_tl_intg_err.572060708 May 05 01:03:41 PM PDT 24 May 05 01:03:52 PM PDT 24 472637824 ps
T230 /workspace/coverage/cover_reg_top/9.rv_dm_csr_mem_rw_with_rand_reset.2041227754 May 05 01:03:55 PM PDT 24 May 05 01:04:04 PM PDT 24 8660918449 ps
T231 /workspace/coverage/cover_reg_top/11.rv_dm_tl_errors.1833888078 May 05 01:03:56 PM PDT 24 May 05 01:03:59 PM PDT 24 98931664 ps
T123 /workspace/coverage/cover_reg_top/5.rv_dm_tl_intg_err.183610986 May 05 01:03:40 PM PDT 24 May 05 01:03:51 PM PDT 24 1183624792 ps
T102 /workspace/coverage/cover_reg_top/9.rv_dm_csr_rw.2194720903 May 05 01:03:48 PM PDT 24 May 05 01:03:51 PM PDT 24 866704625 ps
T103 /workspace/coverage/cover_reg_top/0.rv_dm_csr_bit_bash.3978002296 May 05 01:03:19 PM PDT 24 May 05 01:03:48 PM PDT 24 753755946 ps
T127 /workspace/coverage/cover_reg_top/8.rv_dm_tl_intg_err.3596337264 May 05 01:03:48 PM PDT 24 May 05 01:03:57 PM PDT 24 853262690 ps
T104 /workspace/coverage/cover_reg_top/17.rv_dm_csr_rw.887932807 May 05 01:04:08 PM PDT 24 May 05 01:04:11 PM PDT 24 53557987 ps
T232 /workspace/coverage/cover_reg_top/14.rv_dm_same_csr_outstanding.3521142825 May 05 01:04:01 PM PDT 24 May 05 01:04:09 PM PDT 24 292917112 ps
T233 /workspace/coverage/cover_reg_top/2.rv_dm_csr_aliasing.4254447169 May 05 01:03:21 PM PDT 24 May 05 01:04:27 PM PDT 24 4401135785 ps
T234 /workspace/coverage/cover_reg_top/12.rv_dm_csr_mem_rw_with_rand_reset.2080281124 May 05 01:04:01 PM PDT 24 May 05 01:04:07 PM PDT 24 1840722546 ps
T105 /workspace/coverage/cover_reg_top/0.rv_dm_csr_hw_reset.4098397075 May 05 01:03:21 PM PDT 24 May 05 01:03:24 PM PDT 24 189336854 ps
T235 /workspace/coverage/cover_reg_top/34.rv_dm_tap_fsm_rand_reset.342752406 May 05 01:04:12 PM PDT 24 May 05 01:04:29 PM PDT 24 9166449211 ps
T236 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_rw.1488691998 May 05 01:03:23 PM PDT 24 May 05 01:03:25 PM PDT 24 193158389 ps
T118 /workspace/coverage/cover_reg_top/15.rv_dm_tl_intg_err.2108128330 May 05 01:03:59 PM PDT 24 May 05 01:04:19 PM PDT 24 1363596667 ps
T237 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_aliasing.2141549463 May 05 01:03:21 PM PDT 24 May 05 01:03:22 PM PDT 24 368756367 ps
T93 /workspace/coverage/cover_reg_top/18.rv_dm_same_csr_outstanding.3190188257 May 05 01:04:06 PM PDT 24 May 05 01:04:13 PM PDT 24 272378741 ps
T238 /workspace/coverage/cover_reg_top/2.rv_dm_tl_errors.459175411 May 05 01:03:21 PM PDT 24 May 05 01:03:27 PM PDT 24 429037675 ps
T239 /workspace/coverage/cover_reg_top/3.rv_dm_csr_bit_bash.2121989533 May 05 01:03:34 PM PDT 24 May 05 01:04:43 PM PDT 24 10002774700 ps
T106 /workspace/coverage/cover_reg_top/8.rv_dm_csr_rw.354825111 May 05 01:03:49 PM PDT 24 May 05 01:03:52 PM PDT 24 224516323 ps
T240 /workspace/coverage/cover_reg_top/15.rv_dm_csr_mem_rw_with_rand_reset.424185683 May 05 01:04:03 PM PDT 24 May 05 01:04:07 PM PDT 24 552847622 ps
T241 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_hw_reset.1388086130 May 05 01:03:26 PM PDT 24 May 05 01:03:27 PM PDT 24 71624435 ps
T94 /workspace/coverage/cover_reg_top/8.rv_dm_same_csr_outstanding.4131946155 May 05 01:03:52 PM PDT 24 May 05 01:03:57 PM PDT 24 1102126691 ps
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T242 /workspace/coverage/cover_reg_top/3.rv_dm_csr_hw_reset.1405768686 May 05 01:03:34 PM PDT 24 May 05 01:03:36 PM PDT 24 56679524 ps
T243 /workspace/coverage/cover_reg_top/8.rv_dm_csr_mem_rw_with_rand_reset.3808461729 May 05 01:03:49 PM PDT 24 May 05 01:03:51 PM PDT 24 170051008 ps
T126 /workspace/coverage/cover_reg_top/16.rv_dm_tl_intg_err.3503335852 May 05 01:04:01 PM PDT 24 May 05 01:04:22 PM PDT 24 3987394082 ps
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T244 /workspace/coverage/cover_reg_top/17.rv_dm_tap_fsm_rand_reset.2899139569 May 05 01:04:09 PM PDT 24 May 05 01:04:32 PM PDT 24 5994542456 ps
T245 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_hw_reset.1490257832 May 05 01:03:32 PM PDT 24 May 05 01:03:34 PM PDT 24 48055402 ps
T84 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_hw_reset.4291185722 May 05 01:03:20 PM PDT 24 May 05 01:03:23 PM PDT 24 329656393 ps
T96 /workspace/coverage/cover_reg_top/3.rv_dm_same_csr_outstanding.1456019675 May 05 01:03:32 PM PDT 24 May 05 01:03:38 PM PDT 24 144916840 ps
T246 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_rw.348556283 May 05 01:03:25 PM PDT 24 May 05 01:03:28 PM PDT 24 824596457 ps
T247 /workspace/coverage/cover_reg_top/10.rv_dm_same_csr_outstanding.2397782145 May 05 01:03:55 PM PDT 24 May 05 01:04:04 PM PDT 24 536646798 ps
T248 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_rw.3339528447 May 05 01:03:19 PM PDT 24 May 05 01:03:21 PM PDT 24 145398782 ps
T249 /workspace/coverage/cover_reg_top/32.rv_dm_tap_fsm_rand_reset.3316006703 May 05 01:04:22 PM PDT 24 May 05 01:04:33 PM PDT 24 25219195588 ps
T250 /workspace/coverage/cover_reg_top/16.rv_dm_same_csr_outstanding.2715243275 May 05 01:04:09 PM PDT 24 May 05 01:04:12 PM PDT 24 140172050 ps
T251 /workspace/coverage/cover_reg_top/12.rv_dm_tl_errors.1969775483 May 05 01:03:54 PM PDT 24 May 05 01:04:00 PM PDT 24 405660867 ps
T252 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_rw.2890982014 May 05 01:03:30 PM PDT 24 May 05 01:03:35 PM PDT 24 2367020587 ps
T253 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_aliasing.1054824484 May 05 01:03:32 PM PDT 24 May 05 01:03:33 PM PDT 24 165816737 ps
T254 /workspace/coverage/cover_reg_top/2.rv_dm_csr_rw.2818199431 May 05 01:03:28 PM PDT 24 May 05 01:03:31 PM PDT 24 500522731 ps
T255 /workspace/coverage/cover_reg_top/14.rv_dm_csr_rw.2178667501 May 05 01:03:59 PM PDT 24 May 05 01:04:03 PM PDT 24 247531605 ps
T256 /workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_rw.2393110340 May 05 01:03:55 PM PDT 24 May 05 01:03:57 PM PDT 24 213273759 ps
T257 /workspace/coverage/cover_reg_top/20.rv_dm_tap_fsm_rand_reset.2130848605 May 05 01:04:06 PM PDT 24 May 05 01:05:03 PM PDT 24 16229900148 ps
T97 /workspace/coverage/cover_reg_top/1.rv_dm_csr_aliasing.2302751716 May 05 01:03:28 PM PDT 24 May 05 01:03:56 PM PDT 24 1702352015 ps
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