Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
83.07 95.77 81.52 89.91 76.25 86.50 98.53 53.02


Total tests in report: 440
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
59.21 59.21 87.83 87.83 58.34 58.34 45.20 45.20 53.75 53.75 70.17 70.17 93.48 93.48 5.69 5.69 /workspace/coverage/default/33.rv_dm_stress_all.2767330311
68.54 9.33 91.40 3.57 68.00 9.66 78.51 33.31 63.75 10.00 76.67 6.50 94.95 1.47 6.52 0.83 /workspace/coverage/default/8.rv_dm_autoincr_sba_tl_access.1465304946
76.28 7.74 91.55 0.15 72.41 4.41 80.60 2.09 71.25 7.50 78.00 1.33 96.00 1.05 44.13 37.60 /workspace/coverage/cover_reg_top/5.rv_dm_tap_fsm_rand_reset.1686576692
77.67 1.39 92.25 0.70 74.76 2.34 82.94 2.34 73.75 2.50 79.50 1.50 96.00 0.00 44.48 0.36 /workspace/coverage/default/18.rv_dm_stress_all.3015982574
78.62 0.95 92.35 0.10 76.28 1.52 83.80 0.86 73.75 0.00 80.00 0.50 96.00 0.00 48.16 3.68 /workspace/coverage/cover_reg_top/18.rv_dm_tl_intg_err.288492670
79.11 0.49 92.45 0.10 76.41 0.14 84.33 0.53 75.00 1.25 80.67 0.67 96.00 0.00 48.87 0.71 /workspace/coverage/default/9.rv_dm_autoincr_sba_tl_access.4267614282
79.54 0.43 92.91 0.45 77.38 0.97 85.07 0.74 75.00 0.00 81.17 0.50 96.00 0.00 49.23 0.36 /workspace/coverage/default/43.rv_dm_alert_test.355156083
79.86 0.32 92.91 0.00 77.38 0.00 86.51 1.44 75.00 0.00 81.17 0.00 96.00 0.00 50.06 0.83 /workspace/coverage/cover_reg_top/10.rv_dm_tl_intg_err.1294286955
80.18 0.32 93.51 0.60 78.07 0.69 86.51 0.00 75.00 0.00 82.00 0.83 96.00 0.00 50.18 0.12 /workspace/coverage/default/0.rv_dm_cmderr_exception.663549392
80.46 0.28 93.86 0.35 78.34 0.28 86.67 0.16 75.00 0.00 82.67 0.67 96.00 0.00 50.65 0.47 /workspace/coverage/default/10.rv_dm_stress_all.1098254988
80.66 0.21 94.16 0.30 78.90 0.55 86.75 0.08 75.00 0.00 83.17 0.50 96.00 0.00 50.65 0.00 /workspace/coverage/default/0.rv_dm_debug_disabled.2027067927
80.85 0.19 94.47 0.30 79.31 0.41 86.75 0.00 75.00 0.00 83.67 0.50 96.00 0.00 50.77 0.12 /workspace/coverage/default/0.rv_dm_sba_debug_disabled.1615862412
81.03 0.18 94.47 0.00 79.31 0.00 86.75 0.00 76.25 1.25 83.67 0.00 96.00 0.00 50.77 0.00 /workspace/coverage/cover_reg_top/9.rv_dm_tap_fsm_rand_reset.3663401517
81.20 0.17 94.77 0.30 79.72 0.41 86.87 0.12 76.25 0.00 84.00 0.33 96.00 0.00 50.77 0.00 /workspace/coverage/default/14.rv_dm_stress_all.762675604
81.37 0.17 94.77 0.00 79.72 0.00 87.20 0.33 76.25 0.00 84.00 0.00 96.85 0.84 50.77 0.00 /workspace/coverage/cover_reg_top/1.rv_dm_same_csr_outstanding.1977398835
81.53 0.16 94.87 0.10 79.86 0.14 87.61 0.41 76.25 0.00 84.50 0.50 96.85 0.00 50.77 0.00 /workspace/coverage/default/1.rv_dm_rom_read_access.3789442959
81.67 0.14 94.87 0.00 80.28 0.41 87.86 0.25 76.25 0.00 84.50 0.00 96.95 0.11 51.01 0.24 /workspace/coverage/default/1.rv_dm_sec_cm.833477016
81.81 0.14 95.17 0.30 80.28 0.00 87.86 0.00 76.25 0.00 85.17 0.67 96.95 0.00 51.01 0.00 /workspace/coverage/default/0.rv_dm_abstractcmd_status.3139256913
81.94 0.13 95.17 0.00 80.28 0.00 88.27 0.41 76.25 0.00 85.17 0.00 96.95 0.00 51.48 0.47 /workspace/coverage/default/18.rv_dm_autoincr_sba_tl_access.1994668807
82.05 0.11 95.22 0.05 80.69 0.41 88.27 0.00 76.25 0.00 85.33 0.17 96.95 0.00 51.60 0.12 /workspace/coverage/default/0.rv_dm_dmi_failed_op.993836002
82.15 0.11 95.22 0.00 80.69 0.00 88.27 0.00 76.25 0.00 85.33 0.00 97.69 0.74 51.60 0.00 /workspace/coverage/cover_reg_top/11.rv_dm_csr_rw.3615506374
82.25 0.10 95.42 0.20 80.83 0.14 88.35 0.08 76.25 0.00 85.50 0.17 97.69 0.00 51.72 0.12 /workspace/coverage/default/25.rv_dm_stress_all.1663511398
82.34 0.09 95.42 0.00 80.83 0.00 88.35 0.00 76.25 0.00 85.50 0.00 98.32 0.63 51.72 0.00 /workspace/coverage/cover_reg_top/0.rv_dm_csr_aliasing.1154337090
82.42 0.08 95.42 0.00 80.83 0.00 88.93 0.57 76.25 0.00 85.50 0.00 98.32 0.00 51.72 0.00 /workspace/coverage/default/0.rv_dm_autoincr_sba_tl_access.2295073677
82.51 0.08 95.57 0.15 80.97 0.14 88.93 0.00 76.25 0.00 85.67 0.17 98.32 0.00 51.84 0.12 /workspace/coverage/default/36.rv_dm_stress_all.3676260090
82.59 0.08 95.57 0.00 80.97 0.00 89.25 0.33 76.25 0.00 85.67 0.00 98.32 0.00 52.08 0.24 /workspace/coverage/default/46.rv_dm_stress_all.330642055
82.67 0.08 95.57 0.00 81.24 0.28 89.25 0.00 76.25 0.00 85.83 0.17 98.32 0.00 52.19 0.12 /workspace/coverage/default/0.rv_dm_progbuf_busy.404361451
82.73 0.06 95.67 0.10 81.24 0.00 89.25 0.00 76.25 0.00 86.17 0.33 98.32 0.00 52.19 0.00 /workspace/coverage/default/0.rv_dm_progbuf_read_write_execute.38007188
82.78 0.05 95.72 0.05 81.38 0.14 89.25 0.00 76.25 0.00 86.33 0.17 98.32 0.00 52.19 0.00 /workspace/coverage/default/0.rv_dm_hartsel_warl.2755958310
82.82 0.04 95.72 0.00 81.38 0.00 89.42 0.16 76.25 0.00 86.33 0.00 98.32 0.00 52.31 0.12 /workspace/coverage/cover_reg_top/15.rv_dm_tl_intg_err.840250555
82.86 0.04 95.72 0.00 81.38 0.00 89.46 0.04 76.25 0.00 86.33 0.00 98.53 0.21 52.31 0.00 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_hw_reset.2674946366
82.89 0.03 95.77 0.05 81.38 0.00 89.46 0.00 76.25 0.00 86.50 0.17 98.53 0.00 52.31 0.00 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_aliasing.2111694443
82.92 0.03 95.77 0.00 81.38 0.00 89.66 0.21 76.25 0.00 86.50 0.00 98.53 0.00 52.31 0.00 /workspace/coverage/cover_reg_top/13.rv_dm_tl_intg_err.3926072073
82.94 0.03 95.77 0.00 81.38 0.00 89.75 0.08 76.25 0.00 86.50 0.00 98.53 0.00 52.43 0.12 /workspace/coverage/default/16.rv_dm_stress_all.415426834
82.96 0.02 95.77 0.00 81.52 0.14 89.75 0.00 76.25 0.00 86.50 0.00 98.53 0.00 52.43 0.00 /workspace/coverage/default/0.rv_dm_cmderr_halt_resume.4248237205
82.98 0.02 95.77 0.00 81.52 0.00 89.75 0.00 76.25 0.00 86.50 0.00 98.53 0.00 52.55 0.12 /workspace/coverage/cover_reg_top/11.rv_dm_tl_intg_err.580321057
83.00 0.02 95.77 0.00 81.52 0.00 89.75 0.00 76.25 0.00 86.50 0.00 98.53 0.00 52.67 0.12 /workspace/coverage/cover_reg_top/13.rv_dm_csr_mem_rw_with_rand_reset.3502720020
83.01 0.02 95.77 0.00 81.52 0.00 89.75 0.00 76.25 0.00 86.50 0.00 98.53 0.00 52.79 0.12 /workspace/coverage/default/0.rv_dm_jtag_dtm_hard_reset.3357312926
83.03 0.02 95.77 0.00 81.52 0.00 89.75 0.00 76.25 0.00 86.50 0.00 98.53 0.00 52.91 0.12 /workspace/coverage/default/0.rv_dm_mem_tl_access_resuming.4160534932
83.05 0.02 95.77 0.00 81.52 0.00 89.75 0.00 76.25 0.00 86.50 0.00 98.53 0.00 53.02 0.12 /workspace/coverage/default/5.rv_dm_autoincr_sba_tl_access.2388424207
83.06 0.01 95.77 0.00 81.52 0.00 89.83 0.08 76.25 0.00 86.50 0.00 98.53 0.00 53.02 0.00 /workspace/coverage/cover_reg_top/1.rv_dm_tap_fsm_rand_reset.1514494118
83.07 0.01 95.77 0.00 81.52 0.00 89.91 0.08 76.25 0.00 86.50 0.00 98.53 0.00 53.02 0.00 /workspace/coverage/default/11.rv_dm_bad_sba_tl_access.3272586683

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.rv_dm_csr_bit_bash.2939631397
/workspace/coverage/cover_reg_top/0.rv_dm_csr_hw_reset.3430551837
/workspace/coverage/cover_reg_top/0.rv_dm_csr_mem_rw_with_rand_reset.3654149427
/workspace/coverage/cover_reg_top/0.rv_dm_csr_rw.973486087
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_aliasing.2549163040
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_bit_bash.382522506
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_hw_reset.2552715419
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_rw.844126800
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_aliasing.800630155
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_bit_bash.1127699597
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_hw_reset.2541794291
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_rw.1000323778
/workspace/coverage/cover_reg_top/0.rv_dm_mem_partial_access.4254540021
/workspace/coverage/cover_reg_top/0.rv_dm_mem_walk.2976985076
/workspace/coverage/cover_reg_top/0.rv_dm_same_csr_outstanding.1727577867
/workspace/coverage/cover_reg_top/0.rv_dm_tap_fsm_rand_reset.3973515686
/workspace/coverage/cover_reg_top/0.rv_dm_tl_errors.3613404428
/workspace/coverage/cover_reg_top/0.rv_dm_tl_intg_err.712063019
/workspace/coverage/cover_reg_top/1.rv_dm_csr_aliasing.2974814725
/workspace/coverage/cover_reg_top/1.rv_dm_csr_bit_bash.3369379342
/workspace/coverage/cover_reg_top/1.rv_dm_csr_hw_reset.105583452
/workspace/coverage/cover_reg_top/1.rv_dm_csr_mem_rw_with_rand_reset.3330852199
/workspace/coverage/cover_reg_top/1.rv_dm_csr_rw.2388945064
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_aliasing.1114713094
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_bit_bash.1208943202
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_hw_reset.2250293461
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_rw.1868335905
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_bit_bash.3997824703
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_hw_reset.3768364167
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_rw.1262785071
/workspace/coverage/cover_reg_top/1.rv_dm_mem_partial_access.916040994
/workspace/coverage/cover_reg_top/1.rv_dm_mem_walk.3383070248
/workspace/coverage/cover_reg_top/1.rv_dm_tl_errors.1609952313
/workspace/coverage/cover_reg_top/1.rv_dm_tl_intg_err.1545765323
/workspace/coverage/cover_reg_top/10.rv_dm_csr_mem_rw_with_rand_reset.340595798
/workspace/coverage/cover_reg_top/10.rv_dm_csr_rw.3672407035
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_bit_bash.288604464
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_rw.378673236
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dtm_csr_rw.3495707436
/workspace/coverage/cover_reg_top/10.rv_dm_same_csr_outstanding.4140152729
/workspace/coverage/cover_reg_top/10.rv_dm_tl_errors.3261036142
/workspace/coverage/cover_reg_top/11.rv_dm_csr_mem_rw_with_rand_reset.3375184134
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_bit_bash.1064258347
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_rw.3502635837
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dtm_csr_rw.1505221141
/workspace/coverage/cover_reg_top/11.rv_dm_same_csr_outstanding.3941436729
/workspace/coverage/cover_reg_top/11.rv_dm_tl_errors.1357698012
/workspace/coverage/cover_reg_top/12.rv_dm_csr_mem_rw_with_rand_reset.3261534642
/workspace/coverage/cover_reg_top/12.rv_dm_csr_rw.2177358164
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dmi_csr_bit_bash.4150831376
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dmi_csr_rw.2400132275
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dtm_csr_rw.1279129499
/workspace/coverage/cover_reg_top/12.rv_dm_same_csr_outstanding.3852361658
/workspace/coverage/cover_reg_top/12.rv_dm_tl_errors.1644701319
/workspace/coverage/cover_reg_top/12.rv_dm_tl_intg_err.2179192595
/workspace/coverage/cover_reg_top/13.rv_dm_csr_rw.967089451
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_bit_bash.2721517170
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_rw.544949646
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dtm_csr_rw.471405081
/workspace/coverage/cover_reg_top/13.rv_dm_same_csr_outstanding.2612666864
/workspace/coverage/cover_reg_top/13.rv_dm_tl_errors.3884484605
/workspace/coverage/cover_reg_top/14.rv_dm_csr_mem_rw_with_rand_reset.1705315402
/workspace/coverage/cover_reg_top/14.rv_dm_csr_rw.2900848310
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dmi_csr_bit_bash.2357327268
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dmi_csr_rw.2335713196
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dtm_csr_rw.4092176059
/workspace/coverage/cover_reg_top/14.rv_dm_same_csr_outstanding.2252809342
/workspace/coverage/cover_reg_top/14.rv_dm_tl_errors.4177815375
/workspace/coverage/cover_reg_top/14.rv_dm_tl_intg_err.3203266078
/workspace/coverage/cover_reg_top/15.rv_dm_csr_mem_rw_with_rand_reset.1456661736
/workspace/coverage/cover_reg_top/15.rv_dm_csr_rw.492045998
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_bit_bash.627296052
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_rw.3387291979
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dtm_csr_rw.1866613747
/workspace/coverage/cover_reg_top/15.rv_dm_same_csr_outstanding.3347571155
/workspace/coverage/cover_reg_top/15.rv_dm_tl_errors.2187324152
/workspace/coverage/cover_reg_top/16.rv_dm_csr_mem_rw_with_rand_reset.3171596847
/workspace/coverage/cover_reg_top/16.rv_dm_csr_rw.1998885721
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_bit_bash.473402370
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_rw.4251006294
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dtm_csr_rw.3274422635
/workspace/coverage/cover_reg_top/16.rv_dm_same_csr_outstanding.950548551
/workspace/coverage/cover_reg_top/16.rv_dm_tl_errors.3591663369
/workspace/coverage/cover_reg_top/16.rv_dm_tl_intg_err.4293029047
/workspace/coverage/cover_reg_top/17.rv_dm_csr_mem_rw_with_rand_reset.1305166573
/workspace/coverage/cover_reg_top/17.rv_dm_csr_rw.2805180772
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dmi_csr_bit_bash.554025538
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dmi_csr_rw.2817758862
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dtm_csr_rw.3733157555
/workspace/coverage/cover_reg_top/17.rv_dm_same_csr_outstanding.4124565327
/workspace/coverage/cover_reg_top/17.rv_dm_tl_errors.3349080786
/workspace/coverage/cover_reg_top/17.rv_dm_tl_intg_err.3492133511
/workspace/coverage/cover_reg_top/18.rv_dm_csr_mem_rw_with_rand_reset.1223309051
/workspace/coverage/cover_reg_top/18.rv_dm_csr_rw.4245990360
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_bit_bash.1380622895
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_rw.2037959445
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dtm_csr_rw.3555137026
/workspace/coverage/cover_reg_top/18.rv_dm_same_csr_outstanding.3356415085
/workspace/coverage/cover_reg_top/18.rv_dm_tl_errors.2396866751
/workspace/coverage/cover_reg_top/19.rv_dm_csr_mem_rw_with_rand_reset.414214035
/workspace/coverage/cover_reg_top/19.rv_dm_csr_rw.1066813096
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_bit_bash.2126785158
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_rw.2397404933
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dtm_csr_rw.357964560
/workspace/coverage/cover_reg_top/19.rv_dm_same_csr_outstanding.1504888505
/workspace/coverage/cover_reg_top/19.rv_dm_tl_errors.1705078141
/workspace/coverage/cover_reg_top/19.rv_dm_tl_intg_err.4116226010
/workspace/coverage/cover_reg_top/2.rv_dm_csr_aliasing.1540508512
/workspace/coverage/cover_reg_top/2.rv_dm_csr_bit_bash.3609729981
/workspace/coverage/cover_reg_top/2.rv_dm_csr_hw_reset.2357992507
/workspace/coverage/cover_reg_top/2.rv_dm_csr_mem_rw_with_rand_reset.3268747593
/workspace/coverage/cover_reg_top/2.rv_dm_csr_rw.2937004750
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_aliasing.2147149669
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_bit_bash.3365688466
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_hw_reset.3754758238
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_rw.2914714254
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_aliasing.1493491887
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_bit_bash.2072600373
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_hw_reset.292013892
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_rw.2404239631
/workspace/coverage/cover_reg_top/2.rv_dm_mem_partial_access.482909521
/workspace/coverage/cover_reg_top/2.rv_dm_mem_walk.225745123
/workspace/coverage/cover_reg_top/2.rv_dm_same_csr_outstanding.3983439870
/workspace/coverage/cover_reg_top/2.rv_dm_tap_fsm_rand_reset.546185671
/workspace/coverage/cover_reg_top/2.rv_dm_tl_errors.2301497327
/workspace/coverage/cover_reg_top/2.rv_dm_tl_intg_err.3863352599
/workspace/coverage/cover_reg_top/3.rv_dm_csr_aliasing.4093170
/workspace/coverage/cover_reg_top/3.rv_dm_csr_bit_bash.3922750835
/workspace/coverage/cover_reg_top/3.rv_dm_csr_hw_reset.1108738895
/workspace/coverage/cover_reg_top/3.rv_dm_csr_mem_rw_with_rand_reset.616686130
/workspace/coverage/cover_reg_top/3.rv_dm_csr_rw.1226972360
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_aliasing.4090845058
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_bit_bash.4236503635
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_hw_reset.1718856071
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_rw.1949914303
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_aliasing.1440278523
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_bit_bash.3710406761
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_hw_reset.2596491809
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Total test records in report: 440
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/0.rv_dm_autoincr_sba_tl_access.2295073677 Jul 19 04:58:36 PM PDT 24 Jul 19 04:58:47 PM PDT 24 9702278466 ps
T2 /workspace/coverage/default/20.rv_dm_alert_test.3332160809 Jul 19 04:59:46 PM PDT 24 Jul 19 04:59:48 PM PDT 24 43159915 ps
T3 /workspace/coverage/default/16.rv_dm_bad_sba_tl_access.1663759586 Jul 19 04:59:35 PM PDT 24 Jul 19 04:59:39 PM PDT 24 1828864365 ps
T4 /workspace/coverage/default/33.rv_dm_stress_all.2767330311 Jul 19 04:59:54 PM PDT 24 Jul 19 05:00:15 PM PDT 24 7035551639 ps
T16 /workspace/coverage/default/5.rv_dm_delayed_resp_sba_tl_access.3853484499 Jul 19 04:59:20 PM PDT 24 Jul 19 04:59:35 PM PDT 24 10184828611 ps
T31 /workspace/coverage/default/0.rv_dm_jtag_dmi_dm_inactive.2431512538 Jul 19 04:58:44 PM PDT 24 Jul 19 04:58:47 PM PDT 24 329319545 ps
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T132 /workspace/coverage/default/15.rv_dm_sba_tl_access.4121681051 Jul 19 04:59:34 PM PDT 24 Jul 19 04:59:39 PM PDT 24 817466005 ps
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T184 /workspace/coverage/default/3.rv_dm_alert_test.936208925 Jul 19 04:59:11 PM PDT 24 Jul 19 04:59:13 PM PDT 24 118519108 ps
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T236 /workspace/coverage/default/31.rv_dm_alert_test.2786532806 Jul 19 04:59:55 PM PDT 24 Jul 19 04:59:58 PM PDT 24 124290026 ps
T170 /workspace/coverage/default/42.rv_dm_stress_all.1332798041 Jul 19 04:59:57 PM PDT 24 Jul 19 05:00:12 PM PDT 24 6975435993 ps
T266 /workspace/coverage/default/7.rv_dm_sba_tl_access.4143173684 Jul 19 04:59:20 PM PDT 24 Jul 19 04:59:30 PM PDT 24 2827478052 ps
T267 /workspace/coverage/default/2.rv_dm_sba_tl_access.3241593219 Jul 19 04:59:04 PM PDT 24 Jul 19 04:59:07 PM PDT 24 617947189 ps
T212 /workspace/coverage/default/7.rv_dm_autoincr_sba_tl_access.1102372146 Jul 19 04:59:23 PM PDT 24 Jul 19 05:00:32 PM PDT 24 37446261669 ps
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T269 /workspace/coverage/default/39.rv_dm_alert_test.2749485476 Jul 19 05:00:00 PM PDT 24 Jul 19 05:00:06 PM PDT 24 136103411 ps
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T192 /workspace/coverage/default/10.rv_dm_alert_test.1353727633 Jul 19 04:59:26 PM PDT 24 Jul 19 04:59:31 PM PDT 24 76762441 ps
T218 /workspace/coverage/default/14.rv_dm_alert_test.2389895577 Jul 19 04:59:35 PM PDT 24 Jul 19 04:59:39 PM PDT 24 176846720 ps
T213 /workspace/coverage/default/6.rv_dm_sba_tl_access.3739654378 Jul 19 04:59:18 PM PDT 24 Jul 19 04:59:23 PM PDT 24 2261130775 ps
T180 /workspace/coverage/default/9.rv_dm_alert_test.4095767959 Jul 19 04:59:27 PM PDT 24 Jul 19 04:59:33 PM PDT 24 45259847 ps
T270 /workspace/coverage/default/15.rv_dm_delayed_resp_sba_tl_access.452498105 Jul 19 04:59:36 PM PDT 24 Jul 19 04:59:42 PM PDT 24 1448022282 ps
T185 /workspace/coverage/default/41.rv_dm_alert_test.1123185357 Jul 19 05:00:00 PM PDT 24 Jul 19 05:00:06 PM PDT 24 116949778 ps
T203 /workspace/coverage/default/13.rv_dm_alert_test.1833664796 Jul 19 04:59:39 PM PDT 24 Jul 19 04:59:41 PM PDT 24 36787954 ps
T235 /workspace/coverage/default/25.rv_dm_alert_test.4101060073 Jul 19 04:59:52 PM PDT 24 Jul 19 04:59:54 PM PDT 24 88196602 ps
T13 /workspace/coverage/default/13.rv_dm_stress_all.4071420480 Jul 19 04:59:37 PM PDT 24 Jul 19 04:59:49 PM PDT 24 3020548501 ps
T208 /workspace/coverage/default/24.rv_dm_alert_test.2272106738 Jul 19 04:59:53 PM PDT 24 Jul 19 04:59:55 PM PDT 24 50063249 ps
T227 /workspace/coverage/default/0.rv_dm_hart_unavail.2121223025 Jul 19 04:58:36 PM PDT 24 Jul 19 04:58:39 PM PDT 24 381679779 ps
T223 /workspace/coverage/default/27.rv_dm_alert_test.3675958276 Jul 19 04:59:55 PM PDT 24 Jul 19 04:59:58 PM PDT 24 56362184 ps
T271 /workspace/coverage/default/26.rv_dm_alert_test.1407046882 Jul 19 04:59:51 PM PDT 24 Jul 19 04:59:52 PM PDT 24 73758202 ps
T41 /workspace/coverage/default/0.rv_dm_cmderr_exception.663549392 Jul 19 04:58:34 PM PDT 24 Jul 19 04:58:47 PM PDT 24 3989789056 ps
T226 /workspace/coverage/default/4.rv_dm_alert_test.3310677853 Jul 19 04:59:21 PM PDT 24 Jul 19 04:59:26 PM PDT 24 111056246 ps
T237 /workspace/coverage/default/16.rv_dm_sba_tl_access.1097321352 Jul 19 04:59:35 PM PDT 24 Jul 19 04:59:41 PM PDT 24 2260660074 ps
T140 /workspace/coverage/default/6.rv_dm_delayed_resp_sba_tl_access.2740225241 Jul 19 04:59:18 PM PDT 24 Jul 19 04:59:24 PM PDT 24 1073267784 ps
T37 /workspace/coverage/default/0.rv_dm_cmderr_halt_resume.4248237205 Jul 19 04:58:36 PM PDT 24 Jul 19 04:58:39 PM PDT 24 1784996099 ps
T167 /workspace/coverage/default/29.rv_dm_stress_all.741652480 Jul 19 04:59:52 PM PDT 24 Jul 19 05:00:02 PM PDT 24 11417855093 ps
T193 /workspace/coverage/default/45.rv_dm_alert_test.417848857 Jul 19 05:00:07 PM PDT 24 Jul 19 05:00:10 PM PDT 24 66176227 ps
T26 /workspace/coverage/default/10.rv_dm_stress_all.1098254988 Jul 19 04:59:27 PM PDT 24 Jul 19 04:59:43 PM PDT 24 4557243483 ps
T73 /workspace/coverage/default/0.rv_dm_sba_debug_disabled.1615862412 Jul 19 04:58:37 PM PDT 24 Jul 19 04:58:41 PM PDT 24 712409668 ps
T163 /workspace/coverage/default/4.rv_dm_stress_all.1942370496 Jul 19 04:59:18 PM PDT 24 Jul 19 04:59:37 PM PDT 24 11295652635 ps
T174 /workspace/coverage/default/4.rv_dm_autoincr_sba_tl_access.3764023411 Jul 19 04:59:20 PM PDT 24 Jul 19 05:02:19 PM PDT 24 57656973547 ps
T143 /workspace/coverage/default/7.rv_dm_stress_all.604813427 Jul 19 04:59:27 PM PDT 24 Jul 19 04:59:38 PM PDT 24 4397332433 ps
T171 /workspace/coverage/default/0.rv_dm_mem_tl_access_halted.135974519 Jul 19 04:58:35 PM PDT 24 Jul 19 04:58:38 PM PDT 24 2278941964 ps
T217 /workspace/coverage/default/9.rv_dm_sba_tl_access.902386965 Jul 19 04:59:28 PM PDT 24 Jul 19 04:59:36 PM PDT 24 2397650176 ps
T173 /workspace/coverage/default/0.rv_dm_dataaddr_rw_access.2709512631 Jul 19 04:58:36 PM PDT 24 Jul 19 04:58:39 PM PDT 24 146896167 ps
T272 /workspace/coverage/default/1.rv_dm_delayed_resp_sba_tl_access.3122953901 Jul 19 04:58:41 PM PDT 24 Jul 19 04:59:09 PM PDT 24 9050336718 ps
T196 /workspace/coverage/default/9.rv_dm_bad_sba_tl_access.3160854774 Jul 19 04:59:26 PM PDT 24 Jul 19 04:59:34 PM PDT 24 3963133350 ps
T228 /workspace/coverage/default/13.rv_dm_delayed_resp_sba_tl_access.1987743088 Jul 19 04:59:35 PM PDT 24 Jul 19 04:59:45 PM PDT 24 2458672819 ps
T52 /workspace/coverage/default/0.rv_dm_dmi_failed_op.993836002 Jul 19 04:58:43 PM PDT 24 Jul 19 04:58:45 PM PDT 24 89086355 ps
T138 /workspace/coverage/default/37.rv_dm_stress_all.2962498236 Jul 19 04:59:59 PM PDT 24 Jul 19 05:00:13 PM PDT 24 6324267020 ps
T273 /workspace/coverage/default/18.rv_dm_delayed_resp_sba_tl_access.1003978947 Jul 19 04:59:44 PM PDT 24 Jul 19 04:59:49 PM PDT 24 1863333557 ps
T20 /workspace/coverage/default/36.rv_dm_stress_all.3676260090 Jul 19 04:59:51 PM PDT 24 Jul 19 05:00:06 PM PDT 24 8704769902 ps
T274 /workspace/coverage/default/1.rv_dm_mem_tl_access_halted.357766930 Jul 19 04:58:54 PM PDT 24 Jul 19 04:58:56 PM PDT 24 483309956 ps
T234 /workspace/coverage/default/12.rv_dm_sba_tl_access.233144355 Jul 19 04:59:29 PM PDT 24 Jul 19 04:59:36 PM PDT 24 833025573 ps
T214 /workspace/coverage/default/5.rv_dm_alert_test.3849231028 Jul 19 04:59:19 PM PDT 24 Jul 19 04:59:23 PM PDT 24 49120714 ps
T38 /workspace/coverage/default/1.rv_dm_rom_read_access.3789442959 Jul 19 04:59:04 PM PDT 24 Jul 19 04:59:06 PM PDT 24 55809426 ps
T275 /workspace/coverage/default/11.rv_dm_bad_sba_tl_access.3272586683 Jul 19 04:59:28 PM PDT 24 Jul 19 04:59:37 PM PDT 24 1556253537 ps
T28 /workspace/coverage/default/25.rv_dm_stress_all.1663511398 Jul 19 04:59:52 PM PDT 24 Jul 19 05:00:15 PM PDT 24 15905042729 ps
T221 /workspace/coverage/default/2.rv_dm_hart_unavail.637783133 Jul 19 04:59:01 PM PDT 24 Jul 19 04:59:03 PM PDT 24 245545018 ps
T276 /workspace/coverage/default/0.rv_dm_cmderr_not_supported.879061870 Jul 19 04:58:35 PM PDT 24 Jul 19 04:58:37 PM PDT 24 112367201 ps
T53 /workspace/coverage/default/1.rv_dm_dmi_failed_op.3535552084 Jul 19 04:59:03 PM PDT 24 Jul 19 04:59:05 PM PDT 24 151581453 ps
T231 /workspace/coverage/default/10.rv_dm_autoincr_sba_tl_access.2423095033 Jul 19 04:59:27 PM PDT 24 Jul 19 05:01:00 PM PDT 24 29318406386 ps
T165 /workspace/coverage/default/48.rv_dm_stress_all.4117241175 Jul 19 05:00:16 PM PDT 24 Jul 19 05:00:46 PM PDT 24 9864125532 ps
T182 /workspace/coverage/default/6.rv_dm_alert_test.776952559 Jul 19 04:59:22 PM PDT 24 Jul 19 04:59:28 PM PDT 24 151586510 ps
T229 /workspace/coverage/default/8.rv_dm_alert_test.3303218141 Jul 19 04:59:27 PM PDT 24 Jul 19 04:59:33 PM PDT 24 135169102 ps
T145 /workspace/coverage/default/39.rv_dm_stress_all.1299257872 Jul 19 05:00:01 PM PDT 24 Jul 19 05:00:08 PM PDT 24 3766486778 ps
T277 /workspace/coverage/default/1.rv_dm_cmderr_busy.3343146415 Jul 19 04:58:56 PM PDT 24 Jul 19 04:58:59 PM PDT 24 224752606 ps
T278 /workspace/coverage/default/0.rv_dm_ndmreset_req.855384613 Jul 19 04:58:36 PM PDT 24 Jul 19 04:58:39 PM PDT 24 838329245 ps
T181 /workspace/coverage/default/7.rv_dm_alert_test.1656923022 Jul 19 04:59:29 PM PDT 24 Jul 19 04:59:35 PM PDT 24 27849790 ps
T139 /workspace/coverage/default/13.rv_dm_autoincr_sba_tl_access.2495821192 Jul 19 04:59:33 PM PDT 24 Jul 19 04:59:48 PM PDT 24 13051343697 ps
T279 /workspace/coverage/default/14.rv_dm_delayed_resp_sba_tl_access.181974616 Jul 19 04:59:39 PM PDT 24 Jul 19 04:59:45 PM PDT 24 2737107992 ps
T280 /workspace/coverage/default/1.rv_dm_ndmreset_req.3440811358 Jul 19 04:58:53 PM PDT 24 Jul 19 04:58:55 PM PDT 24 152431992 ps
T281 /workspace/coverage/default/1.rv_dm_jtag_dtm_idle_hint.1964965013 Jul 19 04:58:57 PM PDT 24 Jul 19 04:58:59 PM PDT 24 125339805 ps
T183 /workspace/coverage/default/33.rv_dm_alert_test.3642677162 Jul 19 04:59:54 PM PDT 24 Jul 19 04:59:58 PM PDT 24 49317952 ps
T282 /workspace/coverage/default/4.rv_dm_hart_unavail.4273441075 Jul 19 04:59:19 PM PDT 24 Jul 19 04:59:26 PM PDT 24 403889064 ps
T283 /workspace/coverage/default/9.rv_dm_stress_all.1047667444 Jul 19 04:59:30 PM PDT 24 Jul 19 04:59:39 PM PDT 24 2420409931 ps
T164 /workspace/coverage/default/32.rv_dm_stress_all.2409132452 Jul 19 04:59:54 PM PDT 24 Jul 19 05:00:05 PM PDT 24 4355982909 ps
T284 /workspace/coverage/default/15.rv_dm_alert_test.2584575164 Jul 19 04:59:40 PM PDT 24 Jul 19 04:59:43 PM PDT 24 110658446 ps
T151 /workspace/coverage/default/0.rv_dm_mem_tl_access_resuming.4160534932 Jul 19 04:58:34 PM PDT 24 Jul 19 04:58:47 PM PDT 24 3857917824 ps
T285 /workspace/coverage/default/7.rv_dm_bad_sba_tl_access.3083947861 Jul 19 04:59:21 PM PDT 24 Jul 19 04:59:31 PM PDT 24 1435965802 ps
T152 /workspace/coverage/default/8.rv_dm_bad_sba_tl_access.3976764421 Jul 19 04:59:27 PM PDT 24 Jul 19 04:59:46 PM PDT 24 15225055253 ps
T135 /workspace/coverage/default/23.rv_dm_stress_all.1737985085 Jul 19 04:59:51 PM PDT 24 Jul 19 05:00:01 PM PDT 24 5386255998 ps
T286 /workspace/coverage/default/1.rv_dm_jtag_dmi_debug_disabled.3423870663 Jul 19 04:58:55 PM PDT 24 Jul 19 04:58:57 PM PDT 24 148108352 ps
T199 /workspace/coverage/default/16.rv_dm_alert_test.1564121593 Jul 19 04:59:34 PM PDT 24 Jul 19 04:59:38 PM PDT 24 29682583 ps
T150 /workspace/coverage/default/18.rv_dm_autoincr_sba_tl_access.1994668807 Jul 19 04:59:44 PM PDT 24 Jul 19 04:59:54 PM PDT 24 5915210104 ps
T168 /workspace/coverage/default/0.rv_dm_stress_all.676006770 Jul 19 04:58:43 PM PDT 24 Jul 19 04:58:55 PM PDT 24 3840621217 ps
T66 /workspace/coverage/default/1.rv_dm_sec_cm.833477016 Jul 19 04:59:16 PM PDT 24 Jul 19 04:59:19 PM PDT 24 341742905 ps
T215 /workspace/coverage/default/12.rv_dm_autoincr_sba_tl_access.3150761660 Jul 19 04:59:34 PM PDT 24 Jul 19 04:59:39 PM PDT 24 817421309 ps
T287 /workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_rw.2397404933 Jul 19 04:55:15 PM PDT 24 Jul 19 04:55:22 PM PDT 24 3921956653 ps
T78 /workspace/coverage/cover_reg_top/6.rv_dm_jtag_dtm_csr_rw.4007530285 Jul 19 04:54:48 PM PDT 24 Jul 19 04:54:54 PM PDT 24 235663333 ps
T79 /workspace/coverage/cover_reg_top/13.rv_dm_jtag_dtm_csr_rw.471405081 Jul 19 04:55:14 PM PDT 24 Jul 19 04:55:21 PM PDT 24 154374176 ps
T63 /workspace/coverage/cover_reg_top/17.rv_dm_same_csr_outstanding.4124565327 Jul 19 04:55:16 PM PDT 24 Jul 19 04:55:31 PM PDT 24 1824004214 ps
T97 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_hw_reset.1718856071 Jul 19 04:54:49 PM PDT 24 Jul 19 04:55:02 PM PDT 24 2438388597 ps
T288 /workspace/coverage/cover_reg_top/12.rv_dm_jtag_dmi_csr_rw.2400132275 Jul 19 04:55:04 PM PDT 24 Jul 19 04:55:17 PM PDT 24 3148483931 ps
T64 /workspace/coverage/cover_reg_top/4.rv_dm_csr_hw_reset.2858271415 Jul 19 04:54:49 PM PDT 24 Jul 19 04:54:57 PM PDT 24 1290552499 ps
T289 /workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_rw.3387291979 Jul 19 04:55:15 PM PDT 24 Jul 19 04:55:22 PM PDT 24 1259891904 ps
T61 /workspace/coverage/cover_reg_top/13.rv_dm_tl_errors.3884484605 Jul 19 04:55:05 PM PDT 24 Jul 19 04:55:13 PM PDT 24 153949607 ps
T58 /workspace/coverage/cover_reg_top/18.rv_dm_tl_intg_err.288492670 Jul 19 04:55:15 PM PDT 24 Jul 19 04:55:39 PM PDT 24 1388235578 ps
T87 /workspace/coverage/cover_reg_top/9.rv_dm_same_csr_outstanding.2392601920 Jul 19 04:55:01 PM PDT 24 Jul 19 04:55:11 PM PDT 24 245781036 ps
T80 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_rw.1262785071 Jul 19 04:54:42 PM PDT 24 Jul 19 04:54:46 PM PDT 24 321728406 ps
T290 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_bit_bash.3365688466 Jul 19 04:54:42 PM PDT 24 Jul 19 04:55:03 PM PDT 24 15911547531 ps
T291 /workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_bit_bash.1064258347 Jul 19 04:55:03 PM PDT 24 Jul 19 04:55:15 PM PDT 24 12135667928 ps
T292 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_rw.844126800 Jul 19 04:54:38 PM PDT 24 Jul 19 04:54:45 PM PDT 24 7053148288 ps
T293 /workspace/coverage/cover_reg_top/12.rv_dm_jtag_dtm_csr_rw.1279129499 Jul 19 04:55:04 PM PDT 24 Jul 19 04:55:08 PM PDT 24 195726636 ps
T62 /workspace/coverage/cover_reg_top/3.rv_dm_tl_errors.658628973 Jul 19 04:54:49 PM PDT 24 Jul 19 04:54:59 PM PDT 24 261898096 ps
T294 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_aliasing.2111694443 Jul 19 04:54:41 PM PDT 24 Jul 19 04:54:45 PM PDT 24 215714182 ps
T81 /workspace/coverage/cover_reg_top/6.rv_dm_tl_errors.2969174302 Jul 19 04:54:49 PM PDT 24 Jul 19 04:55:00 PM PDT 24 161150844 ps
T88 /workspace/coverage/cover_reg_top/3.rv_dm_csr_aliasing.4093170 Jul 19 04:54:50 PM PDT 24 Jul 19 04:56:16 PM PDT 24 8602574139 ps
T59 /workspace/coverage/cover_reg_top/5.rv_dm_tap_fsm_rand_reset.1686576692 Jul 19 04:54:48 PM PDT 24 Jul 19 04:56:57 PM PDT 24 47554865508 ps
T89 /workspace/coverage/cover_reg_top/12.rv_dm_csr_rw.2177358164 Jul 19 04:55:03 PM PDT 24 Jul 19 04:55:08 PM PDT 24 75616145 ps
T90 /workspace/coverage/cover_reg_top/1.rv_dm_same_csr_outstanding.1977398835 Jul 19 04:54:40 PM PDT 24 Jul 19 04:54:51 PM PDT 24 419917777 ps
T60 /workspace/coverage/cover_reg_top/14.rv_dm_csr_mem_rw_with_rand_reset.1705315402 Jul 19 04:55:06 PM PDT 24 Jul 19 04:55:11 PM PDT 24 114108952 ps
T98 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_hw_reset.2552715419 Jul 19 04:54:39 PM PDT 24 Jul 19 04:54:49 PM PDT 24 2464515994 ps
T295 /workspace/coverage/cover_reg_top/5.rv_dm_jtag_dtm_csr_rw.718595709 Jul 19 04:54:46 PM PDT 24 Jul 19 04:54:50 PM PDT 24 165449926 ps
T99 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_hw_reset.2674946366 Jul 19 04:54:45 PM PDT 24 Jul 19 04:55:02 PM PDT 24 18650752867 ps
T91 /workspace/coverage/cover_reg_top/1.rv_dm_csr_rw.2388945064 Jul 19 04:54:38 PM PDT 24 Jul 19 04:54:41 PM PDT 24 65426186 ps
T296 /workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_rw.378673236 Jul 19 04:54:58 PM PDT 24 Jul 19 04:55:06 PM PDT 24 1574372053 ps
T75 /workspace/coverage/cover_reg_top/3.rv_dm_tap_fsm_rand_reset.2924927872 Jul 19 04:54:45 PM PDT 24 Jul 19 05:09:04 PM PDT 24 81387669327 ps
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