Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
82.83 95.57 81.38 89.91 75.00 86.33 98.53 53.09


Total tests in report: 433
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
57.57 57.57 84.86 84.86 53.52 53.52 51.76 51.76 51.25 51.25 64.83 64.83 93.59 93.59 3.21 3.21 /workspace/coverage/default/17.rv_dm_autoincr_sba_tl_access.3970594355
67.94 10.36 92.05 7.19 68.28 14.76 68.79 17.02 66.25 15.00 78.00 13.17 94.95 1.37 7.24 4.04 /workspace/coverage/default/28.rv_dm_stress_all.3021334264
75.83 7.90 92.20 0.15 72.69 4.41 71.21 2.42 73.75 7.50 79.33 1.33 96.64 1.68 45.01 37.77 /workspace/coverage/cover_reg_top/0.rv_dm_tap_fsm_rand_reset.1952379555
77.83 2.00 92.25 0.05 74.34 1.66 81.34 10.13 75.00 1.25 80.00 0.67 96.64 0.00 45.25 0.24 /workspace/coverage/default/35.rv_dm_stress_all.3172708108
78.79 0.96 92.35 0.10 75.86 1.52 82.73 1.39 75.00 0.00 80.50 0.50 96.64 0.00 48.46 3.21 /workspace/coverage/cover_reg_top/17.rv_dm_tl_intg_err.4256202197
79.43 0.64 92.35 0.00 76.00 0.14 87.08 4.35 75.00 0.00 80.50 0.00 96.64 0.00 48.46 0.00 /workspace/coverage/default/2.rv_dm_autoincr_sba_tl_access.3288728636
79.89 0.46 92.91 0.55 76.97 0.97 87.94 0.86 75.00 0.00 81.00 0.50 96.64 0.00 48.81 0.36 /workspace/coverage/default/19.rv_dm_alert_test.1249127722
80.20 0.30 93.41 0.50 77.66 0.69 88.02 0.08 75.00 0.00 81.83 0.83 96.64 0.00 48.81 0.00 /workspace/coverage/default/0.rv_dm_abstractcmd_status.3528462167
80.42 0.23 93.81 0.40 78.07 0.41 88.19 0.16 75.00 0.00 82.33 0.50 96.64 0.00 48.93 0.12 /workspace/coverage/default/5.rv_dm_stress_all.3507153494
80.63 0.20 94.11 0.30 78.34 0.28 88.19 0.00 75.00 0.00 83.17 0.83 96.64 0.00 48.93 0.00 /workspace/coverage/default/0.rv_dm_cmderr_exception.2694267869
80.81 0.18 94.42 0.30 78.62 0.28 88.19 0.00 75.00 0.00 83.50 0.33 96.64 0.00 49.29 0.36 /workspace/coverage/default/18.rv_dm_stress_all.3403945570
80.99 0.18 94.42 0.00 78.62 0.00 88.19 0.00 75.00 0.00 83.50 0.00 97.90 1.26 49.29 0.00 /workspace/coverage/cover_reg_top/9.rv_dm_csr_rw.271640873
81.16 0.17 94.72 0.30 79.03 0.41 88.19 0.00 75.00 0.00 84.00 0.50 97.90 0.00 49.29 0.00 /workspace/coverage/default/0.rv_dm_debug_disabled.1146040613
81.33 0.17 95.02 0.30 79.45 0.41 88.19 0.00 75.00 0.00 84.50 0.50 97.90 0.00 49.29 0.00 /workspace/coverage/default/1.rv_dm_sba_debug_disabled.2043451595
81.48 0.15 95.12 0.10 79.59 0.14 88.23 0.04 75.00 0.00 85.00 0.50 97.90 0.00 49.52 0.24 /workspace/coverage/default/1.rv_dm_rom_read_access.1326716744
81.62 0.14 95.12 0.00 80.00 0.41 88.47 0.25 75.00 0.00 85.00 0.00 98.00 0.11 49.76 0.24 /workspace/coverage/default/0.rv_dm_sec_cm.761758970
81.74 0.12 95.12 0.00 80.00 0.00 89.05 0.57 75.00 0.00 85.00 0.00 98.00 0.00 50.00 0.24 /workspace/coverage/default/9.rv_dm_autoincr_sba_tl_access.882596893
81.85 0.11 95.17 0.05 80.41 0.41 89.05 0.00 75.00 0.00 85.17 0.17 98.00 0.00 50.12 0.12 /workspace/coverage/default/1.rv_dm_dmi_failed_op.2383049676
81.95 0.10 95.17 0.00 80.41 0.00 89.05 0.00 75.00 0.00 85.17 0.00 98.00 0.00 50.83 0.71 /workspace/coverage/cover_reg_top/14.rv_dm_tl_intg_err.340117822
82.04 0.09 95.17 0.00 80.69 0.28 89.05 0.00 75.00 0.00 85.17 0.00 98.00 0.00 51.19 0.36 /workspace/coverage/default/42.rv_dm_stress_all.3942567424
82.11 0.07 95.27 0.10 80.69 0.00 89.09 0.04 75.00 0.00 85.50 0.33 98.00 0.00 51.19 0.00 /workspace/coverage/default/1.rv_dm_progbuf_read_write_execute.711922752
82.17 0.07 95.42 0.15 80.83 0.14 89.09 0.00 75.00 0.00 85.67 0.17 98.00 0.00 51.19 0.00 /workspace/coverage/default/1.rv_dm_cmderr_busy.4245060139
82.23 0.06 95.42 0.00 81.10 0.28 89.09 0.00 75.00 0.00 85.83 0.17 98.00 0.00 51.19 0.00 /workspace/coverage/default/0.rv_dm_progbuf_busy.3621759263
82.29 0.06 95.42 0.00 81.10 0.00 89.25 0.16 75.00 0.00 85.83 0.00 98.00 0.00 51.43 0.24 /workspace/coverage/cover_reg_top/2.rv_dm_tap_fsm_rand_reset.2415003862
82.34 0.05 95.42 0.00 81.10 0.00 89.38 0.12 75.00 0.00 85.83 0.00 98.00 0.00 51.66 0.24 /workspace/coverage/default/0.rv_dm_stress_all.2445610985
82.39 0.05 95.42 0.00 81.10 0.00 89.38 0.00 75.00 0.00 85.83 0.00 98.00 0.00 52.02 0.36 /workspace/coverage/default/47.rv_dm_stress_all.3958068023
82.44 0.05 95.47 0.05 81.24 0.14 89.38 0.00 75.00 0.00 86.00 0.17 98.00 0.00 52.02 0.00 /workspace/coverage/default/0.rv_dm_hartsel_warl.868575730
82.49 0.05 95.52 0.05 81.24 0.00 89.38 0.00 75.00 0.00 86.17 0.17 98.00 0.00 52.14 0.12 /workspace/coverage/default/31.rv_dm_stress_all.1611872455
82.53 0.04 95.52 0.00 81.24 0.00 89.62 0.25 75.00 0.00 86.17 0.00 98.00 0.00 52.14 0.00 /workspace/coverage/default/18.rv_dm_autoincr_sba_tl_access.972573753
82.56 0.03 95.52 0.00 81.24 0.00 89.62 0.00 75.00 0.00 86.17 0.00 98.00 0.00 52.38 0.24 /workspace/coverage/default/1.rv_dm_autoincr_sba_tl_access.367948696
82.59 0.03 95.57 0.05 81.24 0.00 89.62 0.00 75.00 0.00 86.33 0.17 98.00 0.00 52.38 0.00 /workspace/coverage/cover_reg_top/10.rv_dm_jtag_dtm_csr_rw.859229314
82.62 0.03 95.57 0.00 81.24 0.00 89.62 0.00 75.00 0.00 86.33 0.00 98.21 0.21 52.38 0.00 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_hw_reset.902590164
82.65 0.03 95.57 0.00 81.24 0.00 89.62 0.00 75.00 0.00 86.33 0.00 98.42 0.21 52.38 0.00 /workspace/coverage/cover_reg_top/10.rv_dm_same_csr_outstanding.756404951
82.68 0.03 95.57 0.00 81.24 0.00 89.70 0.08 75.00 0.00 86.33 0.00 98.42 0.00 52.49 0.12 /workspace/coverage/default/14.rv_dm_bad_sba_tl_access.380406218
82.70 0.02 95.57 0.00 81.38 0.14 89.70 0.00 75.00 0.00 86.33 0.00 98.42 0.00 52.49 0.00 /workspace/coverage/default/0.rv_dm_cmderr_halt_resume.2499288661
82.72 0.02 95.57 0.00 81.38 0.00 89.70 0.00 75.00 0.00 86.33 0.00 98.42 0.00 52.61 0.12 /workspace/coverage/cover_reg_top/1.rv_dm_tl_intg_err.224211023
82.74 0.02 95.57 0.00 81.38 0.00 89.70 0.00 75.00 0.00 86.33 0.00 98.42 0.00 52.73 0.12 /workspace/coverage/cover_reg_top/10.rv_dm_tl_intg_err.1226692331
82.75 0.02 95.57 0.00 81.38 0.00 89.70 0.00 75.00 0.00 86.33 0.00 98.42 0.00 52.85 0.12 /workspace/coverage/default/0.rv_dm_mem_tl_access_halted.3542546292
82.77 0.02 95.57 0.00 81.38 0.00 89.70 0.00 75.00 0.00 86.33 0.00 98.42 0.00 52.97 0.12 /workspace/coverage/default/11.rv_dm_stress_all.2194132067
82.79 0.02 95.57 0.00 81.38 0.00 89.70 0.00 75.00 0.00 86.33 0.00 98.42 0.00 53.09 0.12 /workspace/coverage/default/43.rv_dm_stress_all.3637018548
82.80 0.02 95.57 0.00 81.38 0.00 89.70 0.00 75.00 0.00 86.33 0.00 98.53 0.11 53.09 0.00 /workspace/coverage/cover_reg_top/1.rv_dm_csr_aliasing.4149343267
82.81 0.01 95.57 0.00 81.38 0.00 89.79 0.08 75.00 0.00 86.33 0.00 98.53 0.00 53.09 0.00 /workspace/coverage/cover_reg_top/19.rv_dm_tl_intg_err.1691296659
82.82 0.01 95.57 0.00 81.38 0.00 89.87 0.08 75.00 0.00 86.33 0.00 98.53 0.00 53.09 0.00 /workspace/coverage/default/12.rv_dm_delayed_resp_sba_tl_access.1857713101
82.83 0.01 95.57 0.00 81.38 0.00 89.91 0.04 75.00 0.00 86.33 0.00 98.53 0.00 53.09 0.00 /workspace/coverage/default/0.rv_dm_jtag_dtm_hard_reset.509967493

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.rv_dm_csr_aliasing.1717189964
/workspace/coverage/cover_reg_top/0.rv_dm_csr_bit_bash.1346575590
/workspace/coverage/cover_reg_top/0.rv_dm_csr_hw_reset.3671305128
/workspace/coverage/cover_reg_top/0.rv_dm_csr_mem_rw_with_rand_reset.3416334183
/workspace/coverage/cover_reg_top/0.rv_dm_csr_rw.2101478458
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_aliasing.519398519
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_bit_bash.2159167226
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_rw.525393696
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_aliasing.2933605753
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_bit_bash.3985840627
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_hw_reset.4116293660
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_rw.1810942078
/workspace/coverage/cover_reg_top/0.rv_dm_mem_partial_access.3232264513
/workspace/coverage/cover_reg_top/0.rv_dm_mem_walk.3563778956
/workspace/coverage/cover_reg_top/0.rv_dm_same_csr_outstanding.3872614199
/workspace/coverage/cover_reg_top/0.rv_dm_tl_errors.4204887109
/workspace/coverage/cover_reg_top/0.rv_dm_tl_intg_err.1464383365
/workspace/coverage/cover_reg_top/1.rv_dm_csr_bit_bash.329018524
/workspace/coverage/cover_reg_top/1.rv_dm_csr_hw_reset.558752764
/workspace/coverage/cover_reg_top/1.rv_dm_csr_mem_rw_with_rand_reset.1217922489
/workspace/coverage/cover_reg_top/1.rv_dm_csr_rw.548558856
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_aliasing.2138994757
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_bit_bash.3006733009
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_hw_reset.3413119347
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_rw.2923766374
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_aliasing.3215953014
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_bit_bash.2318631830
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_hw_reset.2302742419
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_rw.2405879273
/workspace/coverage/cover_reg_top/1.rv_dm_mem_partial_access.3047515529
/workspace/coverage/cover_reg_top/1.rv_dm_mem_walk.2388532317
/workspace/coverage/cover_reg_top/1.rv_dm_same_csr_outstanding.2520134590
/workspace/coverage/cover_reg_top/1.rv_dm_tap_fsm_rand_reset.2410502497
/workspace/coverage/cover_reg_top/1.rv_dm_tl_errors.2244040359
/workspace/coverage/cover_reg_top/10.rv_dm_csr_mem_rw_with_rand_reset.3126463082
/workspace/coverage/cover_reg_top/10.rv_dm_csr_rw.626523410
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_bit_bash.2230548886
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_rw.375969717
/workspace/coverage/cover_reg_top/10.rv_dm_tl_errors.18544872
/workspace/coverage/cover_reg_top/11.rv_dm_csr_mem_rw_with_rand_reset.4257570026
/workspace/coverage/cover_reg_top/11.rv_dm_csr_rw.914793317
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_bit_bash.1149926932
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_rw.674807725
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dtm_csr_rw.2245381297
/workspace/coverage/cover_reg_top/11.rv_dm_same_csr_outstanding.2395097126
/workspace/coverage/cover_reg_top/11.rv_dm_tl_errors.1705087649
/workspace/coverage/cover_reg_top/11.rv_dm_tl_intg_err.3673461867
/workspace/coverage/cover_reg_top/12.rv_dm_csr_mem_rw_with_rand_reset.1658139754
/workspace/coverage/cover_reg_top/12.rv_dm_csr_rw.258886977
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dmi_csr_bit_bash.1648182322
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dmi_csr_rw.681569486
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dtm_csr_rw.1992237609
/workspace/coverage/cover_reg_top/12.rv_dm_same_csr_outstanding.954448169
/workspace/coverage/cover_reg_top/12.rv_dm_tl_errors.4121305549
/workspace/coverage/cover_reg_top/12.rv_dm_tl_intg_err.3235791971
/workspace/coverage/cover_reg_top/13.rv_dm_csr_mem_rw_with_rand_reset.3710711657
/workspace/coverage/cover_reg_top/13.rv_dm_csr_rw.551083017
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_bit_bash.1985257177
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_rw.330925828
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dtm_csr_rw.1843417882
/workspace/coverage/cover_reg_top/13.rv_dm_same_csr_outstanding.178838381
/workspace/coverage/cover_reg_top/13.rv_dm_tl_errors.144255284
/workspace/coverage/cover_reg_top/13.rv_dm_tl_intg_err.386109348
/workspace/coverage/cover_reg_top/14.rv_dm_csr_mem_rw_with_rand_reset.4110535155
/workspace/coverage/cover_reg_top/14.rv_dm_csr_rw.2114487406
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dmi_csr_bit_bash.2296983636
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dmi_csr_rw.520258052
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dtm_csr_rw.4216992962
/workspace/coverage/cover_reg_top/14.rv_dm_same_csr_outstanding.1139795240
/workspace/coverage/cover_reg_top/14.rv_dm_tl_errors.1761003207
/workspace/coverage/cover_reg_top/15.rv_dm_csr_mem_rw_with_rand_reset.1334597537
/workspace/coverage/cover_reg_top/15.rv_dm_csr_rw.3699912542
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_bit_bash.2620131256
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_rw.484897878
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dtm_csr_rw.1238601190
/workspace/coverage/cover_reg_top/15.rv_dm_same_csr_outstanding.4120412544
/workspace/coverage/cover_reg_top/15.rv_dm_tl_errors.1151574243
/workspace/coverage/cover_reg_top/15.rv_dm_tl_intg_err.2998596106
/workspace/coverage/cover_reg_top/16.rv_dm_csr_mem_rw_with_rand_reset.1257313765
/workspace/coverage/cover_reg_top/16.rv_dm_csr_rw.667990755
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_bit_bash.4026958548
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_rw.576091457
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dtm_csr_rw.1538434368
/workspace/coverage/cover_reg_top/16.rv_dm_same_csr_outstanding.4216348547
/workspace/coverage/cover_reg_top/16.rv_dm_tl_errors.2720676767
/workspace/coverage/cover_reg_top/16.rv_dm_tl_intg_err.3842696329
/workspace/coverage/cover_reg_top/17.rv_dm_csr_mem_rw_with_rand_reset.2820324111
/workspace/coverage/cover_reg_top/17.rv_dm_csr_rw.769662949
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dmi_csr_bit_bash.23541368
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dmi_csr_rw.1680760697
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dtm_csr_rw.21691038
/workspace/coverage/cover_reg_top/17.rv_dm_same_csr_outstanding.3698299141
/workspace/coverage/cover_reg_top/17.rv_dm_tl_errors.306528781
/workspace/coverage/cover_reg_top/18.rv_dm_csr_mem_rw_with_rand_reset.1931152394
/workspace/coverage/cover_reg_top/18.rv_dm_csr_rw.3459307267
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_bit_bash.2134371400
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_rw.2441864078
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dtm_csr_rw.3780379828
/workspace/coverage/cover_reg_top/18.rv_dm_same_csr_outstanding.698548361
/workspace/coverage/cover_reg_top/18.rv_dm_tl_errors.1635619155
/workspace/coverage/cover_reg_top/18.rv_dm_tl_intg_err.2568325280
/workspace/coverage/cover_reg_top/19.rv_dm_csr_mem_rw_with_rand_reset.2121275668
/workspace/coverage/cover_reg_top/19.rv_dm_csr_rw.1363319842
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_bit_bash.238823568
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_rw.3137232750
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dtm_csr_rw.2886398806
/workspace/coverage/cover_reg_top/19.rv_dm_same_csr_outstanding.4173867566
/workspace/coverage/cover_reg_top/19.rv_dm_tl_errors.3562390054
/workspace/coverage/cover_reg_top/2.rv_dm_csr_aliasing.1552812955
/workspace/coverage/cover_reg_top/2.rv_dm_csr_bit_bash.3584407510
/workspace/coverage/cover_reg_top/2.rv_dm_csr_hw_reset.3135901779
/workspace/coverage/cover_reg_top/2.rv_dm_csr_mem_rw_with_rand_reset.3058912562
/workspace/coverage/cover_reg_top/2.rv_dm_csr_rw.1787460585
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_aliasing.1391630703
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_bit_bash.2154037228
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_hw_reset.2078686316
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_rw.3196423295
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_aliasing.3684560481
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_bit_bash.2147149557
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_hw_reset.283128666
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_rw.181836318
/workspace/coverage/cover_reg_top/2.rv_dm_mem_partial_access.3146520152
/workspace/coverage/cover_reg_top/2.rv_dm_mem_walk.1685721410
/workspace/coverage/cover_reg_top/2.rv_dm_same_csr_outstanding.1706986810
/workspace/coverage/cover_reg_top/2.rv_dm_tl_errors.3713168809
/workspace/coverage/cover_reg_top/2.rv_dm_tl_intg_err.3307186641
/workspace/coverage/cover_reg_top/3.rv_dm_csr_aliasing.2097094496
/workspace/coverage/cover_reg_top/3.rv_dm_csr_bit_bash.3562056416
/workspace/coverage/cover_reg_top/3.rv_dm_csr_hw_reset.1247300529
/workspace/coverage/cover_reg_top/3.rv_dm_csr_mem_rw_with_rand_reset.698565952
/workspace/coverage/cover_reg_top/3.rv_dm_csr_rw.734096126
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_aliasing.1624025503
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_bit_bash.944649888
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_hw_reset.3028723485
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_rw.1694008690
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/workspace/coverage/default/27.rv_dm_alert_test.936754316
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/workspace/coverage/default/29.rv_dm_alert_test.3924571337
/workspace/coverage/default/3.rv_dm_alert_test.584081434
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Total test records in report: 433
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/12.rv_dm_alert_test.2065234635 Jul 22 05:46:09 PM PDT 24 Jul 22 05:46:11 PM PDT 24 46787988 ps
T2 /workspace/coverage/default/0.rv_dm_jtag_dtm_hard_reset.509967493 Jul 22 05:45:42 PM PDT 24 Jul 22 05:45:45 PM PDT 24 2516401503 ps
T3 /workspace/coverage/default/9.rv_dm_alert_test.3064685143 Jul 22 05:46:08 PM PDT 24 Jul 22 05:46:10 PM PDT 24 79598600 ps
T10 /workspace/coverage/default/17.rv_dm_autoincr_sba_tl_access.3970594355 Jul 22 05:46:24 PM PDT 24 Jul 22 05:46:43 PM PDT 24 7567055420 ps
T11 /workspace/coverage/default/4.rv_dm_delayed_resp_sba_tl_access.1772453110 Jul 22 05:45:58 PM PDT 24 Jul 22 05:46:02 PM PDT 24 1573280335 ps
T35 /workspace/coverage/default/1.rv_dm_rom_read_access.1326716744 Jul 22 05:45:50 PM PDT 24 Jul 22 05:45:52 PM PDT 24 276665775 ps
T4 /workspace/coverage/default/1.rv_dm_progbuf_read_write_execute.711922752 Jul 22 05:45:51 PM PDT 24 Jul 22 05:45:54 PM PDT 24 271737958 ps
T18 /workspace/coverage/default/16.rv_dm_autoincr_sba_tl_access.184375938 Jul 22 05:46:11 PM PDT 24 Jul 22 05:46:20 PM PDT 24 23332536282 ps
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T175 /workspace/coverage/default/20.rv_dm_stress_all.2965381404 Jul 22 05:46:17 PM PDT 24 Jul 22 05:46:23 PM PDT 24 3344219863 ps
T220 /workspace/coverage/default/11.rv_dm_delayed_resp_sba_tl_access.1508534439 Jul 22 05:46:11 PM PDT 24 Jul 22 05:46:16 PM PDT 24 4761098440 ps
T125 /workspace/coverage/default/6.rv_dm_stress_all.3208797098 Jul 22 05:46:00 PM PDT 24 Jul 22 05:46:09 PM PDT 24 3919333766 ps
T203 /workspace/coverage/default/11.rv_dm_alert_test.2922764155 Jul 22 05:46:09 PM PDT 24 Jul 22 05:46:10 PM PDT 24 160457858 ps
T217 /workspace/coverage/default/1.rv_dm_smoke.4273728833 Jul 22 05:45:46 PM PDT 24 Jul 22 05:45:52 PM PDT 24 2585475198 ps
T261 /workspace/coverage/default/12.rv_dm_autoincr_sba_tl_access.4104006172 Jul 22 05:46:13 PM PDT 24 Jul 22 05:46:21 PM PDT 24 4448043320 ps
T25 /workspace/coverage/default/0.rv_dm_cmderr_busy.1883385984 Jul 22 05:45:42 PM PDT 24 Jul 22 05:45:44 PM PDT 24 729245827 ps
T262 /workspace/coverage/default/13.rv_dm_sba_tl_access.2224360745 Jul 22 05:46:12 PM PDT 24 Jul 22 05:46:22 PM PDT 24 2912080078 ps
T206 /workspace/coverage/default/0.rv_dm_jtag_dmi_debug_disabled.2869021845 Jul 22 05:45:44 PM PDT 24 Jul 22 05:45:47 PM PDT 24 476527254 ps
T227 /workspace/coverage/default/18.rv_dm_delayed_resp_sba_tl_access.121341060 Jul 22 05:46:18 PM PDT 24 Jul 22 05:46:34 PM PDT 24 9900319032 ps
T263 /workspace/coverage/default/30.rv_dm_alert_test.477708392 Jul 22 05:46:21 PM PDT 24 Jul 22 05:46:23 PM PDT 24 113012839 ps
T173 /workspace/coverage/default/47.rv_dm_alert_test.3101739195 Jul 22 05:46:29 PM PDT 24 Jul 22 05:46:30 PM PDT 24 85079311 ps
T128 /workspace/coverage/default/2.rv_dm_sba_tl_access.3397715561 Jul 22 05:45:52 PM PDT 24 Jul 22 05:46:01 PM PDT 24 4713523102 ps
T14 /workspace/coverage/default/47.rv_dm_stress_all.3958068023 Jul 22 05:46:31 PM PDT 24 Jul 22 05:46:35 PM PDT 24 2997284922 ps
T209 /workspace/coverage/default/1.rv_dm_alert_test.1557049145 Jul 22 05:45:58 PM PDT 24 Jul 22 05:45:59 PM PDT 24 59268347 ps
T264 /workspace/coverage/default/11.rv_dm_sba_tl_access.3217893031 Jul 22 05:46:09 PM PDT 24 Jul 22 05:46:17 PM PDT 24 2099565432 ps
T265 /workspace/coverage/default/4.rv_dm_alert_test.1803400035 Jul 22 05:45:58 PM PDT 24 Jul 22 05:45:59 PM PDT 24 52603763 ps
T266 /workspace/coverage/default/7.rv_dm_autoincr_sba_tl_access.1222817104 Jul 22 05:46:01 PM PDT 24 Jul 22 05:46:16 PM PDT 24 5658368040 ps
T267 /workspace/coverage/default/4.rv_dm_bad_sba_tl_access.3696617191 Jul 22 05:45:54 PM PDT 24 Jul 22 05:45:59 PM PDT 24 4181369008 ps
T137 /workspace/coverage/default/4.rv_dm_hart_unavail.559360885 Jul 22 05:45:52 PM PDT 24 Jul 22 05:45:54 PM PDT 24 75088315 ps
T186 /workspace/coverage/default/12.rv_dm_bad_sba_tl_access.3836382435 Jul 22 05:47:05 PM PDT 24 Jul 22 05:47:08 PM PDT 24 3059746500 ps
T216 /workspace/coverage/default/14.rv_dm_autoincr_sba_tl_access.2174282210 Jul 22 05:46:08 PM PDT 24 Jul 22 05:46:26 PM PDT 24 6829506884 ps
T191 /workspace/coverage/default/28.rv_dm_alert_test.1835742664 Jul 22 05:46:26 PM PDT 24 Jul 22 05:46:27 PM PDT 24 45061013 ps
T200 /workspace/coverage/default/1.rv_dm_jtag_dtm_idle_hint.244075254 Jul 22 05:45:55 PM PDT 24 Jul 22 05:45:58 PM PDT 24 639918630 ps
T201 /workspace/coverage/default/1.rv_dm_halt_resume_whereto.2660314007 Jul 22 05:45:50 PM PDT 24 Jul 22 05:45:52 PM PDT 24 1810442107 ps
T162 /workspace/coverage/default/25.rv_dm_stress_all.2849835393 Jul 22 05:46:29 PM PDT 24 Jul 22 05:46:33 PM PDT 24 3710773439 ps
T40 /workspace/coverage/default/0.rv_dm_progbuf_read_write_execute.754354303 Jul 22 05:45:44 PM PDT 24 Jul 22 05:45:47 PM PDT 24 909600813 ps
T268 /workspace/coverage/default/0.rv_dm_bad_sba_tl_access.1131679919 Jul 22 05:45:43 PM PDT 24 Jul 22 05:45:46 PM PDT 24 1298146062 ps
T17 /workspace/coverage/default/12.rv_dm_stress_all.1258465436 Jul 22 05:46:16 PM PDT 24 Jul 22 05:46:28 PM PDT 24 6592080205 ps
T269 /workspace/coverage/default/7.rv_dm_sba_tl_access.2133902501 Jul 22 05:46:01 PM PDT 24 Jul 22 05:46:04 PM PDT 24 715955588 ps
T20 /workspace/coverage/default/1.rv_dm_cmderr_busy.4245060139 Jul 22 05:45:46 PM PDT 24 Jul 22 05:45:49 PM PDT 24 255360431 ps
T270 /workspace/coverage/default/26.rv_dm_alert_test.3126758549 Jul 22 05:46:21 PM PDT 24 Jul 22 05:46:23 PM PDT 24 31386874 ps
T129 /workspace/coverage/default/1.rv_dm_stress_all.1143161078 Jul 22 05:45:53 PM PDT 24 Jul 22 05:45:58 PM PDT 24 2458078649 ps
T271 /workspace/coverage/default/15.rv_dm_sba_tl_access.531328849 Jul 22 05:46:10 PM PDT 24 Jul 22 05:46:25 PM PDT 24 4735117930 ps
T272 /workspace/coverage/default/5.rv_dm_autoincr_sba_tl_access.3313809505 Jul 22 05:45:59 PM PDT 24 Jul 22 05:46:05 PM PDT 24 5527121019 ps
T154 /workspace/coverage/default/3.rv_dm_stress_all.443153209 Jul 22 05:45:52 PM PDT 24 Jul 22 05:46:05 PM PDT 24 7486541478 ps
T273 /workspace/coverage/default/14.rv_dm_sba_tl_access.1120626266 Jul 22 05:46:11 PM PDT 24 Jul 22 05:46:13 PM PDT 24 624515112 ps
T64 /workspace/coverage/default/0.rv_dm_tap_fsm.687237034 Jul 22 05:45:43 PM PDT 24 Jul 22 05:45:48 PM PDT 24 7983873114 ps
T133 /workspace/coverage/default/1.rv_dm_autoincr_sba_tl_access.367948696 Jul 22 05:45:46 PM PDT 24 Jul 22 05:45:54 PM PDT 24 9176992725 ps
T205 /workspace/coverage/default/3.rv_dm_hart_unavail.2323061298 Jul 22 05:47:49 PM PDT 24 Jul 22 05:47:51 PM PDT 24 722832560 ps
T274 /workspace/coverage/default/0.rv_dm_ndmreset_req.3113608027 Jul 22 05:45:50 PM PDT 24 Jul 22 05:45:51 PM PDT 24 157708417 ps
T165 /workspace/coverage/default/13.rv_dm_bad_sba_tl_access.31470993 Jul 22 05:46:12 PM PDT 24 Jul 22 05:46:15 PM PDT 24 2141002339 ps
T275 /workspace/coverage/default/10.rv_dm_autoincr_sba_tl_access.2660253152 Jul 22 05:46:07 PM PDT 24 Jul 22 05:46:12 PM PDT 24 5251389435 ps
T228 /workspace/coverage/default/3.rv_dm_autoincr_sba_tl_access.2498150893 Jul 22 05:45:50 PM PDT 24 Jul 22 05:46:03 PM PDT 24 5102556708 ps
T202 /workspace/coverage/default/0.rv_dm_alert_test.1238080050 Jul 22 05:45:44 PM PDT 24 Jul 22 05:45:46 PM PDT 24 104710054 ps
T276 /workspace/coverage/default/2.rv_dm_bad_sba_tl_access.1658147889 Jul 22 05:45:54 PM PDT 24 Jul 22 05:46:01 PM PDT 24 7288312973 ps
T183 /workspace/coverage/default/19.rv_dm_bad_sba_tl_access.1506687077 Jul 22 05:48:34 PM PDT 24 Jul 22 05:48:41 PM PDT 24 1701881749 ps
T132 /workspace/coverage/default/13.rv_dm_stress_all.3212338561 Jul 22 05:46:11 PM PDT 24 Jul 22 05:46:18 PM PDT 24 4605213900 ps
T277 /workspace/coverage/default/0.rv_dm_jtag_dmi_dm_inactive.122154641 Jul 22 05:45:38 PM PDT 24 Jul 22 05:45:40 PM PDT 24 467134215 ps
T278 /workspace/coverage/default/19.rv_dm_delayed_resp_sba_tl_access.882508481 Jul 22 05:46:19 PM PDT 24 Jul 22 05:46:24 PM PDT 24 1274273542 ps
T279 /workspace/coverage/default/10.rv_dm_bad_sba_tl_access.4051369797 Jul 22 05:46:13 PM PDT 24 Jul 22 05:46:16 PM PDT 24 3732894066 ps
T39 /workspace/coverage/default/1.rv_dm_cmderr_exception.719682357 Jul 22 05:45:46 PM PDT 24 Jul 22 05:45:48 PM PDT 24 243955634 ps
T184 /workspace/coverage/default/18.rv_dm_sba_tl_access.679066896 Jul 22 05:46:23 PM PDT 24 Jul 22 05:46:28 PM PDT 24 1488976641 ps
T185 /workspace/coverage/default/13.rv_dm_autoincr_sba_tl_access.2546379516 Jul 22 05:46:12 PM PDT 24 Jul 22 05:50:30 PM PDT 24 100033962346 ps
T47 /workspace/coverage/default/0.rv_dm_dmi_failed_op.1314032525 Jul 22 05:45:41 PM PDT 24 Jul 22 05:45:42 PM PDT 24 206761943 ps
T196 /workspace/coverage/default/38.rv_dm_alert_test.3486203312 Jul 22 05:46:19 PM PDT 24 Jul 22 05:46:20 PM PDT 24 83526877 ps
T280 /workspace/coverage/default/19.rv_dm_sba_tl_access.791330465 Jul 22 05:46:19 PM PDT 24 Jul 22 05:46:22 PM PDT 24 2554228461 ps
T161 /workspace/coverage/default/0.rv_dm_mem_tl_access_halted.3542546292 Jul 22 05:45:43 PM PDT 24 Jul 22 05:45:45 PM PDT 24 409557731 ps
T156 /workspace/coverage/default/1.rv_dm_cmderr_not_supported.3007724191 Jul 22 05:45:50 PM PDT 24 Jul 22 05:45:53 PM PDT 24 779412202 ps
T56 /workspace/coverage/cover_reg_top/2.rv_dm_tl_intg_err.3307186641 Jul 22 05:45:04 PM PDT 24 Jul 22 05:45:16 PM PDT 24 1177596681 ps
T57 /workspace/coverage/cover_reg_top/17.rv_dm_tl_intg_err.4256202197 Jul 22 05:45:32 PM PDT 24 Jul 22 05:45:52 PM PDT 24 2372704542 ps
T58 /workspace/coverage/cover_reg_top/0.rv_dm_tap_fsm_rand_reset.1952379555 Jul 22 05:45:02 PM PDT 24 Jul 22 05:50:23 PM PDT 24 33758587331 ps
T72 /workspace/coverage/cover_reg_top/1.rv_dm_tl_errors.2244040359 Jul 22 05:45:02 PM PDT 24 Jul 22 05:45:06 PM PDT 24 264705033 ps
T80 /workspace/coverage/cover_reg_top/8.rv_dm_csr_rw.2772823658 Jul 22 05:45:22 PM PDT 24 Jul 22 05:45:24 PM PDT 24 257823574 ps
T66 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_aliasing.1561371943 Jul 22 05:45:11 PM PDT 24 Jul 22 05:45:13 PM PDT 24 333094578 ps
T73 /workspace/coverage/cover_reg_top/10.rv_dm_csr_mem_rw_with_rand_reset.3126463082 Jul 22 05:45:38 PM PDT 24 Jul 22 05:45:42 PM PDT 24 175122134 ps
T74 /workspace/coverage/cover_reg_top/11.rv_dm_tl_intg_err.3673461867 Jul 22 05:45:31 PM PDT 24 Jul 22 05:45:57 PM PDT 24 6446869058 ps
T75 /workspace/coverage/cover_reg_top/11.rv_dm_csr_mem_rw_with_rand_reset.4257570026 Jul 22 05:45:31 PM PDT 24 Jul 22 05:45:36 PM PDT 24 292206638 ps
T65 /workspace/coverage/cover_reg_top/1.rv_dm_tap_fsm_rand_reset.2410502497 Jul 22 05:45:05 PM PDT 24 Jul 22 05:46:01 PM PDT 24 16273861339 ps
T67 /workspace/coverage/cover_reg_top/16.rv_dm_jtag_dtm_csr_rw.1538434368 Jul 22 05:45:31 PM PDT 24 Jul 22 05:45:33 PM PDT 24 390918250 ps
T76 /workspace/coverage/cover_reg_top/6.rv_dm_tl_intg_err.1207675903 Jul 22 05:45:21 PM PDT 24 Jul 22 05:45:44 PM PDT 24 2529269496 ps
T81 /workspace/coverage/cover_reg_top/2.rv_dm_csr_hw_reset.3135901779 Jul 22 05:45:07 PM PDT 24 Jul 22 05:45:09 PM PDT 24 115793487 ps
T281 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_bit_bash.2159167226 Jul 22 05:45:01 PM PDT 24 Jul 22 05:45:25 PM PDT 24 17855764397 ps
T68 /workspace/coverage/cover_reg_top/10.rv_dm_jtag_dtm_csr_rw.859229314 Jul 22 05:45:22 PM PDT 24 Jul 22 05:45:25 PM PDT 24 391583451 ps
T82 /workspace/coverage/cover_reg_top/11.rv_dm_csr_rw.914793317 Jul 22 05:45:34 PM PDT 24 Jul 22 05:45:37 PM PDT 24 375093591 ps
T77 /workspace/coverage/cover_reg_top/10.rv_dm_tl_errors.18544872 Jul 22 05:45:29 PM PDT 24 Jul 22 05:45:34 PM PDT 24 242265637 ps
T282 /workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_rw.3137232750 Jul 22 05:45:41 PM PDT 24 Jul 22 05:46:22 PM PDT 24 15329695634 ps
T83 /workspace/coverage/cover_reg_top/1.rv_dm_csr_hw_reset.558752764 Jul 22 05:45:02 PM PDT 24 Jul 22 05:45:05 PM PDT 24 647486066 ps
T84 /workspace/coverage/cover_reg_top/13.rv_dm_same_csr_outstanding.178838381 Jul 22 05:45:32 PM PDT 24 Jul 22 05:45:37 PM PDT 24 4609086109 ps
T85 /workspace/coverage/cover_reg_top/7.rv_dm_same_csr_outstanding.467818343 Jul 22 05:45:25 PM PDT 24 Jul 22 05:45:30 PM PDT 24 672496589 ps
T86 /workspace/coverage/cover_reg_top/4.rv_dm_csr_bit_bash.2400171257 Jul 22 05:47:48 PM PDT 24 Jul 22 05:48:52 PM PDT 24 5109739031 ps
T78 /workspace/coverage/cover_reg_top/8.rv_dm_tl_errors.2738156301 Jul 22 05:45:22 PM PDT 24 Jul 22 05:45:29 PM PDT 24 2544286770 ps
T89 /workspace/coverage/cover_reg_top/9.rv_dm_csr_mem_rw_with_rand_reset.2774946537 Jul 22 05:45:22 PM PDT 24 Jul 22 05:45:25 PM PDT 24 802337121 ps
T90 /workspace/coverage/cover_reg_top/13.rv_dm_csr_mem_rw_with_rand_reset.3710711657 Jul 22 05:45:33 PM PDT 24 Jul 22 05:45:36 PM PDT 24 328125313 ps
T283 /workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_bit_bash.2134371400 Jul 22 05:45:42 PM PDT 24 Jul 22 05:46:03 PM PDT 24 24958997340 ps
T284 /workspace/coverage/cover_reg_top/8.rv_dm_jtag_dmi_csr_bit_bash.3083476233 Jul 22 05:45:21 PM PDT 24 Jul 22 05:46:23 PM PDT 24 28237421295 ps
T285 /workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_rw.375969717 Jul 22 05:45:20 PM PDT 24 Jul 22 05:45:51 PM PDT 24 11841700870 ps
T286 /workspace/coverage/cover_reg_top/7.rv_dm_jtag_dtm_csr_rw.1528644875 Jul 22 05:45:21 PM PDT 24 Jul 22 05:45:24 PM PDT 24 454258100 ps
T121 /workspace/coverage/cover_reg_top/9.rv_dm_tl_errors.2728449618 Jul 22 05:45:24 PM PDT 24 Jul 22 05:45:28 PM PDT 24 155637977 ps
T287 /workspace/coverage/cover_reg_top/5.rv_dm_jtag_dmi_csr_rw.2565751227 Jul 22 05:45:23 PM PDT 24 Jul 22 05:45:33 PM PDT 24 11367110569 ps
T288 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_bit_bash.944649888 Jul 22 05:45:04 PM PDT 24 Jul 22 05:45:26 PM PDT 24 24890237666 ps
T289 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_rw.181836318 Jul 22 05:45:01 PM PDT 24 Jul 22 05:45:03 PM PDT 24 353796815 ps
T87 /workspace/coverage/cover_reg_top/5.rv_dm_csr_rw.2114409265 Jul 22 05:45:21 PM PDT 24 Jul 22 05:45:24 PM PDT 24 72297908 ps
T141 /workspace/coverage/cover_reg_top/0.rv_dm_tl_errors.4204887109 Jul 22 05:44:59 PM PDT 24 Jul 22 05:45:02 PM PDT 24 225500744 ps
T88 /workspace/coverage/cover_reg_top/16.rv_dm_csr_rw.667990755 Jul 22 05:45:34 PM PDT 24 Jul 22 05:45:37 PM PDT 24 95305375 ps
T96 /workspace/coverage/cover_reg_top/0.rv_dm_csr_aliasing.1717189964 Jul 22 05:45:02 PM PDT 24 Jul 22 05:46:21 PM PDT 24 4748135269 ps
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