SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.rv_dm_regs_csr_assert | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
91.35 | 100.00 | 76.60 | 92.63 | 100.00 | 87.50 | dut |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 3 | 3 | 100.00 | 3 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 3 | 3 | 100.00 | 3 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
TlulOOBAddrErr_A | 124874239 | 31588 | 0 | 0 |
late_debug_enable_rd_A | 124874239 | 7418 | 0 | 0 |
late_debug_enable_regwen_rd_A | 124874239 | 8121 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 124874239 | 31588 | 0 | 0 |
T61 | 36147 | 2 | 0 | 0 |
T62 | 142571 | 1 | 0 | 0 |
T63 | 215152 | 2679 | 0 | 0 |
T64 | 27288 | 528 | 0 | 0 |
T71 | 648214 | 226 | 0 | 0 |
T78 | 4636 | 34 | 0 | 0 |
T81 | 110531 | 5 | 0 | 0 |
T82 | 8476 | 487 | 0 | 0 |
T83 | 4195 | 415 | 0 | 0 |
T84 | 100456 | 354 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 124874239 | 7418 | 0 | 0 |
T64 | 27288 | 97 | 0 | 0 |
T65 | 27290 | 14 | 0 | 0 |
T71 | 648214 | 128 | 0 | 0 |
T82 | 8476 | 93 | 0 | 0 |
T84 | 100456 | 109 | 0 | 0 |
T88 | 491667 | 367 | 0 | 0 |
T91 | 23694 | 19 | 0 | 0 |
T94 | 29377 | 16 | 0 | 0 |
T96 | 40065 | 26 | 0 | 0 |
T130 | 65707 | 41 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 124874239 | 8121 | 0 | 0 |
T64 | 27288 | 118 | 0 | 0 |
T65 | 27290 | 21 | 0 | 0 |
T71 | 648214 | 124 | 0 | 0 |
T82 | 8476 | 35 | 0 | 0 |
T84 | 100456 | 109 | 0 | 0 |
T88 | 491667 | 462 | 0 | 0 |
T91 | 23694 | 5 | 0 | 0 |
T94 | 29377 | 1 | 0 | 0 |
T96 | 40065 | 31 | 0 | 0 |
T106 | 416809 | 1046 | 0 | 0 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |