Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
82.96 95.77 81.52 89.91 75.00 86.50 98.42 53.62


Total tests in report: 437
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
55.56 55.56 85.31 85.31 54.34 54.34 40.57 40.57 46.25 46.25 64.83 64.83 93.38 93.38 4.27 4.27 /workspace/coverage/default/25.rv_dm_stress_all.855915975
64.31 8.75 88.88 3.57 62.90 8.55 70.39 29.82 56.25 10.00 71.00 6.17 94.85 1.47 5.93 1.66 /workspace/coverage/default/10.rv_dm_autoincr_sba_tl_access.3693611828
71.86 7.55 89.03 0.15 67.31 4.41 72.72 2.34 63.75 7.50 72.33 1.33 95.90 1.05 41.99 36.06 /workspace/coverage/cover_reg_top/2.rv_dm_tap_fsm_rand_reset.2978507100
75.24 3.38 91.30 2.26 71.86 4.55 77.56 4.84 70.00 6.25 76.67 4.33 96.00 0.11 43.30 1.30 /workspace/coverage/default/38.rv_dm_stress_all.3093329399
76.96 1.72 92.40 1.11 73.79 1.93 78.01 0.45 75.00 5.00 80.00 3.33 96.00 0.00 43.53 0.24 /workspace/coverage/default/15.rv_dm_stress_all.1600232128
78.01 1.05 92.86 0.45 75.59 1.79 82.12 4.10 75.00 0.00 80.50 0.50 96.00 0.00 44.01 0.47 /workspace/coverage/default/9.rv_dm_alert_test.1409333602
78.81 0.80 92.96 0.10 77.10 1.52 82.85 0.74 75.00 0.00 81.00 0.50 96.00 0.00 46.74 2.73 /workspace/coverage/cover_reg_top/3.rv_dm_tl_intg_err.3219886591
79.46 0.65 92.96 0.00 77.24 0.14 86.42 3.57 75.00 0.00 81.00 0.00 96.00 0.00 47.57 0.83 /workspace/coverage/default/15.rv_dm_autoincr_sba_tl_access.3884426402
79.83 0.37 92.96 0.00 77.24 0.00 86.42 0.00 75.00 0.00 81.00 0.00 97.06 1.05 49.11 1.54 /workspace/coverage/cover_reg_top/4.rv_dm_csr_aliasing.415474082
80.14 0.32 93.56 0.60 77.93 0.69 86.51 0.08 75.00 0.00 81.83 0.83 97.06 0.00 49.11 0.00 /workspace/coverage/default/0.rv_dm_cmderr_exception.2887865934
80.43 0.29 93.56 0.00 77.93 0.00 88.52 2.01 75.00 0.00 81.83 0.00 97.06 0.00 49.11 0.00 /workspace/coverage/default/0.rv_dm_autoincr_sba_tl_access.3211111600
80.62 0.19 93.86 0.30 78.48 0.55 88.52 0.00 75.00 0.00 82.33 0.50 97.06 0.00 49.11 0.00 /workspace/coverage/default/0.rv_dm_debug_disabled.2986028918
80.81 0.19 93.86 0.00 78.48 0.00 88.52 0.00 75.00 0.00 82.33 0.00 97.06 0.00 50.42 1.30 /workspace/coverage/cover_reg_top/2.rv_dm_tl_intg_err.1378377938
80.99 0.18 94.22 0.35 79.03 0.55 88.52 0.00 75.00 0.00 82.67 0.33 97.06 0.00 50.42 0.00 /workspace/coverage/default/4.rv_dm_stress_all.1539855401
81.16 0.17 94.52 0.30 79.45 0.41 88.52 0.00 75.00 0.00 83.17 0.50 97.06 0.00 50.42 0.00 /workspace/coverage/default/0.rv_dm_sba_debug_disabled.1436161536
81.33 0.17 94.52 0.00 79.86 0.41 88.93 0.41 75.00 0.00 83.17 0.00 97.16 0.11 50.65 0.24 /workspace/coverage/default/1.rv_dm_sec_cm.307407826
81.47 0.14 94.77 0.25 80.00 0.14 89.09 0.16 75.00 0.00 83.50 0.33 97.16 0.00 50.77 0.12 /workspace/coverage/default/19.rv_dm_stress_all.2400340947
81.61 0.14 94.87 0.10 80.14 0.14 89.34 0.25 75.00 0.00 84.00 0.50 97.16 0.00 50.77 0.00 /workspace/coverage/default/1.rv_dm_rom_read_access.1796960747
81.74 0.13 94.97 0.10 80.28 0.14 89.50 0.16 75.00 0.00 84.50 0.50 97.16 0.00 50.77 0.00 /workspace/coverage/default/12.rv_dm_bad_sba_tl_access.1044054649
81.85 0.11 95.27 0.30 80.28 0.00 89.50 0.00 75.00 0.00 85.00 0.50 97.16 0.00 50.77 0.00 /workspace/coverage/default/0.rv_dm_abstractcmd_status.2997101364
81.96 0.11 95.32 0.05 80.69 0.41 89.50 0.00 75.00 0.00 85.17 0.17 97.16 0.00 50.89 0.12 /workspace/coverage/cover_reg_top/7.rv_dm_tap_fsm_rand_reset.1412723773
82.06 0.10 95.32 0.00 80.69 0.00 89.50 0.00 75.00 0.00 85.17 0.00 97.16 0.00 51.60 0.71 /workspace/coverage/default/7.rv_dm_stress_all.4180859833
82.16 0.10 95.47 0.15 80.83 0.14 89.50 0.00 75.00 0.00 85.33 0.17 97.16 0.00 51.84 0.24 /workspace/coverage/default/20.rv_dm_stress_all.1398112994
82.25 0.09 95.47 0.00 80.83 0.00 89.58 0.08 75.00 0.00 85.33 0.00 97.69 0.53 51.84 0.00 /workspace/coverage/cover_reg_top/2.rv_dm_same_csr_outstanding.1125204766
82.33 0.08 95.47 0.00 81.10 0.28 89.58 0.00 75.00 0.00 85.50 0.17 97.69 0.00 51.96 0.12 /workspace/coverage/default/1.rv_dm_progbuf_busy.3257810353
82.40 0.08 95.47 0.00 81.10 0.00 89.58 0.00 75.00 0.00 85.50 0.00 98.21 0.53 51.96 0.00 /workspace/coverage/cover_reg_top/0.rv_dm_csr_aliasing.1052549267
82.47 0.06 95.52 0.05 81.10 0.00 89.58 0.00 75.00 0.00 85.67 0.17 98.21 0.00 52.19 0.24 /workspace/coverage/default/30.rv_dm_stress_all.1247189764
82.53 0.06 95.62 0.10 81.10 0.00 89.58 0.00 75.00 0.00 86.00 0.33 98.21 0.00 52.19 0.00 /workspace/coverage/default/0.rv_dm_progbuf_read_write_execute.315892766
82.58 0.05 95.62 0.00 81.10 0.00 89.58 0.00 75.00 0.00 86.00 0.00 98.21 0.00 52.55 0.36 /workspace/coverage/cover_reg_top/6.rv_dm_tl_intg_err.808669818
82.63 0.05 95.67 0.05 81.24 0.14 89.58 0.00 75.00 0.00 86.17 0.17 98.21 0.00 52.55 0.00 /workspace/coverage/default/0.rv_dm_cmderr_busy.38345413
82.68 0.05 95.72 0.05 81.38 0.14 89.58 0.00 75.00 0.00 86.33 0.17 98.21 0.00 52.55 0.00 /workspace/coverage/default/0.rv_dm_hartsel_warl.1477450887
82.73 0.05 95.72 0.00 81.38 0.00 89.66 0.08 75.00 0.00 86.33 0.00 98.21 0.00 52.79 0.24 /workspace/coverage/default/18.rv_dm_autoincr_sba_tl_access.2695792181
82.76 0.03 95.72 0.00 81.38 0.00 89.66 0.00 75.00 0.00 86.33 0.00 98.21 0.00 53.02 0.24 /workspace/coverage/cover_reg_top/14.rv_dm_tl_intg_err.3087727149
82.80 0.03 95.72 0.00 81.38 0.00 89.66 0.00 75.00 0.00 86.33 0.00 98.21 0.00 53.26 0.24 /workspace/coverage/default/6.rv_dm_autoincr_sba_tl_access.2286718480
82.83 0.03 95.77 0.05 81.38 0.00 89.66 0.00 75.00 0.00 86.50 0.17 98.21 0.00 53.26 0.00 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_aliasing.232801285
82.86 0.03 95.77 0.00 81.38 0.00 89.66 0.00 75.00 0.00 86.50 0.00 98.42 0.21 53.26 0.00 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_hw_reset.3566765863
82.89 0.03 95.77 0.00 81.38 0.00 89.75 0.08 75.00 0.00 86.50 0.00 98.42 0.00 53.38 0.12 /workspace/coverage/cover_reg_top/18.rv_dm_tl_intg_err.3646597637
82.91 0.02 95.77 0.00 81.52 0.14 89.75 0.00 75.00 0.00 86.50 0.00 98.42 0.00 53.38 0.00 /workspace/coverage/default/0.rv_dm_cmderr_halt_resume.1635006099
82.92 0.02 95.77 0.00 81.52 0.00 89.75 0.00 75.00 0.00 86.50 0.00 98.42 0.00 53.50 0.12 /workspace/coverage/default/0.rv_dm_hart_unavail.2938547650
82.94 0.02 95.77 0.00 81.52 0.00 89.75 0.00 75.00 0.00 86.50 0.00 98.42 0.00 53.62 0.12 /workspace/coverage/default/12.rv_dm_stress_all.2824656003
82.95 0.01 95.77 0.00 81.52 0.00 89.83 0.08 75.00 0.00 86.50 0.00 98.42 0.00 53.62 0.00 /workspace/coverage/cover_reg_top/19.rv_dm_tl_intg_err.2533391296
82.96 0.01 95.77 0.00 81.52 0.00 89.91 0.08 75.00 0.00 86.50 0.00 98.42 0.00 53.62 0.00 /workspace/coverage/default/0.rv_dm_stress_all.1108832078


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.rv_dm_csr_bit_bash.466815224
/workspace/coverage/cover_reg_top/0.rv_dm_csr_hw_reset.2692084883
/workspace/coverage/cover_reg_top/0.rv_dm_csr_mem_rw_with_rand_reset.2721787652
/workspace/coverage/cover_reg_top/0.rv_dm_csr_rw.4163331297
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_aliasing.3949016261
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_bit_bash.4188570740
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_rw.1829554824
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_aliasing.340359526
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_bit_bash.791600463
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_hw_reset.382461501
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_rw.4053647401
/workspace/coverage/cover_reg_top/0.rv_dm_mem_partial_access.2094736236
/workspace/coverage/cover_reg_top/0.rv_dm_mem_walk.1154363134
/workspace/coverage/cover_reg_top/0.rv_dm_same_csr_outstanding.747854607
/workspace/coverage/cover_reg_top/0.rv_dm_tap_fsm_rand_reset.3442669
/workspace/coverage/cover_reg_top/0.rv_dm_tl_errors.2709994099
/workspace/coverage/cover_reg_top/0.rv_dm_tl_intg_err.2628397819
/workspace/coverage/cover_reg_top/1.rv_dm_csr_aliasing.1031100640
/workspace/coverage/cover_reg_top/1.rv_dm_csr_bit_bash.715686436
/workspace/coverage/cover_reg_top/1.rv_dm_csr_hw_reset.968591287
/workspace/coverage/cover_reg_top/1.rv_dm_csr_mem_rw_with_rand_reset.3644702356
/workspace/coverage/cover_reg_top/1.rv_dm_csr_rw.3891057432
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_aliasing.325717878
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_bit_bash.2287307531
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_hw_reset.31212108
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_rw.1614038780
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_bit_bash.3833726645
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_hw_reset.135675630
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_rw.2254400699
/workspace/coverage/cover_reg_top/1.rv_dm_mem_partial_access.1163013402
/workspace/coverage/cover_reg_top/1.rv_dm_mem_walk.3065541209
/workspace/coverage/cover_reg_top/1.rv_dm_same_csr_outstanding.813802808
/workspace/coverage/cover_reg_top/1.rv_dm_tap_fsm_rand_reset.1929168779
/workspace/coverage/cover_reg_top/1.rv_dm_tl_errors.54762914
/workspace/coverage/cover_reg_top/1.rv_dm_tl_intg_err.2513297947
/workspace/coverage/cover_reg_top/10.rv_dm_csr_mem_rw_with_rand_reset.3076312878
/workspace/coverage/cover_reg_top/10.rv_dm_csr_rw.2002061451
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_bit_bash.3066045003
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_rw.2082709371
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dtm_csr_rw.2027480039
/workspace/coverage/cover_reg_top/10.rv_dm_same_csr_outstanding.3727367071
/workspace/coverage/cover_reg_top/10.rv_dm_tl_errors.4232609040
/workspace/coverage/cover_reg_top/10.rv_dm_tl_intg_err.1430428288
/workspace/coverage/cover_reg_top/11.rv_dm_csr_mem_rw_with_rand_reset.3005087135
/workspace/coverage/cover_reg_top/11.rv_dm_csr_rw.2849534591
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_bit_bash.2500061322
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_rw.1674796089
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dtm_csr_rw.3552897477
/workspace/coverage/cover_reg_top/11.rv_dm_same_csr_outstanding.140566875
/workspace/coverage/cover_reg_top/11.rv_dm_tl_errors.3350135786
/workspace/coverage/cover_reg_top/11.rv_dm_tl_intg_err.4234411043
/workspace/coverage/cover_reg_top/12.rv_dm_csr_mem_rw_with_rand_reset.293306455
/workspace/coverage/cover_reg_top/12.rv_dm_csr_rw.1689367543
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dmi_csr_bit_bash.765618260
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dmi_csr_rw.2071468963
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dtm_csr_rw.1284060741
/workspace/coverage/cover_reg_top/12.rv_dm_same_csr_outstanding.149992538
/workspace/coverage/cover_reg_top/12.rv_dm_tl_errors.3797547020
/workspace/coverage/cover_reg_top/12.rv_dm_tl_intg_err.1921382407
/workspace/coverage/cover_reg_top/13.rv_dm_csr_mem_rw_with_rand_reset.3573530998
/workspace/coverage/cover_reg_top/13.rv_dm_csr_rw.691479057
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_bit_bash.2995240376
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_rw.1704137718
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dtm_csr_rw.3939115924
/workspace/coverage/cover_reg_top/13.rv_dm_same_csr_outstanding.3642454224
/workspace/coverage/cover_reg_top/13.rv_dm_tl_errors.318514425
/workspace/coverage/cover_reg_top/13.rv_dm_tl_intg_err.3362828467
/workspace/coverage/cover_reg_top/14.rv_dm_csr_mem_rw_with_rand_reset.3576716182
/workspace/coverage/cover_reg_top/14.rv_dm_csr_rw.3394106070
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dmi_csr_bit_bash.4071575884
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dmi_csr_rw.753302953
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dtm_csr_rw.954752197
/workspace/coverage/cover_reg_top/14.rv_dm_same_csr_outstanding.3978700708
/workspace/coverage/cover_reg_top/14.rv_dm_tl_errors.3121906176
/workspace/coverage/cover_reg_top/15.rv_dm_csr_mem_rw_with_rand_reset.3268951285
/workspace/coverage/cover_reg_top/15.rv_dm_csr_rw.3493851523
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_bit_bash.665012276
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_rw.2428289543
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dtm_csr_rw.3025656096
/workspace/coverage/cover_reg_top/15.rv_dm_same_csr_outstanding.3887425680
/workspace/coverage/cover_reg_top/15.rv_dm_tl_errors.2944404838
/workspace/coverage/cover_reg_top/15.rv_dm_tl_intg_err.720014997
/workspace/coverage/cover_reg_top/16.rv_dm_csr_mem_rw_with_rand_reset.82377392
/workspace/coverage/cover_reg_top/16.rv_dm_csr_rw.2345877439
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_bit_bash.3067866773
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_rw.2836574522
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dtm_csr_rw.2648005322
/workspace/coverage/cover_reg_top/16.rv_dm_same_csr_outstanding.3871703899
/workspace/coverage/cover_reg_top/16.rv_dm_tl_errors.2478259598
/workspace/coverage/cover_reg_top/16.rv_dm_tl_intg_err.158963468
/workspace/coverage/cover_reg_top/17.rv_dm_csr_mem_rw_with_rand_reset.3442472854
/workspace/coverage/cover_reg_top/17.rv_dm_csr_rw.196748038
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dmi_csr_bit_bash.3728365638
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dmi_csr_rw.620148986
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dtm_csr_rw.2185278719
/workspace/coverage/cover_reg_top/17.rv_dm_same_csr_outstanding.3448345566
/workspace/coverage/cover_reg_top/17.rv_dm_tl_errors.618537986
/workspace/coverage/cover_reg_top/17.rv_dm_tl_intg_err.3177363728
/workspace/coverage/cover_reg_top/18.rv_dm_csr_mem_rw_with_rand_reset.3841083179
/workspace/coverage/cover_reg_top/18.rv_dm_csr_rw.1369947091
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_bit_bash.190382339
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_rw.1047229209
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dtm_csr_rw.2326382684
/workspace/coverage/cover_reg_top/18.rv_dm_same_csr_outstanding.3570648905
/workspace/coverage/cover_reg_top/18.rv_dm_tl_errors.2281097293
/workspace/coverage/cover_reg_top/19.rv_dm_csr_mem_rw_with_rand_reset.1045747182
/workspace/coverage/cover_reg_top/19.rv_dm_csr_rw.3854951459
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_bit_bash.1282583609
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_rw.3595329328
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dtm_csr_rw.2635338953
/workspace/coverage/cover_reg_top/19.rv_dm_same_csr_outstanding.2070118530
/workspace/coverage/cover_reg_top/19.rv_dm_tl_errors.2270120484
/workspace/coverage/cover_reg_top/2.rv_dm_csr_aliasing.1471527501
/workspace/coverage/cover_reg_top/2.rv_dm_csr_bit_bash.1791564194
/workspace/coverage/cover_reg_top/2.rv_dm_csr_hw_reset.3318190961
/workspace/coverage/cover_reg_top/2.rv_dm_csr_mem_rw_with_rand_reset.71848125
/workspace/coverage/cover_reg_top/2.rv_dm_csr_rw.428202012
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_aliasing.1456047366
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_bit_bash.1439350717
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_hw_reset.3730961736
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_rw.453029246
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_aliasing.1295627951
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_bit_bash.1916377003
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_hw_reset.1760579366
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_rw.3536680369
/workspace/coverage/cover_reg_top/2.rv_dm_mem_partial_access.2721165707
/workspace/coverage/cover_reg_top/2.rv_dm_mem_walk.19062481
/workspace/coverage/cover_reg_top/2.rv_dm_tl_errors.88573981
/workspace/coverage/cover_reg_top/3.rv_dm_csr_aliasing.2759838370
/workspace/coverage/cover_reg_top/3.rv_dm_csr_bit_bash.1609893148
/workspace/coverage/cover_reg_top/3.rv_dm_csr_hw_reset.1224023608
/workspace/coverage/cover_reg_top/3.rv_dm_csr_mem_rw_with_rand_reset.814006399
/workspace/coverage/cover_reg_top/3.rv_dm_csr_rw.3022708139
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_aliasing.893294781
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_bit_bash.3259669426
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_hw_reset.4282971785
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_rw.809415543
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_aliasing.1739889363
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_bit_bash.3768878459
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/workspace/coverage/default/27.rv_dm_alert_test.2747121321
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/workspace/coverage/default/38.rv_dm_alert_test.3173937458
/workspace/coverage/default/39.rv_dm_alert_test.1094889141
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/workspace/coverage/default/9.rv_dm_stress_all.2452902707




Total test records in report: 437
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/12.rv_dm_bad_sba_tl_access.1044054649 Jul 24 05:04:19 PM PDT 24 Jul 24 05:04:30 PM PDT 24 3291766887 ps
T2 /workspace/coverage/default/1.rv_dm_dataaddr_rw_access.2443212959 Jul 24 05:04:07 PM PDT 24 Jul 24 05:04:09 PM PDT 24 104333737 ps
T7 /workspace/coverage/default/1.rv_dm_jtag_dtm_hard_reset.1592878645 Jul 24 05:04:03 PM PDT 24 Jul 24 05:04:05 PM PDT 24 735673207 ps
T3 /workspace/coverage/default/25.rv_dm_stress_all.855915975 Jul 24 05:04:09 PM PDT 24 Jul 24 05:04:15 PM PDT 24 1935449399 ps
T12 /workspace/coverage/default/9.rv_dm_autoincr_sba_tl_access.1815064680 Jul 24 05:04:25 PM PDT 24 Jul 24 05:05:27 PM PDT 24 57425997417 ps
T13 /workspace/coverage/default/6.rv_dm_delayed_resp_sba_tl_access.2069465066 Jul 24 05:04:12 PM PDT 24 Jul 24 05:04:15 PM PDT 24 2987582946 ps
T6 /workspace/coverage/default/1.rv_dm_halt_resume_whereto.3315128227 Jul 24 05:04:08 PM PDT 24 Jul 24 05:04:12 PM PDT 24 773698801 ps
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T224 /workspace/coverage/default/14.rv_dm_alert_test.2062694647 Jul 24 05:05:24 PM PDT 24 Jul 24 05:05:25 PM PDT 24 132475792 ps
T147 /workspace/coverage/default/40.rv_dm_stress_all.765036017 Jul 24 05:04:34 PM PDT 24 Jul 24 05:04:40 PM PDT 24 4069572108 ps
T226 /workspace/coverage/default/27.rv_dm_alert_test.2747121321 Jul 24 05:04:52 PM PDT 24 Jul 24 05:04:53 PM PDT 24 38837768 ps
T216 /workspace/coverage/default/22.rv_dm_stress_all.1206466660 Jul 24 05:04:41 PM PDT 24 Jul 24 05:05:00 PM PDT 24 6818433392 ps
T191 /workspace/coverage/default/17.rv_dm_alert_test.3787704633 Jul 24 05:05:33 PM PDT 24 Jul 24 05:05:34 PM PDT 24 76914269 ps
T75 /workspace/coverage/default/0.rv_dm_debug_disabled.2986028918 Jul 24 05:04:09 PM PDT 24 Jul 24 05:04:11 PM PDT 24 123234666 ps
T167 /workspace/coverage/default/0.rv_dm_stress_all.1108832078 Jul 24 05:04:11 PM PDT 24 Jul 24 05:04:21 PM PDT 24 3367393335 ps
T270 /workspace/coverage/default/16.rv_dm_bad_sba_tl_access.3706195587 Jul 24 05:04:22 PM PDT 24 Jul 24 05:05:01 PM PDT 24 14436545461 ps
T206 /workspace/coverage/default/14.rv_dm_bad_sba_tl_access.4021041365 Jul 24 05:04:23 PM PDT 24 Jul 24 05:04:28 PM PDT 24 2408535078 ps
T173 /workspace/coverage/default/48.rv_dm_alert_test.3626261845 Jul 24 05:04:21 PM PDT 24 Jul 24 05:04:22 PM PDT 24 65089573 ps
T237 /workspace/coverage/default/16.rv_dm_sba_tl_access.4021298794 Jul 24 05:04:29 PM PDT 24 Jul 24 05:04:32 PM PDT 24 3353577212 ps
T187 /workspace/coverage/default/7.rv_dm_autoincr_sba_tl_access.4287645820 Jul 24 05:04:18 PM PDT 24 Jul 24 05:05:03 PM PDT 24 15577487391 ps
T271 /workspace/coverage/default/1.rv_dm_jtag_dmi_debug_disabled.2678222506 Jul 24 05:04:03 PM PDT 24 Jul 24 05:04:04 PM PDT 24 161821709 ps
T195 /workspace/coverage/default/38.rv_dm_alert_test.3173937458 Jul 24 05:04:47 PM PDT 24 Jul 24 05:04:53 PM PDT 24 66695878 ps
T272 /workspace/coverage/default/17.rv_dm_delayed_resp_sba_tl_access.2322720614 Jul 24 05:04:26 PM PDT 24 Jul 24 05:04:29 PM PDT 24 1385796295 ps
T273 /workspace/coverage/default/3.rv_dm_hart_unavail.1944913939 Jul 24 05:04:11 PM PDT 24 Jul 24 05:04:17 PM PDT 24 149242964 ps
T168 /workspace/coverage/default/24.rv_dm_stress_all.3440459178 Jul 24 05:04:59 PM PDT 24 Jul 24 05:05:03 PM PDT 24 3495233228 ps
T76 /workspace/coverage/default/0.rv_dm_sba_debug_disabled.1436161536 Jul 24 05:03:59 PM PDT 24 Jul 24 05:04:11 PM PDT 24 4347586151 ps
T136 /workspace/coverage/default/17.rv_dm_stress_all.3049931766 Jul 24 05:04:37 PM PDT 24 Jul 24 05:04:47 PM PDT 24 14096606727 ps
T200 /workspace/coverage/default/37.rv_dm_alert_test.2413210196 Jul 24 05:04:43 PM PDT 24 Jul 24 05:04:44 PM PDT 24 72055936 ps
T274 /workspace/coverage/default/1.rv_dm_smoke.2308408099 Jul 24 05:04:06 PM PDT 24 Jul 24 05:04:09 PM PDT 24 2143547831 ps
T275 /workspace/coverage/default/3.rv_dm_delayed_resp_sba_tl_access.1713214123 Jul 24 05:04:32 PM PDT 24 Jul 24 05:04:39 PM PDT 24 6843549016 ps
T140 /workspace/coverage/default/4.rv_dm_delayed_resp_sba_tl_access.3425323616 Jul 24 05:04:06 PM PDT 24 Jul 24 05:04:23 PM PDT 24 9269501805 ps
T38 /workspace/coverage/default/0.rv_dm_rom_read_access.2616424309 Jul 24 05:04:03 PM PDT 24 Jul 24 05:04:04 PM PDT 24 33147353 ps
T171 /workspace/coverage/default/39.rv_dm_alert_test.1094889141 Jul 24 05:04:45 PM PDT 24 Jul 24 05:04:46 PM PDT 24 81677649 ps
T276 /workspace/coverage/default/14.rv_dm_sba_tl_access.1685112412 Jul 24 05:04:33 PM PDT 24 Jul 24 05:04:43 PM PDT 24 1490609737 ps
T228 /workspace/coverage/default/1.rv_dm_jtag_dtm_idle_hint.2873550394 Jul 24 05:04:11 PM PDT 24 Jul 24 05:04:12 PM PDT 24 202586953 ps
T139 /workspace/coverage/default/18.rv_dm_stress_all.2070032465 Jul 24 05:04:21 PM PDT 24 Jul 24 05:04:29 PM PDT 24 4631159068 ps
T165 /workspace/coverage/default/29.rv_dm_stress_all.252290108 Jul 24 05:05:40 PM PDT 24 Jul 24 05:05:51 PM PDT 24 6565668402 ps
T198 /workspace/coverage/default/19.rv_dm_delayed_resp_sba_tl_access.1701230687 Jul 24 05:04:38 PM PDT 24 Jul 24 05:04:44 PM PDT 24 3187625306 ps
T181 /workspace/coverage/default/3.rv_dm_alert_test.3940325391 Jul 24 05:04:30 PM PDT 24 Jul 24 05:04:31 PM PDT 24 124309146 ps
T229 /workspace/coverage/default/3.rv_dm_bad_sba_tl_access.3019082990 Jul 24 05:04:19 PM PDT 24 Jul 24 05:04:26 PM PDT 24 14962628758 ps
T77 /workspace/coverage/default/1.rv_dm_sba_debug_disabled.2676505140 Jul 24 05:04:10 PM PDT 24 Jul 24 05:04:14 PM PDT 24 3707480237 ps
T186 /workspace/coverage/default/12.rv_dm_sba_tl_access.3009665832 Jul 24 05:04:09 PM PDT 24 Jul 24 05:04:23 PM PDT 24 4518309975 ps
T277 /workspace/coverage/default/8.rv_dm_sba_tl_access.4098059809 Jul 24 05:04:21 PM PDT 24 Jul 24 05:04:32 PM PDT 24 6704968862 ps
T41 /workspace/coverage/default/1.rv_dm_abstractcmd_status.1936442462 Jul 24 05:04:11 PM PDT 24 Jul 24 05:04:12 PM PDT 24 104769235 ps
T278 /workspace/coverage/default/13.rv_dm_alert_test.3157709536 Jul 24 05:04:20 PM PDT 24 Jul 24 05:04:21 PM PDT 24 111387023 ps
T194 /workspace/coverage/default/24.rv_dm_alert_test.1326336536 Jul 24 05:04:19 PM PDT 24 Jul 24 05:04:20 PM PDT 24 101235727 ps
T163 /workspace/coverage/default/14.rv_dm_stress_all.2210523722 Jul 24 05:04:58 PM PDT 24 Jul 24 05:05:02 PM PDT 24 3091255648 ps
T279 /workspace/coverage/default/18.rv_dm_bad_sba_tl_access.2889393468 Jul 24 05:04:19 PM PDT 24 Jul 24 05:04:22 PM PDT 24 1555764182 ps
T214 /workspace/coverage/default/13.rv_dm_bad_sba_tl_access.2702540308 Jul 24 05:04:22 PM PDT 24 Jul 24 05:04:34 PM PDT 24 4974490705 ps
T280 /workspace/coverage/default/2.rv_dm_autoincr_sba_tl_access.242072483 Jul 24 05:04:13 PM PDT 24 Jul 24 05:05:25 PM PDT 24 28304126045 ps
T281 /workspace/coverage/default/31.rv_dm_alert_test.3960828254 Jul 24 05:04:16 PM PDT 24 Jul 24 05:04:16 PM PDT 24 49120441 ps
T39 /workspace/coverage/default/1.rv_dm_rom_read_access.1796960747 Jul 24 05:04:01 PM PDT 24 Jul 24 05:04:06 PM PDT 24 112393106 ps
T145 /workspace/coverage/default/31.rv_dm_stress_all.78385770 Jul 24 05:04:30 PM PDT 24 Jul 24 05:04:33 PM PDT 24 5919179000 ps
T282 /workspace/coverage/default/8.rv_dm_autoincr_sba_tl_access.2050734176 Jul 24 05:04:18 PM PDT 24 Jul 24 05:04:22 PM PDT 24 2117380500 ps
T42 /workspace/coverage/default/1.rv_dm_cmderr_exception.2801525309 Jul 24 05:04:05 PM PDT 24 Jul 24 05:04:09 PM PDT 24 2154141094 ps
T283 /workspace/coverage/default/7.rv_dm_delayed_resp_sba_tl_access.3007883524 Jul 24 05:04:29 PM PDT 24 Jul 24 05:04:40 PM PDT 24 3525102787 ps
T16 /workspace/coverage/default/10.rv_dm_stress_all.3301735896 Jul 24 05:04:16 PM PDT 24 Jul 24 05:04:19 PM PDT 24 2420506048 ps
T239 /workspace/coverage/default/0.rv_dm_cmderr_not_supported.2450122416 Jul 24 05:04:25 PM PDT 24 Jul 24 05:04:27 PM PDT 24 629544983 ps
T201 /workspace/coverage/default/4.rv_dm_sba_tl_access.1738932152 Jul 24 05:04:10 PM PDT 24 Jul 24 05:04:16 PM PDT 24 2714216507 ps
T169 /workspace/coverage/default/47.rv_dm_alert_test.3318551798 Jul 24 05:04:42 PM PDT 24 Jul 24 05:04:43 PM PDT 24 72438182 ps
T222 /workspace/coverage/default/1.rv_dm_ndmreset_req.354737505 Jul 24 05:04:04 PM PDT 24 Jul 24 05:04:05 PM PDT 24 317341906 ps
T202 /workspace/coverage/default/12.rv_dm_autoincr_sba_tl_access.3731745738 Jul 24 05:04:47 PM PDT 24 Jul 24 05:05:19 PM PDT 24 13045873925 ps
T184 /workspace/coverage/default/16.rv_dm_alert_test.1350477219 Jul 24 05:04:32 PM PDT 24 Jul 24 05:04:33 PM PDT 24 135707894 ps
T36 /workspace/coverage/default/0.rv_dm_cmderr_halt_resume.1635006099 Jul 24 05:03:54 PM PDT 24 Jul 24 05:03:55 PM PDT 24 303578856 ps
T203 /workspace/coverage/default/14.rv_dm_autoincr_sba_tl_access.3861449582 Jul 24 05:04:16 PM PDT 24 Jul 24 05:04:39 PM PDT 24 22460779262 ps
T284 /workspace/coverage/default/0.rv_dm_jtag_dtm_idle_hint.2752141496 Jul 24 05:04:11 PM PDT 24 Jul 24 05:04:12 PM PDT 24 146724919 ps
T164 /workspace/coverage/default/1.rv_dm_mem_tl_access_halted.4211525388 Jul 24 05:04:16 PM PDT 24 Jul 24 05:04:18 PM PDT 24 550301368 ps
T149 /workspace/coverage/default/44.rv_dm_stress_all.138851057 Jul 24 05:04:24 PM PDT 24 Jul 24 05:04:26 PM PDT 24 2059977809 ps
T285 /workspace/coverage/default/4.rv_dm_bad_sba_tl_access.1401597880 Jul 24 05:04:07 PM PDT 24 Jul 24 05:04:17 PM PDT 24 3795447971 ps
T286 /workspace/coverage/default/18.rv_dm_sba_tl_access.3111496662 Jul 24 05:04:31 PM PDT 24 Jul 24 05:04:36 PM PDT 24 4280358285 ps
T287 /workspace/coverage/default/3.rv_dm_sba_tl_access.3549854547 Jul 24 05:04:10 PM PDT 24 Jul 24 05:04:14 PM PDT 24 823382209 ps
T11 /workspace/coverage/default/20.rv_dm_stress_all.1398112994 Jul 24 05:05:27 PM PDT 24 Jul 24 05:05:50 PM PDT 24 8501921993 ps
T235 /workspace/coverage/default/11.rv_dm_delayed_resp_sba_tl_access.3074863384 Jul 24 05:04:14 PM PDT 24 Jul 24 05:04:18 PM PDT 24 5316752947 ps
T61 /workspace/coverage/cover_reg_top/3.rv_dm_tl_intg_err.3219886591 Jul 24 05:00:22 PM PDT 24 Jul 24 05:00:31 PM PDT 24 737712354 ps
T288 /workspace/coverage/cover_reg_top/4.rv_dm_mem_walk.1218006660 Jul 24 05:00:22 PM PDT 24 Jul 24 05:00:23 PM PDT 24 48144952 ps
T62 /workspace/coverage/cover_reg_top/8.rv_dm_tl_intg_err.1961376480 Jul 24 05:00:29 PM PDT 24 Jul 24 05:00:40 PM PDT 24 1485188329 ps
T64 /workspace/coverage/cover_reg_top/16.rv_dm_tl_errors.2478259598 Jul 24 05:00:28 PM PDT 24 Jul 24 05:00:40 PM PDT 24 556918711 ps
T289 /workspace/coverage/cover_reg_top/6.rv_dm_jtag_dmi_csr_rw.3211565244 Jul 24 05:00:25 PM PDT 24 Jul 24 05:00:31 PM PDT 24 6070873314 ps
T72 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_bit_bash.1916377003 Jul 24 05:00:20 PM PDT 24 Jul 24 05:00:42 PM PDT 24 15167638384 ps
T65 /workspace/coverage/cover_reg_top/10.rv_dm_same_csr_outstanding.3727367071 Jul 24 05:00:33 PM PDT 24 Jul 24 05:00:37 PM PDT 24 620245771 ps
T63 /workspace/coverage/cover_reg_top/2.rv_dm_tap_fsm_rand_reset.2978507100 Jul 24 05:00:25 PM PDT 24 Jul 24 05:01:43 PM PDT 24 22180120084 ps
T290 /workspace/coverage/cover_reg_top/0.rv_dm_mem_walk.1154363134 Jul 24 05:00:11 PM PDT 24 Jul 24 05:00:17 PM PDT 24 59789063 ps
T291 /workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_rw.1674796089 Jul 24 05:00:22 PM PDT 24 Jul 24 05:00:24 PM PDT 24 1683401738 ps
T73 /workspace/coverage/cover_reg_top/18.rv_dm_jtag_dtm_csr_rw.2326382684 Jul 24 05:00:42 PM PDT 24 Jul 24 05:00:43 PM PDT 24 257505787 ps
T88 /workspace/coverage/cover_reg_top/1.rv_dm_csr_bit_bash.715686436 Jul 24 05:00:26 PM PDT 24 Jul 24 05:01:30 PM PDT 24 9833376049 ps
T292 /workspace/coverage/cover_reg_top/3.rv_dm_mem_partial_access.498312790 Jul 24 05:00:16 PM PDT 24 Jul 24 05:00:18 PM PDT 24 68801322 ps
T293 /workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_bit_bash.2995240376 Jul 24 05:00:24 PM PDT 24 Jul 24 05:00:48 PM PDT 24 8828649260 ps
T81 /workspace/coverage/cover_reg_top/5.rv_dm_tl_intg_err.2621818598 Jul 24 05:00:33 PM PDT 24 Jul 24 05:00:45 PM PDT 24 4421304204 ps
T294 /workspace/coverage/cover_reg_top/17.rv_dm_jtag_dmi_csr_bit_bash.3728365638 Jul 24 05:00:33 PM PDT 24 Jul 24 05:00:48 PM PDT 24 36743670353 ps
T78 /workspace/coverage/cover_reg_top/18.rv_dm_csr_mem_rw_with_rand_reset.3841083179 Jul 24 05:00:39 PM PDT 24 Jul 24 05:00:41 PM PDT 24 272827616 ps
T295 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_aliasing.325717878 Jul 24 05:00:29 PM PDT 24 Jul 24 05:05:18 PM PDT 24 211844075284 ps
T296 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_bit_bash.2287307531 Jul 24 05:00:22 PM PDT 24 Jul 24 05:00:33 PM PDT 24 3335958313 ps
T89 /workspace/coverage/cover_reg_top/17.rv_dm_csr_rw.196748038 Jul 24 05:00:41 PM PDT 24 Jul 24 05:00:44 PM PDT 24 140935094 ps
T297 /workspace/coverage/cover_reg_top/7.rv_dm_jtag_dmi_csr_bit_bash.2328151764 Jul 24 05:00:34 PM PDT 24 Jul 24 05:02:00 PM PDT 24 40249200643 ps
T298 /workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_bit_bash.3067866773 Jul 24 05:00:40 PM PDT 24 Jul 24 05:01:16 PM PDT 24 13457054934 ps
T90 /workspace/coverage/cover_reg_top/2.rv_dm_csr_aliasing.1471527501 Jul 24 05:00:12 PM PDT 24 Jul 24 05:00:50 PM PDT 24 12505593471 ps
T299 /workspace/coverage/cover_reg_top/2.rv_dm_mem_partial_access.2721165707 Jul 24 05:00:29 PM PDT 24 Jul 24 05:00:30 PM PDT 24 148623255 ps
T71 /workspace/coverage/cover_reg_top/0.rv_dm_tap_fsm_rand_reset.3442669 Jul 24 05:00:19 PM PDT 24 Jul 24 05:00:43 PM PDT 24 27009174309 ps
T91 /workspace/coverage/cover_reg_top/15.rv_dm_same_csr_outstanding.3887425680 Jul 24 05:00:39 PM PDT 24 Jul 24 05:00:43 PM PDT 24 236970274 ps
T300 /workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_bit_bash.665012276 Jul 24 05:00:34 PM PDT 24 Jul 24 05:02:04 PM PDT 24 36633445979 ps
T92 /workspace/coverage/cover_reg_top/19.rv_dm_same_csr_outstanding.2070118530 Jul 24 05:00:40 PM PDT 24 Jul 24 05:00:48 PM PDT 24 1075727346 ps
T74 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_rw.260977288 Jul 24 05:00:24 PM PDT 24 Jul 24 05:00:27 PM PDT 24 725980896 ps
T93 /workspace/coverage/cover_reg_top/2.rv_dm_csr_hw_reset.3318190961 Jul 24 05:00:22 PM PDT 24 Jul 24 05:00:25 PM PDT 24 771815779 ps
T94 /workspace/coverage/cover_reg_top/13.rv_dm_same_csr_outstanding.3642454224 Jul 24 05:00:42 PM PDT 24 Jul 24 05:00:47 PM PDT 24 587571400 ps
T301 /workspace/coverage/cover_reg_top/5.rv_dm_jtag_dtm_csr_rw.2342215037 Jul 24 05:00:27 PM PDT 24 Jul 24 05:00:28 PM PDT 24 129066941 ps
T302 /workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_bit_bash.1282583609 Jul 24 05:00:43 PM PDT 24 Jul 24 05:01:28 PM PDT 24 27650006960 ps
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