Unified Coverage Report :: Group :: dv_base_reg_pkg::mubi32_cov::mubi_cg

Group : dv_base_reg_pkg::mubi32_cov::mubi_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
18.55	18.55	1	100	1	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_11/rv_dm-sim-vcs/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_mubi_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
mubi32_cov_of_mubi32_cov_of_rv_dm_regs_reg_block.late_debug_enable.late_debug_enable	18.55	1	100	1	64	64

---

Group Instance : mubi32_cov_of_mubi32_cov_of_rv_dm_regs_reg_block.late_debug_enable.late_debug_enable

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
18.55	1	100	1	64	64

---

Summary for Group Instance mubi32_cov_of_mubi32_cov_of_rv_dm_regs_reg_block.late_debug_enable.late_debug_enable

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	345	281	64	18.55

Variables for Group Instance mubi32_cov_of_mubi32_cov_of_rv_dm_regs_reg_block.late_debug_enable.late_debug_enable

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	345	281	64	18.55	100	1	1	0

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	345	281	64	18.55

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
false	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	5	1			T60	1		T31	1		T179	1
others[1]	335	1			T1	1		T4	1		T12	1
others[2]	3	1			T29	1		T180	1		T181	1
others[3]	2	1			T182	1		T183	1		-	-
others[4]	5	1			T74	1		T22	1		T184	1
others[5]	5	1			T82	1		T22	1		T182	1
others[6]	3	1			T8	1		T22	1		T185	1
others[7]	5	1			T43	1		T22	1		T182	1
others[8]	6	1			T142	1		T22	1		T182	1
others[9]	1	1			T186	1		-	-		-	-
others[10]	2	1			T182	1		T187	1		-	-
others[11]	4	1			T19	1		T188	2		T180	1
others[12]	6	1			T95	1		T182	2		T186	2
others[13]	1	1			T181	1		-	-		-	-
others[14]	4	1			T189	1		T180	1		T190	1
others[15]	3	1			T182	2		T181	1		-	-
others[16]	5	1			T125	1		T22	1		T188	1
others[17]	3	1			T12	1		T82	1		T183	1
others[18]	215	1			T1	1		T4	1		T13	1
others[19]	5	1			T22	1		T183	1		T180	2
others[20]	4	1			T78	1		T82	1		T84	1
others[21]	2	1			T74	1		T191	1		-	-
others[22]	4	1			T82	1		T84	1		T67	1
others[23]	2	1			T22	1		T192	1		-	-
others[24]	5	1			T97	1		T61	1		T189	1
others[25]	6	1			T75	1		T39	1		T82	1
others[26]	4	1			T22	1		T143	1		T188	1
others[27]	7	1			T68	1		T182	1		T189	2
others[28]	4	1			T193	1		T194	1		T186	1
others[29]	7	1			T6	1		T182	1		T180	1
others[30]	4	1			T22	1		T182	1		T195	1
others[31]	77	1			T12	1		T6	1		T23	1
true	472	1			T1	1		T2	1		T3	1
others[1]	387	1			T2	1		T3	1		T5	1
others[2]	6	1			T52	1		T177	1		T140	1
others[3]	3	1			T196	1		T93	1		T94	1
others[4]	3	1			T79	1		T52	1		T196	1
others[5]	7	1			T104	1		T32	1		T52	1
others[6]	2	1			T47	1		T99	1		-	-
others[7]	2	1			T30	1		T197	1		-	-
others[8]	4	1			T25	1		T196	1		T198	1
others[9]	4	1			T32	1		T30	1		T26	1
others[10]	2	1			T88	1		T199	1		-	-
others[11]	6	1			T87	1		T99	1		T37	1
others[12]	1	1			T200	1		-	-		-	-
others[13]	4	1			T31	1		T16	1		T26	1
others[14]	5	1			T47	1		T35	1		T34	1
others[15]	2	1			T16	1		T201	1		-	-
others[16]	6	1			T45	1		T37	1		T33	2
others[17]	5	1			T32	1		T33	1		T64	1
others[18]	267	1			T2	1		T3	1		T5	1
others[19]	2	1			T177	1		T202	1		-	-
others[20]	3	1			T52	1		T196	1		T197	1
others[21]	6	1			T203	1		T34	1		T204	1
others[22]	5	1			T32	1		T87	1		T99	1
others[23]	1	1			T25	1		-	-		-	-
others[24]	5	1			T31	1		T35	1		T205	1
others[25]	6	1			T206	1		T47	1		T33	1
others[26]	6	1			T32	1		T25	1		T26	1
others[27]	6	1			T177	1		T31	1		T25	1
others[28]	6	1			T79	1		T32	1		T177	1
others[29]	5	1			T35	1		T203	1		T207	1
others[30]	3	1			T32	1		T201	1		T208	1
others[31]	81	1			T206	1		T47	2		T45	1