| ASSERT | PROPERTIES | SEQUENCES | |
| Total | 300 | 0 | 10 |
| Category 0 | 300 | 0 | 10 |
| ASSERT | PROPERTIES | SEQUENCES | |
| Total | 300 | 0 | 10 |
| Severity 0 | 300 | 0 | 10 |
| NUMBER | PERCENT | |
| Total Number | 300 | 100.00 |
| Uncovered | 0 | 0.00 |
| Success | 300 | 100.00 |
| Failure | 0 | 0.00 |
| Incomplete | 0 | 0.00 |
| Without Attempts | 0 | 0.00 |
| NUMBER | PERCENT | |
| Total Number | 10 | 100.00 |
| Uncovered | 0 | 0.00 |
| All Matches | 10 | 100.00 |
| First Matches | 10 | 100.00 |
| COVER SEQUENCES | CATEGORY | SEVERITY | ATTEMPTS | ALL MATCHES | FIRST MATCHES | INCOMPLETE | SRC |
| tb.dut.tlul_assert_device.gen_device_cov.aValidNotAccepted_C | 0 | 0 | 2147483647 | 281 | 281 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.a_addressChangedNotAccepted_C | 0 | 0 | 2147483647 | 66 | 66 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.a_dataChangedNotAccepted_C | 0 | 0 | 2147483647 | 68 | 68 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.a_maskChangedNotAccepted_C | 0 | 0 | 2147483647 | 45 | 45 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.a_opcodeChangedNotAccepted_C | 0 | 0 | 2147483647 | 9 | 9 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.a_sizeChangedNotAccepted_C | 0 | 0 | 2147483647 | 36 | 36 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.a_sourceChangedNotAccepted_C | 0 | 0 | 2147483647 | 30 | 30 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.b2bReqWithSameAddr_C | 0 | 0 | 2147483647 | 1799 | 1799 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.b2bReq_C | 0 | 0 | 2147483647 | 2974 | 2974 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.b2bSameSource_C | 0 | 0 | 2147483647 | 72167451 | 72167451 | 548 |
| COVER SEQUENCES | CATEGORY | SEVERITY | ATTEMPTS | ALL MATCHES | FIRST MATCHES | INCOMPLETE | SRC |
| tb.dut.tlul_assert_device.gen_device_cov.aValidNotAccepted_C | 0 | 0 | 2147483647 | 281 | 281 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.a_addressChangedNotAccepted_C | 0 | 0 | 2147483647 | 66 | 66 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.a_dataChangedNotAccepted_C | 0 | 0 | 2147483647 | 68 | 68 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.a_maskChangedNotAccepted_C | 0 | 0 | 2147483647 | 45 | 45 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.a_opcodeChangedNotAccepted_C | 0 | 0 | 2147483647 | 9 | 9 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.a_sizeChangedNotAccepted_C | 0 | 0 | 2147483647 | 36 | 36 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.a_sourceChangedNotAccepted_C | 0 | 0 | 2147483647 | 30 | 30 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.b2bReqWithSameAddr_C | 0 | 0 | 2147483647 | 1799 | 1799 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.b2bReq_C | 0 | 0 | 2147483647 | 2974 | 2974 | 0 | |
| tb.dut.tlul_assert_device.gen_device_cov.b2bSameSource_C | 0 | 0 | 2147483647 | 72167451 | 72167451 | 548 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |