Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_timer_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	69449301	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

69558299

1

T1

4515

T3

1336

T4

11645

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	138897844	1			T1	9175		T2	1		T3	2689
values[0x0]	53100	1			T1	8		T3	7		T4	23
values[0x1]	56656	1			T1	12		T3	12		T4	8

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	55497989	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

83509611

1

T1

5456

T3

1613

T4

14059

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	414669	1			T1	41		T3	2		T4	93
valid_sources[0x01]	415673	1			T1	58		T4	90		T9	115
valid_sources[0x02]	413547	1			T1	9		T3	4		T4	80
valid_sources[0x03]	474251	1			T1	42		T3	4		T4	100
valid_sources[0x04]	413949	1			T1	31		T3	24		T4	86
valid_sources[0x05]	414023	1			T1	38		T3	1		T4	113
valid_sources[0x06]	415829	1			T1	31		T3	6		T4	124
valid_sources[0x07]	414157	1			T1	42		T3	6		T4	75
valid_sources[0x08]	414207	1			T1	32		T4	80		T9	120
valid_sources[0x09]	499976	1			T1	27		T4	64		T9	100
valid_sources[0x0a]	970929	1			T1	35		T4	103		T9	88
valid_sources[0x0b]	416547	1			T1	46		T3	18		T4	76
valid_sources[0x0c]	622586	1			T1	34		T3	9		T4	103
valid_sources[0x0d]	415384	1			T1	37		T3	18		T4	78
valid_sources[0x0e]	415941	1			T1	24		T3	8		T4	64
valid_sources[0x0f]	412363	1			T1	35		T3	5		T4	83
valid_sources[0x10]	428330	1			T1	43		T3	25		T4	70
valid_sources[0x11]	416281	1			T1	30		T3	4		T4	97
valid_sources[0x12]	414620	1			T1	35		T3	19		T4	78
valid_sources[0x13]	418004	1			T1	31		T3	11		T4	84
valid_sources[0x14]	1362166	1			T1	34		T3	18		T4	116
valid_sources[0x15]	415184	1			T1	40		T3	2		T4	95
valid_sources[0x16]	507868	1			T1	40		T3	22		T4	72
valid_sources[0x17]	414072	1			T1	25		T3	14		T4	91
valid_sources[0x18]	981619	1			T1	30		T3	1		T4	84
valid_sources[0x19]	417303	1			T1	38		T3	7		T4	96
valid_sources[0x1a]	419712	1			T1	27		T3	6		T4	68
valid_sources[0x1b]	432002	1			T1	35		T3	10		T4	73
valid_sources[0x1c]	3204388	1			T1	44		T3	1		T4	94
valid_sources[0x1d]	414526	1			T1	15		T3	14		T4	104
valid_sources[0x1e]	414937	1			T1	42		T3	7		T4	118
valid_sources[0x1f]	414952	1			T1	44		T3	1		T4	85
valid_sources[0x20]	414304	1			T1	36		T3	7		T4	84
valid_sources[0x21]	413543	1			T1	29		T3	5		T4	80
valid_sources[0x22]	414446	1			T1	34		T3	2		T4	140
valid_sources[0x23]	1454667	1			T1	45		T3	10		T4	122
valid_sources[0x24]	415239	1			T1	24		T3	5		T4	112
valid_sources[0x25]	434823	1			T1	58		T3	7		T4	135
valid_sources[0x26]	1299970	1			T1	43		T3	1		T4	97
valid_sources[0x27]	413820	1			T1	39		T3	12		T4	86
valid_sources[0x28]	416247	1			T1	33		T3	17		T4	86
valid_sources[0x29]	417037	1			T1	43		T3	2		T4	106
valid_sources[0x2a]	414262	1			T1	35		T3	24		T4	75
valid_sources[0x2b]	414777	1			T1	27		T3	28		T4	85
valid_sources[0x2c]	415864	1			T1	45		T3	6		T4	99
valid_sources[0x2d]	413579	1			T1	40		T3	9		T4	121
valid_sources[0x2e]	413509	1			T1	31		T3	3		T4	114
valid_sources[0x2f]	416285	1			T1	39		T3	14		T4	122
valid_sources[0x30]	412303	1			T1	36		T3	20		T4	77
valid_sources[0x31]	448403	1			T1	24		T3	14		T4	94
valid_sources[0x32]	433025	1			T1	29		T3	8		T4	87
valid_sources[0x33]	1274570	1			T1	27		T3	12		T4	113
valid_sources[0x34]	416019	1			T1	34		T3	6		T4	95
valid_sources[0x35]	501219	1			T1	30		T3	17		T4	127
valid_sources[0x36]	415868	1			T1	46		T3	5		T4	71
valid_sources[0x37]	415658	1			T1	33		T3	19		T4	64
valid_sources[0x38]	456806	1			T1	37		T3	6		T4	79
valid_sources[0x39]	414897	1			T1	42		T3	12		T4	116
valid_sources[0x3a]	414888	1			T1	32		T3	12		T4	89
valid_sources[0x3b]	412412	1			T1	34		T3	3		T4	85
valid_sources[0x3c]	416482	1			T1	45		T3	4		T4	95
valid_sources[0x3d]	417280	1			T1	34		T3	13		T4	114
valid_sources[0x3e]	417147	1			T1	41		T3	25		T4	75
valid_sources[0x3f]	419444	1			T1	43		T3	17		T4	112
valid_sources[0x40]	416808	1			T1	40		T3	7		T4	73
valid_sources[0x41]	415988	1			T1	33		T3	5		T4	90
valid_sources[0x42]	415537	1			T1	28		T3	12		T4	91
valid_sources[0x43]	550332	1			T1	35		T3	9		T4	61
valid_sources[0x44]	1688577	1			T1	41		T2	1		T3	11
valid_sources[0x45]	1137092	1			T1	34		T3	25		T4	127
valid_sources[0x46]	414651	1			T1	41		T3	5		T4	110
valid_sources[0x47]	415726	1			T1	53		T3	1		T4	58
valid_sources[0x48]	418353	1			T1	46		T3	27		T4	89
valid_sources[0x49]	414045	1			T1	42		T3	6		T4	78
valid_sources[0x4a]	412550	1			T1	27		T3	29		T4	82
valid_sources[0x4b]	609193	1			T1	22		T3	1		T4	95
valid_sources[0x4c]	1526479	1			T1	36		T3	6		T4	121
valid_sources[0x4d]	417932	1			T1	42		T3	2		T4	73
valid_sources[0x4e]	752979	1			T1	58		T4	93		T9	72
valid_sources[0x4f]	415635	1			T1	35		T3	13		T4	115
valid_sources[0x50]	413204	1			T1	46		T3	16		T4	102
valid_sources[0x51]	417242	1			T1	36		T3	8		T4	95
valid_sources[0x52]	420097	1			T1	30		T3	7		T4	86
valid_sources[0x53]	1196034	1			T1	39		T3	4		T4	92
valid_sources[0x54]	416475	1			T1	26		T3	20		T4	84
valid_sources[0x55]	413977	1			T1	36		T3	7		T4	77
valid_sources[0x56]	413267	1			T1	46		T3	1		T4	127
valid_sources[0x57]	464047	1			T1	33		T3	4		T4	77
valid_sources[0x58]	417678	1			T1	27		T3	7		T4	110
valid_sources[0x59]	414955	1			T1	29		T3	10		T4	78
valid_sources[0x5a]	417081	1			T1	42		T3	8		T4	87
valid_sources[0x5b]	417231	1			T1	20		T3	3		T4	93
valid_sources[0x5c]	419318	1			T1	29		T3	26		T4	66
valid_sources[0x5d]	436203	1			T1	49		T3	7		T4	80
valid_sources[0x5e]	418756	1			T1	59		T3	4		T4	95
valid_sources[0x5f]	933020	1			T1	40		T4	97		T9	138
valid_sources[0x60]	414791	1			T1	22		T3	6		T4	94
valid_sources[0x61]	415659	1			T1	32		T3	8		T4	91
valid_sources[0x62]	417854	1			T1	22		T3	16		T4	97
valid_sources[0x63]	415856	1			T1	13		T3	7		T4	89
valid_sources[0x64]	412583	1			T1	35		T3	29		T4	90
valid_sources[0x65]	415196	1			T1	35		T4	82		T9	72
valid_sources[0x66]	481274	1			T1	25		T3	21		T4	81
valid_sources[0x67]	427402	1			T1	38		T3	5		T4	92
valid_sources[0x68]	414431	1			T1	25		T3	2		T4	124
valid_sources[0x69]	412891	1			T1	28		T3	18		T4	69
valid_sources[0x6a]	412844	1			T1	43		T3	11		T4	115
valid_sources[0x6b]	414869	1			T1	27		T3	11		T4	105
valid_sources[0x6c]	430171	1			T1	46		T3	12		T4	89
valid_sources[0x6d]	413542	1			T1	43		T3	9		T4	125
valid_sources[0x6e]	415124	1			T1	46		T3	18		T4	110
valid_sources[0x6f]	1350802	1			T1	45		T3	6		T4	70
valid_sources[0x70]	417365	1			T1	35		T3	15		T4	119
valid_sources[0x71]	417836	1			T1	29		T3	6		T4	106
valid_sources[0x72]	417925	1			T1	37		T3	16		T4	137
valid_sources[0x73]	468336	1			T1	15		T3	13		T4	88
valid_sources[0x74]	1582131	1			T1	28		T4	71		T9	126
valid_sources[0x75]	416396	1			T1	27		T3	5		T4	97
valid_sources[0x76]	418790	1			T1	38		T3	2		T4	102
valid_sources[0x77]	415804	1			T1	40		T3	15		T4	94
valid_sources[0x78]	414210	1			T1	21		T3	16		T4	90
valid_sources[0x79]	426721	1			T1	30		T3	11		T4	81
valid_sources[0x7a]	416294	1			T1	32		T3	21		T4	106
valid_sources[0x7b]	417898	1			T1	23		T3	12		T4	98
valid_sources[0x7c]	416739	1			T1	21		T3	12		T4	77
valid_sources[0x7d]	416580	1			T1	28		T3	5		T4	102
valid_sources[0x7e]	416361	1			T1	44		T3	26		T4	70
valid_sources[0x7f]	685926	1			T1	26		T3	11		T4	97
valid_sources[0x80]	665186	1			T1	31		T3	8		T4	73

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

69463811

1

T1

4500

T3

1321

T4

11621

values[0x0]

all_enables

biggest_size

48140

1

T1

5

T3

7

T4

17

values[0x1]

all_enables

biggest_size

46348

1

T1

10

T3

8

T4

7