| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 99.67 | 99.33 | 99.04 | 100.00 | 100.00 | 100.00 | 99.66 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP | |||||||||
| TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | NAME |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 81.99 | 81.99 | 96.32 | 96.32 | 86.58 | 86.58 | 94.57 | 94.57 | 98.17 | 98.17 | 93.55 | 93.55 | 22.76 | 22.76 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/1.rv_timer_random.534787336 | ||
| 86.17 | 4.18 | 99.00 | 2.68 | 96.81 | 10.22 | 97.29 | 2.71 | 99.08 | 0.92 | 96.77 | 3.23 | 28.09 | 5.32 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/4.rv_timer_stress_all_with_rand_reset.3846834431 | ||
| 87.16 | 0.99 | 99.33 | 0.33 | 98.40 | 1.60 | 99.35 | 2.07 | 100.00 | 0.92 | 96.77 | 0.00 | 29.11 | 1.02 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_tl_intg_err.2059518506 | ||
| 88.09 | 0.92 | 99.33 | 0.00 | 98.40 | 0.00 | 99.35 | 0.00 | 100.00 | 0.00 | 96.77 | 0.00 | 34.65 | 5.55 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/3.rv_timer_stress_all.2875969215 | ||
| 88.92 | 0.83 | 99.33 | 0.00 | 98.40 | 0.00 | 99.35 | 0.00 | 100.00 | 0.00 | 96.77 | 0.00 | 39.64 | 4.98 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/25.rv_timer_stress_all.301561005 | ||
| 89.67 | 0.76 | 99.33 | 0.00 | 98.40 | 0.00 | 99.48 | 0.13 | 100.00 | 0.00 | 96.77 | 0.00 | 44.05 | 4.42 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/0.rv_timer_random.665682708 | ||
| 90.30 | 0.62 | 99.33 | 0.00 | 98.40 | 0.00 | 99.48 | 0.00 | 100.00 | 0.00 | 96.77 | 0.00 | 47.79 | 3.74 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/11.rv_timer_stress_all.3562149613 | ||
| 90.88 | 0.59 | 99.33 | 0.00 | 98.40 | 0.00 | 99.48 | 0.00 | 100.00 | 0.00 | 96.77 | 0.00 | 51.30 | 3.51 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/20.rv_timer_stress_all.3797413344 | ||
| 91.34 | 0.45 | 99.33 | 0.00 | 98.40 | 0.00 | 99.48 | 0.00 | 100.00 | 0.00 | 96.77 | 0.00 | 54.02 | 2.72 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/24.rv_timer_stress_all.1016795685 | ||
| 91.77 | 0.43 | 99.33 | 0.00 | 98.40 | 0.00 | 99.48 | 0.00 | 100.00 | 0.00 | 96.77 | 0.00 | 56.63 | 2.60 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/27.rv_timer_stress_all.2246087196 | ||
| 92.20 | 0.43 | 99.33 | 0.00 | 98.40 | 0.00 | 99.48 | 0.00 | 100.00 | 0.00 | 99.35 | 2.58 | 56.63 | 0.00 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_csr_aliasing.1665587412 | ||
| 92.61 | 0.42 | 99.33 | 0.00 | 98.40 | 0.00 | 99.48 | 0.00 | 100.00 | 0.00 | 99.35 | 0.00 | 59.12 | 2.49 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/30.rv_timer_stress_all.2503167346 | ||
| 92.99 | 0.38 | 99.33 | 0.00 | 98.40 | 0.00 | 99.48 | 0.00 | 100.00 | 0.00 | 99.35 | 0.00 | 61.38 | 2.27 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/42.rv_timer_stress_all.3106052704 | ||
| 93.33 | 0.34 | 99.33 | 0.00 | 98.40 | 0.00 | 99.48 | 0.00 | 100.00 | 0.00 | 99.35 | 0.00 | 63.42 | 2.04 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/22.rv_timer_stress_all.1726806481 | ||
| 93.67 | 0.34 | 99.33 | 0.00 | 98.40 | 0.00 | 99.48 | 0.00 | 100.00 | 0.00 | 99.35 | 0.00 | 65.46 | 2.04 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/8.rv_timer_stress_all.222975941 | ||
| 93.99 | 0.32 | 99.33 | 0.00 | 98.40 | 0.00 | 99.48 | 0.00 | 100.00 | 0.00 | 99.35 | 0.00 | 67.38 | 1.93 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/26.rv_timer_stress_all.663115708 | ||
| 94.28 | 0.28 | 99.33 | 0.00 | 99.04 | 0.64 | 100.00 | 0.52 | 100.00 | 0.00 | 99.68 | 0.32 | 67.61 | 0.23 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/0.rv_timer_sec_cm.995780299 | ||
| 94.56 | 0.28 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 69.31 | 1.70 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/19.rv_timer_stress_all.4279155083 | ||
| 94.82 | 0.26 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 70.89 | 1.59 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/17.rv_timer_stress_all.1211452147 | ||
| 95.07 | 0.25 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 72.37 | 1.47 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/7.rv_timer_stress_all.2089710448 | ||
| 95.30 | 0.23 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 73.73 | 1.36 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/39.rv_timer_stress_all.3684662672 | ||
| 95.52 | 0.23 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 75.08 | 1.36 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/9.rv_timer_stress_all.3514730043 | ||
| 95.71 | 0.19 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 76.22 | 1.13 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/40.rv_timer_stress_all.1909343316 | ||
| 95.90 | 0.19 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 77.35 | 1.13 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/8.rv_timer_random.3633902741 | ||
| 96.07 | 0.17 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 78.37 | 1.02 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/68.rv_timer_random.23105994 | ||
| 96.22 | 0.15 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 79.28 | 0.91 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/13.rv_timer_stress_all.622480473 | ||
| 96.37 | 0.15 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 80.18 | 0.91 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/3.rv_timer_random.3936631652 | ||
| 96.50 | 0.13 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 80.97 | 0.79 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/37.rv_timer_stress_all.1931145477 | ||
| 96.62 | 0.11 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 81.65 | 0.68 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/14.rv_timer_stress_all.1637431761 | ||
| 96.73 | 0.11 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 82.33 | 0.68 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/145.rv_timer_random.2890692260 | ||
| 96.84 | 0.11 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 83.01 | 0.68 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/192.rv_timer_random.1259261622 | ||
| 96.96 | 0.11 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 83.69 | 0.68 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/29.rv_timer_random.2097148009 | ||
| 97.05 | 0.09 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 84.26 | 0.57 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/103.rv_timer_random.2420119953 | ||
| 97.15 | 0.09 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 84.82 | 0.57 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/108.rv_timer_random.2922663451 | ||
| 97.24 | 0.09 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 85.39 | 0.57 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/12.rv_timer_stress_all.4238338627 | ||
| 97.33 | 0.09 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 85.96 | 0.57 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/142.rv_timer_random.2838735105 | ||
| 97.43 | 0.09 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 86.52 | 0.57 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/173.rv_timer_random.1071631987 | ||
| 97.52 | 0.09 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 87.09 | 0.57 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/195.rv_timer_random.2872754054 | ||
| 97.62 | 0.09 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 87.66 | 0.57 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/2.rv_timer_random.2078327358 | ||
| 97.71 | 0.09 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 88.22 | 0.57 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/6.rv_timer_random.2980529051 | ||
| 97.79 | 0.08 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 88.67 | 0.45 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/1.rv_timer_stress_all.2211504803 | ||
| 97.86 | 0.08 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 89.13 | 0.45 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/110.rv_timer_random.442279833 | ||
| 97.94 | 0.08 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 89.58 | 0.45 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/123.rv_timer_random.987488817 | ||
| 98.01 | 0.08 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 90.03 | 0.45 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/165.rv_timer_random.3648844137 | ||
| 98.09 | 0.08 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 90.49 | 0.45 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/174.rv_timer_random.3664862585 | ||
| 98.17 | 0.08 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 90.94 | 0.45 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/18.rv_timer_stress_all.4058272396 | ||
| 98.24 | 0.08 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 91.39 | 0.45 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/78.rv_timer_random.1065265512 | ||
| 98.32 | 0.08 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 91.85 | 0.45 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/8.rv_timer_cfg_update_on_fly.2545597494 | ||
| 98.37 | 0.06 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 92.19 | 0.34 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/7.rv_timer_tl_intg_err.3726878880 | ||
| 98.43 | 0.06 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 92.53 | 0.34 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/101.rv_timer_random.1939538197 | ||
| 98.49 | 0.06 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 92.87 | 0.34 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/15.rv_timer_random_reset.616993696 | ||
| 98.54 | 0.06 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 93.20 | 0.34 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/16.rv_timer_cfg_update_on_fly.992702230 | ||
| 98.60 | 0.06 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 93.54 | 0.34 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/49.rv_timer_stress_all.1058667331 | ||
| 98.66 | 0.06 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 93.88 | 0.34 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/66.rv_timer_random.1043185534 | ||
| 98.71 | 0.06 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 94.22 | 0.34 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/76.rv_timer_random.2107982154 | ||
| 98.77 | 0.06 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 94.56 | 0.34 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/77.rv_timer_random.4081378221 | ||
| 98.83 | 0.06 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 94.90 | 0.34 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/79.rv_timer_random.764355621 | ||
| 98.88 | 0.06 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.68 | 0.00 | 95.24 | 0.34 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/98.rv_timer_random.3521597008 | ||
| 98.94 | 0.05 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.32 | 95.24 | 0.00 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_same_csr_outstanding.2531569099 | ||
| 98.97 | 0.04 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 95.47 | 0.23 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/109.rv_timer_random.4125774000 | ||
| 99.01 | 0.04 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 95.70 | 0.23 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/11.rv_timer_random_reset.3668920603 | ||
| 99.05 | 0.04 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 95.92 | 0.23 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/111.rv_timer_random.722520675 | ||
| 99.09 | 0.04 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 96.15 | 0.23 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/15.rv_timer_random.3158608642 | ||
| 99.12 | 0.04 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 96.38 | 0.23 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/61.rv_timer_random.2089651059 | ||
| 99.16 | 0.04 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 96.60 | 0.23 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/63.rv_timer_random.1111254424 | ||
| 99.20 | 0.04 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 96.83 | 0.23 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/82.rv_timer_random.3433643717 | ||
| 99.24 | 0.04 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 97.06 | 0.23 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/91.rv_timer_random.2559443743 | ||
| 99.26 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 97.17 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/1.rv_timer_cfg_update_on_fly.586067021 | ||
| 99.28 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 97.28 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/104.rv_timer_random.1570032437 | ||
| 99.29 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 97.40 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/107.rv_timer_random.3910192366 | ||
| 99.31 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 97.51 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/112.rv_timer_random.1867722728 | ||
| 99.33 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 97.62 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/135.rv_timer_random.4117036176 | ||
| 99.35 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 97.73 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/153.rv_timer_random.3109692974 | ||
| 99.37 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 97.85 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/155.rv_timer_random.3676217821 | ||
| 99.39 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 97.96 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/160.rv_timer_random.3930587779 | ||
| 99.41 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 98.07 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/161.rv_timer_random.2861983887 | ||
| 99.43 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 98.19 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/162.rv_timer_random.58628944 | ||
| 99.45 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 98.30 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/164.rv_timer_random.4083999538 | ||
| 99.46 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 98.41 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/180.rv_timer_random.4024064821 | ||
| 99.48 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 98.53 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/181.rv_timer_random.3166394384 | ||
| 99.50 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 98.64 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/186.rv_timer_random.125748366 | ||
| 99.52 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 98.75 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/20.rv_timer_cfg_update_on_fly.1031776494 | ||
| 99.54 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 98.87 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/21.rv_timer_cfg_update_on_fly.1732480139 | ||
| 99.56 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 98.98 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/23.rv_timer_cfg_update_on_fly.1468637356 | ||
| 99.58 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.09 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/24.rv_timer_random.2690567947 | ||
| 99.60 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.21 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/28.rv_timer_stress_all.2195107095 | ||
| 99.62 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.32 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/35.rv_timer_cfg_update_on_fly.3294925040 | ||
| 99.63 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.43 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/42.rv_timer_random.3816872769 | ||
| 99.65 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.55 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/46.rv_timer_cfg_update_on_fly.1711090127 | ||
| 99.67 | 0.02 | 99.33 | 0.00 | 99.04 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 100.00 | 0.00 | 99.66 | 0.11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/52.rv_timer_random.2901191131 | ||
| Name |
|---|
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_csr_bit_bash.1038525147 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_csr_hw_reset.3345703591 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_csr_mem_rw_with_rand_reset.1654111775 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_csr_rw.2074079633 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_intr_test.2564844246 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/0.rv_timer_tl_errors.2188226275 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_csr_aliasing.3108628298 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_csr_bit_bash.1454753070 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_csr_hw_reset.2397989546 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_csr_mem_rw_with_rand_reset.1188130473 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_csr_rw.1872847290 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_intr_test.277432012 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_same_csr_outstanding.569352171 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_tl_errors.3732233126 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/1.rv_timer_tl_intg_err.2113927792 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/10.rv_timer_csr_mem_rw_with_rand_reset.3077395928 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/10.rv_timer_csr_rw.1979174619 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/10.rv_timer_intr_test.4093637361 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/10.rv_timer_same_csr_outstanding.3595670040 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/10.rv_timer_tl_errors.3058671464 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/10.rv_timer_tl_intg_err.2324561198 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/11.rv_timer_csr_mem_rw_with_rand_reset.3420388507 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/11.rv_timer_csr_rw.751347359 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/11.rv_timer_intr_test.3481512546 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/11.rv_timer_same_csr_outstanding.606250509 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/11.rv_timer_tl_errors.1070018932 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/11.rv_timer_tl_intg_err.4000158786 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/12.rv_timer_csr_mem_rw_with_rand_reset.1424164088 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/12.rv_timer_csr_rw.3934097647 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/12.rv_timer_intr_test.376026517 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/12.rv_timer_same_csr_outstanding.210881711 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/12.rv_timer_tl_errors.791961092 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/12.rv_timer_tl_intg_err.1466346173 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/13.rv_timer_csr_mem_rw_with_rand_reset.1725694536 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/13.rv_timer_csr_rw.1476560464 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/13.rv_timer_intr_test.3643244630 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/13.rv_timer_same_csr_outstanding.465949914 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/13.rv_timer_tl_errors.3977939925 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/13.rv_timer_tl_intg_err.2332099699 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/14.rv_timer_csr_mem_rw_with_rand_reset.373827402 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/14.rv_timer_csr_rw.1852889974 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/14.rv_timer_intr_test.300941663 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/14.rv_timer_same_csr_outstanding.3845712266 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/14.rv_timer_tl_errors.2603123909 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/14.rv_timer_tl_intg_err.2358011145 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/15.rv_timer_csr_mem_rw_with_rand_reset.1896382680 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/15.rv_timer_csr_rw.4154988565 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/15.rv_timer_intr_test.1809446680 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/15.rv_timer_same_csr_outstanding.4165129040 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/15.rv_timer_tl_errors.455762156 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/15.rv_timer_tl_intg_err.4242197049 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/16.rv_timer_csr_mem_rw_with_rand_reset.724186749 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/16.rv_timer_csr_rw.2422922903 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/16.rv_timer_intr_test.1835739558 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/16.rv_timer_same_csr_outstanding.2931989140 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/16.rv_timer_tl_errors.2435305631 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/16.rv_timer_tl_intg_err.3036833433 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/17.rv_timer_csr_mem_rw_with_rand_reset.2510752425 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/17.rv_timer_csr_rw.2373899012 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/17.rv_timer_intr_test.1420370684 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/17.rv_timer_same_csr_outstanding.1557300477 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/17.rv_timer_tl_errors.2307380380 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/17.rv_timer_tl_intg_err.2485786179 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/18.rv_timer_csr_mem_rw_with_rand_reset.1486755664 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/18.rv_timer_csr_rw.226314542 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/18.rv_timer_intr_test.373897094 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/18.rv_timer_same_csr_outstanding.4280254553 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/18.rv_timer_tl_errors.579751 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/18.rv_timer_tl_intg_err.3643391049 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/19.rv_timer_csr_mem_rw_with_rand_reset.46357447 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/19.rv_timer_csr_rw.744097260 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/19.rv_timer_intr_test.898507706 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/19.rv_timer_same_csr_outstanding.2680091276 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/19.rv_timer_tl_errors.2774022174 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/19.rv_timer_tl_intg_err.623180221 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_csr_aliasing.2214939332 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_csr_bit_bash.3265382353 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_csr_hw_reset.247795634 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_csr_mem_rw_with_rand_reset.2860303537 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_csr_rw.2686368336 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_intr_test.2318930085 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_same_csr_outstanding.329983434 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_tl_errors.3445507878 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/2.rv_timer_tl_intg_err.3838382400 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/20.rv_timer_intr_test.4268854198 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/21.rv_timer_intr_test.2803350635 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/22.rv_timer_intr_test.3308458519 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/23.rv_timer_intr_test.839788326 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/24.rv_timer_intr_test.1235059000 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/25.rv_timer_intr_test.1883289086 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/26.rv_timer_intr_test.4077318040 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/27.rv_timer_intr_test.3078112913 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/28.rv_timer_intr_test.2853938469 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/29.rv_timer_intr_test.1264988587 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_csr_aliasing.3371634158 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_csr_bit_bash.1548318108 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_csr_hw_reset.2834432533 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_csr_mem_rw_with_rand_reset.107520243 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_csr_rw.2996213605 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_intr_test.1504466647 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_same_csr_outstanding.24148547 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_tl_errors.2314974843 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/3.rv_timer_tl_intg_err.3571055941 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/30.rv_timer_intr_test.1134070526 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/31.rv_timer_intr_test.767195228 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/32.rv_timer_intr_test.650603051 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/33.rv_timer_intr_test.2945946548 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/34.rv_timer_intr_test.3563586323 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/35.rv_timer_intr_test.2181536843 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/36.rv_timer_intr_test.3415179602 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/37.rv_timer_intr_test.1275161865 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/38.rv_timer_intr_test.2104931752 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/39.rv_timer_intr_test.181175035 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_csr_aliasing.902918177 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_csr_bit_bash.1077611038 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_csr_hw_reset.726012962 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_csr_mem_rw_with_rand_reset.2162297590 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_csr_rw.95186644 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_intr_test.1718632113 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_same_csr_outstanding.2709928931 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_tl_errors.419315520 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/4.rv_timer_tl_intg_err.3418978215 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/40.rv_timer_intr_test.2799732503 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/41.rv_timer_intr_test.4232787410 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/42.rv_timer_intr_test.259439555 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/43.rv_timer_intr_test.4035404853 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/44.rv_timer_intr_test.2851850534 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/45.rv_timer_intr_test.2185610163 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/46.rv_timer_intr_test.4055925168 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/47.rv_timer_intr_test.192490119 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/48.rv_timer_intr_test.3496565400 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/49.rv_timer_intr_test.883680590 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/5.rv_timer_csr_mem_rw_with_rand_reset.4091587335 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/5.rv_timer_csr_rw.2386086552 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/5.rv_timer_intr_test.2792598918 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/5.rv_timer_same_csr_outstanding.1052671381 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/5.rv_timer_tl_errors.2413322381 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/5.rv_timer_tl_intg_err.3872836838 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/6.rv_timer_csr_mem_rw_with_rand_reset.1857952630 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/6.rv_timer_csr_rw.1225957444 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/6.rv_timer_intr_test.3541096721 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/6.rv_timer_same_csr_outstanding.920624222 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/6.rv_timer_tl_errors.3854261084 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/6.rv_timer_tl_intg_err.1776930452 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/7.rv_timer_csr_mem_rw_with_rand_reset.2217297696 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/7.rv_timer_csr_rw.2261951588 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/7.rv_timer_intr_test.2773674775 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/7.rv_timer_same_csr_outstanding.106629973 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/7.rv_timer_tl_errors.3397304390 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/8.rv_timer_csr_mem_rw_with_rand_reset.1425055567 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/8.rv_timer_csr_rw.3571453553 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/8.rv_timer_intr_test.3947367231 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/8.rv_timer_same_csr_outstanding.4000330801 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/8.rv_timer_tl_errors.1439147092 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/8.rv_timer_tl_intg_err.3337456769 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/9.rv_timer_csr_mem_rw_with_rand_reset.3837116487 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/9.rv_timer_csr_rw.3636315103 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/9.rv_timer_intr_test.1689128594 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/9.rv_timer_same_csr_outstanding.2279916181 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/9.rv_timer_tl_errors.834800507 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/cover_reg_top/9.rv_timer_tl_intg_err.58603168 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/0.rv_timer_cfg_update_on_fly.2828910720 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/0.rv_timer_disabled.4027104873 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/0.rv_timer_random_reset.1014602965 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/0.rv_timer_stress_all.1729533591 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/1.rv_timer_disabled.1621279606 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/1.rv_timer_random_reset.2574291347 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/1.rv_timer_sec_cm.904467036 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/10.rv_timer_cfg_update_on_fly.2180073382 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/10.rv_timer_disabled.3977447736 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/10.rv_timer_random.3985239350 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/10.rv_timer_random_reset.3871598394 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/10.rv_timer_stress_all.4137061527 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/10.rv_timer_stress_all_with_rand_reset.924275998 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/100.rv_timer_random.2519400353 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/102.rv_timer_random.632434527 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/105.rv_timer_random.4034513610 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/106.rv_timer_random.908290069 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/11.rv_timer_cfg_update_on_fly.1973251796 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/11.rv_timer_disabled.1639043448 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/11.rv_timer_random.540060220 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/113.rv_timer_random.3695859529 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/114.rv_timer_random.2385328018 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/115.rv_timer_random.3776457162 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/116.rv_timer_random.3652221041 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/117.rv_timer_random.4082988610 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/118.rv_timer_random.1303213850 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/119.rv_timer_random.3928462465 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/12.rv_timer_cfg_update_on_fly.4189713497 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/12.rv_timer_disabled.3627720973 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/12.rv_timer_random.3028386973 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/12.rv_timer_random_reset.771243736 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/12.rv_timer_stress_all_with_rand_reset.3073849310 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/120.rv_timer_random.781072455 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/121.rv_timer_random.3180264702 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/122.rv_timer_random.2759213723 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/124.rv_timer_random.1094416262 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/125.rv_timer_random.1387464677 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/126.rv_timer_random.216396152 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/127.rv_timer_random.2704013841 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/128.rv_timer_random.2275016064 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/129.rv_timer_random.855282748 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/13.rv_timer_cfg_update_on_fly.1436843130 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/13.rv_timer_disabled.1582887609 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/13.rv_timer_random.2815661486 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/13.rv_timer_random_reset.738016021 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/130.rv_timer_random.2602021233 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/131.rv_timer_random.95001905 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/132.rv_timer_random.4182734000 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/133.rv_timer_random.2135086952 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/134.rv_timer_random.1577370445 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/136.rv_timer_random.2700498810 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/137.rv_timer_random.1564862756 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/138.rv_timer_random.353135963 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/139.rv_timer_random.2479033436 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/14.rv_timer_cfg_update_on_fly.2095072297 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/14.rv_timer_disabled.4151470449 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/14.rv_timer_random.3317940550 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/14.rv_timer_random_reset.1729368054 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/140.rv_timer_random.1534079695 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/141.rv_timer_random.4231851116 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/143.rv_timer_random.4072225524 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/144.rv_timer_random.656536844 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/146.rv_timer_random.3511456606 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/147.rv_timer_random.2363293767 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/148.rv_timer_random.3668640485 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/149.rv_timer_random.1256762708 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/15.rv_timer_cfg_update_on_fly.2996428747 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/15.rv_timer_disabled.1172161859 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/15.rv_timer_stress_all.22104255 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/150.rv_timer_random.3132466390 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/151.rv_timer_random.1217781960 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/152.rv_timer_random.1290366248 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/154.rv_timer_random.2297144047 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/156.rv_timer_random.4250378615 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/157.rv_timer_random.2459313422 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/158.rv_timer_random.3428148138 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/159.rv_timer_random.1947190559 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/16.rv_timer_random.1513203045 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/16.rv_timer_random_reset.2094781356 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/16.rv_timer_stress_all.588797416 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/163.rv_timer_random.1664493605 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/166.rv_timer_random.3879782580 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/167.rv_timer_random.526461048 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/168.rv_timer_random.2584052548 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/169.rv_timer_random.2272817990 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/17.rv_timer_cfg_update_on_fly.3353148088 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/17.rv_timer_disabled.391783185 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/17.rv_timer_random.2497534769 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/17.rv_timer_random_reset.555044157 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/170.rv_timer_random.1446846158 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/171.rv_timer_random.2462798111 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/172.rv_timer_random.4069560062 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/175.rv_timer_random.1460363361 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/176.rv_timer_random.3482393736 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/177.rv_timer_random.4267375495 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/178.rv_timer_random.81019753 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/179.rv_timer_random.124226042 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/18.rv_timer_cfg_update_on_fly.2917149454 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/18.rv_timer_disabled.1173290293 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/18.rv_timer_random.262919039 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/18.rv_timer_random_reset.176288240 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/182.rv_timer_random.1839338905 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/183.rv_timer_random.1810050971 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/184.rv_timer_random.2948369187 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/185.rv_timer_random.1996914191 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/187.rv_timer_random.1546809585 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/188.rv_timer_random.1072363440 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/189.rv_timer_random.1894386705 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/19.rv_timer_cfg_update_on_fly.596248051 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/19.rv_timer_disabled.3768744951 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/19.rv_timer_random.117027159 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/19.rv_timer_random_reset.3954989256 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/190.rv_timer_random.1151580970 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/191.rv_timer_random.1763951416 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/193.rv_timer_random.403621599 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/194.rv_timer_random.3026074676 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/196.rv_timer_random.2292220324 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/197.rv_timer_random.4177538857 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/198.rv_timer_random.3641285392 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/199.rv_timer_random.1188027601 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/2.rv_timer_cfg_update_on_fly.1608761623 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/2.rv_timer_disabled.4222597318 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/2.rv_timer_random_reset.481147480 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/2.rv_timer_sec_cm.4288898334 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/2.rv_timer_stress_all.291351515 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/20.rv_timer_disabled.1355657135 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/20.rv_timer_random.171927524 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/20.rv_timer_random_reset.1224887606 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/20.rv_timer_stress_all_with_rand_reset.923559792 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/21.rv_timer_disabled.282930861 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/21.rv_timer_random.2862344635 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/21.rv_timer_random_reset.158635114 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/21.rv_timer_stress_all.1483300877 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/22.rv_timer_cfg_update_on_fly.1323197391 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/22.rv_timer_disabled.2680664909 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/22.rv_timer_random.2863872336 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/22.rv_timer_random_reset.4285391909 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/23.rv_timer_disabled.2560195100 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/23.rv_timer_random.2660253895 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/23.rv_timer_random_reset.3171430865 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/23.rv_timer_stress_all.912240142 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/24.rv_timer_cfg_update_on_fly.2840188170 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/24.rv_timer_disabled.1494930853 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/24.rv_timer_random_reset.136084225 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/25.rv_timer_cfg_update_on_fly.3259062109 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/25.rv_timer_disabled.429184606 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/25.rv_timer_random.2082870911 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/25.rv_timer_random_reset.321918650 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/26.rv_timer_cfg_update_on_fly.2087998170 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/26.rv_timer_disabled.748931234 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/26.rv_timer_random.3284389003 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/26.rv_timer_random_reset.3378562372 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/27.rv_timer_cfg_update_on_fly.1276995004 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/27.rv_timer_random.1049507049 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/27.rv_timer_random_reset.2170373079 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/28.rv_timer_cfg_update_on_fly.1511605661 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/28.rv_timer_disabled.1914184102 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/28.rv_timer_random.2407223263 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/28.rv_timer_random_reset.1833515890 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/29.rv_timer_cfg_update_on_fly.2354326057 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/29.rv_timer_disabled.1432245425 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/29.rv_timer_random_reset.3924360144 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/29.rv_timer_stress_all.2746097707 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/29.rv_timer_stress_all_with_rand_reset.2169027555 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/3.rv_timer_cfg_update_on_fly.361264811 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/3.rv_timer_disabled.2982424594 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/3.rv_timer_random_reset.1913008319 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/3.rv_timer_sec_cm.4166288055 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/30.rv_timer_cfg_update_on_fly.3576386386 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/30.rv_timer_disabled.2382304520 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/30.rv_timer_random.295106036 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/30.rv_timer_random_reset.2375625690 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/31.rv_timer_cfg_update_on_fly.2643199961 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/31.rv_timer_disabled.234611591 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/31.rv_timer_random.1873402927 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/31.rv_timer_random_reset.1187339119 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/31.rv_timer_stress_all.2787163404 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/32.rv_timer_cfg_update_on_fly.3893409813 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/32.rv_timer_disabled.2323465670 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/32.rv_timer_random.532332808 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/32.rv_timer_random_reset.378888265 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/32.rv_timer_stress_all.371329051 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/33.rv_timer_cfg_update_on_fly.3750628829 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/33.rv_timer_disabled.1593245451 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/33.rv_timer_random.1614169065 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/33.rv_timer_random_reset.821914875 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/33.rv_timer_stress_all.346067491 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/33.rv_timer_stress_all_with_rand_reset.91706168 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/34.rv_timer_cfg_update_on_fly.285498021 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/34.rv_timer_disabled.618092279 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/34.rv_timer_random.2280605844 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/34.rv_timer_random_reset.121489724 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/34.rv_timer_stress_all.3219590894 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/35.rv_timer_disabled.3830108042 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/35.rv_timer_random.3914276745 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/35.rv_timer_random_reset.4093220937 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/35.rv_timer_stress_all.1297157909 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/36.rv_timer_cfg_update_on_fly.3042852173 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/36.rv_timer_disabled.2673583222 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/36.rv_timer_random.1281533891 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/36.rv_timer_random_reset.121724812 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/36.rv_timer_stress_all.3773029984 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/37.rv_timer_cfg_update_on_fly.2591495055 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/37.rv_timer_disabled.2156566582 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/37.rv_timer_random.2687865359 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/37.rv_timer_random_reset.2812022484 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/37.rv_timer_stress_all_with_rand_reset.2710757140 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/38.rv_timer_cfg_update_on_fly.2820822251 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/38.rv_timer_disabled.2347852648 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/38.rv_timer_random.3159819872 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/38.rv_timer_random_reset.548159679 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/38.rv_timer_stress_all.4109737418 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/39.rv_timer_cfg_update_on_fly.3217540586 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/39.rv_timer_disabled.1687428001 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/39.rv_timer_random.811980257 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/39.rv_timer_random_reset.2451048571 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/39.rv_timer_stress_all_with_rand_reset.2721965960 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/4.rv_timer_cfg_update_on_fly.3143535124 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/4.rv_timer_disabled.2229044814 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/4.rv_timer_random.2964788402 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/4.rv_timer_random_reset.4164796915 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/4.rv_timer_sec_cm.529883797 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/4.rv_timer_stress_all.3686595106 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/40.rv_timer_cfg_update_on_fly.273910194 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/40.rv_timer_disabled.1031860652 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/40.rv_timer_random.731630361 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/40.rv_timer_random_reset.1263992099 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/40.rv_timer_stress_all_with_rand_reset.1639522025 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/41.rv_timer_cfg_update_on_fly.3257059559 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/41.rv_timer_disabled.3093898660 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/41.rv_timer_random.553650463 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/41.rv_timer_random_reset.1956243737 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/41.rv_timer_stress_all.2876444464 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/42.rv_timer_cfg_update_on_fly.763034951 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/42.rv_timer_disabled.363706414 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/42.rv_timer_random_reset.2026798724 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/42.rv_timer_stress_all_with_rand_reset.1822574507 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/43.rv_timer_cfg_update_on_fly.3180620899 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/43.rv_timer_disabled.1208431004 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/43.rv_timer_random.3279677435 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/43.rv_timer_random_reset.3474819248 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/43.rv_timer_stress_all.2336198724 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/44.rv_timer_cfg_update_on_fly.1734921427 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/44.rv_timer_disabled.887171140 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/44.rv_timer_random.1747090451 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/44.rv_timer_random_reset.2348630479 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/44.rv_timer_stress_all.565803155 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/44.rv_timer_stress_all_with_rand_reset.653652838 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/45.rv_timer_cfg_update_on_fly.796799849 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/45.rv_timer_disabled.3245441372 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/45.rv_timer_random.1722472018 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/45.rv_timer_random_reset.1735068194 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/45.rv_timer_stress_all.3258456333 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/45.rv_timer_stress_all_with_rand_reset.4255199690 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/46.rv_timer_disabled.163357680 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/46.rv_timer_random.3090514282 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/46.rv_timer_random_reset.906893525 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/46.rv_timer_stress_all.1411946709 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/47.rv_timer_cfg_update_on_fly.3858325605 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/47.rv_timer_disabled.2777258893 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/47.rv_timer_random.3358497173 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/47.rv_timer_random_reset.4228218123 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/47.rv_timer_stress_all.1729998289 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/48.rv_timer_cfg_update_on_fly.2664949435 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/48.rv_timer_random.2568210296 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/48.rv_timer_random_reset.3505566707 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/48.rv_timer_stress_all.3267554556 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/49.rv_timer_cfg_update_on_fly.1910194887 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/49.rv_timer_disabled.3307390340 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/49.rv_timer_random.3611582349 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/49.rv_timer_random_reset.1004808602 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/5.rv_timer_cfg_update_on_fly.514927159 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/5.rv_timer_disabled.3391243725 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/5.rv_timer_random.1203363389 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/5.rv_timer_random_reset.1975683514 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/5.rv_timer_stress_all.1500170590 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/5.rv_timer_stress_all_with_rand_reset.2884360339 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/50.rv_timer_random.100871261 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/51.rv_timer_random.2030805713 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/53.rv_timer_random.2418835812 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/54.rv_timer_random.922207014 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/55.rv_timer_random.1440270369 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/56.rv_timer_random.2256834154 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/57.rv_timer_random.3159832285 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/58.rv_timer_random.1606246994 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/59.rv_timer_random.2439931239 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/6.rv_timer_cfg_update_on_fly.2983533662 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/6.rv_timer_disabled.2344929287 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/6.rv_timer_random_reset.1521364181 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/6.rv_timer_stress_all.3220064363 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/60.rv_timer_random.441812039 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/62.rv_timer_random.1369069199 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/64.rv_timer_random.556520384 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/67.rv_timer_random.2034454229 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/69.rv_timer_random.4030412602 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/7.rv_timer_cfg_update_on_fly.4168661767 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/7.rv_timer_disabled.241412797 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/7.rv_timer_random.1367613290 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/7.rv_timer_random_reset.4001425524 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/7.rv_timer_stress_all_with_rand_reset.3200431919 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/70.rv_timer_random.3819995005 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/71.rv_timer_random.1806113422 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/72.rv_timer_random.2960956834 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/73.rv_timer_random.3363658174 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/74.rv_timer_random.3825592167 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/75.rv_timer_random.1687535560 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/8.rv_timer_disabled.258662698 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/8.rv_timer_random_reset.164163039 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/80.rv_timer_random.3942999454 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/81.rv_timer_random.3822719682 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/83.rv_timer_random.3106734183 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/84.rv_timer_random.980181059 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/85.rv_timer_random.3518928641 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/86.rv_timer_random.109940496 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/87.rv_timer_random.3162884940 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/88.rv_timer_random.2454183834 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/89.rv_timer_random.346441672 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/9.rv_timer_cfg_update_on_fly.526491819 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/9.rv_timer_disabled.2021188422 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/9.rv_timer_random.2788535125 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/9.rv_timer_random_reset.2939699435 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/90.rv_timer_random.2477915764 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/92.rv_timer_random.943576510 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/93.rv_timer_random.2825887222 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/94.rv_timer_random.1266954673 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/95.rv_timer_random.1707308973 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/96.rv_timer_random.61396460 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/97.rv_timer_random.2744237733 |
| /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/99.rv_timer_random.2240199339 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
|---|---|---|---|---|---|---|
| T1 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/0.rv_timer_random_reset.1014602965 | Oct 03 08:57:21 AM UTC 24 | Oct 03 08:58:16 AM UTC 24 | 23882115324 ps | ||
| T2 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/0.rv_timer_sec_cm.995780299 | Oct 03 08:58:17 AM UTC 24 | Oct 03 08:58:19 AM UTC 24 | 666183711 ps | ||
| T3 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/0.rv_timer_disabled.4027104873 | Oct 03 08:57:15 AM UTC 24 | Oct 03 08:58:53 AM UTC 24 | 48095124182 ps | ||
| T4 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/1.rv_timer_random.534787336 | Oct 03 08:58:20 AM UTC 24 | Oct 03 09:01:20 AM UTC 24 | 168218710325 ps | ||
| T5 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/1.rv_timer_disabled.1621279606 | Oct 03 08:58:53 AM UTC 24 | Oct 03 09:02:16 AM UTC 24 | 121198058974 ps | ||
| T6 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/1.rv_timer_cfg_update_on_fly.586067021 | Oct 03 09:01:20 AM UTC 24 | Oct 03 09:02:24 AM UTC 24 | 78187112127 ps | ||
| T7 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/1.rv_timer_random_reset.2574291347 | Oct 03 09:01:21 AM UTC 24 | Oct 03 09:02:43 AM UTC 24 | 141885174264 ps | ||
| T8 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/1.rv_timer_sec_cm.904467036 | Oct 03 09:02:44 AM UTC 24 | Oct 03 09:02:46 AM UTC 24 | 297165277 ps | ||
| T9 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/0.rv_timer_cfg_update_on_fly.2828910720 | Oct 03 08:57:18 AM UTC 24 | Oct 03 09:03:09 AM UTC 24 | 148098329017 ps | ||
| T10 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/2.rv_timer_cfg_update_on_fly.1608761623 | Oct 03 09:03:09 AM UTC 24 | Oct 03 09:03:43 AM UTC 24 | 11488067181 ps | ||
| T19 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/2.rv_timer_random_reset.481147480 | Oct 03 09:03:44 AM UTC 24 | Oct 03 09:04:01 AM UTC 24 | 18795421254 ps | ||
| T11 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/2.rv_timer_stress_all.291351515 | Oct 03 09:04:05 AM UTC 24 | Oct 03 09:04:07 AM UTC 24 | 34263222 ps | ||
| T16 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/2.rv_timer_sec_cm.4288898334 | Oct 03 09:04:08 AM UTC 24 | Oct 03 09:04:10 AM UTC 24 | 347794504 ps | ||
| T48 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/2.rv_timer_disabled.4222597318 | Oct 03 09:02:47 AM UTC 24 | Oct 03 09:04:20 AM UTC 24 | 205704920313 ps | ||
| T49 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/3.rv_timer_random_reset.1913008319 | Oct 03 09:05:38 AM UTC 24 | Oct 03 09:06:16 AM UTC 24 | 43124685374 ps | ||
| T50 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/0.rv_timer_random.665682708 | Oct 03 08:57:14 AM UTC 24 | Oct 03 09:06:34 AM UTC 24 | 461530476154 ps | ||
| T17 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/3.rv_timer_sec_cm.4166288055 | Oct 03 09:07:31 AM UTC 24 | Oct 03 09:07:33 AM UTC 24 | 138465624 ps | ||
| T51 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/4.rv_timer_random.2964788402 | Oct 03 09:07:35 AM UTC 24 | Oct 03 09:09:11 AM UTC 24 | 75282742034 ps | ||
| T52 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/3.rv_timer_disabled.2982424594 | Oct 03 09:04:22 AM UTC 24 | Oct 03 09:09:21 AM UTC 24 | 123324387360 ps | ||
| T53 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/4.rv_timer_random_reset.4164796915 | Oct 03 09:09:21 AM UTC 24 | Oct 03 09:09:23 AM UTC 24 | 136350768 ps | ||
| T12 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/4.rv_timer_stress_all_with_rand_reset.3846834431 | Oct 03 09:09:24 AM UTC 24 | Oct 03 09:09:47 AM UTC 24 | 2208327884 ps | ||
| T32 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/3.rv_timer_random.3936631652 | Oct 03 09:04:11 AM UTC 24 | Oct 03 09:11:04 AM UTC 24 | 114932899336 ps | ||
| T18 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/4.rv_timer_sec_cm.529883797 | Oct 03 09:11:05 AM UTC 24 | Oct 03 09:11:07 AM UTC 24 | 69956814 ps | ||
| T33 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/4.rv_timer_disabled.2229044814 | Oct 03 09:07:44 AM UTC 24 | Oct 03 09:11:33 AM UTC 24 | 104574969084 ps | ||
| T34 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/3.rv_timer_cfg_update_on_fly.361264811 | Oct 03 09:04:30 AM UTC 24 | Oct 03 09:12:43 AM UTC 24 | 651479826024 ps | ||
| T13 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/0.rv_timer_stress_all.1729533591 | Oct 03 08:57:34 AM UTC 24 | Oct 03 09:13:29 AM UTC 24 | 876286531486 ps | ||
| T35 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/5.rv_timer_cfg_update_on_fly.514927159 | Oct 03 09:12:44 AM UTC 24 | Oct 03 09:13:37 AM UTC 24 | 19861908069 ps | ||
| T14 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/5.rv_timer_stress_all_with_rand_reset.2884360339 | Oct 03 09:13:38 AM UTC 24 | Oct 03 09:14:19 AM UTC 24 | 3653480264 ps | ||
| T36 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/5.rv_timer_disabled.3391243725 | Oct 03 09:11:33 AM UTC 24 | Oct 03 09:14:25 AM UTC 24 | 84356816590 ps | ||
| T37 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/5.rv_timer_random_reset.1975683514 | Oct 03 09:13:30 AM UTC 24 | Oct 03 09:16:01 AM UTC 24 | 63637421789 ps | ||
| T383 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/6.rv_timer_disabled.2344929287 | Oct 03 09:16:01 AM UTC 24 | Oct 03 09:17:03 AM UTC 24 | 29179573065 ps | ||
| T384 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/5.rv_timer_stress_all.1500170590 | Oct 03 09:14:20 AM UTC 24 | Oct 03 09:17:15 AM UTC 24 | 84449611252 ps | ||
| T84 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/6.rv_timer_cfg_update_on_fly.2983533662 | Oct 03 09:17:04 AM UTC 24 | Oct 03 09:22:07 AM UTC 24 | 527413993202 ps | ||
| T44 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/6.rv_timer_stress_all.3220064363 | Oct 03 09:21:46 AM UTC 24 | Oct 03 09:25:54 AM UTC 24 | 364997555163 ps | ||
| T385 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/7.rv_timer_disabled.241412797 | Oct 03 09:25:55 AM UTC 24 | Oct 03 09:27:37 AM UTC 24 | 172393263781 ps | ||
| T94 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/6.rv_timer_random.2980529051 | Oct 03 09:14:25 AM UTC 24 | Oct 03 09:27:39 AM UTC 24 | 2335507585669 ps | ||
| T382 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/7.rv_timer_random_reset.4001425524 | Oct 03 09:27:40 AM UTC 24 | Oct 03 09:27:43 AM UTC 24 | 890203075 ps | ||
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| T412 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/34.rv_timer_disabled.618092279 | Oct 03 09:42:41 AM UTC 24 | Oct 03 09:43:16 AM UTC 24 | 15487230248 ps | ||
| T252 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/23.rv_timer_random_reset.3171430865 | Oct 03 09:37:02 AM UTC 24 | Oct 03 09:43:39 AM UTC 24 | 175634317669 ps | ||
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| T179 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/58.rv_timer_random.1606246994 | Oct 03 09:54:43 AM UTC 24 | Oct 03 09:55:59 AM UTC 24 | 48644680062 ps | ||
| T313 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/60.rv_timer_random.441812039 | Oct 03 09:54:46 AM UTC 24 | Oct 03 09:56:11 AM UTC 24 | 34642344155 ps | ||
| T291 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/51.rv_timer_random.2030805713 | Oct 03 09:53:43 AM UTC 24 | Oct 03 09:56:19 AM UTC 24 | 222685971608 ps | ||
| T166 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/24.rv_timer_stress_all.1016795685 | Oct 03 09:37:52 AM UTC 24 | Oct 03 09:56:22 AM UTC 24 | 2178292831975 ps | ||
| T178 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/36.rv_timer_stress_all.3773029984 | Oct 03 09:43:56 AM UTC 24 | Oct 03 09:56:39 AM UTC 24 | 1700525107668 ps | ||
| T201 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/72.rv_timer_random.2960956834 | Oct 03 09:56:40 AM UTC 24 | Oct 03 09:56:42 AM UTC 24 | 331860156 ps | ||
| T168 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/33.rv_timer_stress_all.346067491 | Oct 03 09:42:24 AM UTC 24 | Oct 03 09:57:22 AM UTC 24 | 2462009379107 ps | ||
| T325 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/34.rv_timer_stress_all.3219590894 | Oct 03 09:43:01 AM UTC 24 | Oct 03 09:57:32 AM UTC 24 | 778048022872 ps | ||
| T371 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/69.rv_timer_random.4030412602 | Oct 03 09:56:11 AM UTC 24 | Oct 03 09:57:36 AM UTC 24 | 42904906200 ps | ||
| T373 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/50.rv_timer_random.100871261 | Oct 03 09:53:39 AM UTC 24 | Oct 03 09:57:57 AM UTC 24 | 19709026291 ps | ||
| T253 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/45.rv_timer_stress_all.3258456333 | Oct 03 09:50:44 AM UTC 24 | Oct 03 09:57:59 AM UTC 24 | 130714095478 ps | ||
| T151 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/19.rv_timer_stress_all.4279155083 | Oct 03 09:35:10 AM UTC 24 | Oct 03 09:58:05 AM UTC 24 | 469736360373 ps | ||
| T273 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/63.rv_timer_random.1111254424 | Oct 03 09:55:44 AM UTC 24 | Oct 03 09:58:13 AM UTC 24 | 101432051663 ps | ||
| T119 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/57.rv_timer_random.3159832285 | Oct 03 09:54:43 AM UTC 24 | Oct 03 09:58:22 AM UTC 24 | 444639127834 ps | ||
| T172 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/55.rv_timer_random.1440270369 | Oct 03 09:54:39 AM UTC 24 | Oct 03 09:58:24 AM UTC 24 | 35932117529 ps | ||
| T285 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/33.rv_timer_random.1614169065 | Oct 03 09:42:09 AM UTC 24 | Oct 03 09:58:25 AM UTC 24 | 536828290539 ps | ||
| T162 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/71.rv_timer_random.1806113422 | Oct 03 09:56:23 AM UTC 24 | Oct 03 09:58:55 AM UTC 24 | 50089740221 ps | ||
| T355 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/83.rv_timer_random.3106734183 | Oct 03 09:58:26 AM UTC 24 | Oct 03 09:58:59 AM UTC 24 | 38084898509 ps | ||
| T309 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/39.rv_timer_cfg_update_on_fly.3217540586 | Oct 03 09:45:39 AM UTC 24 | Oct 03 09:59:09 AM UTC 24 | 1054393777105 ps | ||
| T298 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/59.rv_timer_random.2439931239 | Oct 03 09:54:46 AM UTC 24 | Oct 03 09:59:20 AM UTC 24 | 133360345748 ps | ||
| T232 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/64.rv_timer_random.556520384 | Oct 03 09:55:46 AM UTC 24 | Oct 03 09:59:22 AM UTC 24 | 90446910402 ps | ||
| T120 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/40.rv_timer_random.731630361 | Oct 03 09:46:14 AM UTC 24 | Oct 03 09:59:44 AM UTC 24 | 283909756901 ps | ||
| T213 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/45.rv_timer_cfg_update_on_fly.796799849 | Oct 03 09:50:23 AM UTC 24 | Oct 03 09:59:25 AM UTC 24 | 1559911527407 ps | ||
| T250 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/80.rv_timer_random.3942999454 | Oct 03 09:58:14 AM UTC 24 | Oct 03 09:59:52 AM UTC 24 | 206325808426 ps | ||
| T441 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/49.rv_timer_disabled.3307390340 | Oct 03 09:52:49 AM UTC 24 | Oct 03 10:00:09 AM UTC 24 | 772776542563 ps | ||
| T256 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/67.rv_timer_random.2034454229 | Oct 03 09:55:57 AM UTC 24 | Oct 03 10:00:43 AM UTC 24 | 200703283424 ps | ||
| T359 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/73.rv_timer_random.3363658174 | Oct 03 09:56:43 AM UTC 24 | Oct 03 10:00:45 AM UTC 24 | 93656075260 ps | ||
| T152 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/25.rv_timer_stress_all.301561005 | Oct 03 09:38:17 AM UTC 24 | Oct 03 10:00:56 AM UTC 24 | 839540862465 ps | ||
| T315 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/40.rv_timer_cfg_update_on_fly.273910194 | Oct 03 09:46:21 AM UTC 24 | Oct 03 10:01:04 AM UTC 24 | 799215387927 ps | ||
| T282 | /workspaces/repo/scratch/os_regression_2024_10_02/rv_timer-sim-vcs/coverage/default/85.rv_timer_random.3518928641 | Oct 03 09:59:00 AM UTC 24 | Oct 03 10:01:13 AM UTC 24 | 79363299145 ps |
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