Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::fw_tx_fifo_size_cg

Group : spi_device_env_pkg::spi_device_env_cov::fw_tx_fifo_size_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

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Summary for Group spi_device_env_pkg::spi_device_env_cov::fw_tx_fifo_size_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	8	0	8	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::fw_tx_fifo_size_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_tx_size	8	0	8	100.00	100	1	1	0

Summary for Variable cp_tx_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_tx_size

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
specific_sizes[4]	50690	1			T50	775		T54	1200		T256	2663
specific_sizes[2048]	4657	1			T57	607		T257	145		T101	2
specific_sizes[4092]	1213	1			T128	583		T258	147		T259	340
sizes[0]	515716	1			T50	775		T59	2254		T207	2387
sizes[1]	378350	1			T2	12067		T3	467		T9	19547
sizes[2]	226538	1			T138	1920		T127	12213		T57	607
sizes[3]	52764	1			T53	50		T260	17948		T261	12241
sizes[4]	46220	1			T128	583		T72	2639		T258	147