Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.10 99.01 96.33 98.63 92.06 98.05 95.86 99.76


Total test records in report: 1747
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T1264 /workspace/coverage/default/41.spi_device_read_buffer_direct.2654056241 Dec 27 01:37:18 PM PST 23 Dec 27 01:37:24 PM PST 23 488078293 ps
T1265 /workspace/coverage/default/47.spi_device_tpm_rw.779826873 Dec 27 01:39:15 PM PST 23 Dec 27 01:39:19 PM PST 23 144682739 ps
T1266 /workspace/coverage/default/27.spi_device_flash_and_tpm_min_idle.2687355655 Dec 27 01:33:22 PM PST 23 Dec 27 01:36:43 PM PST 23 281900190199 ps
T1267 /workspace/coverage/default/10.spi_device_fifo_underflow_overflow.3387301411 Dec 27 01:31:34 PM PST 23 Dec 27 01:41:37 PM PST 23 153275161280 ps
T1268 /workspace/coverage/default/2.spi_device_alert_test.3927204056 Dec 27 01:30:25 PM PST 23 Dec 27 01:30:28 PM PST 23 16557488 ps
T1269 /workspace/coverage/default/44.spi_device_smoke.2433672525 Dec 27 01:37:37 PM PST 23 Dec 27 01:37:45 PM PST 23 20990200 ps
T1270 /workspace/coverage/default/23.spi_device_fifo_underflow_overflow.2763736052 Dec 27 01:32:16 PM PST 23 Dec 27 01:47:25 PM PST 23 181893077045 ps
T1271 /workspace/coverage/default/8.spi_device_pass_cmd_filtering.2040941008 Dec 27 01:31:02 PM PST 23 Dec 27 01:31:11 PM PST 23 1254040156 ps
T1272 /workspace/coverage/default/19.spi_device_intercept.4140739169 Dec 27 01:32:41 PM PST 23 Dec 27 01:32:47 PM PST 23 974177101 ps
T1273 /workspace/coverage/default/9.spi_device_csb_read.3382414330 Dec 27 01:31:14 PM PST 23 Dec 27 01:31:15 PM PST 23 52277048 ps
T1274 /workspace/coverage/default/43.spi_device_tpm_sts_read.3327011770 Dec 27 01:37:20 PM PST 23 Dec 27 01:37:22 PM PST 23 79874003 ps
T1275 /workspace/coverage/default/18.spi_device_alert_test.1510949964 Dec 27 01:32:17 PM PST 23 Dec 27 01:32:24 PM PST 23 27218719 ps
T1276 /workspace/coverage/default/27.spi_device_intercept.1381758789 Dec 27 01:33:51 PM PST 23 Dec 27 01:33:56 PM PST 23 417306871 ps
T1277 /workspace/coverage/default/32.spi_device_txrx.3919392456 Dec 27 01:33:58 PM PST 23 Dec 27 01:36:15 PM PST 23 18485541243 ps
T1278 /workspace/coverage/default/36.spi_device_rx_async_fifo_reset.986348605 Dec 27 01:36:01 PM PST 23 Dec 27 01:36:03 PM PST 23 36665443 ps
T1279 /workspace/coverage/default/30.spi_device_fifo_underflow_overflow.1367179477 Dec 27 01:34:04 PM PST 23 Dec 27 01:43:27 PM PST 23 214910724743 ps
T1280 /workspace/coverage/default/1.spi_device_fifo_underflow_overflow.3705635768 Dec 27 01:30:04 PM PST 23 Dec 27 01:42:01 PM PST 23 161620846388 ps
T1281 /workspace/coverage/default/1.spi_device_byte_transfer.3652978163 Dec 27 01:30:11 PM PST 23 Dec 27 01:30:16 PM PST 23 185012240 ps
T323 /workspace/coverage/default/32.spi_device_pass_addr_payload_swap.4063662934 Dec 27 01:33:50 PM PST 23 Dec 27 01:34:13 PM PST 23 12570524867 ps
T1282 /workspace/coverage/default/8.spi_device_upload.2165134095 Dec 27 01:31:46 PM PST 23 Dec 27 01:31:57 PM PST 23 9050607821 ps
T1283 /workspace/coverage/default/7.spi_device_mailbox.3353690183 Dec 27 01:31:13 PM PST 23 Dec 27 01:31:31 PM PST 23 3397050984 ps
T1284 /workspace/coverage/default/46.spi_device_tpm_rw.4092604274 Dec 27 01:37:52 PM PST 23 Dec 27 01:37:57 PM PST 23 16309071 ps
T1285 /workspace/coverage/default/20.spi_device_pass_addr_payload_swap.1195805067 Dec 27 01:32:16 PM PST 23 Dec 27 01:32:58 PM PST 23 15404692678 ps
T1286 /workspace/coverage/default/19.spi_device_cfg_cmd.287367582 Dec 27 01:32:43 PM PST 23 Dec 27 01:32:49 PM PST 23 583607443 ps
T1287 /workspace/coverage/default/47.spi_device_txrx.2739136672 Dec 27 01:37:45 PM PST 23 Dec 27 01:48:42 PM PST 23 32291863142 ps
T1288 /workspace/coverage/default/9.spi_device_tpm_sts_read.409451107 Dec 27 01:32:20 PM PST 23 Dec 27 01:32:31 PM PST 23 146736908 ps
T1289 /workspace/coverage/default/31.spi_device_flash_all.4159114934 Dec 27 01:34:00 PM PST 23 Dec 27 01:34:23 PM PST 23 3614515305 ps
T1290 /workspace/coverage/default/44.spi_device_intr.2887481817 Dec 27 01:37:33 PM PST 23 Dec 27 01:37:53 PM PST 23 14059371485 ps
T1291 /workspace/coverage/default/5.spi_device_ram_cfg.2430453559 Dec 27 01:30:40 PM PST 23 Dec 27 01:30:42 PM PST 23 58624243 ps
T1292 /workspace/coverage/default/46.spi_device_rx_timeout.2299995684 Dec 27 01:37:50 PM PST 23 Dec 27 01:37:58 PM PST 23 577814432 ps
T1293 /workspace/coverage/default/27.spi_device_tx_async_fifo_reset.1739709862 Dec 27 01:33:17 PM PST 23 Dec 27 01:33:19 PM PST 23 60992190 ps
T1294 /workspace/coverage/default/13.spi_device_stress_all.488456307 Dec 27 01:32:46 PM PST 23 Dec 27 01:41:13 PM PST 23 225940189600 ps
T1295 /workspace/coverage/default/9.spi_device_bit_transfer.3243712143 Dec 27 01:31:02 PM PST 23 Dec 27 01:31:04 PM PST 23 300535309 ps
T1296 /workspace/coverage/default/12.spi_device_fifo_full.133348611 Dec 27 01:32:14 PM PST 23 Dec 27 01:48:22 PM PST 23 64693343413 ps
T1297 /workspace/coverage/default/12.spi_device_tpm_sts_read.2484353685 Dec 27 01:32:19 PM PST 23 Dec 27 01:32:29 PM PST 23 159600188 ps
T1298 /workspace/coverage/default/3.spi_device_rx_timeout.4189595972 Dec 27 01:30:14 PM PST 23 Dec 27 01:30:25 PM PST 23 2849230832 ps
T1299 /workspace/coverage/default/35.spi_device_mailbox.1698349253 Dec 27 01:35:26 PM PST 23 Dec 27 01:36:05 PM PST 23 16489402192 ps
T1300 /workspace/coverage/default/22.spi_device_mailbox.690946780 Dec 27 01:32:17 PM PST 23 Dec 27 01:32:31 PM PST 23 5566115352 ps
T1301 /workspace/coverage/default/31.spi_device_intercept.4054469517 Dec 27 01:33:51 PM PST 23 Dec 27 01:33:57 PM PST 23 602012199 ps
T1302 /workspace/coverage/default/33.spi_device_bit_transfer.2642358682 Dec 27 01:34:26 PM PST 23 Dec 27 01:34:29 PM PST 23 1165021050 ps
T1303 /workspace/coverage/default/2.spi_device_cfg_cmd.2455571550 Dec 27 01:30:36 PM PST 23 Dec 27 01:30:41 PM PST 23 914581468 ps
T1304 /workspace/coverage/default/34.spi_device_alert_test.4238533634 Dec 27 01:34:38 PM PST 23 Dec 27 01:34:39 PM PST 23 36816401 ps
T1305 /workspace/coverage/default/25.spi_device_pass_cmd_filtering.3472088953 Dec 27 01:32:57 PM PST 23 Dec 27 01:33:04 PM PST 23 1210532135 ps
T1306 /workspace/coverage/default/37.spi_device_read_buffer_direct.2426090014 Dec 27 01:35:50 PM PST 23 Dec 27 01:35:55 PM PST 23 1605098731 ps
T1307 /workspace/coverage/default/15.spi_device_perf.2805883476 Dec 27 01:32:06 PM PST 23 Dec 27 01:34:39 PM PST 23 37658563453 ps
T1308 /workspace/coverage/default/28.spi_device_tpm_all.2645738983 Dec 27 01:33:52 PM PST 23 Dec 27 01:34:06 PM PST 23 799222031 ps
T1309 /workspace/coverage/default/9.spi_device_tpm_rw.1370106334 Dec 27 01:31:13 PM PST 23 Dec 27 01:31:18 PM PST 23 311078598 ps
T1310 /workspace/coverage/default/15.spi_device_mem_parity.1434653606 Dec 27 01:31:30 PM PST 23 Dec 27 01:31:31 PM PST 23 25270993 ps
T1311 /workspace/coverage/default/41.spi_device_intercept.2546314520 Dec 27 01:37:23 PM PST 23 Dec 27 01:37:34 PM PST 23 13817889536 ps
T1312 /workspace/coverage/default/26.spi_device_intercept.3845361902 Dec 27 01:32:50 PM PST 23 Dec 27 01:32:57 PM PST 23 529394937 ps
T1313 /workspace/coverage/default/12.spi_device_perf.3665670630 Dec 27 01:32:18 PM PST 23 Dec 27 02:00:53 PM PST 23 111648658816 ps
T1314 /workspace/coverage/default/7.spi_device_ram_cfg.1127374191 Dec 27 01:30:47 PM PST 23 Dec 27 01:30:53 PM PST 23 33046974 ps
T1315 /workspace/coverage/default/0.spi_device_intercept.2695420935 Dec 27 01:30:19 PM PST 23 Dec 27 01:30:29 PM PST 23 1762176379 ps
T1316 /workspace/coverage/default/44.spi_device_dummy_item_extra_dly.2600566160 Dec 27 01:37:20 PM PST 23 Dec 27 01:54:10 PM PST 23 96598468134 ps
T1317 /workspace/coverage/default/23.spi_device_pass_addr_payload_swap.748851451 Dec 27 01:32:51 PM PST 23 Dec 27 01:32:58 PM PST 23 365364516 ps
T1318 /workspace/coverage/default/18.spi_device_flash_and_tpm_min_idle.3615237475 Dec 27 01:32:25 PM PST 23 Dec 27 01:34:13 PM PST 23 8144625758 ps
T1319 /workspace/coverage/default/5.spi_device_mailbox.3864363041 Dec 27 01:30:32 PM PST 23 Dec 27 01:30:49 PM PST 23 3977479374 ps
T1320 /workspace/coverage/default/6.spi_device_intr.2503928581 Dec 27 01:30:40 PM PST 23 Dec 27 01:32:30 PM PST 23 94807779361 ps
T1321 /workspace/coverage/default/20.spi_device_cfg_cmd.845036446 Dec 27 01:32:18 PM PST 23 Dec 27 01:32:37 PM PST 23 8989357102 ps
T1322 /workspace/coverage/default/22.spi_device_alert_test.145791409 Dec 27 01:32:51 PM PST 23 Dec 27 01:32:54 PM PST 23 24221397 ps
T1323 /workspace/coverage/default/43.spi_device_cfg_cmd.4147881124 Dec 27 01:37:08 PM PST 23 Dec 27 01:37:12 PM PST 23 150536096 ps
T1324 /workspace/coverage/default/7.spi_device_mem_parity.619380673 Dec 27 01:31:03 PM PST 23 Dec 27 01:31:05 PM PST 23 30444695 ps
T1325 /workspace/coverage/default/24.spi_device_stress_all.1797498312 Dec 27 01:33:34 PM PST 23 Dec 27 01:42:35 PM PST 23 90931477118 ps
T1326 /workspace/coverage/default/18.spi_device_ram_cfg.246501889 Dec 27 01:32:24 PM PST 23 Dec 27 01:32:34 PM PST 23 30047080 ps
T1327 /workspace/coverage/default/30.spi_device_mailbox.2231811543 Dec 27 01:33:38 PM PST 23 Dec 27 01:33:45 PM PST 23 1498830940 ps
T1328 /workspace/coverage/default/40.spi_device_flash_mode.97089935 Dec 27 01:37:30 PM PST 23 Dec 27 01:37:56 PM PST 23 18286305140 ps
T112 /workspace/coverage/default/3.spi_device_sec_cm.501684347 Dec 27 01:30:08 PM PST 23 Dec 27 01:30:14 PM PST 23 222502120 ps
T1329 /workspace/coverage/default/41.spi_device_tpm_rw.3519622399 Dec 27 01:36:47 PM PST 23 Dec 27 01:36:49 PM PST 23 21264037 ps
T1330 /workspace/coverage/default/37.spi_device_smoke.503937013 Dec 27 01:35:01 PM PST 23 Dec 27 01:35:06 PM PST 23 68795174 ps
T1331 /workspace/coverage/default/17.spi_device_perf.2482356415 Dec 27 01:31:48 PM PST 23 Dec 27 01:38:23 PM PST 23 18753769011 ps
T1332 /workspace/coverage/default/10.spi_device_abort.3468444617 Dec 27 01:31:46 PM PST 23 Dec 27 01:31:48 PM PST 23 60071767 ps
T1333 /workspace/coverage/default/8.spi_device_stress_all.3991019140 Dec 27 01:31:24 PM PST 23 Dec 27 01:36:47 PM PST 23 28958517481 ps
T1334 /workspace/coverage/default/45.spi_device_tx_async_fifo_reset.195950507 Dec 27 01:39:23 PM PST 23 Dec 27 01:39:25 PM PST 23 87367872 ps
T1335 /workspace/coverage/default/14.spi_device_byte_transfer.2411032600 Dec 27 01:31:33 PM PST 23 Dec 27 01:31:37 PM PST 23 1205402423 ps
T1336 /workspace/coverage/default/36.spi_device_tpm_all.1919397669 Dec 27 01:35:52 PM PST 23 Dec 27 01:39:00 PM PST 23 22993563188 ps
T1337 /workspace/coverage/default/39.spi_device_abort.848720875 Dec 27 01:35:51 PM PST 23 Dec 27 01:35:53 PM PST 23 17757331 ps
T1338 /workspace/coverage/default/0.spi_device_mem_parity.1223730264 Dec 27 01:30:01 PM PST 23 Dec 27 01:30:04 PM PST 23 117255728 ps
T1339 /workspace/coverage/default/29.spi_device_abort.2402761656 Dec 27 01:33:47 PM PST 23 Dec 27 01:33:48 PM PST 23 17477790 ps
T1340 /workspace/coverage/default/5.spi_device_upload.4147784384 Dec 27 01:30:23 PM PST 23 Dec 27 01:30:30 PM PST 23 973781051 ps
T1341 /workspace/coverage/default/20.spi_device_txrx.4228777185 Dec 27 01:32:17 PM PST 23 Dec 27 01:35:23 PM PST 23 27015123924 ps
T1342 /workspace/coverage/default/34.spi_device_tpm_sts_read.3020137069 Dec 27 01:34:35 PM PST 23 Dec 27 01:34:36 PM PST 23 524756638 ps
T1343 /workspace/coverage/default/46.spi_device_read_buffer_direct.4129232756 Dec 27 01:37:45 PM PST 23 Dec 27 01:37:57 PM PST 23 7628280709 ps
T1344 /workspace/coverage/default/25.spi_device_smoke.2385789927 Dec 27 01:33:21 PM PST 23 Dec 27 01:33:23 PM PST 23 158034817 ps
T1345 /workspace/coverage/default/8.spi_device_intercept.1797968251 Dec 27 01:31:09 PM PST 23 Dec 27 01:31:26 PM PST 23 19818582767 ps
T1346 /workspace/coverage/default/15.spi_device_byte_transfer.812662813 Dec 27 01:31:42 PM PST 23 Dec 27 01:31:45 PM PST 23 160025682 ps
T1347 /workspace/coverage/default/18.spi_device_upload.2982730939 Dec 27 01:32:34 PM PST 23 Dec 27 01:32:43 PM PST 23 212401082 ps
T1348 /workspace/coverage/default/24.spi_device_bit_transfer.2713029067 Dec 27 01:33:34 PM PST 23 Dec 27 01:33:38 PM PST 23 148883949 ps
T324 /workspace/coverage/default/45.spi_device_flash_and_tpm.657885890 Dec 27 01:38:34 PM PST 23 Dec 27 01:44:56 PM PST 23 99068848293 ps
T1349 /workspace/coverage/default/39.spi_device_flash_and_tpm.321306600 Dec 27 01:36:20 PM PST 23 Dec 27 01:39:46 PM PST 23 101825994574 ps
T1350 /workspace/coverage/default/39.spi_device_read_buffer_direct.589769731 Dec 27 01:36:29 PM PST 23 Dec 27 01:36:34 PM PST 23 339690304 ps
T1351 /workspace/coverage/default/26.spi_device_flash_and_tpm_min_idle.3370980999 Dec 27 01:33:16 PM PST 23 Dec 27 01:34:57 PM PST 23 7842983215 ps
T1352 /workspace/coverage/default/45.spi_device_pass_addr_payload_swap.3794752999 Dec 27 01:37:50 PM PST 23 Dec 27 01:38:00 PM PST 23 8972068126 ps
T1353 /workspace/coverage/default/39.spi_device_tpm_read_hw_reg.2328524871 Dec 27 01:36:09 PM PST 23 Dec 27 01:36:20 PM PST 23 5355164470 ps
T1354 /workspace/coverage/default/19.spi_device_flash_mode.838938925 Dec 27 01:32:38 PM PST 23 Dec 27 01:33:11 PM PST 23 9921417505 ps
T1355 /workspace/coverage/default/16.spi_device_flash_all.3250107407 Dec 27 01:32:20 PM PST 23 Dec 27 01:33:21 PM PST 23 124123281657 ps
T1356 /workspace/coverage/default/23.spi_device_mailbox.3090182494 Dec 27 01:32:33 PM PST 23 Dec 27 01:33:11 PM PST 23 86397425015 ps
T1357 /workspace/coverage/default/30.spi_device_intr.1188668265 Dec 27 01:33:33 PM PST 23 Dec 27 01:35:52 PM PST 23 118396511842 ps
T1358 /workspace/coverage/default/2.spi_device_flash_all.3038869395 Dec 27 01:30:44 PM PST 23 Dec 27 01:31:56 PM PST 23 15156834097 ps
T1359 /workspace/coverage/default/32.spi_device_dummy_item_extra_dly.1146260201 Dec 27 01:34:07 PM PST 23 Dec 27 01:48:13 PM PST 23 82533819689 ps
T1360 /workspace/coverage/default/22.spi_device_byte_transfer.3790915587 Dec 27 01:32:39 PM PST 23 Dec 27 01:32:44 PM PST 23 156849920 ps
T1361 /workspace/coverage/default/1.spi_device_cfg_cmd.909969577 Dec 27 01:30:26 PM PST 23 Dec 27 01:30:39 PM PST 23 3393621926 ps
T1362 /workspace/coverage/default/31.spi_device_bit_transfer.2284519742 Dec 27 01:33:34 PM PST 23 Dec 27 01:33:38 PM PST 23 824667007 ps
T1363 /workspace/coverage/default/36.spi_device_abort.3823410398 Dec 27 01:36:14 PM PST 23 Dec 27 01:36:15 PM PST 23 149944431 ps
T1364 /workspace/coverage/default/14.spi_device_mailbox.3021826841 Dec 27 01:32:13 PM PST 23 Dec 27 01:32:25 PM PST 23 939707054 ps
T1365 /workspace/coverage/default/12.spi_device_flash_and_tpm.174035556 Dec 27 01:32:19 PM PST 23 Dec 27 01:33:25 PM PST 23 14818546345 ps
T1366 /workspace/coverage/default/8.spi_device_cfg_cmd.1765924766 Dec 27 01:31:34 PM PST 23 Dec 27 01:31:41 PM PST 23 2085422365 ps
T333 /workspace/coverage/default/32.spi_device_stress_all.1443392501 Dec 27 01:33:38 PM PST 23 Dec 27 01:53:46 PM PST 23 135163702547 ps
T1367 /workspace/coverage/default/11.spi_device_cfg_cmd.177940345 Dec 27 01:31:04 PM PST 23 Dec 27 01:31:12 PM PST 23 16323153374 ps
T1368 /workspace/coverage/default/12.spi_device_csb_read.466704248 Dec 27 01:32:27 PM PST 23 Dec 27 01:32:37 PM PST 23 18740320 ps
T1369 /workspace/coverage/default/42.spi_device_extreme_fifo_size.1915120683 Dec 27 01:37:32 PM PST 23 Dec 27 01:52:35 PM PST 23 1078015705311 ps
T1370 /workspace/coverage/default/44.spi_device_fifo_underflow_overflow.3720557904 Dec 27 01:38:00 PM PST 23 Dec 27 01:40:24 PM PST 23 44613264963 ps
T1371 /workspace/coverage/default/1.spi_device_perf.493500380 Dec 27 01:30:08 PM PST 23 Dec 27 01:36:43 PM PST 23 20697124430 ps
T1372 /workspace/coverage/default/10.spi_device_pass_cmd_filtering.2883973111 Dec 27 01:32:12 PM PST 23 Dec 27 01:32:23 PM PST 23 2323363372 ps
T1373 /workspace/coverage/default/36.spi_device_extreme_fifo_size.104036156 Dec 27 01:35:52 PM PST 23 Dec 27 01:49:26 PM PST 23 301629359670 ps
T1374 /workspace/coverage/default/10.spi_device_flash_mode.997219814 Dec 27 01:32:30 PM PST 23 Dec 27 01:32:45 PM PST 23 1682365021 ps
T1375 /workspace/coverage/default/7.spi_device_rx_timeout.1853901026 Dec 27 01:30:54 PM PST 23 Dec 27 01:30:59 PM PST 23 1207182984 ps
T1376 /workspace/coverage/default/9.spi_device_upload.1027063382 Dec 27 01:31:22 PM PST 23 Dec 27 01:31:54 PM PST 23 10341074908 ps
T1377 /workspace/coverage/default/8.spi_device_fifo_full.1311752119 Dec 27 01:32:14 PM PST 23 Dec 27 01:44:58 PM PST 23 66421030590 ps
T1378 /workspace/coverage/default/7.spi_device_flash_mode.1654090815 Dec 27 01:31:04 PM PST 23 Dec 27 01:31:11 PM PST 23 3010328375 ps
T1379 /workspace/coverage/default/8.spi_device_tx_async_fifo_reset.2115425933 Dec 27 01:30:54 PM PST 23 Dec 27 01:30:55 PM PST 23 219475920 ps
T1380 /workspace/coverage/default/43.spi_device_read_buffer_direct.2728454377 Dec 27 01:37:22 PM PST 23 Dec 27 01:37:26 PM PST 23 334267583 ps
T1381 /workspace/coverage/default/22.spi_device_tpm_all.1054857108 Dec 27 01:32:21 PM PST 23 Dec 27 01:32:33 PM PST 23 422913459 ps
T1382 /workspace/coverage/default/14.spi_device_tpm_sts_read.242671656 Dec 27 01:31:39 PM PST 23 Dec 27 01:31:41 PM PST 23 116623556 ps
T1383 /workspace/coverage/default/37.spi_device_bit_transfer.2832322869 Dec 27 01:35:06 PM PST 23 Dec 27 01:35:14 PM PST 23 1130288919 ps
T1384 /workspace/coverage/default/38.spi_device_pass_addr_payload_swap.525819893 Dec 27 01:36:16 PM PST 23 Dec 27 01:36:48 PM PST 23 44265411224 ps
T1385 /workspace/coverage/default/48.spi_device_flash_and_tpm.1417902997 Dec 27 01:37:56 PM PST 23 Dec 27 01:39:18 PM PST 23 7799830886 ps
T1386 /workspace/coverage/default/38.spi_device_pass_cmd_filtering.350087946 Dec 27 01:36:00 PM PST 23 Dec 27 01:36:07 PM PST 23 1424723966 ps
T1387 /workspace/coverage/default/11.spi_device_mailbox.2739553700 Dec 27 01:31:37 PM PST 23 Dec 27 01:31:43 PM PST 23 3954735132 ps
T1388 /workspace/coverage/default/26.spi_device_cfg_cmd.3709174973 Dec 27 01:32:57 PM PST 23 Dec 27 01:33:04 PM PST 23 788669378 ps
T1389 /workspace/coverage/default/35.spi_device_intercept.252954747 Dec 27 01:34:57 PM PST 23 Dec 27 01:35:00 PM PST 23 188493363 ps
T1390 /workspace/coverage/default/48.spi_device_pass_addr_payload_swap.3222058645 Dec 27 01:37:57 PM PST 23 Dec 27 01:38:11 PM PST 23 2559680728 ps
T1391 /workspace/coverage/default/27.spi_device_tpm_read_hw_reg.489058463 Dec 27 01:33:51 PM PST 23 Dec 27 01:34:01 PM PST 23 3030244203 ps
T1392 /workspace/coverage/default/10.spi_device_mem_parity.243087126 Dec 27 01:31:53 PM PST 23 Dec 27 01:31:54 PM PST 23 55984341 ps
T1393 /workspace/coverage/default/16.spi_device_perf.1902765046 Dec 27 01:32:12 PM PST 23 Dec 27 01:50:34 PM PST 23 31736536888 ps
T1394 /workspace/coverage/default/1.spi_device_extreme_fifo_size.1587614518 Dec 27 01:30:03 PM PST 23 Dec 27 01:50:01 PM PST 23 71199591409 ps
T1395 /workspace/coverage/default/6.spi_device_fifo_full.1639097849 Dec 27 01:30:33 PM PST 23 Dec 27 01:39:27 PM PST 23 37938301276 ps
T1396 /workspace/coverage/default/36.spi_device_pass_cmd_filtering.629041085 Dec 27 01:36:03 PM PST 23 Dec 27 01:36:14 PM PST 23 4939484472 ps
T1397 /workspace/coverage/default/23.spi_device_pass_cmd_filtering.3170959200 Dec 27 01:33:19 PM PST 23 Dec 27 01:33:28 PM PST 23 2433105405 ps
T1398 /workspace/coverage/default/40.spi_device_dummy_item_extra_dly.342219533 Dec 27 01:36:22 PM PST 23 Dec 27 01:42:44 PM PST 23 47911271304 ps
T1399 /workspace/coverage/default/5.spi_device_txrx.29274028 Dec 27 01:30:41 PM PST 23 Dec 27 01:36:58 PM PST 23 42689021799 ps
T1400 /workspace/coverage/default/28.spi_device_cfg_cmd.2713446940 Dec 27 01:33:55 PM PST 23 Dec 27 01:33:59 PM PST 23 318200192 ps
T1401 /workspace/coverage/default/4.spi_device_fifo_full.3420056503 Dec 27 01:30:46 PM PST 23 Dec 27 01:34:17 PM PST 23 43657105826 ps
T1402 /workspace/coverage/default/32.spi_device_byte_transfer.814741368 Dec 27 01:33:53 PM PST 23 Dec 27 01:33:58 PM PST 23 307214015 ps
T1403 /workspace/coverage/default/47.spi_device_fifo_underflow_overflow.3828047101 Dec 27 01:37:57 PM PST 23 Dec 27 01:48:37 PM PST 23 233348292968 ps
T1404 /workspace/coverage/default/42.spi_device_dummy_item_extra_dly.2861245706 Dec 27 01:37:32 PM PST 23 Dec 27 01:39:40 PM PST 23 164007374752 ps
T1405 /workspace/coverage/default/42.spi_device_read_buffer_direct.705150872 Dec 27 01:37:00 PM PST 23 Dec 27 01:37:05 PM PST 23 925808417 ps
T1406 /workspace/coverage/default/11.spi_device_tx_async_fifo_reset.1646423247 Dec 27 01:32:16 PM PST 23 Dec 27 01:32:24 PM PST 23 71057036 ps
T1407 /workspace/coverage/default/26.spi_device_tpm_read_hw_reg.358874379 Dec 27 01:33:15 PM PST 23 Dec 27 01:33:18 PM PST 23 216321449 ps
T1408 /workspace/coverage/default/37.spi_device_intercept.1828534288 Dec 27 01:35:58 PM PST 23 Dec 27 01:36:01 PM PST 23 139515711 ps
T1409 /workspace/coverage/default/31.spi_device_flash_and_tpm.2715075153 Dec 27 01:34:11 PM PST 23 Dec 27 01:34:23 PM PST 23 1201631447 ps
T1410 /workspace/coverage/default/16.spi_device_pass_addr_payload_swap.305855996 Dec 27 01:32:18 PM PST 23 Dec 27 01:32:33 PM PST 23 1407119679 ps
T1411 /workspace/coverage/default/6.spi_device_bit_transfer.3213592135 Dec 27 01:30:50 PM PST 23 Dec 27 01:30:52 PM PST 23 180644572 ps
T1412 /workspace/coverage/default/17.spi_device_abort.1889556483 Dec 27 01:32:26 PM PST 23 Dec 27 01:32:34 PM PST 23 26605222 ps
T1413 /workspace/coverage/default/43.spi_device_upload.3535803645 Dec 27 01:37:48 PM PST 23 Dec 27 01:38:16 PM PST 23 6793867800 ps
T1414 /workspace/coverage/default/21.spi_device_fifo_underflow_overflow.103052897 Dec 27 01:32:31 PM PST 23 Dec 27 01:47:09 PM PST 23 110668351343 ps
T1415 /workspace/coverage/default/44.spi_device_tpm_read_hw_reg.1873230038 Dec 27 01:37:37 PM PST 23 Dec 27 01:37:46 PM PST 23 342015227 ps
T1416 /workspace/coverage/default/30.spi_device_pass_cmd_filtering.2357307951 Dec 27 01:33:46 PM PST 23 Dec 27 01:34:09 PM PST 23 32158405733 ps
T1417 /workspace/coverage/default/29.spi_device_intercept.3982111204 Dec 27 01:33:56 PM PST 23 Dec 27 01:34:00 PM PST 23 590646173 ps
T1418 /workspace/coverage/default/23.spi_device_rx_timeout.621846787 Dec 27 01:32:48 PM PST 23 Dec 27 01:32:58 PM PST 23 4044737756 ps
T1419 /workspace/coverage/default/27.spi_device_smoke.2589331461 Dec 27 01:33:16 PM PST 23 Dec 27 01:33:19 PM PST 23 72926568 ps
T1420 /workspace/coverage/default/17.spi_device_flash_mode.2218402165 Dec 27 01:32:20 PM PST 23 Dec 27 01:32:38 PM PST 23 3750664142 ps
T1421 /workspace/coverage/default/10.spi_device_flash_and_tpm_min_idle.65269763 Dec 27 01:32:34 PM PST 23 Dec 27 01:35:03 PM PST 23 67188222769 ps
T1422 /workspace/coverage/default/20.spi_device_abort.3543402427 Dec 27 01:32:12 PM PST 23 Dec 27 01:32:19 PM PST 23 16097825 ps
T1423 /workspace/coverage/default/8.spi_device_rx_async_fifo_reset.735752566 Dec 27 01:31:10 PM PST 23 Dec 27 01:31:11 PM PST 23 163585790 ps
T1424 /workspace/coverage/default/19.spi_device_upload.3327135044 Dec 27 01:32:32 PM PST 23 Dec 27 01:32:49 PM PST 23 8327656807 ps
T1425 /workspace/coverage/default/6.spi_device_pass_addr_payload_swap.401996356 Dec 27 01:30:55 PM PST 23 Dec 27 01:30:59 PM PST 23 399674674 ps
T1426 /workspace/coverage/default/38.spi_device_flash_mode.594402452 Dec 27 01:35:54 PM PST 23 Dec 27 01:36:07 PM PST 23 327030677 ps
T1427 /workspace/coverage/default/17.spi_device_bit_transfer.2616349576 Dec 27 01:32:24 PM PST 23 Dec 27 01:32:36 PM PST 23 259006843 ps
T1428 /workspace/coverage/default/45.spi_device_flash_all.1901037464 Dec 27 01:38:26 PM PST 23 Dec 27 01:40:13 PM PST 23 25409325115 ps
T1429 /workspace/coverage/default/13.spi_device_ram_cfg.1756656152 Dec 27 01:32:28 PM PST 23 Dec 27 01:32:35 PM PST 23 22074628 ps
T1430 /workspace/coverage/default/17.spi_device_intercept.4035569945 Dec 27 01:32:13 PM PST 23 Dec 27 01:32:25 PM PST 23 118147785 ps
T1431 /workspace/coverage/default/16.spi_device_tx_async_fifo_reset.353962503 Dec 27 01:32:24 PM PST 23 Dec 27 01:32:33 PM PST 23 54695119 ps
T1432 /workspace/coverage/default/4.spi_device_flash_all.3374330086 Dec 27 01:30:43 PM PST 23 Dec 27 01:31:34 PM PST 23 9446140710 ps
T1433 /workspace/coverage/default/5.spi_device_flash_all.1876311866 Dec 27 01:30:26 PM PST 23 Dec 27 01:30:34 PM PST 23 363472417 ps
T1434 /workspace/coverage/default/29.spi_device_tx_async_fifo_reset.4258588305 Dec 27 01:33:22 PM PST 23 Dec 27 01:33:24 PM PST 23 13010891 ps
T1435 /workspace/coverage/default/3.spi_device_flash_mode.3526644727 Dec 27 01:30:18 PM PST 23 Dec 27 01:30:42 PM PST 23 9437354648 ps
T1436 /workspace/coverage/default/12.spi_device_pass_addr_payload_swap.1059015984 Dec 27 01:32:19 PM PST 23 Dec 27 01:32:32 PM PST 23 673088606 ps
T1437 /workspace/coverage/default/32.spi_device_flash_all.3929696935 Dec 27 01:34:08 PM PST 23 Dec 27 01:38:17 PM PST 23 52631178197 ps
T1438 /workspace/coverage/default/22.spi_device_tx_async_fifo_reset.1532067524 Dec 27 01:32:16 PM PST 23 Dec 27 01:32:24 PM PST 23 17375656 ps
T1439 /workspace/coverage/default/32.spi_device_tpm_read_hw_reg.306951598 Dec 27 01:33:55 PM PST 23 Dec 27 01:33:58 PM PST 23 182657637 ps
T1440 /workspace/coverage/default/30.spi_device_perf.490935474 Dec 27 01:33:38 PM PST 23 Dec 27 01:41:22 PM PST 23 65778998042 ps
T1441 /workspace/coverage/default/40.spi_device_mailbox.304418587 Dec 27 01:36:50 PM PST 23 Dec 27 01:37:16 PM PST 23 7645069521 ps
T1442 /workspace/coverage/default/42.spi_device_tpm_rw.2148240486 Dec 27 01:36:56 PM PST 23 Dec 27 01:36:58 PM PST 23 137846540 ps
T1443 /workspace/coverage/default/0.spi_device_pass_addr_payload_swap.710762763 Dec 27 01:30:14 PM PST 23 Dec 27 01:30:26 PM PST 23 6065946206 ps
T329 /workspace/coverage/default/37.spi_device_flash_all.1087578271 Dec 27 01:36:19 PM PST 23 Dec 27 01:43:41 PM PST 23 126910847203 ps
T1444 /workspace/coverage/default/34.spi_device_perf.2896492685 Dec 27 01:35:30 PM PST 23 Dec 27 01:37:53 PM PST 23 18248939735 ps
T1445 /workspace/coverage/default/1.spi_device_dummy_item_extra_dly.4022726412 Dec 27 01:30:18 PM PST 23 Dec 27 01:32:09 PM PST 23 51268960780 ps
T1446 /workspace/coverage/default/2.spi_device_pass_addr_payload_swap.4008393723 Dec 27 01:30:26 PM PST 23 Dec 27 01:30:32 PM PST 23 2173936095 ps
T1447 /workspace/coverage/default/30.spi_device_stress_all.2908475963 Dec 27 01:33:46 PM PST 23 Dec 27 03:31:51 PM PST 23 546869814242 ps
T1448 /workspace/coverage/default/36.spi_device_fifo_full.3179171445 Dec 27 01:35:09 PM PST 23 Dec 27 01:42:55 PM PST 23 57183499414 ps
T1449 /workspace/coverage/default/16.spi_device_intercept.2481875087 Dec 27 01:32:29 PM PST 23 Dec 27 01:32:38 PM PST 23 174982876 ps
T1450 /workspace/coverage/default/0.spi_device_abort.2695354883 Dec 27 01:30:27 PM PST 23 Dec 27 01:30:29 PM PST 23 43465812 ps
T1451 /workspace/coverage/default/9.spi_device_intercept.3236822861 Dec 27 01:31:08 PM PST 23 Dec 27 01:31:24 PM PST 23 17244195798 ps
T1452 /workspace/coverage/default/38.spi_device_dummy_item_extra_dly.590881194 Dec 27 01:35:46 PM PST 23 Dec 27 01:40:39 PM PST 23 41417887296 ps
T1453 /workspace/coverage/default/38.spi_device_rx_async_fifo_reset.1227778886 Dec 27 01:35:53 PM PST 23 Dec 27 01:35:55 PM PST 23 51734660 ps
T1454 /workspace/coverage/default/18.spi_device_flash_and_tpm.3069023010 Dec 27 01:32:29 PM PST 23 Dec 27 01:34:42 PM PST 23 50780909114 ps
T1455 /workspace/coverage/default/0.spi_device_perf.3075435973 Dec 27 01:30:04 PM PST 23 Dec 27 01:43:05 PM PST 23 46864473846 ps
T1456 /workspace/coverage/default/48.spi_device_tpm_rw.385787797 Dec 27 01:37:55 PM PST 23 Dec 27 01:37:59 PM PST 23 36618676 ps
T1457 /workspace/coverage/default/8.spi_device_csb_read.2446991762 Dec 27 01:31:34 PM PST 23 Dec 27 01:31:35 PM PST 23 93775348 ps
T1458 /workspace/coverage/default/16.spi_device_pass_cmd_filtering.1759178669 Dec 27 01:32:17 PM PST 23 Dec 27 01:32:37 PM PST 23 23846839004 ps
T1459 /workspace/coverage/default/34.spi_device_csb_read.1153160973 Dec 27 01:35:47 PM PST 23 Dec 27 01:35:48 PM PST 23 21514931 ps
T1460 /workspace/coverage/default/21.spi_device_upload.3255865613 Dec 27 01:32:37 PM PST 23 Dec 27 01:32:44 PM PST 23 11761503901 ps
T1461 /workspace/coverage/default/10.spi_device_byte_transfer.2832257921 Dec 27 01:31:50 PM PST 23 Dec 27 01:31:53 PM PST 23 174941595 ps
T1462 /workspace/coverage/default/6.spi_device_fifo_underflow_overflow.3077689638 Dec 27 01:30:39 PM PST 23 Dec 27 01:35:13 PM PST 23 16737170306 ps
T1463 /workspace/coverage/default/46.spi_device_txrx.179778564 Dec 27 01:37:40 PM PST 23 Dec 27 01:43:10 PM PST 23 45198288294 ps
T1464 /workspace/coverage/default/5.spi_device_rx_async_fifo_reset.1202283893 Dec 27 01:30:48 PM PST 23 Dec 27 01:30:49 PM PST 23 56602420 ps
T1465 /workspace/coverage/default/48.spi_device_fifo_underflow_overflow.2183633421 Dec 27 01:37:51 PM PST 23 Dec 27 01:46:51 PM PST 23 62116328245 ps
T1466 /workspace/coverage/default/32.spi_device_tpm_rw.1924005705 Dec 27 01:34:08 PM PST 23 Dec 27 01:34:11 PM PST 23 68951419 ps
T1467 /workspace/coverage/default/14.spi_device_rx_timeout.1886700996 Dec 27 01:31:49 PM PST 23 Dec 27 01:31:56 PM PST 23 610413784 ps
T1468 /workspace/coverage/default/18.spi_device_fifo_underflow_overflow.1798818302 Dec 27 01:32:07 PM PST 23 Dec 27 01:41:32 PM PST 23 184887243989 ps
T1469 /workspace/coverage/default/36.spi_device_rx_timeout.1932349195 Dec 27 01:35:59 PM PST 23 Dec 27 01:36:04 PM PST 23 3763136230 ps
T1470 /workspace/coverage/default/25.spi_device_read_buffer_direct.3750565396 Dec 27 01:32:53 PM PST 23 Dec 27 01:33:04 PM PST 23 34652214838 ps
T1471 /workspace/coverage/default/31.spi_device_rx_timeout.1832810105 Dec 27 01:34:10 PM PST 23 Dec 27 01:34:17 PM PST 23 670046676 ps
T1472 /workspace/coverage/default/43.spi_device_flash_and_tpm_min_idle.810274738 Dec 27 01:37:27 PM PST 23 Dec 27 01:39:35 PM PST 23 5452587195 ps
T1473 /workspace/coverage/default/14.spi_device_cfg_cmd.3656749554 Dec 27 01:32:17 PM PST 23 Dec 27 01:32:27 PM PST 23 818260821 ps
T1474 /workspace/coverage/default/6.spi_device_mem_parity.2343640861 Dec 27 01:30:40 PM PST 23 Dec 27 01:30:42 PM PST 23 26220590 ps
T1475 /workspace/coverage/default/34.spi_device_fifo_underflow_overflow.940854349 Dec 27 01:34:35 PM PST 23 Dec 27 01:37:51 PM PST 23 37683830034 ps
T334 /workspace/coverage/default/33.spi_device_flash_and_tpm_min_idle.2135741594 Dec 27 01:35:45 PM PST 23 Dec 27 01:37:56 PM PST 23 55845791995 ps
T1476 /workspace/coverage/default/6.spi_device_flash_mode.3304187494 Dec 27 01:30:56 PM PST 23 Dec 27 01:31:28 PM PST 23 21417192938 ps
T1477 /workspace/coverage/default/42.spi_device_smoke.375275848 Dec 27 01:37:01 PM PST 23 Dec 27 01:37:02 PM PST 23 43649456 ps
T1478 /workspace/coverage/default/2.spi_device_dummy_item_extra_dly.2472881611 Dec 27 01:30:19 PM PST 23 Dec 27 01:35:18 PM PST 23 136667884343 ps
T1479 /workspace/coverage/default/6.spi_device_tpm_read_hw_reg.2407299471 Dec 27 01:30:44 PM PST 23 Dec 27 01:30:49 PM PST 23 3844684074 ps
T1480 /workspace/coverage/default/22.spi_device_txrx.3660190900 Dec 27 01:32:16 PM PST 23 Dec 27 01:34:05 PM PST 23 120849874109 ps
T1481 /workspace/coverage/default/27.spi_device_bit_transfer.2917584080 Dec 27 01:33:21 PM PST 23 Dec 27 01:33:25 PM PST 23 177088336 ps
T1482 /workspace/coverage/default/23.spi_device_txrx.2806695020 Dec 27 01:32:32 PM PST 23 Dec 27 01:38:31 PM PST 23 89549039246 ps
T1483 /workspace/coverage/default/23.spi_device_csb_read.2531269089 Dec 27 01:32:34 PM PST 23 Dec 27 01:32:38 PM PST 23 53237521 ps
T1484 /workspace/coverage/default/38.spi_device_tpm_all.3293169268 Dec 27 01:36:00 PM PST 23 Dec 27 01:38:40 PM PST 23 68321769760 ps
T1485 /workspace/coverage/default/27.spi_device_txrx.358894521 Dec 27 01:33:19 PM PST 23 Dec 27 01:36:59 PM PST 23 20482720789 ps
T1486 /workspace/coverage/default/19.spi_device_ram_cfg.3964140633 Dec 27 01:32:22 PM PST 23 Dec 27 01:32:32 PM PST 23 31449591 ps
T1487 /workspace/coverage/default/31.spi_device_alert_test.3930101272 Dec 27 01:33:39 PM PST 23 Dec 27 01:33:41 PM PST 23 20333312 ps
T1488 /workspace/coverage/default/10.spi_device_flash_and_tpm.2942691958 Dec 27 01:31:28 PM PST 23 Dec 27 01:33:39 PM PST 23 16711476026 ps
T1489 /workspace/coverage/default/34.spi_device_tx_async_fifo_reset.3246986060 Dec 27 01:34:32 PM PST 23 Dec 27 01:34:33 PM PST 23 17120549 ps
T1490 /workspace/coverage/default/4.spi_device_flash_and_tpm_min_idle.1401116937 Dec 27 01:30:23 PM PST 23 Dec 27 01:33:54 PM PST 23 21798354606 ps
T1491 /workspace/coverage/default/17.spi_device_tx_async_fifo_reset.2635006737 Dec 27 01:32:42 PM PST 23 Dec 27 01:32:44 PM PST 23 37124755 ps
T336 /workspace/coverage/default/32.spi_device_flash_and_tpm.2966671150 Dec 27 01:34:28 PM PST 23 Dec 27 01:37:20 PM PST 23 54833066068 ps
T1492 /workspace/coverage/default/30.spi_device_read_buffer_direct.542914577 Dec 27 01:34:09 PM PST 23 Dec 27 01:34:13 PM PST 23 126609299 ps
T1493 /workspace/coverage/default/1.spi_device_tpm_rw.2676578964 Dec 27 01:30:01 PM PST 23 Dec 27 01:30:11 PM PST 23 494720521 ps
T1494 /workspace/coverage/default/30.spi_device_byte_transfer.3460114660 Dec 27 01:34:12 PM PST 23 Dec 27 01:34:16 PM PST 23 910306039 ps
T1495 /workspace/coverage/default/19.spi_device_tpm_all.3947362850 Dec 27 01:32:20 PM PST 23 Dec 27 01:33:05 PM PST 23 3736904346 ps
T1496 /workspace/coverage/default/29.spi_device_read_buffer_direct.1993914782 Dec 27 01:33:55 PM PST 23 Dec 27 01:34:00 PM PST 23 144161931 ps
T1497 /workspace/coverage/default/5.spi_device_tpm_read_hw_reg.3842577004 Dec 27 01:30:22 PM PST 23 Dec 27 01:30:34 PM PST 23 2432318576 ps
T1498 /workspace/coverage/default/24.spi_device_flash_mode.4248225144 Dec 27 01:33:21 PM PST 23 Dec 27 01:33:57 PM PST 23 14851558248 ps
T1499 /workspace/coverage/default/5.spi_device_perf.3705161449 Dec 27 01:30:34 PM PST 23 Dec 27 01:36:47 PM PST 23 36067342975 ps
T1500 /workspace/coverage/default/13.spi_device_byte_transfer.2901904041 Dec 27 01:32:18 PM PST 23 Dec 27 01:32:26 PM PST 23 770259062 ps
T1501 /workspace/coverage/default/47.spi_device_abort.3885807306 Dec 27 01:37:38 PM PST 23 Dec 27 01:37:45 PM PST 23 54526537 ps
T1502 /workspace/coverage/default/41.spi_device_fifo_underflow_overflow.4005895107 Dec 27 01:36:56 PM PST 23 Dec 27 01:45:02 PM PST 23 69659090602 ps
T325 /workspace/coverage/default/6.spi_device_stress_all.1624119953 Dec 27 01:30:58 PM PST 23 Dec 27 02:02:04 PM PST 23 743911908312 ps
T1503 /workspace/coverage/default/21.spi_device_pass_addr_payload_swap.768095028 Dec 27 01:32:05 PM PST 23 Dec 27 01:32:12 PM PST 23 580863356 ps
T1504 /workspace/coverage/default/22.spi_device_stress_all.596030744 Dec 27 01:32:22 PM PST 23 Dec 27 01:48:30 PM PST 23 266436696178 ps
T1505 /workspace/coverage/default/19.spi_device_abort.1525762257 Dec 27 01:32:25 PM PST 23 Dec 27 01:32:34 PM PST 23 30699463 ps
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