Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_spi_device_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_spi_device_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_spi_device_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_spi_device_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_spi_device_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	154059208	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

18774863

1

T1

30406

T4

1082

T2

207

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	160858701	1			T1	74839		T4	20		T2	686
values[0x0]	5987162	1			T1	8658		T4	505		T2	77
values[0x1]	5988208	1			T1	8644		T4	578		T2	84

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	78454826	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

94379245

1

T1

61167

T4

1090

T2

503

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	653332	1			T1	127		T3	463		T7	722
valid_sources[0x01]	645166	1			T1	5		T3	430		T7	1230
valid_sources[0x02]	665435	1			T1	93		T3	599		T13	2
valid_sources[0x03]	819680	1			T1	35		T3	610		T7	272
valid_sources[0x04]	642666	1			T1	335		T3	499		T7	42
valid_sources[0x05]	685503	1			T1	16		T3	464		T7	5579
valid_sources[0x06]	656378	1			T1	1093		T3	473		T7	321
valid_sources[0x07]	650772	1			T1	200		T3	556		T7	19
valid_sources[0x08]	644274	1			T1	214		T3	458		T7	294
valid_sources[0x09]	689312	1			T1	122		T3	538		T7	2184
valid_sources[0x0a]	652489	1			T1	2		T3	701		T7	3100
valid_sources[0x0b]	696764	1			T1	8		T3	550		T7	416
valid_sources[0x0c]	718022	1			T1	119		T2	18		T3	516
valid_sources[0x0d]	692394	1			T1	452		T3	583		T7	20
valid_sources[0x0e]	683688	1			T1	89		T3	513		T13	478
valid_sources[0x0f]	671867	1			T1	309		T3	635		T13	805
valid_sources[0x10]	679752	1			T1	94		T3	556		T7	489
valid_sources[0x11]	717629	1			T1	553		T3	596		T7	3280
valid_sources[0x12]	650712	1			T1	7		T3	486		T7	1430
valid_sources[0x13]	676508	1			T1	366		T3	595		T13	1
valid_sources[0x14]	641934	1			T3	609		T7	307		T9	3
valid_sources[0x15]	675828	1			T1	547		T3	546		T7	19
valid_sources[0x16]	712484	1			T1	114		T3	552		T13	101
valid_sources[0x17]	650478	1			T1	3		T3	608		T7	59
valid_sources[0x18]	658811	1			T1	1125		T3	536		T13	552
valid_sources[0x19]	636623	1			T1	167		T3	546		T7	765
valid_sources[0x1a]	638838	1			T1	67		T3	490		T7	1484
valid_sources[0x1b]	793832	1			T1	107		T3	700		T13	596
valid_sources[0x1c]	648912	1			T1	343		T3	570		T7	2179
valid_sources[0x1d]	660122	1			T1	35		T3	533		T7	471
valid_sources[0x1e]	654839	1			T1	2182		T3	580		T13	1183
valid_sources[0x1f]	632737	1			T1	1256		T3	520		T7	239
valid_sources[0x20]	649525	1			T1	635		T2	1		T3	566
valid_sources[0x21]	672037	1			T1	79		T3	500		T7	1354
valid_sources[0x22]	701475	1			T1	8		T3	507		T7	1578
valid_sources[0x23]	637843	1			T1	52		T3	689		T7	70
valid_sources[0x24]	659630	1			T1	2643		T3	553		T7	1204
valid_sources[0x25]	655059	1			T1	53		T2	16		T3	469
valid_sources[0x26]	650135	1			T1	479		T3	612		T7	1354
valid_sources[0x27]	649385	1			T1	48		T2	34		T3	570
valid_sources[0x28]	679203	1			T3	448		T7	140		T9	2
valid_sources[0x29]	649298	1			T1	286		T2	17		T3	423
valid_sources[0x2a]	677167	1			T1	911		T2	34		T3	646
valid_sources[0x2b]	659579	1			T1	50		T3	499		T13	5
valid_sources[0x2c]	635058	1			T1	93		T3	535		T7	465
valid_sources[0x2d]	680334	1			T2	18		T3	553		T13	2
valid_sources[0x2e]	638036	1			T1	152		T2	11		T3	510
valid_sources[0x2f]	636489	1			T1	557		T2	1		T3	782
valid_sources[0x30]	655721	1			T3	537		T7	2631		T9	1
valid_sources[0x31]	652119	1			T1	5		T3	450		T7	107
valid_sources[0x32]	634045	1			T1	57		T3	511		T13	1
valid_sources[0x33]	667154	1			T1	1966		T2	1		T3	618
valid_sources[0x34]	702107	1			T1	143		T2	1		T3	511
valid_sources[0x35]	666846	1			T1	846		T3	598		T13	1
valid_sources[0x36]	641357	1			T1	197		T3	545		T13	1
valid_sources[0x37]	643424	1			T1	588		T2	17		T3	533
valid_sources[0x38]	667711	1			T1	1802		T3	641		T7	430
valid_sources[0x39]	685407	1			T1	481		T2	35		T3	489
valid_sources[0x3a]	676723	1			T3	503		T7	91		T9	15
valid_sources[0x3b]	663328	1			T1	136		T3	680		T7	3484
valid_sources[0x3c]	785137	1			T1	414		T3	594		T13	163
valid_sources[0x3d]	646281	1			T1	10		T3	459		T7	1897
valid_sources[0x3e]	669758	1			T1	34		T3	641		T7	369
valid_sources[0x3f]	698965	1			T1	655		T3	627		T7	3333
valid_sources[0x40]	645193	1			T1	41		T3	667		T7	1084
valid_sources[0x41]	642376	1			T1	618		T3	632		T13	4
valid_sources[0x42]	669076	1			T1	1453		T3	597		T7	1342
valid_sources[0x43]	659513	1			T1	146		T3	553		T7	1582
valid_sources[0x44]	630458	1			T1	897		T3	675		T7	3709
valid_sources[0x45]	657592	1			T1	69		T4	1103		T3	545
valid_sources[0x46]	654341	1			T1	278		T3	620		T7	274
valid_sources[0x47]	673720	1			T1	807		T3	620		T13	1
valid_sources[0x48]	669943	1			T1	1032		T3	628		T7	2023
valid_sources[0x49]	673371	1			T1	25		T3	525		T7	1118
valid_sources[0x4a]	651867	1			T1	28		T3	487		T7	487
valid_sources[0x4b]	698866	1			T1	52		T3	612		T7	1913
valid_sources[0x4c]	676968	1			T1	392		T3	658		T7	3614
valid_sources[0x4d]	642358	1			T1	14		T3	604		T13	3
valid_sources[0x4e]	664025	1			T1	102		T3	584		T13	1
valid_sources[0x4f]	690755	1			T1	771		T3	596		T7	1135
valid_sources[0x50]	708619	1			T1	84		T2	1		T3	500
valid_sources[0x51]	648735	1			T1	70		T3	665		T7	369
valid_sources[0x52]	630774	1			T1	85		T3	533		T7	1670
valid_sources[0x53]	659520	1			T1	374		T2	17		T3	427
valid_sources[0x54]	620645	1			T1	401		T3	524		T7	168
valid_sources[0x55]	644077	1			T1	10		T3	528		T7	1574
valid_sources[0x56]	685176	1			T1	433		T3	503		T7	1547
valid_sources[0x57]	681322	1			T1	1211		T3	617		T7	474
valid_sources[0x58]	671132	1			T1	524		T3	597		T7	34
valid_sources[0x59]	633855	1			T1	742		T3	621		T7	789
valid_sources[0x5a]	665150	1			T1	388		T3	470		T13	120
valid_sources[0x5b]	679976	1			T1	134		T3	583		T7	43
valid_sources[0x5c]	666883	1			T1	3		T3	606		T7	829
valid_sources[0x5d]	658794	1			T1	4		T3	562		T13	1
valid_sources[0x5e]	648576	1			T1	1279		T3	692		T7	1450
valid_sources[0x5f]	632648	1			T1	606		T3	448		T7	306
valid_sources[0x60]	656134	1			T1	1187		T3	626		T7	1256
valid_sources[0x61]	637957	1			T1	473		T3	626		T7	21
valid_sources[0x62]	655528	1			T1	4		T3	563		T13	17
valid_sources[0x63]	643494	1			T1	917		T3	509		T7	3894
valid_sources[0x64]	647967	1			T2	18		T3	597		T7	58
valid_sources[0x65]	1232787	1			T1	854		T2	17		T3	512
valid_sources[0x66]	667512	1			T1	140		T3	564		T7	170
valid_sources[0x67]	708836	1			T1	52		T2	17		T3	582
valid_sources[0x68]	669294	1			T1	421		T3	471		T7	1664
valid_sources[0x69]	651388	1			T1	22		T3	511		T7	53
valid_sources[0x6a]	644453	1			T1	386		T3	610		T7	2636
valid_sources[0x6b]	673703	1			T1	95		T3	573		T7	704
valid_sources[0x6c]	724322	1			T1	734		T3	481		T7	518
valid_sources[0x6d]	648882	1			T1	604		T3	594		T7	24
valid_sources[0x6e]	682267	1			T1	3		T3	618		T13	745
valid_sources[0x6f]	675402	1			T1	114		T2	17		T3	595
valid_sources[0x70]	637493	1			T1	1146		T3	548		T13	117
valid_sources[0x71]	655982	1			T1	30		T2	51		T3	592
valid_sources[0x72]	665502	1			T1	678		T3	605		T7	1933
valid_sources[0x73]	654202	1			T1	264		T3	621		T7	200
valid_sources[0x74]	671555	1			T1	1065		T3	585		T7	411
valid_sources[0x75]	697593	1			T3	611		T7	3403		T9	4
valid_sources[0x76]	647935	1			T1	30		T3	479		T7	331
valid_sources[0x77]	697723	1			T1	577		T3	457		T7	2508
valid_sources[0x78]	658172	1			T1	15		T3	529		T13	260
valid_sources[0x79]	703957	1			T1	87		T3	573		T13	3
valid_sources[0x7a]	666062	1			T1	148		T3	677		T7	1745
valid_sources[0x7b]	641522	1			T1	8		T3	470		T13	2
valid_sources[0x7c]	673897	1			T1	588		T3	633		T7	3085
valid_sources[0x7d]	629022	1			T1	1186		T3	561		T7	3064
valid_sources[0x7e]	646244	1			T1	486		T3	566		T7	1313
valid_sources[0x7f]	677286	1			T1	288		T2	17		T3	603
valid_sources[0x80]	704495	1			T2	17		T3	584		T13	681

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7082475

1

T1

13106

T4

4

T2

48

values[0x0]

all_enables

biggest_size

5855569

1

T1

8657

T4

505

T2

76

values[0x1]

all_enables

biggest_size

5836819

1

T1

8643

T4

573

T2

83