Name |
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.2470742069 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.1935491546 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.4117907374 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.941025971 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.2217153137 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.3081511890 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.432775115 |
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.1654136476 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.127558367 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.1423547067 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.2790434940 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.2869265014 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.2572927849 |
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.314362493 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.1910332952 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.375863151 |
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.367919264 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_errors.2904167804 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.3728419812 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.1605455683 |
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.3144971814 |
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.2650447692 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.1189937266 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.2484487651 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.2478876169 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.2073050881 |
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.2934746615 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.1510588931 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.458340731 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.2610452164 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_rw.2856690059 |
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.409553656 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.450020325 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.2521203569 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.669884700 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.2904381452 |
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.2606270438 |
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.2227877854 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.3373875638 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.3747769770 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.2588166941 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_rw.3760642591 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.720444797 |
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.4242212829 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_errors.1668974841 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.3770572414 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.1162323141 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_rw.3549320659 |
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.2360191667 |
/workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.913774717 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.2577132328 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.3333205892 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.962936333 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.3651546665 |
/workspace/coverage/cover_reg_top/16.spi_device_intr_test.3282750341 |
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.838561171 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_errors.2621364010 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.615174973 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.1685373859 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.317953233 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.2361951313 |
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.3417868119 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.2603637417 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.3643825829 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.3362424579 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.33540995 |
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.2777284450 |
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.1072854695 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.3511881721 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.854058814 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.3247212461 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.2347300118 |
/workspace/coverage/cover_reg_top/19.spi_device_intr_test.3206506242 |
/workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.3405515675 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_errors.360256569 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.780522992 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.4122071173 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.4250127964 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.3512035947 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.3811767145 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.4016506255 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.1640620359 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.1553285398 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.2047488924 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.1719618015 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_errors.3862469761 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.1035296199 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.3081480127 |
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.2563979647 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.3142919181 |
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.2378554907 |
/workspace/coverage/cover_reg_top/24.spi_device_intr_test.222087546 |
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.1479553392 |
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.3780713391 |
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.3114645890 |
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.2734553142 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.1855257781 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.766860469 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.1212717263 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.3616730429 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.388574572 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.572641229 |
/workspace/coverage/cover_reg_top/3.spi_device_intr_test.1492207058 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.337464132 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.1907560741 |
/workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.2798061914 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_errors.2051969627 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.3056520541 |
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.490757750 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.2289390249 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.990328620 |
/workspace/coverage/cover_reg_top/33.spi_device_intr_test.777844229 |
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.3363197644 |
/workspace/coverage/cover_reg_top/35.spi_device_intr_test.3199995844 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.447869897 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.525143114 |
/workspace/coverage/cover_reg_top/38.spi_device_intr_test.2699246919 |
/workspace/coverage/cover_reg_top/39.spi_device_intr_test.594845246 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.3845906549 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.1260923693 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.3335429917 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.2778435166 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.3056083756 |
/workspace/coverage/cover_reg_top/4.spi_device_intr_test.310983836 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.4096895628 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.1446279669 |
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.40284908 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.4289709387 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.802270751 |
/workspace/coverage/cover_reg_top/40.spi_device_intr_test.2206427121 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.2660960739 |
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.712727609 |
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.3678517961 |
/workspace/coverage/cover_reg_top/44.spi_device_intr_test.2126906913 |
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.3625186371 |
/workspace/coverage/cover_reg_top/46.spi_device_intr_test.1243879220 |
/workspace/coverage/cover_reg_top/47.spi_device_intr_test.257851155 |
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.2620837225 |
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.2221193568 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.2693412141 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_rw.3045114067 |
/workspace/coverage/cover_reg_top/5.spi_device_intr_test.2513926808 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.1213528090 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_errors.3683264128 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.1055945557 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.1629609996 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_rw.2269259105 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.3063960451 |
/workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.1462797980 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.3089045705 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.1904126512 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.2376908018 |
/workspace/coverage/cover_reg_top/7.spi_device_intr_test.156125862 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_errors.837109545 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.338146293 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.3931539373 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_rw.3913928747 |
/workspace/coverage/cover_reg_top/8.spi_device_intr_test.1229643171 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.637247886 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_errors.2741867036 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.2709393698 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_rw.673137642 |
/workspace/coverage/cover_reg_top/9.spi_device_intr_test.2509005237 |
/workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.825046882 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.4095739036 |
/workspace/coverage/default/0.spi_device_alert_test.1467276551 |
/workspace/coverage/default/0.spi_device_cfg_cmd.722839872 |
/workspace/coverage/default/0.spi_device_csb_read.920647553 |
/workspace/coverage/default/0.spi_device_flash_all.1802355199 |
/workspace/coverage/default/0.spi_device_flash_and_tpm.4081218229 |
/workspace/coverage/default/0.spi_device_flash_mode.682208112 |
/workspace/coverage/default/0.spi_device_intercept.3615539959 |
/workspace/coverage/default/0.spi_device_mailbox.1108851607 |
/workspace/coverage/default/0.spi_device_mem_parity.456084376 |
/workspace/coverage/default/0.spi_device_pass_addr_payload_swap.1020725292 |
/workspace/coverage/default/0.spi_device_pass_cmd_filtering.2863207476 |
/workspace/coverage/default/0.spi_device_read_buffer_direct.702490725 |
/workspace/coverage/default/0.spi_device_sec_cm.1230132781 |
/workspace/coverage/default/0.spi_device_tpm_all.3004912694 |
/workspace/coverage/default/0.spi_device_tpm_read_hw_reg.3262130430 |
/workspace/coverage/default/0.spi_device_tpm_rw.1162886019 |
/workspace/coverage/default/0.spi_device_tpm_sts_read.2385007742 |
/workspace/coverage/default/1.spi_device_alert_test.2132486438 |
/workspace/coverage/default/1.spi_device_cfg_cmd.712368920 |
/workspace/coverage/default/1.spi_device_csb_read.1677299057 |
/workspace/coverage/default/1.spi_device_flash_all.3215649828 |
/workspace/coverage/default/1.spi_device_flash_and_tpm_min_idle.2421612454 |
/workspace/coverage/default/1.spi_device_flash_mode.3755031336 |
/workspace/coverage/default/1.spi_device_intercept.1444297579 |
/workspace/coverage/default/1.spi_device_mailbox.3185941244 |
/workspace/coverage/default/1.spi_device_pass_addr_payload_swap.3705259680 |
/workspace/coverage/default/1.spi_device_pass_cmd_filtering.1542963705 |
/workspace/coverage/default/1.spi_device_ram_cfg.3209562821 |
/workspace/coverage/default/1.spi_device_read_buffer_direct.4125542425 |
/workspace/coverage/default/1.spi_device_sec_cm.349845066 |
/workspace/coverage/default/1.spi_device_tpm_all.203299977 |
/workspace/coverage/default/1.spi_device_tpm_read_hw_reg.3309028277 |
/workspace/coverage/default/1.spi_device_tpm_rw.1579199646 |
/workspace/coverage/default/1.spi_device_tpm_sts_read.3551399911 |
/workspace/coverage/default/1.spi_device_upload.3861937422 |
/workspace/coverage/default/10.spi_device_alert_test.3486084374 |
/workspace/coverage/default/10.spi_device_cfg_cmd.2742814752 |
/workspace/coverage/default/10.spi_device_csb_read.4240925432 |
/workspace/coverage/default/10.spi_device_flash_and_tpm.923514708 |
/workspace/coverage/default/10.spi_device_intercept.1821907009 |
/workspace/coverage/default/10.spi_device_mailbox.623762632 |
/workspace/coverage/default/10.spi_device_mem_parity.3121637542 |
/workspace/coverage/default/10.spi_device_pass_addr_payload_swap.1781566402 |
/workspace/coverage/default/10.spi_device_ram_cfg.3316482311 |
/workspace/coverage/default/10.spi_device_read_buffer_direct.441930416 |
/workspace/coverage/default/10.spi_device_tpm_all.2363248781 |
/workspace/coverage/default/10.spi_device_tpm_read_hw_reg.2146313957 |
/workspace/coverage/default/10.spi_device_tpm_rw.1152162883 |
/workspace/coverage/default/10.spi_device_tpm_sts_read.2455880469 |
/workspace/coverage/default/10.spi_device_upload.2288357612 |
/workspace/coverage/default/11.spi_device_alert_test.2164012308 |
/workspace/coverage/default/11.spi_device_cfg_cmd.3198709079 |
/workspace/coverage/default/11.spi_device_csb_read.400961465 |
/workspace/coverage/default/11.spi_device_flash_all.1276330448 |
/workspace/coverage/default/11.spi_device_flash_and_tpm.3550785303 |
/workspace/coverage/default/11.spi_device_flash_and_tpm_min_idle.1920415141 |
/workspace/coverage/default/11.spi_device_flash_mode.1757100950 |
/workspace/coverage/default/11.spi_device_intercept.1858764696 |
/workspace/coverage/default/11.spi_device_mailbox.2683992998 |
/workspace/coverage/default/11.spi_device_mem_parity.1538983679 |
/workspace/coverage/default/11.spi_device_pass_addr_payload_swap.2606094187 |
/workspace/coverage/default/11.spi_device_pass_cmd_filtering.2954664220 |
/workspace/coverage/default/11.spi_device_ram_cfg.470770753 |
/workspace/coverage/default/11.spi_device_read_buffer_direct.3470949689 |
/workspace/coverage/default/11.spi_device_stress_all.2817644761 |
/workspace/coverage/default/11.spi_device_tpm_all.3171411988 |
/workspace/coverage/default/11.spi_device_tpm_read_hw_reg.738944997 |
/workspace/coverage/default/11.spi_device_tpm_rw.773969332 |
/workspace/coverage/default/11.spi_device_tpm_sts_read.700502185 |
/workspace/coverage/default/11.spi_device_upload.2998787217 |
/workspace/coverage/default/12.spi_device_alert_test.533161886 |
/workspace/coverage/default/12.spi_device_cfg_cmd.3657324032 |
/workspace/coverage/default/12.spi_device_csb_read.882880460 |
/workspace/coverage/default/12.spi_device_flash_mode.2186877803 |
/workspace/coverage/default/12.spi_device_intercept.3448349239 |
/workspace/coverage/default/12.spi_device_mailbox.4242150533 |
/workspace/coverage/default/12.spi_device_mem_parity.3791921509 |
/workspace/coverage/default/12.spi_device_pass_addr_payload_swap.1907688224 |
/workspace/coverage/default/12.spi_device_pass_cmd_filtering.4200281772 |
/workspace/coverage/default/12.spi_device_read_buffer_direct.3079052782 |
/workspace/coverage/default/12.spi_device_tpm_all.2850454148 |
/workspace/coverage/default/12.spi_device_tpm_read_hw_reg.4257299080 |
/workspace/coverage/default/12.spi_device_tpm_rw.1732344296 |
/workspace/coverage/default/12.spi_device_tpm_sts_read.1582665627 |
/workspace/coverage/default/12.spi_device_upload.2720495765 |
/workspace/coverage/default/13.spi_device_alert_test.1471912655 |
/workspace/coverage/default/13.spi_device_cfg_cmd.3644449075 |
/workspace/coverage/default/13.spi_device_csb_read.3611193301 |
/workspace/coverage/default/13.spi_device_flash_all.2475266752 |
/workspace/coverage/default/13.spi_device_flash_and_tpm.1194658361 |
/workspace/coverage/default/13.spi_device_flash_and_tpm_min_idle.745081374 |
/workspace/coverage/default/13.spi_device_flash_mode.3086831874 |
/workspace/coverage/default/13.spi_device_intercept.2275306456 |
/workspace/coverage/default/13.spi_device_mailbox.2205753669 |
/workspace/coverage/default/13.spi_device_mem_parity.469915824 |
/workspace/coverage/default/13.spi_device_pass_addr_payload_swap.2716350062 |
/workspace/coverage/default/13.spi_device_pass_cmd_filtering.1168354378 |
/workspace/coverage/default/13.spi_device_ram_cfg.3147818010 |
/workspace/coverage/default/13.spi_device_read_buffer_direct.3322601821 |
/workspace/coverage/default/13.spi_device_stress_all.3042811542 |
/workspace/coverage/default/13.spi_device_tpm_all.1478526016 |
/workspace/coverage/default/13.spi_device_tpm_read_hw_reg.2893456519 |
/workspace/coverage/default/13.spi_device_tpm_rw.3848450701 |
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/workspace/coverage/default/44.spi_device_mailbox.2897098067 |
/workspace/coverage/default/44.spi_device_pass_addr_payload_swap.2216129371 |
/workspace/coverage/default/44.spi_device_pass_cmd_filtering.1833484747 |
/workspace/coverage/default/44.spi_device_read_buffer_direct.3559881070 |
/workspace/coverage/default/44.spi_device_tpm_all.2162354574 |
/workspace/coverage/default/44.spi_device_tpm_read_hw_reg.3162511801 |
/workspace/coverage/default/44.spi_device_tpm_rw.3316060290 |
/workspace/coverage/default/44.spi_device_tpm_sts_read.2896840520 |
/workspace/coverage/default/44.spi_device_upload.2259991618 |
/workspace/coverage/default/45.spi_device_alert_test.1274266631 |
/workspace/coverage/default/45.spi_device_cfg_cmd.2842441558 |
/workspace/coverage/default/45.spi_device_csb_read.230939680 |
/workspace/coverage/default/45.spi_device_flash_all.3254198934 |
/workspace/coverage/default/45.spi_device_flash_and_tpm.4238726744 |
/workspace/coverage/default/45.spi_device_flash_and_tpm_min_idle.1802605544 |
/workspace/coverage/default/45.spi_device_flash_mode.1247048118 |
/workspace/coverage/default/45.spi_device_intercept.1906261855 |
/workspace/coverage/default/45.spi_device_mailbox.1833852877 |
/workspace/coverage/default/45.spi_device_pass_addr_payload_swap.2492372714 |
/workspace/coverage/default/45.spi_device_pass_cmd_filtering.1687196417 |
/workspace/coverage/default/45.spi_device_read_buffer_direct.1258790078 |
/workspace/coverage/default/45.spi_device_stress_all.1278901443 |
/workspace/coverage/default/45.spi_device_tpm_all.816559181 |
/workspace/coverage/default/45.spi_device_tpm_read_hw_reg.362666097 |
/workspace/coverage/default/45.spi_device_tpm_rw.426582305 |
/workspace/coverage/default/45.spi_device_tpm_sts_read.2531099528 |
/workspace/coverage/default/45.spi_device_upload.1391091102 |
/workspace/coverage/default/46.spi_device_alert_test.1522875427 |
/workspace/coverage/default/46.spi_device_cfg_cmd.119755459 |
/workspace/coverage/default/46.spi_device_csb_read.1451510317 |
/workspace/coverage/default/46.spi_device_flash_all.1546726616 |
/workspace/coverage/default/46.spi_device_flash_and_tpm.214488436 |
/workspace/coverage/default/46.spi_device_flash_mode.1790046257 |
/workspace/coverage/default/46.spi_device_intercept.4161918497 |
/workspace/coverage/default/46.spi_device_mailbox.4098219261 |
/workspace/coverage/default/46.spi_device_pass_addr_payload_swap.1489227653 |
/workspace/coverage/default/46.spi_device_pass_cmd_filtering.1476470817 |
/workspace/coverage/default/46.spi_device_read_buffer_direct.2755536865 |
/workspace/coverage/default/46.spi_device_tpm_all.656329704 |
/workspace/coverage/default/46.spi_device_tpm_read_hw_reg.2307425639 |
/workspace/coverage/default/46.spi_device_tpm_rw.1456739170 |
/workspace/coverage/default/46.spi_device_tpm_sts_read.1109079291 |
/workspace/coverage/default/46.spi_device_upload.1614600426 |
/workspace/coverage/default/47.spi_device_alert_test.4076707295 |
/workspace/coverage/default/47.spi_device_cfg_cmd.587630668 |
/workspace/coverage/default/47.spi_device_csb_read.4187531453 |
/workspace/coverage/default/47.spi_device_flash_all.2503775797 |
/workspace/coverage/default/47.spi_device_flash_and_tpm.2679844386 |
/workspace/coverage/default/47.spi_device_flash_mode.849269648 |
/workspace/coverage/default/47.spi_device_intercept.3652225711 |
/workspace/coverage/default/47.spi_device_mailbox.530786880 |
/workspace/coverage/default/47.spi_device_pass_addr_payload_swap.3369701356 |
/workspace/coverage/default/47.spi_device_pass_cmd_filtering.2713689510 |
/workspace/coverage/default/47.spi_device_read_buffer_direct.2631067676 |
/workspace/coverage/default/47.spi_device_tpm_all.2899729817 |
/workspace/coverage/default/47.spi_device_tpm_read_hw_reg.1067531453 |
/workspace/coverage/default/47.spi_device_tpm_rw.2871454040 |
/workspace/coverage/default/47.spi_device_tpm_sts_read.2776469473 |
/workspace/coverage/default/47.spi_device_upload.2731116825 |
/workspace/coverage/default/48.spi_device_alert_test.1086038722 |
/workspace/coverage/default/48.spi_device_cfg_cmd.608635145 |
/workspace/coverage/default/48.spi_device_csb_read.1163645638 |
/workspace/coverage/default/48.spi_device_flash_and_tpm.212943142 |
/workspace/coverage/default/48.spi_device_flash_and_tpm_min_idle.3022651317 |
/workspace/coverage/default/48.spi_device_flash_mode.61166137 |
/workspace/coverage/default/48.spi_device_intercept.2520610344 |
/workspace/coverage/default/48.spi_device_mailbox.4202843249 |
/workspace/coverage/default/48.spi_device_pass_addr_payload_swap.2616043539 |
/workspace/coverage/default/48.spi_device_pass_cmd_filtering.716347293 |
/workspace/coverage/default/48.spi_device_read_buffer_direct.3905938008 |
/workspace/coverage/default/48.spi_device_stress_all.1905574808 |
/workspace/coverage/default/48.spi_device_tpm_read_hw_reg.335318525 |
/workspace/coverage/default/48.spi_device_tpm_rw.1114902396 |
/workspace/coverage/default/48.spi_device_tpm_sts_read.3233884847 |
/workspace/coverage/default/48.spi_device_upload.1867568161 |
/workspace/coverage/default/49.spi_device_alert_test.3607230061 |
/workspace/coverage/default/49.spi_device_cfg_cmd.4086934702 |
/workspace/coverage/default/49.spi_device_csb_read.3033476173 |
/workspace/coverage/default/49.spi_device_flash_all.1999905285 |
/workspace/coverage/default/49.spi_device_flash_and_tpm.1257736217 |
/workspace/coverage/default/49.spi_device_flash_and_tpm_min_idle.2451848511 |
/workspace/coverage/default/49.spi_device_flash_mode.2652726084 |
/workspace/coverage/default/49.spi_device_intercept.2824700437 |
/workspace/coverage/default/49.spi_device_mailbox.254447832 |
/workspace/coverage/default/49.spi_device_pass_addr_payload_swap.118389332 |
/workspace/coverage/default/49.spi_device_pass_cmd_filtering.1114492614 |
/workspace/coverage/default/49.spi_device_read_buffer_direct.1611343292 |
/workspace/coverage/default/49.spi_device_stress_all.3215045411 |
/workspace/coverage/default/49.spi_device_tpm_all.1212433277 |
/workspace/coverage/default/49.spi_device_tpm_rw.2184074039 |
/workspace/coverage/default/49.spi_device_tpm_sts_read.2071242297 |
/workspace/coverage/default/49.spi_device_upload.1872638344 |
/workspace/coverage/default/5.spi_device_alert_test.420643836 |
/workspace/coverage/default/5.spi_device_cfg_cmd.3081009847 |
/workspace/coverage/default/5.spi_device_csb_read.2741751537 |
/workspace/coverage/default/5.spi_device_flash_all.2276518746 |
/workspace/coverage/default/5.spi_device_flash_and_tpm.851803321 |
/workspace/coverage/default/5.spi_device_flash_and_tpm_min_idle.3159658781 |
/workspace/coverage/default/5.spi_device_flash_mode.1737896700 |
/workspace/coverage/default/5.spi_device_intercept.2003938294 |
/workspace/coverage/default/5.spi_device_mailbox.3748278875 |
/workspace/coverage/default/5.spi_device_mem_parity.2850293015 |
/workspace/coverage/default/5.spi_device_pass_addr_payload_swap.675179094 |
/workspace/coverage/default/5.spi_device_pass_cmd_filtering.2726791518 |
/workspace/coverage/default/5.spi_device_ram_cfg.3587294338 |
/workspace/coverage/default/5.spi_device_read_buffer_direct.2890332066 |
/workspace/coverage/default/5.spi_device_stress_all.3790692552 |
/workspace/coverage/default/5.spi_device_tpm_all.3669678345 |
/workspace/coverage/default/5.spi_device_tpm_read_hw_reg.3654748683 |
/workspace/coverage/default/5.spi_device_tpm_rw.148626271 |
/workspace/coverage/default/5.spi_device_tpm_sts_read.2112475864 |
/workspace/coverage/default/5.spi_device_upload.3016273820 |
/workspace/coverage/default/6.spi_device_alert_test.3881160665 |
/workspace/coverage/default/6.spi_device_cfg_cmd.2653729210 |
/workspace/coverage/default/6.spi_device_csb_read.4003835024 |
/workspace/coverage/default/6.spi_device_flash_all.451770695 |
/workspace/coverage/default/6.spi_device_flash_and_tpm.2198985623 |
/workspace/coverage/default/6.spi_device_flash_and_tpm_min_idle.3176965716 |
/workspace/coverage/default/6.spi_device_flash_mode.3354420861 |
/workspace/coverage/default/6.spi_device_intercept.90790451 |
/workspace/coverage/default/6.spi_device_mailbox.4098828568 |
/workspace/coverage/default/6.spi_device_mem_parity.3774211590 |
/workspace/coverage/default/6.spi_device_pass_addr_payload_swap.1938846419 |
/workspace/coverage/default/6.spi_device_pass_cmd_filtering.3907699996 |
/workspace/coverage/default/6.spi_device_ram_cfg.3645059328 |
/workspace/coverage/default/6.spi_device_read_buffer_direct.2652816711 |
/workspace/coverage/default/6.spi_device_stress_all.1437625151 |
/workspace/coverage/default/6.spi_device_tpm_all.3603310351 |
/workspace/coverage/default/6.spi_device_tpm_read_hw_reg.1748523425 |
/workspace/coverage/default/6.spi_device_tpm_rw.2356530790 |
/workspace/coverage/default/6.spi_device_tpm_sts_read.1624994760 |
/workspace/coverage/default/6.spi_device_upload.1110952613 |
/workspace/coverage/default/7.spi_device_alert_test.369714167 |
/workspace/coverage/default/7.spi_device_cfg_cmd.3370118823 |
/workspace/coverage/default/7.spi_device_csb_read.2607666176 |
/workspace/coverage/default/7.spi_device_flash_all.3700169311 |
/workspace/coverage/default/7.spi_device_flash_and_tpm.3079447729 |
/workspace/coverage/default/7.spi_device_flash_and_tpm_min_idle.1215490564 |
/workspace/coverage/default/7.spi_device_flash_mode.1527375071 |
/workspace/coverage/default/7.spi_device_intercept.2372249820 |
/workspace/coverage/default/7.spi_device_mailbox.3337898168 |
/workspace/coverage/default/7.spi_device_mem_parity.1471203882 |
/workspace/coverage/default/7.spi_device_pass_addr_payload_swap.1863166753 |
/workspace/coverage/default/7.spi_device_pass_cmd_filtering.3403873160 |
/workspace/coverage/default/7.spi_device_ram_cfg.3549016611 |
/workspace/coverage/default/7.spi_device_read_buffer_direct.409573260 |
/workspace/coverage/default/7.spi_device_stress_all.2665434801 |
/workspace/coverage/default/7.spi_device_tpm_all.1650648762 |
/workspace/coverage/default/7.spi_device_tpm_read_hw_reg.2407884811 |
/workspace/coverage/default/7.spi_device_tpm_rw.3329626589 |
/workspace/coverage/default/7.spi_device_tpm_sts_read.254459496 |
/workspace/coverage/default/7.spi_device_upload.3080068076 |
/workspace/coverage/default/8.spi_device_alert_test.3499198000 |
/workspace/coverage/default/8.spi_device_cfg_cmd.2710343890 |
/workspace/coverage/default/8.spi_device_csb_read.1388934436 |
/workspace/coverage/default/8.spi_device_flash_all.4130371970 |
/workspace/coverage/default/8.spi_device_flash_and_tpm.1570092410 |
/workspace/coverage/default/8.spi_device_flash_and_tpm_min_idle.2750567863 |
/workspace/coverage/default/8.spi_device_flash_mode.4110565650 |
/workspace/coverage/default/8.spi_device_intercept.2261311739 |
/workspace/coverage/default/8.spi_device_mailbox.3013457848 |
/workspace/coverage/default/8.spi_device_mem_parity.3551359496 |
/workspace/coverage/default/8.spi_device_pass_addr_payload_swap.4014686857 |
/workspace/coverage/default/8.spi_device_pass_cmd_filtering.3628171912 |
/workspace/coverage/default/8.spi_device_ram_cfg.1413531829 |
/workspace/coverage/default/8.spi_device_read_buffer_direct.1451481504 |
/workspace/coverage/default/8.spi_device_stress_all.484667560 |
/workspace/coverage/default/8.spi_device_tpm_all.792686164 |
/workspace/coverage/default/8.spi_device_tpm_read_hw_reg.2249919066 |
/workspace/coverage/default/8.spi_device_tpm_rw.2301045905 |
/workspace/coverage/default/8.spi_device_tpm_sts_read.1833370135 |
/workspace/coverage/default/8.spi_device_upload.2468428076 |
/workspace/coverage/default/9.spi_device_alert_test.1276755029 |
/workspace/coverage/default/9.spi_device_cfg_cmd.1339129902 |
/workspace/coverage/default/9.spi_device_csb_read.1306285507 |
/workspace/coverage/default/9.spi_device_flash_all.1774121806 |
/workspace/coverage/default/9.spi_device_flash_and_tpm.3481152181 |
/workspace/coverage/default/9.spi_device_flash_mode.3926359559 |
/workspace/coverage/default/9.spi_device_intercept.2318374538 |
/workspace/coverage/default/9.spi_device_mailbox.1650533186 |
/workspace/coverage/default/9.spi_device_mem_parity.1186740370 |
/workspace/coverage/default/9.spi_device_pass_addr_payload_swap.4276344182 |
/workspace/coverage/default/9.spi_device_pass_cmd_filtering.3115469231 |
/workspace/coverage/default/9.spi_device_ram_cfg.1162579746 |
/workspace/coverage/default/9.spi_device_read_buffer_direct.3579141275 |
/workspace/coverage/default/9.spi_device_stress_all.4117074855 |
/workspace/coverage/default/9.spi_device_tpm_all.152521408 |
/workspace/coverage/default/9.spi_device_tpm_read_hw_reg.3257490677 |
/workspace/coverage/default/9.spi_device_tpm_rw.3102294883 |
/workspace/coverage/default/9.spi_device_tpm_sts_read.3866945699 |
/workspace/coverage/default/9.spi_device_upload.71738286 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T1 |
/workspace/coverage/default/20.spi_device_csb_read.1715883593 |
|
|
Jan 24 07:50:15 PM PST 24 |
Jan 24 07:50:17 PM PST 24 |
21360002 ps |
T2 |
/workspace/coverage/default/32.spi_device_tpm_rw.4031560091 |
|
|
Jan 24 07:52:54 PM PST 24 |
Jan 24 07:52:56 PM PST 24 |
142690005 ps |
T3 |
/workspace/coverage/default/41.spi_device_tpm_all.3455713522 |
|
|
Jan 24 09:10:22 PM PST 24 |
Jan 24 09:10:55 PM PST 24 |
3802726817 ps |
T10 |
/workspace/coverage/default/3.spi_device_csb_read.2498567381 |
|
|
Jan 24 07:46:04 PM PST 24 |
Jan 24 07:46:06 PM PST 24 |
15370868 ps |
T7 |
/workspace/coverage/default/36.spi_device_pass_addr_payload_swap.2991272512 |
|
|
Jan 24 08:25:19 PM PST 24 |
Jan 24 08:25:30 PM PST 24 |
561572442 ps |
T8 |
/workspace/coverage/default/0.spi_device_upload.1398354509 |
|
|
Jan 24 07:45:32 PM PST 24 |
Jan 24 07:45:45 PM PST 24 |
6374293577 ps |
T9 |
/workspace/coverage/default/1.spi_device_pass_cmd_filtering.1542963705 |
|
|
Jan 24 07:45:43 PM PST 24 |
Jan 24 07:45:50 PM PST 24 |
1454438175 ps |
T11 |
/workspace/coverage/default/29.spi_device_read_buffer_direct.3659112637 |
|
|
Jan 24 07:52:21 PM PST 24 |
Jan 24 07:52:27 PM PST 24 |
286548222 ps |
T12 |
/workspace/coverage/default/34.spi_device_upload.1410444328 |
|
|
Jan 24 07:53:32 PM PST 24 |
Jan 24 07:53:55 PM PST 24 |
20224224728 ps |
T16 |
/workspace/coverage/default/22.spi_device_alert_test.1125546674 |
|
|
Jan 24 07:50:58 PM PST 24 |
Jan 24 07:51:00 PM PST 24 |
119080500 ps |
T17 |
/workspace/coverage/default/38.spi_device_tpm_rw.1734585598 |
|
|
Jan 24 09:44:44 PM PST 24 |
Jan 24 09:44:53 PM PST 24 |
542289519 ps |
T13 |
/workspace/coverage/default/2.spi_device_mailbox.4209579067 |
|
|
Jan 24 08:32:27 PM PST 24 |
Jan 24 08:32:32 PM PST 24 |
1855434546 ps |
T4 |
/workspace/coverage/default/48.spi_device_flash_all.1856461516 |
|
|
Jan 24 07:56:34 PM PST 24 |
Jan 24 07:59:55 PM PST 24 |
393033409942 ps |
T18 |
/workspace/coverage/default/49.spi_device_tpm_read_hw_reg.3815880088 |
|
|
Jan 24 07:56:47 PM PST 24 |
Jan 24 07:56:54 PM PST 24 |
2572405152 ps |
T14 |
/workspace/coverage/default/23.spi_device_pass_addr_payload_swap.2649948761 |
|
|
Jan 24 07:51:00 PM PST 24 |
Jan 24 07:51:47 PM PST 24 |
18105521689 ps |
T15 |
/workspace/coverage/default/41.spi_device_read_buffer_direct.2713288399 |
|
|
Jan 24 07:55:00 PM PST 24 |
Jan 24 07:55:10 PM PST 24 |
161998679 ps |
T22 |
/workspace/coverage/default/32.spi_device_tpm_sts_read.382036135 |
|
|
Jan 24 07:52:59 PM PST 24 |
Jan 24 07:53:01 PM PST 24 |
13340149 ps |
T32 |
/workspace/coverage/default/28.spi_device_alert_test.326385706 |
|
|
Jan 24 07:52:16 PM PST 24 |
Jan 24 07:52:18 PM PST 24 |
13112753 ps |
T19 |
/workspace/coverage/default/12.spi_device_tpm_rw.1732344296 |
|
|
Jan 24 07:48:24 PM PST 24 |
Jan 24 07:48:29 PM PST 24 |
118014210 ps |
T33 |
/workspace/coverage/default/8.spi_device_alert_test.3499198000 |
|
|
Jan 24 07:47:36 PM PST 24 |
Jan 24 07:47:38 PM PST 24 |
39704938 ps |
T290 |
/workspace/coverage/default/15.spi_device_alert_test.1260636812 |
|
|
Jan 24 07:49:18 PM PST 24 |
Jan 24 07:49:20 PM PST 24 |
43986204 ps |
T20 |
/workspace/coverage/default/42.spi_device_stress_all.912587211 |
|
|
Jan 24 07:55:20 PM PST 24 |
Jan 24 07:55:22 PM PST 24 |
225556960 ps |
T5 |
/workspace/coverage/default/9.spi_device_flash_and_tpm_min_idle.1628881550 |
|
|
Jan 24 07:53:49 PM PST 24 |
Jan 24 07:55:03 PM PST 24 |
6166730519 ps |
T6 |
/workspace/coverage/default/9.spi_device_flash_all.1774121806 |
|
|
Jan 24 07:47:43 PM PST 24 |
Jan 24 07:47:50 PM PST 24 |
632343534 ps |
T21 |
/workspace/coverage/default/13.spi_device_csb_read.3611193301 |
|
|
Jan 24 07:48:21 PM PST 24 |
Jan 24 07:48:25 PM PST 24 |
112484981 ps |
T23 |
/workspace/coverage/default/44.spi_device_stress_all.1799816663 |
|
|
Jan 24 07:55:47 PM PST 24 |
Jan 24 07:58:16 PM PST 24 |
28599568804 ps |
T34 |
/workspace/coverage/default/38.spi_device_intercept.2550566906 |
|
|
Jan 24 07:54:22 PM PST 24 |
Jan 24 07:54:33 PM PST 24 |
939005287 ps |
T27 |
/workspace/coverage/default/13.spi_device_flash_and_tpm_min_idle.745081374 |
|
|
Jan 24 07:48:38 PM PST 24 |
Jan 24 07:49:57 PM PST 24 |
4302030300 ps |
T119 |
/workspace/coverage/default/11.spi_device_alert_test.2164012308 |
|
|
Jan 24 09:12:48 PM PST 24 |
Jan 24 09:12:49 PM PST 24 |
39447119 ps |
T41 |
/workspace/coverage/default/15.spi_device_tpm_read_hw_reg.3076610472 |
|
|
Jan 24 07:49:09 PM PST 24 |
Jan 24 07:49:15 PM PST 24 |
1950675097 ps |
T28 |
/workspace/coverage/default/8.spi_device_flash_and_tpm.1570092410 |
|
|
Jan 24 07:47:28 PM PST 24 |
Jan 24 07:49:27 PM PST 24 |
16910395748 ps |
T29 |
/workspace/coverage/default/18.spi_device_stress_all.2162546680 |
|
|
Jan 24 07:50:10 PM PST 24 |
Jan 24 07:59:11 PM PST 24 |
237913193518 ps |
T30 |
/workspace/coverage/default/0.spi_device_flash_all.1802355199 |
|
|
Jan 24 07:45:41 PM PST 24 |
Jan 24 07:47:48 PM PST 24 |
48527864624 ps |
T35 |
/workspace/coverage/default/24.spi_device_pass_addr_payload_swap.888570937 |
|
|
Jan 24 07:51:10 PM PST 24 |
Jan 24 07:51:26 PM PST 24 |
4556300065 ps |
T31 |
/workspace/coverage/default/20.spi_device_stress_all.2933071898 |
|
|
Jan 24 07:50:31 PM PST 24 |
Jan 24 07:51:37 PM PST 24 |
31737962345 ps |
T64 |
/workspace/coverage/default/18.spi_device_tpm_read_hw_reg.1713799311 |
|
|
Jan 24 08:57:17 PM PST 24 |
Jan 24 08:57:24 PM PST 24 |
2766615599 ps |
T105 |
/workspace/coverage/default/4.spi_device_tpm_all.2400615989 |
|
|
Jan 24 07:46:22 PM PST 24 |
Jan 24 07:47:48 PM PST 24 |
10238038739 ps |
T222 |
/workspace/coverage/default/18.spi_device_cfg_cmd.3795609812 |
|
|
Jan 24 07:49:59 PM PST 24 |
Jan 24 07:50:04 PM PST 24 |
1876412973 ps |
T198 |
/workspace/coverage/default/2.spi_device_intercept.3356943890 |
|
|
Jan 24 07:46:11 PM PST 24 |
Jan 24 07:46:16 PM PST 24 |
374184993 ps |
T43 |
/workspace/coverage/default/36.spi_device_flash_mode.479510057 |
|
|
Jan 24 07:54:06 PM PST 24 |
Jan 24 07:54:13 PM PST 24 |
664028595 ps |
T65 |
/workspace/coverage/default/20.spi_device_tpm_all.1235578487 |
|
|
Jan 24 07:50:12 PM PST 24 |
Jan 24 07:50:37 PM PST 24 |
5330283597 ps |
T66 |
/workspace/coverage/default/35.spi_device_tpm_read_hw_reg.2351743012 |
|
|
Jan 24 07:53:34 PM PST 24 |
Jan 24 07:53:53 PM PST 24 |
5946512877 ps |
T83 |
/workspace/coverage/default/38.spi_device_pass_addr_payload_swap.2205639304 |
|
|
Jan 24 07:54:18 PM PST 24 |
Jan 24 07:54:24 PM PST 24 |
371055055 ps |
T149 |
/workspace/coverage/default/2.spi_device_upload.2213882401 |
|
|
Jan 24 07:46:04 PM PST 24 |
Jan 24 07:46:10 PM PST 24 |
759275711 ps |
T84 |
/workspace/coverage/default/26.spi_device_tpm_all.742895326 |
|
|
Jan 24 07:51:34 PM PST 24 |
Jan 24 07:54:36 PM PST 24 |
12168912849 ps |
T150 |
/workspace/coverage/default/25.spi_device_pass_cmd_filtering.2874153939 |
|
|
Jan 24 07:51:31 PM PST 24 |
Jan 24 07:51:42 PM PST 24 |
1553423666 ps |
T209 |
/workspace/coverage/default/38.spi_device_mailbox.4095414048 |
|
|
Jan 24 07:54:22 PM PST 24 |
Jan 24 07:54:39 PM PST 24 |
2640469256 ps |
T70 |
/workspace/coverage/default/10.spi_device_pass_cmd_filtering.1904009756 |
|
|
Jan 24 07:47:56 PM PST 24 |
Jan 24 07:48:13 PM PST 24 |
3949636593 ps |
T148 |
/workspace/coverage/default/25.spi_device_upload.2306996082 |
|
|
Jan 24 07:51:34 PM PST 24 |
Jan 24 07:51:44 PM PST 24 |
650678407 ps |
T42 |
/workspace/coverage/default/32.spi_device_upload.536351576 |
|
|
Jan 24 07:53:05 PM PST 24 |
Jan 24 07:53:18 PM PST 24 |
4633021091 ps |
T24 |
/workspace/coverage/default/17.spi_device_mem_parity.1180150162 |
|
|
Jan 24 07:49:34 PM PST 24 |
Jan 24 07:49:36 PM PST 24 |
16275048 ps |
T145 |
/workspace/coverage/default/43.spi_device_stress_all.148573731 |
|
|
Jan 24 07:55:32 PM PST 24 |
Jan 24 07:55:34 PM PST 24 |
62192885 ps |
T225 |
/workspace/coverage/default/39.spi_device_cfg_cmd.3141567645 |
|
|
Jan 24 07:54:35 PM PST 24 |
Jan 24 07:54:40 PM PST 24 |
882588674 ps |
T71 |
/workspace/coverage/default/38.spi_device_pass_cmd_filtering.1420887057 |
|
|
Jan 24 07:54:23 PM PST 24 |
Jan 24 07:54:45 PM PST 24 |
24350734257 ps |
T68 |
/workspace/coverage/default/16.spi_device_read_buffer_direct.3597644529 |
|
|
Jan 24 07:49:31 PM PST 24 |
Jan 24 07:49:37 PM PST 24 |
5819470983 ps |
T220 |
/workspace/coverage/default/9.spi_device_intercept.2318374538 |
|
|
Jan 24 07:47:46 PM PST 24 |
Jan 24 07:47:50 PM PST 24 |
1016330566 ps |
T124 |
/workspace/coverage/default/7.spi_device_flash_mode.1527375071 |
|
|
Jan 24 07:56:12 PM PST 24 |
Jan 24 07:56:42 PM PST 24 |
4574137322 ps |
T25 |
/workspace/coverage/default/6.spi_device_mem_parity.3774211590 |
|
|
Jan 24 07:46:54 PM PST 24 |
Jan 24 07:46:56 PM PST 24 |
102113965 ps |
T182 |
/workspace/coverage/default/31.spi_device_intercept.2446768894 |
|
|
Jan 24 07:52:55 PM PST 24 |
Jan 24 07:53:00 PM PST 24 |
4667562963 ps |
T211 |
/workspace/coverage/default/11.spi_device_mailbox.2683992998 |
|
|
Jan 24 07:48:15 PM PST 24 |
Jan 24 07:48:20 PM PST 24 |
249408829 ps |
T291 |
/workspace/coverage/default/44.spi_device_csb_read.1286978362 |
|
|
Jan 24 11:25:51 PM PST 24 |
Jan 24 11:25:59 PM PST 24 |
19039682 ps |
T196 |
/workspace/coverage/default/8.spi_device_pass_cmd_filtering.3628171912 |
|
|
Jan 24 07:47:22 PM PST 24 |
Jan 24 07:47:35 PM PST 24 |
1454662371 ps |
T292 |
/workspace/coverage/default/8.spi_device_csb_read.1388934436 |
|
|
Jan 24 07:47:22 PM PST 24 |
Jan 24 07:47:23 PM PST 24 |
36372000 ps |
T293 |
/workspace/coverage/default/21.spi_device_tpm_rw.3793737965 |
|
|
Jan 24 09:59:50 PM PST 24 |
Jan 24 09:59:52 PM PST 24 |
32436506 ps |
T171 |
/workspace/coverage/default/13.spi_device_pass_cmd_filtering.1168354378 |
|
|
Jan 24 07:48:30 PM PST 24 |
Jan 24 07:48:47 PM PST 24 |
3763015212 ps |
T69 |
/workspace/coverage/default/15.spi_device_flash_and_tpm.2088090736 |
|
|
Jan 24 07:49:16 PM PST 24 |
Jan 24 07:50:31 PM PST 24 |
9901837887 ps |
T197 |
/workspace/coverage/default/45.spi_device_mailbox.1833852877 |
|
|
Jan 24 07:55:57 PM PST 24 |
Jan 24 07:56:04 PM PST 24 |
853858122 ps |
T36 |
/workspace/coverage/default/0.spi_device_stress_all.2263367442 |
|
|
Jan 24 07:45:44 PM PST 24 |
Jan 24 07:54:50 PM PST 24 |
311639196889 ps |
T193 |
/workspace/coverage/default/22.spi_device_mailbox.861180140 |
|
|
Jan 24 07:50:51 PM PST 24 |
Jan 24 07:50:56 PM PST 24 |
13148662475 ps |
T37 |
/workspace/coverage/default/32.spi_device_flash_and_tpm_min_idle.3199674093 |
|
|
Jan 24 08:27:19 PM PST 24 |
Jan 24 08:32:03 PM PST 24 |
36071820994 ps |
T294 |
/workspace/coverage/default/11.spi_device_tpm_read_hw_reg.738944997 |
|
|
Jan 24 07:47:59 PM PST 24 |
Jan 24 07:48:27 PM PST 24 |
8426851177 ps |
T38 |
/workspace/coverage/default/33.spi_device_flash_and_tpm_min_idle.3190673846 |
|
|
Jan 24 07:53:16 PM PST 24 |
Jan 24 08:03:23 PM PST 24 |
358565577233 ps |
T146 |
/workspace/coverage/default/4.spi_device_stress_all.1702492506 |
|
|
Jan 24 07:46:37 PM PST 24 |
Jan 24 07:46:39 PM PST 24 |
99058139 ps |
T229 |
/workspace/coverage/default/23.spi_device_pass_cmd_filtering.2401070875 |
|
|
Jan 24 07:51:02 PM PST 24 |
Jan 24 07:51:11 PM PST 24 |
1130186846 ps |
T295 |
/workspace/coverage/default/48.spi_device_tpm_sts_read.3233884847 |
|
|
Jan 24 07:56:32 PM PST 24 |
Jan 24 07:56:34 PM PST 24 |
241351873 ps |
T39 |
/workspace/coverage/default/30.spi_device_flash_and_tpm.2580132780 |
|
|
Jan 24 07:52:29 PM PST 24 |
Jan 24 07:56:03 PM PST 24 |
17718828567 ps |
T296 |
/workspace/coverage/default/25.spi_device_tpm_read_hw_reg.3934591642 |
|
|
Jan 24 07:51:21 PM PST 24 |
Jan 24 07:51:37 PM PST 24 |
2933984087 ps |
T297 |
/workspace/coverage/default/6.spi_device_tpm_rw.2356530790 |
|
|
Jan 24 07:46:54 PM PST 24 |
Jan 24 07:46:59 PM PST 24 |
195146379 ps |
T173 |
/workspace/coverage/default/22.spi_device_intercept.1337129244 |
|
|
Jan 24 10:45:25 PM PST 24 |
Jan 24 10:45:32 PM PST 24 |
1464960149 ps |
T120 |
/workspace/coverage/default/3.spi_device_flash_and_tpm_min_idle.2572830562 |
|
|
Jan 24 07:46:17 PM PST 24 |
Jan 24 07:48:04 PM PST 24 |
32552649707 ps |
T125 |
/workspace/coverage/default/7.spi_device_read_buffer_direct.409573260 |
|
|
Jan 25 01:00:08 AM PST 24 |
Jan 25 01:00:14 AM PST 24 |
271384067 ps |
T227 |
/workspace/coverage/default/10.spi_device_cfg_cmd.2742814752 |
|
|
Jan 24 07:47:59 PM PST 24 |
Jan 24 07:48:10 PM PST 24 |
887340986 ps |
T237 |
/workspace/coverage/default/2.spi_device_pass_addr_payload_swap.2434697395 |
|
|
Jan 24 07:46:05 PM PST 24 |
Jan 24 07:46:12 PM PST 24 |
211238264 ps |
T126 |
/workspace/coverage/default/45.spi_device_flash_mode.1247048118 |
|
|
Jan 24 09:41:21 PM PST 24 |
Jan 24 09:41:39 PM PST 24 |
4440603876 ps |
T224 |
/workspace/coverage/default/6.spi_device_pass_cmd_filtering.3907699996 |
|
|
Jan 24 07:46:55 PM PST 24 |
Jan 24 07:47:07 PM PST 24 |
796814649 ps |
T121 |
/workspace/coverage/default/10.spi_device_flash_and_tpm.923514708 |
|
|
Jan 24 07:48:04 PM PST 24 |
Jan 24 07:50:08 PM PST 24 |
16049947285 ps |
T127 |
/workspace/coverage/default/31.spi_device_read_buffer_direct.440126322 |
|
|
Jan 24 07:52:47 PM PST 24 |
Jan 24 07:52:52 PM PST 24 |
468430566 ps |
T228 |
/workspace/coverage/default/36.spi_device_upload.1479161956 |
|
|
Jan 24 08:45:06 PM PST 24 |
Jan 24 08:45:15 PM PST 24 |
2396880623 ps |
T40 |
/workspace/coverage/default/20.spi_device_flash_and_tpm_min_idle.929440982 |
|
|
Jan 24 07:50:34 PM PST 24 |
Jan 24 07:54:17 PM PST 24 |
134885814107 ps |
T298 |
/workspace/coverage/default/49.spi_device_alert_test.3607230061 |
|
|
Jan 24 07:56:55 PM PST 24 |
Jan 24 07:56:57 PM PST 24 |
45402466 ps |
T215 |
/workspace/coverage/default/15.spi_device_upload.29752343 |
|
|
Jan 24 07:49:15 PM PST 24 |
Jan 24 07:49:36 PM PST 24 |
5343996006 ps |
T288 |
/workspace/coverage/default/42.spi_device_tpm_all.3149895730 |
|
|
Jan 24 07:55:10 PM PST 24 |
Jan 24 07:56:13 PM PST 24 |
8442593861 ps |
T299 |
/workspace/coverage/default/20.spi_device_pass_cmd_filtering.350984568 |
|
|
Jan 24 07:50:22 PM PST 24 |
Jan 24 07:50:28 PM PST 24 |
3922020877 ps |
T48 |
/workspace/coverage/default/4.spi_device_sec_cm.1759889581 |
|
|
Jan 24 07:46:34 PM PST 24 |
Jan 24 07:46:36 PM PST 24 |
207378892 ps |
T53 |
/workspace/coverage/default/34.spi_device_flash_mode.2701657406 |
|
|
Jan 24 07:53:34 PM PST 24 |
Jan 24 07:53:43 PM PST 24 |
263492071 ps |
T54 |
/workspace/coverage/default/47.spi_device_pass_cmd_filtering.2713689510 |
|
|
Jan 24 07:56:33 PM PST 24 |
Jan 24 07:56:37 PM PST 24 |
167846930 ps |
T55 |
/workspace/coverage/default/40.spi_device_upload.1992357557 |
|
|
Jan 24 07:54:50 PM PST 24 |
Jan 24 07:55:04 PM PST 24 |
1341830068 ps |
T56 |
/workspace/coverage/default/33.spi_device_tpm_read_hw_reg.179343537 |
|
|
Jan 24 07:53:15 PM PST 24 |
Jan 24 07:53:38 PM PST 24 |
7865960762 ps |
T57 |
/workspace/coverage/default/7.spi_device_csb_read.2607666176 |
|
|
Jan 24 07:47:01 PM PST 24 |
Jan 24 07:47:03 PM PST 24 |
32470517 ps |
T58 |
/workspace/coverage/default/48.spi_device_csb_read.1163645638 |
|
|
Jan 24 07:56:30 PM PST 24 |
Jan 24 07:56:32 PM PST 24 |
20696817 ps |
T300 |
/workspace/coverage/default/25.spi_device_alert_test.1538454298 |
|
|
Jan 24 07:51:33 PM PST 24 |
Jan 24 07:51:35 PM PST 24 |
159570791 ps |
T128 |
/workspace/coverage/default/41.spi_device_flash_mode.227656428 |
|
|
Jan 24 07:55:10 PM PST 24 |
Jan 24 07:55:54 PM PST 24 |
7489970442 ps |
T187 |
/workspace/coverage/default/14.spi_device_pass_addr_payload_swap.730820355 |
|
|
Jan 24 07:55:58 PM PST 24 |
Jan 24 07:56:10 PM PST 24 |
2745068413 ps |
T252 |
/workspace/coverage/default/49.spi_device_pass_cmd_filtering.1114492614 |
|
|
Jan 24 07:56:49 PM PST 24 |
Jan 24 07:56:59 PM PST 24 |
8173854009 ps |
T301 |
/workspace/coverage/default/33.spi_device_csb_read.1194810579 |
|
|
Jan 24 07:53:15 PM PST 24 |
Jan 24 07:53:16 PM PST 24 |
46255636 ps |
T181 |
/workspace/coverage/default/37.spi_device_pass_addr_payload_swap.1688926963 |
|
|
Jan 24 07:54:07 PM PST 24 |
Jan 24 07:54:35 PM PST 24 |
11029254664 ps |
T302 |
/workspace/coverage/default/29.spi_device_alert_test.45595117 |
|
|
Jan 24 07:52:21 PM PST 24 |
Jan 24 07:52:23 PM PST 24 |
36609856 ps |
T147 |
/workspace/coverage/default/34.spi_device_stress_all.3256593767 |
|
|
Jan 24 07:53:41 PM PST 24 |
Jan 24 07:55:05 PM PST 24 |
8279088188 ps |
T204 |
/workspace/coverage/default/5.spi_device_mailbox.3748278875 |
|
|
Jan 24 07:46:49 PM PST 24 |
Jan 24 07:46:54 PM PST 24 |
404553961 ps |
T303 |
/workspace/coverage/default/14.spi_device_read_buffer_direct.3821185631 |
|
|
Jan 24 07:48:58 PM PST 24 |
Jan 24 07:49:04 PM PST 24 |
211708176 ps |
T304 |
/workspace/coverage/default/29.spi_device_cfg_cmd.60942104 |
|
|
Jan 24 07:52:32 PM PST 24 |
Jan 24 07:52:35 PM PST 24 |
101115910 ps |
T67 |
/workspace/coverage/default/1.spi_device_flash_all.3215649828 |
|
|
Jan 24 07:45:53 PM PST 24 |
Jan 24 07:49:37 PM PST 24 |
51085563727 ps |
T305 |
/workspace/coverage/default/27.spi_device_tpm_read_hw_reg.1358845775 |
|
|
Jan 24 07:51:44 PM PST 24 |
Jan 24 07:51:58 PM PST 24 |
3603023459 ps |
T249 |
/workspace/coverage/default/26.spi_device_intercept.959074322 |
|
|
Jan 24 07:51:34 PM PST 24 |
Jan 24 07:51:42 PM PST 24 |
3660183514 ps |
T306 |
/workspace/coverage/default/34.spi_device_tpm_read_hw_reg.108180180 |
|
|
Jan 24 07:53:29 PM PST 24 |
Jan 24 07:53:34 PM PST 24 |
4395717280 ps |
T307 |
/workspace/coverage/default/0.spi_device_mailbox.1108851607 |
|
|
Jan 24 07:58:14 PM PST 24 |
Jan 24 07:59:04 PM PST 24 |
67406874459 ps |
T210 |
/workspace/coverage/default/17.spi_device_cfg_cmd.3779222956 |
|
|
Jan 24 07:49:46 PM PST 24 |
Jan 24 07:49:50 PM PST 24 |
188956915 ps |
T283 |
/workspace/coverage/default/16.spi_device_flash_mode.1268670193 |
|
|
Jan 24 07:49:26 PM PST 24 |
Jan 24 07:50:11 PM PST 24 |
53926144402 ps |
T122 |
/workspace/coverage/default/14.spi_device_flash_and_tpm_min_idle.2308892737 |
|
|
Jan 24 07:48:58 PM PST 24 |
Jan 24 07:51:09 PM PST 24 |
17976920941 ps |
T160 |
/workspace/coverage/default/27.spi_device_intercept.1720562705 |
|
|
Jan 24 08:03:25 PM PST 24 |
Jan 24 08:03:34 PM PST 24 |
486459174 ps |
T285 |
/workspace/coverage/default/19.spi_device_tpm_all.2927897094 |
|
|
Jan 24 07:50:07 PM PST 24 |
Jan 24 07:50:32 PM PST 24 |
1302866768 ps |
T123 |
/workspace/coverage/default/33.spi_device_flash_and_tpm.2963474640 |
|
|
Jan 24 09:18:54 PM PST 24 |
Jan 24 09:25:49 PM PST 24 |
54100816880 ps |
T130 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.766860469 |
|
|
Jan 24 02:52:49 PM PST 24 |
Jan 24 02:53:24 PM PST 24 |
8498371886 ps |
T308 |
/workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.3405515675 |
|
|
Jan 24 02:53:46 PM PST 24 |
Jan 24 02:54:15 PM PST 24 |
27223908 ps |
T44 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.2693412141 |
|
|
Jan 24 02:53:07 PM PST 24 |
Jan 24 02:53:19 PM PST 24 |
67030982 ps |
T106 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_rw.3045114067 |
|
|
Jan 24 02:53:12 PM PST 24 |
Jan 24 02:53:28 PM PST 24 |
160165625 ps |
T107 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.2347300118 |
|
|
Jan 24 02:53:52 PM PST 24 |
Jan 24 02:54:24 PM PST 24 |
118889617 ps |
T108 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.1910332952 |
|
|
Jan 24 04:35:18 PM PST 24 |
Jan 24 04:35:26 PM PST 24 |
75657458 ps |
T309 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.1907560741 |
|
|
Jan 24 02:52:54 PM PST 24 |
Jan 24 02:53:02 PM PST 24 |
25694696 ps |
T310 |
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.367919264 |
|
|
Jan 24 02:52:31 PM PST 24 |
Jan 24 02:52:47 PM PST 24 |
227911964 ps |
T311 |
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.314362493 |
|
|
Jan 24 03:55:34 PM PST 24 |
Jan 24 03:55:36 PM PST 24 |
13224504 ps |
T139 |
/workspace/coverage/cover_reg_top/4.spi_device_intr_test.310983836 |
|
|
Jan 24 02:53:10 PM PST 24 |
Jan 24 02:53:25 PM PST 24 |
52091605 ps |
T109 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_rw.673137642 |
|
|
Jan 24 02:53:29 PM PST 24 |
Jan 24 02:54:05 PM PST 24 |
89923929 ps |
T72 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.3747769770 |
|
|
Jan 24 02:53:46 PM PST 24 |
Jan 24 02:54:26 PM PST 24 |
817758625 ps |
T312 |
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.1479553392 |
|
|
Jan 24 02:53:55 PM PST 24 |
Jan 24 02:54:26 PM PST 24 |
12110045 ps |
T140 |
/workspace/coverage/cover_reg_top/44.spi_device_intr_test.2126906913 |
|
|
Jan 24 02:56:33 PM PST 24 |
Jan 24 02:56:36 PM PST 24 |
35253582 ps |
T313 |
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.3363197644 |
|
|
Jan 24 02:54:01 PM PST 24 |
Jan 24 02:54:32 PM PST 24 |
12826896 ps |
T141 |
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.3625186371 |
|
|
Jan 24 02:56:28 PM PST 24 |
Jan 24 02:56:30 PM PST 24 |
17090851 ps |
T73 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.669884700 |
|
|
Jan 24 02:53:47 PM PST 24 |
Jan 24 02:54:17 PM PST 24 |
197206527 ps |
T74 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.1055945557 |
|
|
Jan 24 02:53:11 PM PST 24 |
Jan 24 02:53:41 PM PST 24 |
6689120572 ps |
T314 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.3081480127 |
|
|
Jan 24 02:54:01 PM PST 24 |
Jan 24 02:54:32 PM PST 24 |
11163874 ps |
T110 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.4096895628 |
|
|
Jan 24 02:53:11 PM PST 24 |
Jan 24 02:53:28 PM PST 24 |
52954116 ps |
T111 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.4016506255 |
|
|
Jan 24 02:52:47 PM PST 24 |
Jan 24 02:52:57 PM PST 24 |
254058787 ps |
T112 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.337464132 |
|
|
Jan 24 02:52:55 PM PST 24 |
Jan 24 02:53:03 PM PST 24 |
29569576 ps |
T113 |
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.40284908 |
|
|
Jan 24 02:53:06 PM PST 24 |
Jan 24 02:53:21 PM PST 24 |
85244729 ps |
T75 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_errors.2033894013 |
|
|
Jan 24 02:52:58 PM PST 24 |
Jan 24 02:53:08 PM PST 24 |
47579853 ps |
T76 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.3247212461 |
|
|
Jan 24 02:53:46 PM PST 24 |
Jan 24 02:54:16 PM PST 24 |
22110472 ps |
T95 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.2559430369 |
|
|
Jan 24 03:20:49 PM PST 24 |
Jan 24 03:21:01 PM PST 24 |
123834538 ps |
T96 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.1213528090 |
|
|
Jan 24 02:53:00 PM PST 24 |
Jan 24 02:53:10 PM PST 24 |
54082087 ps |
T97 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.1605455683 |
|
|
Jan 24 02:53:33 PM PST 24 |
Jan 24 02:54:07 PM PST 24 |
702915002 ps |
T98 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.388574572 |
|
|
Jan 24 02:52:48 PM PST 24 |
Jan 24 02:52:57 PM PST 24 |
42659234 ps |
T99 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.1719618015 |
|
|
Jan 24 02:52:55 PM PST 24 |
Jan 24 02:53:04 PM PST 24 |
95238855 ps |
T78 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.615174973 |
|
|
Jan 24 02:53:43 PM PST 24 |
Jan 24 02:54:19 PM PST 24 |
542240371 ps |
T103 |
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.3114645890 |
|
|
Jan 24 02:54:06 PM PST 24 |
Jan 24 02:54:37 PM PST 24 |
54802775 ps |
T136 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.2289390249 |
|
|
Jan 24 02:53:53 PM PST 24 |
Jan 24 02:54:23 PM PST 24 |
14030597 ps |
T138 |
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.4242212829 |
|
|
Jan 24 02:53:45 PM PST 24 |
Jan 24 02:54:16 PM PST 24 |
59303748 ps |
T114 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.4122071173 |
|
|
Jan 24 02:52:58 PM PST 24 |
Jan 24 02:53:11 PM PST 24 |
111144791 ps |
T315 |
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.2606270438 |
|
|
Jan 24 02:53:40 PM PST 24 |
Jan 24 02:54:09 PM PST 24 |
31787615 ps |
T100 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.2869265014 |
|
|
Jan 24 02:52:32 PM PST 24 |
Jan 24 02:52:47 PM PST 24 |
60547134 ps |
T77 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.127558367 |
|
|
Jan 24 02:52:31 PM PST 24 |
Jan 24 02:52:51 PM PST 24 |
1231039727 ps |
T118 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.3081511890 |
|
|
Jan 24 02:52:32 PM PST 24 |
Jan 24 02:52:45 PM PST 24 |
33326557 ps |
T131 |
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.2227877854 |
|
|
Jan 24 02:53:46 PM PST 24 |
Jan 24 02:54:17 PM PST 24 |
391871433 ps |
T115 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.1212717263 |
|
|
Jan 24 02:52:49 PM PST 24 |
Jan 24 02:53:31 PM PST 24 |
2239755400 ps |
T132 |
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.2650447692 |
|
|
Jan 24 02:53:27 PM PST 24 |
Jan 24 02:54:03 PM PST 24 |
269851825 ps |
T133 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.1162323141 |
|
|
Jan 24 02:53:47 PM PST 24 |
Jan 24 02:54:17 PM PST 24 |
40582439 ps |
T316 |
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.2620837225 |
|
|
Jan 24 02:56:27 PM PST 24 |
Jan 24 02:56:29 PM PST 24 |
15545987 ps |
T317 |
/workspace/coverage/cover_reg_top/38.spi_device_intr_test.2699246919 |
|
|
Jan 24 02:54:10 PM PST 24 |
Jan 24 02:54:38 PM PST 24 |
93740925 ps |
T129 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.2778435166 |
|
|
Jan 24 02:53:10 PM PST 24 |
Jan 24 02:53:26 PM PST 24 |
28675886 ps |
T92 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.1485167229 |
|
|
Jan 24 02:52:29 PM PST 24 |
Jan 24 02:52:56 PM PST 24 |
2180264678 ps |
T318 |
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.2563979647 |
|
|
Jan 24 02:54:04 PM PST 24 |
Jan 24 02:54:34 PM PST 24 |
14921890 ps |
T154 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.3333205892 |
|
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Jan 24 02:53:44 PM PST 24 |
Jan 24 02:54:19 PM PST 24 |
282798894 ps |
T134 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.2709393698 |
|
|
Jan 24 02:53:26 PM PST 24 |
Jan 24 02:54:00 PM PST 24 |
165533467 ps |
T319 |
/workspace/coverage/cover_reg_top/46.spi_device_intr_test.1243879220 |
|
|
Jan 24 02:56:37 PM PST 24 |
Jan 24 02:56:39 PM PST 24 |
44780258 ps |
T320 |
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.838561171 |
|
|
Jan 24 02:53:40 PM PST 24 |
Jan 24 02:54:15 PM PST 24 |
124805204 ps |
T321 |
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.409553656 |
|
|
Jan 24 02:53:28 PM PST 24 |
Jan 24 02:54:02 PM PST 24 |
39111618 ps |
T135 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.4094048741 |
|
|
Jan 24 02:52:33 PM PST 24 |
Jan 24 02:52:48 PM PST 24 |
76351635 ps |
T82 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.299296632 |
|
|
Jan 24 02:53:29 PM PST 24 |
Jan 24 02:54:20 PM PST 24 |
580775562 ps |
T322 |
/workspace/coverage/cover_reg_top/3.spi_device_intr_test.1492207058 |
|
|
Jan 24 02:52:47 PM PST 24 |
Jan 24 02:52:56 PM PST 24 |
62898086 ps |
T323 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.1553285398 |
|
|
Jan 24 02:52:48 PM PST 24 |
Jan 24 02:52:57 PM PST 24 |
41095554 ps |
T324 |
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.3678517961 |
|
|
Jan 24 02:54:13 PM PST 24 |
Jan 24 02:54:39 PM PST 24 |
71743781 ps |
T325 |
/workspace/coverage/cover_reg_top/8.spi_device_intr_test.1229643171 |
|
|
Jan 24 02:53:14 PM PST 24 |
Jan 24 02:53:30 PM PST 24 |
28344862 ps |
T326 |
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.712727609 |
|
|
Jan 24 02:54:08 PM PST 24 |
Jan 24 02:54:37 PM PST 24 |
14802458 ps |
T327 |
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.490757750 |
|
|
Jan 24 02:54:01 PM PST 24 |
Jan 24 02:54:32 PM PST 24 |
12578651 ps |
T328 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_rw.3913928747 |
|
|
Jan 24 02:53:17 PM PST 24 |
Jan 24 02:53:45 PM PST 24 |
72241655 ps |
T329 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.3811767145 |
|
|
Jan 24 02:52:54 PM PST 24 |
Jan 24 02:53:03 PM PST 24 |
84572058 ps |
T79 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_errors.3862469761 |
|
|
Jan 24 03:02:46 PM PST 24 |
Jan 24 03:03:02 PM PST 24 |
433611155 ps |
T330 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.572641229 |
|
|
Jan 24 02:52:53 PM PST 24 |
Jan 24 02:53:01 PM PST 24 |
34994131 ps |
T331 |
/workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.1462797980 |
|
|
Jan 24 02:53:03 PM PST 24 |
Jan 24 02:53:13 PM PST 24 |
29310948 ps |
T81 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.3511881721 |
|
|
Jan 24 02:53:46 PM PST 24 |
Jan 24 02:54:15 PM PST 24 |
150535363 ps |
T332 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.2361951313 |
|
|
Jan 24 02:53:47 PM PST 24 |
Jan 24 02:54:15 PM PST 24 |
28386544 ps |
T116 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_rw.2856690059 |
|
|
Jan 24 02:53:27 PM PST 24 |
Jan 24 02:54:02 PM PST 24 |
387992087 ps |
T333 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.3063960451 |
|
|
Jan 24 02:53:11 PM PST 24 |
Jan 24 02:53:27 PM PST 24 |
60580063 ps |
T117 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.3056083756 |
|
|
Jan 24 02:53:09 PM PST 24 |
Jan 24 02:53:24 PM PST 24 |
183401348 ps |
T334 |
/workspace/coverage/cover_reg_top/7.spi_device_intr_test.156125862 |
|
|
Jan 24 02:53:04 PM PST 24 |
Jan 24 02:53:15 PM PST 24 |
16423968 ps |
T335 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.450020325 |
|
|
Jan 24 02:53:29 PM PST 24 |
Jan 24 02:54:05 PM PST 24 |
44254718 ps |
T336 |
/workspace/coverage/cover_reg_top/47.spi_device_intr_test.257851155 |
|
|
Jan 24 02:56:30 PM PST 24 |
Jan 24 02:56:32 PM PST 24 |
67150222 ps |
T337 |
/workspace/coverage/cover_reg_top/40.spi_device_intr_test.2206427121 |
|
|
Jan 24 02:54:08 PM PST 24 |
Jan 24 02:54:38 PM PST 24 |
43168278 ps |
T101 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.458340731 |
|
|
Jan 24 02:53:27 PM PST 24 |
Jan 24 02:54:07 PM PST 24 |
1972648204 ps |
T102 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.3770572414 |
|
|
Jan 24 02:53:40 PM PST 24 |
Jan 24 02:54:17 PM PST 24 |
304588026 ps |
T80 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.2577132328 |
|
|
Jan 24 02:53:43 PM PST 24 |
Jan 24 02:54:15 PM PST 24 |
111716282 ps |
T93 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.3056520541 |
|
|
Jan 24 02:52:56 PM PST 24 |
Jan 24 02:53:22 PM PST 24 |
1183538680 ps |
T338 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.3651546665 |
|
|
Jan 24 02:53:45 PM PST 24 |
Jan 24 02:54:15 PM PST 24 |
28850464 ps |
T137 |
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.2934746615 |
|
|
Jan 24 02:53:28 PM PST 24 |
Jan 24 02:54:05 PM PST 24 |
304408201 ps |
T339 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.2073050881 |
|
|
Jan 24 02:53:28 PM PST 24 |
Jan 24 02:54:02 PM PST 24 |
12977157 ps |
T94 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.802270751 |
|
|
Jan 24 02:53:03 PM PST 24 |
Jan 24 02:53:19 PM PST 24 |
290694678 ps |
T340 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.2904381452 |
|
|
Jan 24 02:53:45 PM PST 24 |
Jan 24 02:54:14 PM PST 24 |
46609588 ps |
T341 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.3931539373 |
|
|
Jan 24 04:41:08 PM PST 24 |
Jan 24 04:41:11 PM PST 24 |
23950808 ps |
T342 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.525143114 |
|
|
Jan 24 02:54:10 PM PST 24 |
Jan 24 02:54:38 PM PST 24 |
22838282 ps |
T343 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.720444797 |
|
|
Jan 24 02:53:40 PM PST 24 |
Jan 24 02:54:12 PM PST 24 |
43630543 ps |
T104 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.1629609996 |
|
|
Jan 24 02:53:09 PM PST 24 |
Jan 24 02:53:26 PM PST 24 |
40760220 ps |
T344 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.3089045705 |
|
|
Jan 24 02:53:04 PM PST 24 |
Jan 24 02:53:30 PM PST 24 |
729211162 ps |
T345 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.2660960739 |
|
|
Jan 24 02:54:16 PM PST 24 |
Jan 24 02:54:41 PM PST 24 |
12910571 ps |
T346 |
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.2221193568 |
|
|
Jan 24 02:56:26 PM PST 24 |
Jan 24 02:56:28 PM PST 24 |
39144268 ps |
T347 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_rw.3549320659 |
|
|
Jan 24 02:53:46 PM PST 24 |
Jan 24 02:54:15 PM PST 24 |
193690918 ps |
T155 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.1035296199 |
|
|
Jan 24 02:52:55 PM PST 24 |
Jan 24 02:53:14 PM PST 24 |
204180218 ps |
T87 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_errors.2051969627 |
|
|
Jan 24 02:52:55 PM PST 24 |
Jan 24 02:53:06 PM PST 24 |
64877991 ps |
T348 |
/workspace/coverage/cover_reg_top/35.spi_device_intr_test.3199995844 |
|
|
Jan 24 02:54:06 PM PST 24 |
Jan 24 02:54:36 PM PST 24 |
14546117 ps |
T349 |
/workspace/coverage/cover_reg_top/33.spi_device_intr_test.777844229 |
|
|
Jan 24 03:04:28 PM PST 24 |
Jan 24 03:04:47 PM PST 24 |
35359867 ps |
T350 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.3845906549 |
|
|
Jan 24 02:53:17 PM PST 24 |
Jan 24 02:53:53 PM PST 24 |
720625584 ps |
T351 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.941025971 |
|
|
Jan 24 02:52:33 PM PST 24 |
Jan 24 02:52:47 PM PST 24 |
115638901 ps |
T352 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.990328620 |
|
|
Jan 24 02:54:00 PM PST 24 |
Jan 24 02:54:31 PM PST 24 |
13059790 ps |
T353 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.1904126512 |
|
|
Jan 24 05:58:34 PM PST 24 |
Jan 24 05:58:36 PM PST 24 |
84011188 ps |
T152 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.338146293 |
|
|
Jan 24 02:53:01 PM PST 24 |
Jan 24 02:53:31 PM PST 24 |
3735976226 ps |
T354 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.2376908018 |
|
|
Jan 24 02:53:04 PM PST 24 |
Jan 24 02:53:17 PM PST 24 |
350628014 ps |
T355 |
/workspace/coverage/cover_reg_top/9.spi_device_intr_test.2509005237 |
|
|
Jan 24 02:53:14 PM PST 24 |
Jan 24 02:53:30 PM PST 24 |
13485879 ps |
T356 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.3616730429 |
|
|
Jan 24 02:52:55 PM PST 24 |
Jan 24 02:53:03 PM PST 24 |
75156085 ps |
T85 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_errors.2741867036 |
|
|
Jan 24 02:53:18 PM PST 24 |
Jan 24 02:53:52 PM PST 24 |
882396106 ps |
T88 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.4289709387 |
|
|
Jan 24 02:53:06 PM PST 24 |
Jan 24 02:53:20 PM PST 24 |
177518634 ps |
T357 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.1685373859 |
|
|
Jan 24 02:53:51 PM PST 24 |
Jan 24 02:54:22 PM PST 24 |
43281112 ps |
T358 |
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.1072854695 |
|
|
Jan 24 02:53:47 PM PST 24 |
Jan 24 02:54:19 PM PST 24 |
1106473912 ps |
T359 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.4117907374 |
|
|
Jan 24 02:52:28 PM PST 24 |
Jan 24 02:52:41 PM PST 24 |
114644769 ps |
T360 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.2790434940 |
|
|
Jan 24 02:52:37 PM PST 24 |
Jan 24 02:53:10 PM PST 24 |
373928906 ps |
T89 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.4095739036 |
|
|
Jan 24 02:53:15 PM PST 24 |
Jan 24 02:53:36 PM PST 24 |
263435372 ps |
T361 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.3362424579 |
|
|
Jan 24 02:53:42 PM PST 24 |
Jan 24 02:54:14 PM PST 24 |
31634101 ps |
T362 |
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.3780713391 |
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|
Jan 24 02:54:00 PM PST 24 |
Jan 24 02:54:31 PM PST 24 |
12630362 ps |
T363 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.1640620359 |
|
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Jan 24 02:52:54 PM PST 24 |
Jan 24 02:53:01 PM PST 24 |
33800151 ps |
T364 |
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.2777284450 |
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|
Jan 24 02:53:45 PM PST 24 |
Jan 24 02:54:14 PM PST 24 |
16741322 ps |
T153 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.854058814 |
|
|
Jan 24 02:53:51 PM PST 24 |
Jan 24 02:54:28 PM PST 24 |
103752798 ps |
T365 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.3643825829 |
|
|
Jan 24 02:53:47 PM PST 24 |
Jan 24 02:54:21 PM PST 24 |
110078278 ps |
T366 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.2484487651 |
|
|
Jan 24 02:53:22 PM PST 24 |
Jan 24 02:53:54 PM PST 24 |
53753439 ps |
T367 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_rw.3760642591 |
|
|
Jan 24 02:53:37 PM PST 24 |
Jan 24 02:54:10 PM PST 24 |
225409361 ps |
T368 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.1510588931 |
|
|
Jan 24 02:53:27 PM PST 24 |
Jan 24 02:54:01 PM PST 24 |
53784000 ps |
T369 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.1855257781 |
|
|
Jan 24 02:54:01 PM PST 24 |
Jan 24 02:54:32 PM PST 24 |
104967712 ps |
T370 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.2588166941 |
|
|
Jan 24 02:53:35 PM PST 24 |
Jan 24 02:54:08 PM PST 24 |
100481832 ps |
T371 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.3142919181 |
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|
Jan 24 02:53:57 PM PST 24 |
Jan 24 02:54:28 PM PST 24 |
12487268 ps |
T372 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.4250127964 |
|
|
Jan 24 02:52:49 PM PST 24 |
Jan 24 02:53:23 PM PST 24 |
6903337705 ps |
T373 |
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.2360191667 |
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|
Jan 24 02:53:36 PM PST 24 |
Jan 24 02:54:09 PM PST 24 |
40910158 ps |
T374 |
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.3417868119 |
|
|
Jan 24 02:53:45 PM PST 24 |
Jan 24 02:54:14 PM PST 24 |
28989676 ps |
T90 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.2521203569 |
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|
Jan 24 02:53:26 PM PST 24 |
Jan 24 02:54:01 PM PST 24 |
161906575 ps |
T375 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.447869897 |
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Jan 24 02:54:11 PM PST 24 |
Jan 24 02:54:38 PM PST 24 |
17666287 ps |