| T811 |
/workspace/coverage/default/49.spi_device_stress_all.1415324446 |
|
|
Feb 21 02:27:48 PM PST 24 |
Feb 21 02:28:36 PM PST 24 |
7549685318 ps |
| T252 |
/workspace/coverage/default/7.spi_device_flash_and_tpm_min_idle.34434608 |
|
|
Feb 21 02:22:50 PM PST 24 |
Feb 21 02:24:45 PM PST 24 |
69666838964 ps |
| T812 |
/workspace/coverage/default/43.spi_device_flash_and_tpm_min_idle.33967535 |
|
|
Feb 21 02:27:10 PM PST 24 |
Feb 21 02:28:43 PM PST 24 |
81650307470 ps |
| T813 |
/workspace/coverage/default/24.spi_device_flash_mode.968321435 |
|
|
Feb 21 02:25:16 PM PST 24 |
Feb 21 02:25:32 PM PST 24 |
10387572151 ps |
| T814 |
/workspace/coverage/default/42.spi_device_read_buffer_direct.847766905 |
|
|
Feb 21 02:27:09 PM PST 24 |
Feb 21 02:27:16 PM PST 24 |
1436582163 ps |
| T815 |
/workspace/coverage/default/22.spi_device_mailbox.473243050 |
|
|
Feb 21 02:25:01 PM PST 24 |
Feb 21 02:25:08 PM PST 24 |
3725498012 ps |
| T816 |
/workspace/coverage/default/5.spi_device_flash_and_tpm.800709975 |
|
|
Feb 21 02:22:34 PM PST 24 |
Feb 21 02:23:31 PM PST 24 |
6670591826 ps |
| T817 |
/workspace/coverage/default/39.spi_device_intercept.958857312 |
|
|
Feb 21 02:26:53 PM PST 24 |
Feb 21 02:27:02 PM PST 24 |
6022317568 ps |
| T818 |
/workspace/coverage/default/25.spi_device_flash_all.2759295766 |
|
|
Feb 21 02:25:27 PM PST 24 |
Feb 21 02:27:45 PM PST 24 |
69377513058 ps |
| T819 |
/workspace/coverage/default/13.spi_device_cfg_cmd.75762139 |
|
|
Feb 21 02:23:44 PM PST 24 |
Feb 21 02:23:47 PM PST 24 |
2089901739 ps |
| T250 |
/workspace/coverage/default/14.spi_device_stress_all.3265070433 |
|
|
Feb 21 02:23:56 PM PST 24 |
Feb 21 02:27:10 PM PST 24 |
15575810809 ps |
| T820 |
/workspace/coverage/default/25.spi_device_tpm_all.3089549832 |
|
|
Feb 21 02:25:20 PM PST 24 |
Feb 21 02:27:01 PM PST 24 |
46924174246 ps |
| T821 |
/workspace/coverage/default/34.spi_device_mailbox.4129489467 |
|
|
Feb 21 02:26:21 PM PST 24 |
Feb 21 02:26:33 PM PST 24 |
3270039759 ps |
| T822 |
/workspace/coverage/default/22.spi_device_stress_all.799434362 |
|
|
Feb 21 02:25:08 PM PST 24 |
Feb 21 02:25:10 PM PST 24 |
53283620 ps |
| T823 |
/workspace/coverage/default/1.spi_device_pass_cmd_filtering.4085188345 |
|
|
Feb 21 02:21:19 PM PST 24 |
Feb 21 02:21:49 PM PST 24 |
13862973462 ps |
| T824 |
/workspace/coverage/default/20.spi_device_flash_all.3270603384 |
|
|
Feb 21 02:24:42 PM PST 24 |
Feb 21 02:25:34 PM PST 24 |
21245789465 ps |
| T257 |
/workspace/coverage/default/35.spi_device_stress_all.3974075353 |
|
|
Feb 21 02:26:26 PM PST 24 |
Feb 21 02:38:27 PM PST 24 |
544965700937 ps |
| T825 |
/workspace/coverage/default/45.spi_device_alert_test.53553206 |
|
|
Feb 21 02:27:34 PM PST 24 |
Feb 21 02:27:35 PM PST 24 |
11547351 ps |
| T826 |
/workspace/coverage/default/11.spi_device_upload.1656127943 |
|
|
Feb 21 02:23:34 PM PST 24 |
Feb 21 02:23:47 PM PST 24 |
3178151718 ps |
| T827 |
/workspace/coverage/default/39.spi_device_pass_cmd_filtering.297862439 |
|
|
Feb 21 02:26:52 PM PST 24 |
Feb 21 02:26:59 PM PST 24 |
938951519 ps |
| T828 |
/workspace/coverage/default/33.spi_device_upload.3855354855 |
|
|
Feb 21 02:26:14 PM PST 24 |
Feb 21 02:26:20 PM PST 24 |
2869074299 ps |
| T829 |
/workspace/coverage/default/48.spi_device_csb_read.508760488 |
|
|
Feb 21 02:27:41 PM PST 24 |
Feb 21 02:27:43 PM PST 24 |
14503553 ps |
| T830 |
/workspace/coverage/default/34.spi_device_tpm_read_hw_reg.541551357 |
|
|
Feb 21 02:26:19 PM PST 24 |
Feb 21 02:26:27 PM PST 24 |
1787310083 ps |
| T831 |
/workspace/coverage/default/4.spi_device_read_buffer_direct.367109974 |
|
|
Feb 21 02:22:07 PM PST 24 |
Feb 21 02:22:13 PM PST 24 |
4749449495 ps |
| T832 |
/workspace/coverage/default/29.spi_device_stress_all.646178030 |
|
|
Feb 21 02:26:05 PM PST 24 |
Feb 21 02:30:54 PM PST 24 |
58230007587 ps |
| T833 |
/workspace/coverage/default/43.spi_device_flash_all.3902295795 |
|
|
Feb 21 02:27:11 PM PST 24 |
Feb 21 02:29:08 PM PST 24 |
23007951542 ps |
| T834 |
/workspace/coverage/default/46.spi_device_alert_test.110104687 |
|
|
Feb 21 02:27:39 PM PST 24 |
Feb 21 02:27:40 PM PST 24 |
57025842 ps |
| T835 |
/workspace/coverage/default/8.spi_device_tpm_read_hw_reg.1026309596 |
|
|
Feb 21 02:22:47 PM PST 24 |
Feb 21 02:22:52 PM PST 24 |
1043745392 ps |
| T836 |
/workspace/coverage/default/8.spi_device_mem_parity.718857671 |
|
|
Feb 21 02:22:50 PM PST 24 |
Feb 21 02:22:52 PM PST 24 |
142551283 ps |
| T837 |
/workspace/coverage/default/42.spi_device_alert_test.2744133454 |
|
|
Feb 21 02:27:10 PM PST 24 |
Feb 21 02:27:11 PM PST 24 |
60965353 ps |
| T838 |
/workspace/coverage/default/4.spi_device_mem_parity.505823562 |
|
|
Feb 21 02:22:08 PM PST 24 |
Feb 21 02:22:09 PM PST 24 |
27311234 ps |
| T839 |
/workspace/coverage/default/18.spi_device_flash_mode.2929303565 |
|
|
Feb 21 02:24:35 PM PST 24 |
Feb 21 02:25:14 PM PST 24 |
34286998750 ps |
| T840 |
/workspace/coverage/default/13.spi_device_tpm_sts_read.2548948642 |
|
|
Feb 21 02:23:43 PM PST 24 |
Feb 21 02:23:44 PM PST 24 |
200458719 ps |
| T841 |
/workspace/coverage/default/40.spi_device_tpm_sts_read.2146505015 |
|
|
Feb 21 02:26:54 PM PST 24 |
Feb 21 02:26:55 PM PST 24 |
51282347 ps |
| T842 |
/workspace/coverage/default/1.spi_device_intercept.407483740 |
|
|
Feb 21 02:21:23 PM PST 24 |
Feb 21 02:21:26 PM PST 24 |
358258231 ps |
| T843 |
/workspace/coverage/default/4.spi_device_alert_test.3419929384 |
|
|
Feb 21 02:22:26 PM PST 24 |
Feb 21 02:22:27 PM PST 24 |
30521002 ps |
| T844 |
/workspace/coverage/default/40.spi_device_upload.464843602 |
|
|
Feb 21 02:26:58 PM PST 24 |
Feb 21 02:27:03 PM PST 24 |
231730399 ps |
| T845 |
/workspace/coverage/default/36.spi_device_tpm_read_hw_reg.836616508 |
|
|
Feb 21 02:26:27 PM PST 24 |
Feb 21 02:26:32 PM PST 24 |
514423555 ps |
| T846 |
/workspace/coverage/default/4.spi_device_tpm_read_hw_reg.1106353601 |
|
|
Feb 21 02:22:08 PM PST 24 |
Feb 21 02:22:10 PM PST 24 |
164449441 ps |
| T847 |
/workspace/coverage/default/16.spi_device_read_buffer_direct.1756477627 |
|
|
Feb 21 02:24:22 PM PST 24 |
Feb 21 02:24:27 PM PST 24 |
292494419 ps |
| T848 |
/workspace/coverage/default/15.spi_device_cfg_cmd.40162152 |
|
|
Feb 21 02:24:04 PM PST 24 |
Feb 21 02:24:07 PM PST 24 |
276829801 ps |
| T849 |
/workspace/coverage/default/8.spi_device_upload.3032697152 |
|
|
Feb 21 02:23:01 PM PST 24 |
Feb 21 02:23:04 PM PST 24 |
761762518 ps |
| T850 |
/workspace/coverage/default/29.spi_device_tpm_rw.3392787749 |
|
|
Feb 21 02:25:51 PM PST 24 |
Feb 21 02:25:53 PM PST 24 |
126959708 ps |
| T851 |
/workspace/coverage/default/9.spi_device_intercept.3210734423 |
|
|
Feb 21 02:23:18 PM PST 24 |
Feb 21 02:23:23 PM PST 24 |
1222651031 ps |
| T852 |
/workspace/coverage/default/43.spi_device_tpm_read_hw_reg.2840075664 |
|
|
Feb 21 02:27:07 PM PST 24 |
Feb 21 02:27:19 PM PST 24 |
2729454473 ps |
| T853 |
/workspace/coverage/default/28.spi_device_intercept.2720378640 |
|
|
Feb 21 02:25:45 PM PST 24 |
Feb 21 02:25:59 PM PST 24 |
11081021494 ps |
| T854 |
/workspace/coverage/default/43.spi_device_alert_test.1695219098 |
|
|
Feb 21 02:27:10 PM PST 24 |
Feb 21 02:27:11 PM PST 24 |
209847700 ps |
| T855 |
/workspace/coverage/default/12.spi_device_flash_and_tpm.4091983092 |
|
|
Feb 21 02:23:49 PM PST 24 |
Feb 21 02:24:46 PM PST 24 |
16985183482 ps |
| T856 |
/workspace/coverage/default/24.spi_device_tpm_read_hw_reg.2662088292 |
|
|
Feb 21 02:25:15 PM PST 24 |
Feb 21 02:25:39 PM PST 24 |
7269504199 ps |
| T857 |
/workspace/coverage/default/23.spi_device_flash_and_tpm_min_idle.2103223898 |
|
|
Feb 21 02:25:16 PM PST 24 |
Feb 21 02:26:06 PM PST 24 |
6104703999 ps |
| T858 |
/workspace/coverage/default/25.spi_device_alert_test.746344455 |
|
|
Feb 21 02:25:35 PM PST 24 |
Feb 21 02:25:36 PM PST 24 |
22013120 ps |
| T859 |
/workspace/coverage/default/30.spi_device_flash_all.3378588479 |
|
|
Feb 21 02:26:09 PM PST 24 |
Feb 21 02:27:36 PM PST 24 |
22430429746 ps |
| T860 |
/workspace/coverage/default/15.spi_device_tpm_all.792802261 |
|
|
Feb 21 02:24:05 PM PST 24 |
Feb 21 02:24:43 PM PST 24 |
3959814456 ps |
| T861 |
/workspace/coverage/default/9.spi_device_tpm_sts_read.238606449 |
|
|
Feb 21 02:23:01 PM PST 24 |
Feb 21 02:23:02 PM PST 24 |
41768622 ps |
| T862 |
/workspace/coverage/default/0.spi_device_flash_mode.3450870009 |
|
|
Feb 21 02:20:59 PM PST 24 |
Feb 21 02:21:21 PM PST 24 |
5393356137 ps |
| T863 |
/workspace/coverage/default/40.spi_device_pass_addr_payload_swap.1347745890 |
|
|
Feb 21 02:26:58 PM PST 24 |
Feb 21 02:27:09 PM PST 24 |
2687910888 ps |
| T864 |
/workspace/coverage/default/40.spi_device_csb_read.2903816309 |
|
|
Feb 21 02:26:55 PM PST 24 |
Feb 21 02:26:57 PM PST 24 |
16791727 ps |
| T865 |
/workspace/coverage/default/5.spi_device_tpm_all.1409211988 |
|
|
Feb 21 02:22:23 PM PST 24 |
Feb 21 02:23:14 PM PST 24 |
10358711171 ps |
| T866 |
/workspace/coverage/default/8.spi_device_tpm_sts_read.2361507313 |
|
|
Feb 21 02:22:49 PM PST 24 |
Feb 21 02:22:50 PM PST 24 |
41264355 ps |
| T867 |
/workspace/coverage/default/2.spi_device_tpm_read_hw_reg.1028482362 |
|
|
Feb 21 02:21:43 PM PST 24 |
Feb 21 02:21:46 PM PST 24 |
3281193917 ps |
| T868 |
/workspace/coverage/default/41.spi_device_tpm_read_hw_reg.82233420 |
|
|
Feb 21 02:27:02 PM PST 24 |
Feb 21 02:27:24 PM PST 24 |
14230130270 ps |
| T869 |
/workspace/coverage/default/29.spi_device_upload.2712653611 |
|
|
Feb 21 02:26:06 PM PST 24 |
Feb 21 02:26:28 PM PST 24 |
39589638815 ps |
| T870 |
/workspace/coverage/default/16.spi_device_csb_read.2859030912 |
|
|
Feb 21 02:24:17 PM PST 24 |
Feb 21 02:24:18 PM PST 24 |
23296622 ps |
| T871 |
/workspace/coverage/default/32.spi_device_csb_read.680619936 |
|
|
Feb 21 02:26:10 PM PST 24 |
Feb 21 02:26:11 PM PST 24 |
89597198 ps |
| T872 |
/workspace/coverage/default/13.spi_device_tpm_rw.4157056135 |
|
|
Feb 21 02:23:35 PM PST 24 |
Feb 21 02:23:46 PM PST 24 |
215879399 ps |
| T873 |
/workspace/coverage/default/4.spi_device_csb_read.4104826580 |
|
|
Feb 21 02:22:09 PM PST 24 |
Feb 21 02:22:10 PM PST 24 |
76010705 ps |
| T874 |
/workspace/coverage/default/36.spi_device_flash_and_tpm.1201861552 |
|
|
Feb 21 02:26:42 PM PST 24 |
Feb 21 02:33:35 PM PST 24 |
213316181958 ps |
| T875 |
/workspace/coverage/default/19.spi_device_flash_mode.2900357823 |
|
|
Feb 21 02:24:39 PM PST 24 |
Feb 21 02:24:46 PM PST 24 |
3296581893 ps |
| T876 |
/workspace/coverage/default/48.spi_device_read_buffer_direct.1265477745 |
|
|
Feb 21 02:27:51 PM PST 24 |
Feb 21 02:27:55 PM PST 24 |
303179758 ps |
| T877 |
/workspace/coverage/default/6.spi_device_flash_mode.1570938236 |
|
|
Feb 21 02:22:42 PM PST 24 |
Feb 21 02:23:13 PM PST 24 |
16119439321 ps |
| T878 |
/workspace/coverage/default/19.spi_device_flash_and_tpm_min_idle.46760569 |
|
|
Feb 21 02:24:38 PM PST 24 |
Feb 21 02:28:28 PM PST 24 |
33021031769 ps |
| T879 |
/workspace/coverage/default/46.spi_device_flash_all.1457636095 |
|
|
Feb 21 02:27:39 PM PST 24 |
Feb 21 02:28:00 PM PST 24 |
2190690816 ps |
| T880 |
/workspace/coverage/default/9.spi_device_mailbox.1689589300 |
|
|
Feb 21 02:23:17 PM PST 24 |
Feb 21 02:23:32 PM PST 24 |
3598646716 ps |
| T881 |
/workspace/coverage/default/7.spi_device_flash_and_tpm.1392772053 |
|
|
Feb 21 02:22:46 PM PST 24 |
Feb 21 02:23:21 PM PST 24 |
8119850485 ps |
| T882 |
/workspace/coverage/default/25.spi_device_cfg_cmd.2205752604 |
|
|
Feb 21 02:25:27 PM PST 24 |
Feb 21 02:25:30 PM PST 24 |
1025868206 ps |
| T883 |
/workspace/coverage/default/25.spi_device_pass_addr_payload_swap.910108233 |
|
|
Feb 21 02:25:34 PM PST 24 |
Feb 21 02:25:45 PM PST 24 |
3004507427 ps |
| T884 |
/workspace/coverage/default/34.spi_device_tpm_all.50081485 |
|
|
Feb 21 02:26:22 PM PST 24 |
Feb 21 02:26:36 PM PST 24 |
774954358 ps |
| T885 |
/workspace/coverage/default/18.spi_device_tpm_rw.882752497 |
|
|
Feb 21 02:24:30 PM PST 24 |
Feb 21 02:24:35 PM PST 24 |
809585793 ps |
| T886 |
/workspace/coverage/default/39.spi_device_tpm_all.4206189109 |
|
|
Feb 21 02:26:52 PM PST 24 |
Feb 21 02:27:25 PM PST 24 |
4095709940 ps |
| T887 |
/workspace/coverage/default/10.spi_device_upload.3763241386 |
|
|
Feb 21 02:23:27 PM PST 24 |
Feb 21 02:23:34 PM PST 24 |
2398283650 ps |
| T888 |
/workspace/coverage/default/17.spi_device_mem_parity.1851106120 |
|
|
Feb 21 02:24:27 PM PST 24 |
Feb 21 02:24:28 PM PST 24 |
14770210 ps |
| T889 |
/workspace/coverage/default/5.spi_device_flash_all.1821473807 |
|
|
Feb 21 02:22:27 PM PST 24 |
Feb 21 02:22:48 PM PST 24 |
3136368277 ps |
| T890 |
/workspace/coverage/default/17.spi_device_mailbox.1574376040 |
|
|
Feb 21 02:24:27 PM PST 24 |
Feb 21 02:24:45 PM PST 24 |
4725619751 ps |
| T891 |
/workspace/coverage/default/13.spi_device_pass_addr_payload_swap.2114508847 |
|
|
Feb 21 02:23:37 PM PST 24 |
Feb 21 02:23:42 PM PST 24 |
2466054482 ps |
| T892 |
/workspace/coverage/default/21.spi_device_cfg_cmd.225698421 |
|
|
Feb 21 02:25:00 PM PST 24 |
Feb 21 02:25:02 PM PST 24 |
143151042 ps |
| T893 |
/workspace/coverage/default/27.spi_device_upload.1313674773 |
|
|
Feb 21 02:26:03 PM PST 24 |
Feb 21 02:26:17 PM PST 24 |
5702963558 ps |
| T894 |
/workspace/coverage/default/13.spi_device_flash_and_tpm.1883393337 |
|
|
Feb 21 02:23:41 PM PST 24 |
Feb 21 02:26:16 PM PST 24 |
13536561680 ps |
| T895 |
/workspace/coverage/default/21.spi_device_pass_addr_payload_swap.2560493689 |
|
|
Feb 21 02:24:51 PM PST 24 |
Feb 21 02:24:59 PM PST 24 |
3148046490 ps |
| T896 |
/workspace/coverage/default/26.spi_device_flash_all.4015144632 |
|
|
Feb 21 02:25:29 PM PST 24 |
Feb 21 02:26:14 PM PST 24 |
106883625248 ps |
| T897 |
/workspace/coverage/default/17.spi_device_ram_cfg.792877185 |
|
|
Feb 21 02:24:24 PM PST 24 |
Feb 21 02:24:25 PM PST 24 |
16955493 ps |
| T898 |
/workspace/coverage/default/10.spi_device_tpm_rw.1368534503 |
|
|
Feb 21 02:23:39 PM PST 24 |
Feb 21 02:23:47 PM PST 24 |
1712062596 ps |
| T899 |
/workspace/coverage/default/9.spi_device_tpm_rw.3183073147 |
|
|
Feb 21 02:23:17 PM PST 24 |
Feb 21 02:23:19 PM PST 24 |
212586728 ps |
| T900 |
/workspace/coverage/default/10.spi_device_flash_and_tpm.178477426 |
|
|
Feb 21 02:23:35 PM PST 24 |
Feb 21 02:26:22 PM PST 24 |
27449709114 ps |
| T901 |
/workspace/coverage/default/14.spi_device_mem_parity.2157470392 |
|
|
Feb 21 02:23:45 PM PST 24 |
Feb 21 02:23:47 PM PST 24 |
24849332 ps |
| T271 |
/workspace/coverage/default/1.spi_device_flash_and_tpm.2514410339 |
|
|
Feb 21 02:21:20 PM PST 24 |
Feb 21 02:27:15 PM PST 24 |
41773308493 ps |
| T902 |
/workspace/coverage/default/27.spi_device_pass_cmd_filtering.2208444442 |
|
|
Feb 21 02:26:02 PM PST 24 |
Feb 21 02:26:11 PM PST 24 |
17873280898 ps |
| T903 |
/workspace/coverage/default/37.spi_device_read_buffer_direct.2046434774 |
|
|
Feb 21 02:26:51 PM PST 24 |
Feb 21 02:26:58 PM PST 24 |
1065170751 ps |
| T904 |
/workspace/coverage/default/12.spi_device_tpm_sts_read.2917214426 |
|
|
Feb 21 02:23:43 PM PST 24 |
Feb 21 02:23:45 PM PST 24 |
460333433 ps |
| T905 |
/workspace/coverage/default/11.spi_device_intercept.1961649233 |
|
|
Feb 21 02:23:39 PM PST 24 |
Feb 21 02:23:45 PM PST 24 |
2953727384 ps |
| T906 |
/workspace/coverage/default/40.spi_device_alert_test.1439106389 |
|
|
Feb 21 02:27:02 PM PST 24 |
Feb 21 02:27:03 PM PST 24 |
28458736 ps |
| T907 |
/workspace/coverage/default/17.spi_device_tpm_sts_read.1205768240 |
|
|
Feb 21 02:24:25 PM PST 24 |
Feb 21 02:24:26 PM PST 24 |
117651064 ps |
| T908 |
/workspace/coverage/default/40.spi_device_flash_mode.2412816145 |
|
|
Feb 21 02:27:00 PM PST 24 |
Feb 21 02:27:42 PM PST 24 |
6680689272 ps |
| T909 |
/workspace/coverage/default/32.spi_device_flash_and_tpm.2189560813 |
|
|
Feb 21 02:26:09 PM PST 24 |
Feb 21 02:27:49 PM PST 24 |
22674301683 ps |
| T264 |
/workspace/coverage/default/20.spi_device_flash_and_tpm.3610724507 |
|
|
Feb 21 02:24:41 PM PST 24 |
Feb 21 02:26:29 PM PST 24 |
181987999989 ps |
| T910 |
/workspace/coverage/default/32.spi_device_tpm_all.865549674 |
|
|
Feb 21 02:26:12 PM PST 24 |
Feb 21 02:26:47 PM PST 24 |
10138686150 ps |
| T911 |
/workspace/coverage/default/0.spi_device_cfg_cmd.2699135019 |
|
|
Feb 21 02:20:57 PM PST 24 |
Feb 21 02:21:02 PM PST 24 |
1491164163 ps |
| T912 |
/workspace/coverage/default/40.spi_device_intercept.2065642278 |
|
|
Feb 21 02:26:57 PM PST 24 |
Feb 21 02:27:01 PM PST 24 |
2659435854 ps |
| T913 |
/workspace/coverage/default/3.spi_device_intercept.1218148821 |
|
|
Feb 21 02:21:58 PM PST 24 |
Feb 21 02:22:07 PM PST 24 |
5588591213 ps |
| T914 |
/workspace/coverage/default/13.spi_device_stress_all.3891405295 |
|
|
Feb 21 02:23:54 PM PST 24 |
Feb 21 02:24:40 PM PST 24 |
10857566864 ps |
| T915 |
/workspace/coverage/default/26.spi_device_tpm_read_hw_reg.1235890328 |
|
|
Feb 21 02:25:36 PM PST 24 |
Feb 21 02:25:41 PM PST 24 |
1474751237 ps |
| T916 |
/workspace/coverage/default/11.spi_device_flash_all.1626509162 |
|
|
Feb 21 02:23:35 PM PST 24 |
Feb 21 02:25:03 PM PST 24 |
41762924400 ps |
| T917 |
/workspace/coverage/default/11.spi_device_ram_cfg.3293304495 |
|
|
Feb 21 02:23:48 PM PST 24 |
Feb 21 02:23:50 PM PST 24 |
17243554 ps |
| T918 |
/workspace/coverage/default/45.spi_device_intercept.3694826396 |
|
|
Feb 21 02:27:35 PM PST 24 |
Feb 21 02:27:44 PM PST 24 |
2309620841 ps |
| T919 |
/workspace/coverage/default/45.spi_device_read_buffer_direct.1954332540 |
|
|
Feb 21 02:27:34 PM PST 24 |
Feb 21 02:27:38 PM PST 24 |
787225505 ps |
| T920 |
/workspace/coverage/default/29.spi_device_csb_read.704278303 |
|
|
Feb 21 02:25:46 PM PST 24 |
Feb 21 02:25:48 PM PST 24 |
44847483 ps |
| T921 |
/workspace/coverage/default/6.spi_device_flash_all.3449975989 |
|
|
Feb 21 02:22:46 PM PST 24 |
Feb 21 02:23:24 PM PST 24 |
32409671217 ps |
| T922 |
/workspace/coverage/default/2.spi_device_csb_read.1544752331 |
|
|
Feb 21 02:21:30 PM PST 24 |
Feb 21 02:21:31 PM PST 24 |
99559269 ps |
| T923 |
/workspace/coverage/default/16.spi_device_flash_mode.4161980061 |
|
|
Feb 21 02:24:25 PM PST 24 |
Feb 21 02:25:33 PM PST 24 |
51611937381 ps |
| T924 |
/workspace/coverage/default/17.spi_device_read_buffer_direct.4267364957 |
|
|
Feb 21 02:24:28 PM PST 24 |
Feb 21 02:24:34 PM PST 24 |
3886541105 ps |
| T925 |
/workspace/coverage/default/31.spi_device_tpm_rw.843526943 |
|
|
Feb 21 02:26:09 PM PST 24 |
Feb 21 02:26:10 PM PST 24 |
62728033 ps |
| T926 |
/workspace/coverage/default/24.spi_device_pass_addr_payload_swap.1688575081 |
|
|
Feb 21 02:25:14 PM PST 24 |
Feb 21 02:25:23 PM PST 24 |
1259533429 ps |
| T927 |
/workspace/coverage/default/15.spi_device_intercept.146533872 |
|
|
Feb 21 02:24:02 PM PST 24 |
Feb 21 02:24:06 PM PST 24 |
508253745 ps |
| T928 |
/workspace/coverage/default/19.spi_device_csb_read.1380249901 |
|
|
Feb 21 02:24:31 PM PST 24 |
Feb 21 02:24:33 PM PST 24 |
32004214 ps |
| T929 |
/workspace/coverage/default/15.spi_device_tpm_sts_read.643253247 |
|
|
Feb 21 02:24:02 PM PST 24 |
Feb 21 02:24:03 PM PST 24 |
73449906 ps |
| T930 |
/workspace/coverage/default/48.spi_device_intercept.3780805068 |
|
|
Feb 21 02:27:41 PM PST 24 |
Feb 21 02:27:45 PM PST 24 |
387851430 ps |
| T931 |
/workspace/coverage/default/29.spi_device_tpm_sts_read.763619949 |
|
|
Feb 21 02:26:00 PM PST 24 |
Feb 21 02:26:02 PM PST 24 |
83893790 ps |
| T932 |
/workspace/coverage/default/37.spi_device_pass_addr_payload_swap.93423944 |
|
|
Feb 21 02:26:42 PM PST 24 |
Feb 21 02:27:04 PM PST 24 |
43226424746 ps |
| T263 |
/workspace/coverage/default/15.spi_device_stress_all.1827569253 |
|
|
Feb 21 02:24:16 PM PST 24 |
Feb 21 02:29:14 PM PST 24 |
45467060651 ps |
| T933 |
/workspace/coverage/default/21.spi_device_csb_read.2334008366 |
|
|
Feb 21 02:24:55 PM PST 24 |
Feb 21 02:24:56 PM PST 24 |
15874299 ps |
| T934 |
/workspace/coverage/default/12.spi_device_csb_read.394013983 |
|
|
Feb 21 02:23:42 PM PST 24 |
Feb 21 02:23:44 PM PST 24 |
34336364 ps |
| T935 |
/workspace/coverage/default/44.spi_device_stress_all.234364699 |
|
|
Feb 21 02:27:20 PM PST 24 |
Feb 21 02:28:41 PM PST 24 |
12373546463 ps |
| T936 |
/workspace/coverage/default/30.spi_device_pass_cmd_filtering.158590341 |
|
|
Feb 21 02:26:05 PM PST 24 |
Feb 21 02:26:11 PM PST 24 |
2110522330 ps |
| T937 |
/workspace/coverage/default/19.spi_device_tpm_read_hw_reg.3955923184 |
|
|
Feb 21 02:24:32 PM PST 24 |
Feb 21 02:24:35 PM PST 24 |
126965230 ps |
| T938 |
/workspace/coverage/default/43.spi_device_read_buffer_direct.2766743476 |
|
|
Feb 21 02:27:12 PM PST 24 |
Feb 21 02:27:16 PM PST 24 |
1003492386 ps |
| T939 |
/workspace/coverage/default/48.spi_device_tpm_sts_read.1038832089 |
|
|
Feb 21 02:27:38 PM PST 24 |
Feb 21 02:27:40 PM PST 24 |
93486155 ps |
| T940 |
/workspace/coverage/default/23.spi_device_tpm_rw.1272049511 |
|
|
Feb 21 02:25:07 PM PST 24 |
Feb 21 02:25:09 PM PST 24 |
225777801 ps |
| T941 |
/workspace/coverage/default/13.spi_device_flash_mode.950012246 |
|
|
Feb 21 02:23:44 PM PST 24 |
Feb 21 02:24:01 PM PST 24 |
4036808681 ps |
| T942 |
/workspace/coverage/default/25.spi_device_tpm_rw.3714958562 |
|
|
Feb 21 02:25:16 PM PST 24 |
Feb 21 02:25:18 PM PST 24 |
85244054 ps |
| T943 |
/workspace/coverage/default/28.spi_device_upload.982146081 |
|
|
Feb 21 02:26:06 PM PST 24 |
Feb 21 02:26:12 PM PST 24 |
884633507 ps |
| T944 |
/workspace/coverage/default/26.spi_device_csb_read.17276503 |
|
|
Feb 21 02:25:30 PM PST 24 |
Feb 21 02:25:31 PM PST 24 |
13640487 ps |
| T945 |
/workspace/coverage/default/14.spi_device_flash_mode.2761966801 |
|
|
Feb 21 02:23:58 PM PST 24 |
Feb 21 02:24:33 PM PST 24 |
33510606823 ps |
| T946 |
/workspace/coverage/default/15.spi_device_upload.821865926 |
|
|
Feb 21 02:24:08 PM PST 24 |
Feb 21 02:24:13 PM PST 24 |
495437809 ps |
| T947 |
/workspace/coverage/default/47.spi_device_tpm_sts_read.1004061748 |
|
|
Feb 21 02:27:42 PM PST 24 |
Feb 21 02:27:43 PM PST 24 |
412482243 ps |
| T948 |
/workspace/coverage/default/33.spi_device_tpm_read_hw_reg.2453391190 |
|
|
Feb 21 02:26:17 PM PST 24 |
Feb 21 02:26:29 PM PST 24 |
12824108463 ps |
| T949 |
/workspace/coverage/default/28.spi_device_stress_all.4131213092 |
|
|
Feb 21 02:26:03 PM PST 24 |
Feb 21 02:26:05 PM PST 24 |
272662625 ps |
| T64 |
/workspace/coverage/default/29.spi_device_flash_and_tpm_min_idle.2343428722 |
|
|
Feb 21 02:26:07 PM PST 24 |
Feb 21 02:30:36 PM PST 24 |
433242102070 ps |
| T950 |
/workspace/coverage/default/37.spi_device_flash_all.3727601842 |
|
|
Feb 21 02:26:52 PM PST 24 |
Feb 21 02:27:51 PM PST 24 |
13870364912 ps |
| T951 |
/workspace/coverage/default/49.spi_device_cfg_cmd.3940214279 |
|
|
Feb 21 02:27:46 PM PST 24 |
Feb 21 02:27:53 PM PST 24 |
1474355331 ps |
| T952 |
/workspace/coverage/default/22.spi_device_intercept.3559280657 |
|
|
Feb 21 02:25:00 PM PST 24 |
Feb 21 02:25:10 PM PST 24 |
8883783573 ps |
| T953 |
/workspace/coverage/default/9.spi_device_csb_read.601140660 |
|
|
Feb 21 02:23:02 PM PST 24 |
Feb 21 02:23:03 PM PST 24 |
16170704 ps |
| T954 |
/workspace/coverage/default/21.spi_device_flash_all.3455321832 |
|
|
Feb 21 02:24:50 PM PST 24 |
Feb 21 02:25:42 PM PST 24 |
3378319780 ps |
| T955 |
/workspace/coverage/default/7.spi_device_mailbox.2579376534 |
|
|
Feb 21 02:22:48 PM PST 24 |
Feb 21 02:22:54 PM PST 24 |
464964017 ps |
| T956 |
/workspace/coverage/default/30.spi_device_pass_addr_payload_swap.2807335488 |
|
|
Feb 21 02:26:07 PM PST 24 |
Feb 21 02:26:28 PM PST 24 |
35577790707 ps |
| T957 |
/workspace/coverage/default/46.spi_device_flash_and_tpm.2038400441 |
|
|
Feb 21 02:27:39 PM PST 24 |
Feb 21 02:28:35 PM PST 24 |
25185368158 ps |
| T958 |
/workspace/coverage/default/26.spi_device_intercept.1550040994 |
|
|
Feb 21 02:25:34 PM PST 24 |
Feb 21 02:25:39 PM PST 24 |
644727251 ps |
| T959 |
/workspace/coverage/default/36.spi_device_read_buffer_direct.2585449556 |
|
|
Feb 21 02:26:55 PM PST 24 |
Feb 21 02:27:01 PM PST 24 |
6112710109 ps |
| T960 |
/workspace/coverage/default/18.spi_device_pass_cmd_filtering.996499688 |
|
|
Feb 21 02:24:27 PM PST 24 |
Feb 21 02:24:31 PM PST 24 |
1396041933 ps |
| T961 |
/workspace/coverage/default/34.spi_device_stress_all.1568214770 |
|
|
Feb 21 02:26:21 PM PST 24 |
Feb 21 02:39:18 PM PST 24 |
397794433175 ps |
| T962 |
/workspace/coverage/default/7.spi_device_upload.229848574 |
|
|
Feb 21 02:22:46 PM PST 24 |
Feb 21 02:22:54 PM PST 24 |
2402229758 ps |
| T963 |
/workspace/coverage/default/10.spi_device_cfg_cmd.2220421694 |
|
|
Feb 21 02:23:42 PM PST 24 |
Feb 21 02:23:47 PM PST 24 |
407974835 ps |
| T964 |
/workspace/coverage/default/31.spi_device_stress_all.2731671195 |
|
|
Feb 21 02:26:11 PM PST 24 |
Feb 21 02:26:12 PM PST 24 |
73067993 ps |
| T965 |
/workspace/coverage/default/32.spi_device_pass_addr_payload_swap.4038015752 |
|
|
Feb 21 02:26:11 PM PST 24 |
Feb 21 02:26:56 PM PST 24 |
42176506499 ps |
| T966 |
/workspace/coverage/default/14.spi_device_flash_and_tpm.3826379109 |
|
|
Feb 21 02:24:00 PM PST 24 |
Feb 21 02:28:26 PM PST 24 |
51182467681 ps |
| T967 |
/workspace/coverage/default/39.spi_device_tpm_read_hw_reg.4110642435 |
|
|
Feb 21 02:26:54 PM PST 24 |
Feb 21 02:26:56 PM PST 24 |
2375038766 ps |
| T968 |
/workspace/coverage/default/25.spi_device_tpm_read_hw_reg.907237114 |
|
|
Feb 21 02:25:17 PM PST 24 |
Feb 21 02:25:40 PM PST 24 |
7623421991 ps |
| T969 |
/workspace/coverage/default/27.spi_device_flash_mode.1855750518 |
|
|
Feb 21 02:25:58 PM PST 24 |
Feb 21 02:26:09 PM PST 24 |
995002861 ps |
| T970 |
/workspace/coverage/default/20.spi_device_tpm_sts_read.724738680 |
|
|
Feb 21 02:24:38 PM PST 24 |
Feb 21 02:24:40 PM PST 24 |
121968927 ps |
| T971 |
/workspace/coverage/default/43.spi_device_flash_and_tpm.2833405127 |
|
|
Feb 21 02:27:08 PM PST 24 |
Feb 21 02:27:44 PM PST 24 |
28023715735 ps |
| T972 |
/workspace/coverage/default/10.spi_device_mem_parity.917945584 |
|
|
Feb 21 02:23:18 PM PST 24 |
Feb 21 02:23:19 PM PST 24 |
81337371 ps |
| T973 |
/workspace/coverage/default/10.spi_device_pass_cmd_filtering.3202548857 |
|
|
Feb 21 02:23:27 PM PST 24 |
Feb 21 02:23:36 PM PST 24 |
6160686353 ps |
| T974 |
/workspace/coverage/default/5.spi_device_mem_parity.2641070989 |
|
|
Feb 21 02:22:27 PM PST 24 |
Feb 21 02:22:28 PM PST 24 |
146838555 ps |
| T975 |
/workspace/coverage/default/10.spi_device_ram_cfg.1561979110 |
|
|
Feb 21 02:23:25 PM PST 24 |
Feb 21 02:23:27 PM PST 24 |
17707247 ps |
| T976 |
/workspace/coverage/default/45.spi_device_flash_mode.3235401094 |
|
|
Feb 21 02:27:36 PM PST 24 |
Feb 21 02:27:57 PM PST 24 |
2851252328 ps |
| T977 |
/workspace/coverage/default/16.spi_device_alert_test.230302278 |
|
|
Feb 21 02:24:22 PM PST 24 |
Feb 21 02:24:23 PM PST 24 |
23654999 ps |
| T978 |
/workspace/coverage/default/20.spi_device_read_buffer_direct.14339111 |
|
|
Feb 21 02:24:41 PM PST 24 |
Feb 21 02:24:47 PM PST 24 |
2167113556 ps |
| T979 |
/workspace/coverage/default/35.spi_device_tpm_rw.3789812868 |
|
|
Feb 21 02:26:26 PM PST 24 |
Feb 21 02:26:27 PM PST 24 |
14273272 ps |
| T980 |
/workspace/coverage/default/36.spi_device_upload.3517349462 |
|
|
Feb 21 02:26:42 PM PST 24 |
Feb 21 02:26:53 PM PST 24 |
5758917844 ps |
| T981 |
/workspace/coverage/default/45.spi_device_cfg_cmd.3662213101 |
|
|
Feb 21 02:27:36 PM PST 24 |
Feb 21 02:27:40 PM PST 24 |
217125275 ps |
| T982 |
/workspace/coverage/default/16.spi_device_stress_all.2748769656 |
|
|
Feb 21 02:24:25 PM PST 24 |
Feb 21 02:24:27 PM PST 24 |
168159395 ps |
| T983 |
/workspace/coverage/default/19.spi_device_cfg_cmd.853687059 |
|
|
Feb 21 02:24:34 PM PST 24 |
Feb 21 02:24:38 PM PST 24 |
200046740 ps |
| T984 |
/workspace/coverage/cover_reg_top/3.spi_device_intr_test.1556422141 |
|
|
Feb 21 12:41:10 PM PST 24 |
Feb 21 12:41:12 PM PST 24 |
48795876 ps |
| T74 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.1724192778 |
|
|
Feb 21 12:41:46 PM PST 24 |
Feb 21 12:41:54 PM PST 24 |
409619987 ps |
| T75 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.3815863514 |
|
|
Feb 21 12:41:13 PM PST 24 |
Feb 21 12:41:18 PM PST 24 |
322342059 ps |
| T985 |
/workspace/coverage/cover_reg_top/5.spi_device_intr_test.2308908043 |
|
|
Feb 21 12:41:19 PM PST 24 |
Feb 21 12:41:20 PM PST 24 |
76161705 ps |
| T76 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.3900335879 |
|
|
Feb 21 12:41:24 PM PST 24 |
Feb 21 12:41:46 PM PST 24 |
2965036111 ps |
| T986 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.1434580068 |
|
|
Feb 21 12:41:02 PM PST 24 |
Feb 21 12:41:05 PM PST 24 |
28457051 ps |
| T79 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.1167982631 |
|
|
Feb 21 12:41:11 PM PST 24 |
Feb 21 12:41:26 PM PST 24 |
2178129239 ps |
| T104 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.2181419564 |
|
|
Feb 21 12:41:27 PM PST 24 |
Feb 21 12:41:53 PM PST 24 |
11732769947 ps |
| T97 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.2293258543 |
|
|
Feb 21 12:41:13 PM PST 24 |
Feb 21 12:41:31 PM PST 24 |
582742175 ps |
| T77 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.2742838470 |
|
|
Feb 21 12:41:02 PM PST 24 |
Feb 21 12:41:06 PM PST 24 |
356124796 ps |
| T987 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.2181852933 |
|
|
Feb 21 12:41:03 PM PST 24 |
Feb 21 12:41:04 PM PST 24 |
12578409 ps |
| T988 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.781615373 |
|
|
Feb 21 12:41:27 PM PST 24 |
Feb 21 12:41:28 PM PST 24 |
14325067 ps |
| T989 |
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.1599239615 |
|
|
Feb 21 12:41:11 PM PST 24 |
Feb 21 12:41:16 PM PST 24 |
636500261 ps |
| T990 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.1002845847 |
|
|
Feb 21 12:41:25 PM PST 24 |
Feb 21 12:41:27 PM PST 24 |
107454183 ps |
| T991 |
/workspace/coverage/cover_reg_top/9.spi_device_intr_test.3011589729 |
|
|
Feb 21 12:41:08 PM PST 24 |
Feb 21 12:41:10 PM PST 24 |
54678795 ps |
| T133 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.1546957023 |
|
|
Feb 21 12:41:26 PM PST 24 |
Feb 21 12:41:44 PM PST 24 |
6903201975 ps |
| T134 |
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.4215731498 |
|
|
Feb 21 12:42:04 PM PST 24 |
Feb 21 12:42:09 PM PST 24 |
128184198 ps |
| T992 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.4182266006 |
|
|
Feb 21 12:41:27 PM PST 24 |
Feb 21 12:41:28 PM PST 24 |
14859370 ps |
| T993 |
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.4154005642 |
|
|
Feb 21 12:42:07 PM PST 24 |
Feb 21 12:42:09 PM PST 24 |
47586280 ps |
| T994 |
/workspace/coverage/cover_reg_top/47.spi_device_intr_test.307663567 |
|
|
Feb 21 12:41:45 PM PST 24 |
Feb 21 12:41:46 PM PST 24 |
42924250 ps |
| T995 |
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.360714587 |
|
|
Feb 21 12:42:03 PM PST 24 |
Feb 21 12:42:06 PM PST 24 |
42236884 ps |
| T98 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.304170608 |
|
|
Feb 21 12:41:14 PM PST 24 |
Feb 21 12:41:23 PM PST 24 |
278648623 ps |
| T105 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.3724451015 |
|
|
Feb 21 12:41:15 PM PST 24 |
Feb 21 12:41:18 PM PST 24 |
38242082 ps |
| T996 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.548370617 |
|
|
Feb 21 12:41:26 PM PST 24 |
Feb 21 12:41:28 PM PST 24 |
13899043 ps |
| T997 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.2631115768 |
|
|
Feb 21 12:41:46 PM PST 24 |
Feb 21 12:41:48 PM PST 24 |
11737154 ps |
| T78 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_errors.2081514736 |
|
|
Feb 21 12:41:35 PM PST 24 |
Feb 21 12:41:38 PM PST 24 |
180767950 ps |
| T106 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.2294727832 |
|
|
Feb 21 12:41:23 PM PST 24 |
Feb 21 12:41:27 PM PST 24 |
391863592 ps |
| T99 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.2808756055 |
|
|
Feb 21 12:41:49 PM PST 24 |
Feb 21 12:42:03 PM PST 24 |
6670498127 ps |
| T998 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.1436442378 |
|
|
Feb 21 12:41:35 PM PST 24 |
Feb 21 12:41:38 PM PST 24 |
129807022 ps |
| T107 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.2504086125 |
|
|
Feb 21 12:41:26 PM PST 24 |
Feb 21 12:41:28 PM PST 24 |
160775710 ps |
| T999 |
/workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.556190033 |
|
|
Feb 21 12:41:28 PM PST 24 |
Feb 21 12:41:33 PM PST 24 |
158312968 ps |
| T1000 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.4108157935 |
|
|
Feb 21 12:41:21 PM PST 24 |
Feb 21 12:41:22 PM PST 24 |
14250952 ps |
| T60 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.1240112617 |
|
|
Feb 21 12:41:27 PM PST 24 |
Feb 21 12:41:29 PM PST 24 |
154151961 ps |
| T1001 |
/workspace/coverage/cover_reg_top/19.spi_device_intr_test.1685327227 |
|
|
Feb 21 12:43:49 PM PST 24 |
Feb 21 12:43:54 PM PST 24 |
19511202 ps |
| T100 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.636866311 |
|
|
Feb 21 12:41:07 PM PST 24 |
Feb 21 12:41:20 PM PST 24 |
590527872 ps |
| T1002 |
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.3919197462 |
|
|
Feb 21 12:41:27 PM PST 24 |
Feb 21 12:41:31 PM PST 24 |
110501631 ps |
| T108 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.2978066626 |
|
|
Feb 21 12:41:23 PM PST 24 |
Feb 21 12:41:57 PM PST 24 |
549076262 ps |
| T80 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.376672338 |
|
|
Feb 21 12:41:35 PM PST 24 |
Feb 21 12:41:37 PM PST 24 |
29233321 ps |
| T81 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.663123765 |
|
|
Feb 21 12:41:27 PM PST 24 |
Feb 21 12:41:30 PM PST 24 |
701859440 ps |
| T109 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.848920388 |
|
|
Feb 21 12:41:23 PM PST 24 |
Feb 21 12:41:26 PM PST 24 |
224146845 ps |
| T101 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_intg_err.78023016 |
|
|
Feb 21 12:41:24 PM PST 24 |
Feb 21 12:41:46 PM PST 24 |
1906206430 ps |
| T102 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.23116700 |
|
|
Feb 21 12:41:26 PM PST 24 |
Feb 21 12:41:42 PM PST 24 |
2535931010 ps |
| T1003 |
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.1747451268 |
|
|
Feb 21 12:43:47 PM PST 24 |
Feb 21 12:43:52 PM PST 24 |
50049103 ps |
| T1004 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.3368338119 |
|
|
Feb 21 12:41:24 PM PST 24 |
Feb 21 12:41:25 PM PST 24 |
18751286 ps |
| T160 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.2258577022 |
|
|
Feb 21 12:41:22 PM PST 24 |
Feb 21 12:41:35 PM PST 24 |
790305699 ps |
| T82 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_errors.338503168 |
|
|
Feb 21 12:41:26 PM PST 24 |
Feb 21 12:41:29 PM PST 24 |
501815129 ps |
| T89 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.2888593382 |
|
|
Feb 21 12:41:32 PM PST 24 |
Feb 21 12:41:35 PM PST 24 |
80905497 ps |
| T1005 |
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.675545691 |
|
|
Feb 21 12:41:26 PM PST 24 |
Feb 21 12:41:27 PM PST 24 |
75108576 ps |
| T1006 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.767555016 |
|
|
Feb 21 12:41:25 PM PST 24 |
Feb 21 12:41:26 PM PST 24 |
15372206 ps |
| T86 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.1050781091 |
|
|
Feb 21 12:41:03 PM PST 24 |
Feb 21 12:41:07 PM PST 24 |
192385123 ps |
| T135 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.1113140995 |
|
|
Feb 21 12:41:33 PM PST 24 |
Feb 21 12:41:48 PM PST 24 |
1211705753 ps |
| T61 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.568141027 |
|
|
Feb 21 12:41:26 PM PST 24 |
Feb 21 12:41:28 PM PST 24 |
97831077 ps |
| T136 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.2815539858 |
|
|
Feb 21 12:41:21 PM PST 24 |
Feb 21 12:41:46 PM PST 24 |
2170835879 ps |
| T1007 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_rw.2489264815 |
|
|
Feb 21 12:41:26 PM PST 24 |
Feb 21 12:41:29 PM PST 24 |
45572621 ps |
| T1008 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.2642786225 |
|
|
Feb 21 12:41:19 PM PST 24 |
Feb 21 12:41:20 PM PST 24 |
24291118 ps |
| T1009 |
/workspace/coverage/cover_reg_top/38.spi_device_intr_test.1929669121 |
|
|
Feb 21 12:42:02 PM PST 24 |
Feb 21 12:42:06 PM PST 24 |
20319010 ps |
| T1010 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.4179994600 |
|
|
Feb 21 12:41:20 PM PST 24 |
Feb 21 12:41:32 PM PST 24 |
393898137 ps |
| T110 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.3653121470 |
|
|
Feb 21 12:41:23 PM PST 24 |
Feb 21 12:41:25 PM PST 24 |
40344184 ps |
| T1011 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.3641270410 |
|
|
Feb 21 12:42:05 PM PST 24 |
Feb 21 12:42:07 PM PST 24 |
15712658 ps |
| T92 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.1246741332 |
|
|
Feb 21 12:41:14 PM PST 24 |
Feb 21 12:41:20 PM PST 24 |
193582219 ps |
| T1012 |
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.2187868044 |
|
|
Feb 21 12:41:57 PM PST 24 |
Feb 21 12:41:59 PM PST 24 |
28331279 ps |
| T1013 |
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.273590851 |
|
|
Feb 21 12:41:55 PM PST 24 |
Feb 21 12:41:56 PM PST 24 |
34763977 ps |
| T1014 |
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.505064492 |
|
|
Feb 21 12:41:20 PM PST 24 |
Feb 21 12:41:22 PM PST 24 |
113404261 ps |
| T111 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.1108709825 |
|
|
Feb 21 12:43:44 PM PST 24 |
Feb 21 12:43:50 PM PST 24 |
118823874 ps |
| T1015 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.4016903549 |
|
|
Feb 21 12:41:20 PM PST 24 |
Feb 21 12:41:42 PM PST 24 |
3310786722 ps |
| T112 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.1947867408 |
|
|
Feb 21 12:41:34 PM PST 24 |
Feb 21 12:41:37 PM PST 24 |
68309617 ps |
| T1016 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.142754895 |
|
|
Feb 21 12:41:44 PM PST 24 |
Feb 21 12:41:45 PM PST 24 |
21015591 ps |
| T1017 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.583531195 |
|
|
Feb 21 12:41:23 PM PST 24 |
Feb 21 12:41:55 PM PST 24 |
6719040337 ps |
| T1018 |
/workspace/coverage/cover_reg_top/33.spi_device_intr_test.9827993 |
|
|
Feb 21 12:43:51 PM PST 24 |
Feb 21 12:43:55 PM PST 24 |
142312315 ps |
| T1019 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.655232231 |
|
|
Feb 21 12:41:34 PM PST 24 |
Feb 21 12:41:39 PM PST 24 |
139042255 ps |