Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
4006 |
0 |
0 |
T86 |
4361 |
256 |
0 |
0 |
T87 |
2272 |
55 |
0 |
0 |
T88 |
79495 |
4 |
0 |
0 |
T89 |
5694 |
307 |
0 |
0 |
T90 |
89153 |
4 |
0 |
0 |
T91 |
27558 |
2 |
0 |
0 |
T99 |
24882 |
6 |
0 |
0 |
T100 |
16456 |
2 |
0 |
0 |
T101 |
6052 |
4 |
0 |
0 |
T102 |
18272 |
2 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1699 |
0 |
0 |
T90 |
89153 |
51 |
0 |
0 |
T99 |
24882 |
21 |
0 |
0 |
T100 |
16456 |
15 |
0 |
0 |
T102 |
18272 |
23 |
0 |
0 |
T106 |
7822 |
4 |
0 |
0 |
T109 |
7307 |
12 |
0 |
0 |
T111 |
11529 |
17 |
0 |
0 |
T113 |
37146 |
203 |
0 |
0 |
T132 |
18894 |
72 |
0 |
0 |
T133 |
21982 |
32 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1711 |
0 |
0 |
T90 |
89153 |
49 |
0 |
0 |
T99 |
24882 |
22 |
0 |
0 |
T100 |
16456 |
13 |
0 |
0 |
T102 |
18272 |
21 |
0 |
0 |
T106 |
7822 |
9 |
0 |
0 |
T109 |
7307 |
6 |
0 |
0 |
T111 |
11529 |
15 |
0 |
0 |
T113 |
37146 |
229 |
0 |
0 |
T132 |
18894 |
81 |
0 |
0 |
T133 |
21982 |
21 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
2265 |
0 |
0 |
T90 |
89153 |
115 |
0 |
0 |
T99 |
24882 |
60 |
0 |
0 |
T100 |
16456 |
23 |
0 |
0 |
T102 |
18272 |
26 |
0 |
0 |
T106 |
7822 |
15 |
0 |
0 |
T109 |
7307 |
11 |
0 |
0 |
T111 |
11529 |
26 |
0 |
0 |
T113 |
37146 |
208 |
0 |
0 |
T132 |
18894 |
85 |
0 |
0 |
T133 |
21982 |
33 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
10451 |
0 |
0 |
T90 |
89153 |
1236 |
0 |
0 |
T99 |
24882 |
423 |
0 |
0 |
T100 |
16456 |
239 |
0 |
0 |
T102 |
18272 |
252 |
0 |
0 |
T106 |
7822 |
256 |
0 |
0 |
T109 |
7307 |
10 |
0 |
0 |
T111 |
11529 |
136 |
0 |
0 |
T113 |
37146 |
241 |
0 |
0 |
T132 |
18894 |
89 |
0 |
0 |
T133 |
21982 |
26 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
10876 |
0 |
0 |
T90 |
89153 |
746 |
0 |
0 |
T99 |
24882 |
253 |
0 |
0 |
T100 |
16456 |
133 |
0 |
0 |
T102 |
18272 |
282 |
0 |
0 |
T106 |
7822 |
210 |
0 |
0 |
T109 |
7307 |
119 |
0 |
0 |
T111 |
11529 |
333 |
0 |
0 |
T113 |
37146 |
233 |
0 |
0 |
T132 |
18894 |
25 |
0 |
0 |
T133 |
21982 |
297 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
9756 |
0 |
0 |
T90 |
89153 |
1079 |
0 |
0 |
T99 |
24882 |
253 |
0 |
0 |
T100 |
16456 |
10 |
0 |
0 |
T102 |
18272 |
297 |
0 |
0 |
T106 |
7822 |
91 |
0 |
0 |
T109 |
7307 |
5 |
0 |
0 |
T111 |
11529 |
148 |
0 |
0 |
T113 |
37146 |
228 |
0 |
0 |
T132 |
18894 |
62 |
0 |
0 |
T133 |
21982 |
271 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
9891 |
0 |
0 |
T90 |
89153 |
1030 |
0 |
0 |
T99 |
24882 |
387 |
0 |
0 |
T100 |
16456 |
228 |
0 |
0 |
T102 |
18272 |
17 |
0 |
0 |
T106 |
7822 |
8 |
0 |
0 |
T109 |
7307 |
280 |
0 |
0 |
T111 |
11529 |
361 |
0 |
0 |
T113 |
37146 |
262 |
0 |
0 |
T132 |
18894 |
102 |
0 |
0 |
T133 |
21982 |
137 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
9671 |
0 |
0 |
T90 |
89153 |
688 |
0 |
0 |
T99 |
24882 |
269 |
0 |
0 |
T100 |
16456 |
129 |
0 |
0 |
T102 |
18272 |
17 |
0 |
0 |
T106 |
7822 |
116 |
0 |
0 |
T109 |
7307 |
15 |
0 |
0 |
T111 |
11529 |
230 |
0 |
0 |
T113 |
37146 |
227 |
0 |
0 |
T132 |
18894 |
88 |
0 |
0 |
T133 |
21982 |
372 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
10521 |
0 |
0 |
T90 |
89153 |
1466 |
0 |
0 |
T99 |
24882 |
118 |
0 |
0 |
T100 |
16456 |
96 |
0 |
0 |
T102 |
18272 |
169 |
0 |
0 |
T106 |
7822 |
112 |
0 |
0 |
T109 |
7307 |
140 |
0 |
0 |
T111 |
11529 |
244 |
0 |
0 |
T113 |
37146 |
222 |
0 |
0 |
T132 |
18894 |
46 |
0 |
0 |
T133 |
21982 |
149 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
9494 |
0 |
0 |
T90 |
89153 |
1014 |
0 |
0 |
T99 |
24882 |
234 |
0 |
0 |
T100 |
16456 |
15 |
0 |
0 |
T102 |
18272 |
120 |
0 |
0 |
T106 |
7822 |
245 |
0 |
0 |
T109 |
7307 |
137 |
0 |
0 |
T111 |
11529 |
321 |
0 |
0 |
T113 |
37146 |
199 |
0 |
0 |
T132 |
18894 |
81 |
0 |
0 |
T133 |
21982 |
109 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
9773 |
0 |
0 |
T90 |
89153 |
867 |
0 |
0 |
T99 |
24882 |
222 |
0 |
0 |
T100 |
16456 |
119 |
0 |
0 |
T102 |
18272 |
147 |
0 |
0 |
T106 |
7822 |
108 |
0 |
0 |
T109 |
7307 |
113 |
0 |
0 |
T111 |
11529 |
101 |
0 |
0 |
T113 |
37146 |
247 |
0 |
0 |
T132 |
18894 |
54 |
0 |
0 |
T133 |
21982 |
363 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
4820 |
0 |
0 |
T90 |
89153 |
309 |
0 |
0 |
T99 |
24882 |
149 |
0 |
0 |
T100 |
16456 |
55 |
0 |
0 |
T102 |
18272 |
62 |
0 |
0 |
T106 |
7822 |
44 |
0 |
0 |
T109 |
7307 |
54 |
0 |
0 |
T111 |
11529 |
3 |
0 |
0 |
T113 |
37146 |
206 |
0 |
0 |
T132 |
18894 |
97 |
0 |
0 |
T133 |
21982 |
86 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
4888 |
0 |
0 |
T90 |
89153 |
378 |
0 |
0 |
T99 |
24882 |
90 |
0 |
0 |
T100 |
16456 |
17 |
0 |
0 |
T102 |
18272 |
53 |
0 |
0 |
T106 |
7822 |
13 |
0 |
0 |
T109 |
7307 |
47 |
0 |
0 |
T111 |
11529 |
49 |
0 |
0 |
T113 |
37146 |
182 |
0 |
0 |
T132 |
18894 |
111 |
0 |
0 |
T133 |
21982 |
151 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
4888 |
0 |
0 |
T90 |
89153 |
384 |
0 |
0 |
T99 |
24882 |
132 |
0 |
0 |
T100 |
16456 |
75 |
0 |
0 |
T102 |
18272 |
18 |
0 |
0 |
T106 |
7822 |
33 |
0 |
0 |
T109 |
7307 |
50 |
0 |
0 |
T111 |
11529 |
68 |
0 |
0 |
T113 |
37146 |
234 |
0 |
0 |
T132 |
18894 |
17 |
0 |
0 |
T133 |
21982 |
138 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
5174 |
0 |
0 |
T90 |
89153 |
441 |
0 |
0 |
T99 |
24882 |
101 |
0 |
0 |
T100 |
16456 |
16 |
0 |
0 |
T102 |
18272 |
12 |
0 |
0 |
T106 |
7822 |
88 |
0 |
0 |
T109 |
7307 |
108 |
0 |
0 |
T111 |
11529 |
123 |
0 |
0 |
T113 |
37146 |
206 |
0 |
0 |
T132 |
18894 |
97 |
0 |
0 |
T133 |
21982 |
115 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
4864 |
0 |
0 |
T90 |
89153 |
365 |
0 |
0 |
T99 |
24882 |
34 |
0 |
0 |
T100 |
16456 |
56 |
0 |
0 |
T102 |
18272 |
45 |
0 |
0 |
T106 |
7822 |
126 |
0 |
0 |
T109 |
7307 |
7 |
0 |
0 |
T111 |
11529 |
53 |
0 |
0 |
T113 |
37146 |
176 |
0 |
0 |
T132 |
18894 |
70 |
0 |
0 |
T133 |
21982 |
116 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
5357 |
0 |
0 |
T90 |
89153 |
374 |
0 |
0 |
T99 |
24882 |
116 |
0 |
0 |
T100 |
16456 |
44 |
0 |
0 |
T102 |
18272 |
77 |
0 |
0 |
T106 |
7822 |
56 |
0 |
0 |
T109 |
7307 |
63 |
0 |
0 |
T111 |
11529 |
48 |
0 |
0 |
T113 |
37146 |
266 |
0 |
0 |
T132 |
18894 |
84 |
0 |
0 |
T133 |
21982 |
143 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
4990 |
0 |
0 |
T90 |
89153 |
411 |
0 |
0 |
T99 |
24882 |
58 |
0 |
0 |
T100 |
16456 |
73 |
0 |
0 |
T102 |
18272 |
67 |
0 |
0 |
T106 |
7822 |
44 |
0 |
0 |
T109 |
7307 |
64 |
0 |
0 |
T111 |
11529 |
64 |
0 |
0 |
T113 |
37146 |
234 |
0 |
0 |
T132 |
18894 |
36 |
0 |
0 |
T133 |
21982 |
54 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
4785 |
0 |
0 |
T90 |
89153 |
355 |
0 |
0 |
T99 |
24882 |
121 |
0 |
0 |
T100 |
16456 |
43 |
0 |
0 |
T102 |
18272 |
63 |
0 |
0 |
T106 |
7822 |
80 |
0 |
0 |
T109 |
7307 |
55 |
0 |
0 |
T111 |
11529 |
45 |
0 |
0 |
T113 |
37146 |
283 |
0 |
0 |
T132 |
18894 |
68 |
0 |
0 |
T133 |
21982 |
134 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
5068 |
0 |
0 |
T90 |
89153 |
356 |
0 |
0 |
T99 |
24882 |
88 |
0 |
0 |
T100 |
16456 |
18 |
0 |
0 |
T102 |
18272 |
124 |
0 |
0 |
T106 |
7822 |
66 |
0 |
0 |
T109 |
7307 |
39 |
0 |
0 |
T111 |
11529 |
84 |
0 |
0 |
T113 |
37146 |
249 |
0 |
0 |
T132 |
18894 |
50 |
0 |
0 |
T133 |
21982 |
86 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
4846 |
0 |
0 |
T90 |
89153 |
322 |
0 |
0 |
T99 |
24882 |
61 |
0 |
0 |
T100 |
16456 |
17 |
0 |
0 |
T102 |
18272 |
74 |
0 |
0 |
T106 |
7822 |
113 |
0 |
0 |
T109 |
7307 |
112 |
0 |
0 |
T111 |
11529 |
54 |
0 |
0 |
T113 |
37146 |
228 |
0 |
0 |
T132 |
18894 |
69 |
0 |
0 |
T133 |
21982 |
156 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
5214 |
0 |
0 |
T90 |
89153 |
433 |
0 |
0 |
T99 |
24882 |
146 |
0 |
0 |
T100 |
16456 |
13 |
0 |
0 |
T102 |
18272 |
80 |
0 |
0 |
T106 |
7822 |
3 |
0 |
0 |
T109 |
7307 |
47 |
0 |
0 |
T111 |
11529 |
159 |
0 |
0 |
T113 |
37146 |
269 |
0 |
0 |
T132 |
18894 |
47 |
0 |
0 |
T133 |
21982 |
160 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
4992 |
0 |
0 |
T90 |
89153 |
457 |
0 |
0 |
T99 |
24882 |
51 |
0 |
0 |
T100 |
16456 |
51 |
0 |
0 |
T102 |
18272 |
13 |
0 |
0 |
T106 |
7822 |
48 |
0 |
0 |
T109 |
7307 |
55 |
0 |
0 |
T111 |
11529 |
46 |
0 |
0 |
T113 |
37146 |
265 |
0 |
0 |
T132 |
18894 |
81 |
0 |
0 |
T133 |
21982 |
70 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
4735 |
0 |
0 |
T90 |
89153 |
387 |
0 |
0 |
T99 |
24882 |
125 |
0 |
0 |
T100 |
16456 |
9 |
0 |
0 |
T102 |
18272 |
8 |
0 |
0 |
T106 |
7822 |
51 |
0 |
0 |
T109 |
7307 |
106 |
0 |
0 |
T111 |
11529 |
89 |
0 |
0 |
T113 |
37146 |
235 |
0 |
0 |
T132 |
18894 |
27 |
0 |
0 |
T133 |
21982 |
72 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
5154 |
0 |
0 |
T90 |
89153 |
360 |
0 |
0 |
T99 |
24882 |
158 |
0 |
0 |
T100 |
16456 |
62 |
0 |
0 |
T102 |
18272 |
35 |
0 |
0 |
T106 |
7822 |
47 |
0 |
0 |
T109 |
7307 |
24 |
0 |
0 |
T111 |
11529 |
45 |
0 |
0 |
T113 |
37146 |
274 |
0 |
0 |
T132 |
18894 |
33 |
0 |
0 |
T133 |
21982 |
69 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
5181 |
0 |
0 |
T90 |
89153 |
468 |
0 |
0 |
T99 |
24882 |
124 |
0 |
0 |
T100 |
16456 |
115 |
0 |
0 |
T102 |
18272 |
70 |
0 |
0 |
T106 |
7822 |
45 |
0 |
0 |
T109 |
7307 |
50 |
0 |
0 |
T111 |
11529 |
161 |
0 |
0 |
T113 |
37146 |
241 |
0 |
0 |
T132 |
18894 |
24 |
0 |
0 |
T133 |
21982 |
19 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
5066 |
0 |
0 |
T90 |
89153 |
486 |
0 |
0 |
T99 |
24882 |
62 |
0 |
0 |
T100 |
16456 |
73 |
0 |
0 |
T102 |
18272 |
60 |
0 |
0 |
T106 |
7822 |
50 |
0 |
0 |
T109 |
7307 |
90 |
0 |
0 |
T111 |
11529 |
35 |
0 |
0 |
T113 |
37146 |
192 |
0 |
0 |
T132 |
18894 |
33 |
0 |
0 |
T133 |
21982 |
171 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
5004 |
0 |
0 |
T90 |
89153 |
556 |
0 |
0 |
T99 |
24882 |
156 |
0 |
0 |
T100 |
16456 |
43 |
0 |
0 |
T102 |
18272 |
118 |
0 |
0 |
T106 |
7822 |
66 |
0 |
0 |
T109 |
7307 |
62 |
0 |
0 |
T111 |
11529 |
116 |
0 |
0 |
T113 |
37146 |
240 |
0 |
0 |
T132 |
18894 |
72 |
0 |
0 |
T133 |
21982 |
87 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
4888 |
0 |
0 |
T90 |
89153 |
403 |
0 |
0 |
T99 |
24882 |
93 |
0 |
0 |
T100 |
16456 |
17 |
0 |
0 |
T102 |
18272 |
13 |
0 |
0 |
T106 |
7822 |
7 |
0 |
0 |
T109 |
7307 |
27 |
0 |
0 |
T111 |
11529 |
179 |
0 |
0 |
T113 |
37146 |
240 |
0 |
0 |
T132 |
18894 |
84 |
0 |
0 |
T133 |
21982 |
62 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
5145 |
0 |
0 |
T90 |
89153 |
433 |
0 |
0 |
T99 |
24882 |
162 |
0 |
0 |
T100 |
16456 |
18 |
0 |
0 |
T102 |
18272 |
8 |
0 |
0 |
T106 |
7822 |
31 |
0 |
0 |
T109 |
7307 |
12 |
0 |
0 |
T111 |
11529 |
79 |
0 |
0 |
T113 |
37146 |
245 |
0 |
0 |
T132 |
18894 |
79 |
0 |
0 |
T133 |
21982 |
148 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
4903 |
0 |
0 |
T90 |
89153 |
383 |
0 |
0 |
T99 |
24882 |
78 |
0 |
0 |
T100 |
16456 |
14 |
0 |
0 |
T102 |
18272 |
47 |
0 |
0 |
T106 |
7822 |
13 |
0 |
0 |
T109 |
7307 |
102 |
0 |
0 |
T111 |
11529 |
98 |
0 |
0 |
T113 |
37146 |
221 |
0 |
0 |
T132 |
18894 |
23 |
0 |
0 |
T133 |
21982 |
91 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
5130 |
0 |
0 |
T90 |
89153 |
509 |
0 |
0 |
T99 |
24882 |
59 |
0 |
0 |
T100 |
16456 |
20 |
0 |
0 |
T102 |
18272 |
74 |
0 |
0 |
T106 |
7822 |
40 |
0 |
0 |
T109 |
7307 |
4 |
0 |
0 |
T111 |
11529 |
91 |
0 |
0 |
T113 |
37146 |
178 |
0 |
0 |
T132 |
18894 |
54 |
0 |
0 |
T133 |
21982 |
112 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
4511 |
0 |
0 |
T90 |
89153 |
332 |
0 |
0 |
T99 |
24882 |
106 |
0 |
0 |
T100 |
16456 |
61 |
0 |
0 |
T102 |
18272 |
20 |
0 |
0 |
T106 |
7822 |
55 |
0 |
0 |
T109 |
7307 |
16 |
0 |
0 |
T111 |
11529 |
38 |
0 |
0 |
T113 |
37146 |
216 |
0 |
0 |
T132 |
18894 |
37 |
0 |
0 |
T133 |
21982 |
24 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
5430 |
0 |
0 |
T90 |
89153 |
527 |
0 |
0 |
T99 |
24882 |
64 |
0 |
0 |
T100 |
16456 |
88 |
0 |
0 |
T102 |
18272 |
58 |
0 |
0 |
T106 |
7822 |
92 |
0 |
0 |
T109 |
7307 |
50 |
0 |
0 |
T111 |
11529 |
160 |
0 |
0 |
T113 |
37146 |
223 |
0 |
0 |
T132 |
18894 |
30 |
0 |
0 |
T133 |
21982 |
16 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
5114 |
0 |
0 |
T90 |
89153 |
495 |
0 |
0 |
T99 |
24882 |
79 |
0 |
0 |
T100 |
16456 |
18 |
0 |
0 |
T102 |
18272 |
10 |
0 |
0 |
T106 |
7822 |
28 |
0 |
0 |
T109 |
7307 |
39 |
0 |
0 |
T111 |
11529 |
44 |
0 |
0 |
T113 |
37146 |
230 |
0 |
0 |
T132 |
18894 |
67 |
0 |
0 |
T133 |
21982 |
87 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
2104 |
0 |
0 |
T90 |
89153 |
95 |
0 |
0 |
T99 |
24882 |
29 |
0 |
0 |
T100 |
16456 |
19 |
0 |
0 |
T102 |
18272 |
9 |
0 |
0 |
T106 |
7822 |
10 |
0 |
0 |
T109 |
7307 |
1 |
0 |
0 |
T111 |
11529 |
8 |
0 |
0 |
T113 |
37146 |
234 |
0 |
0 |
T132 |
18894 |
85 |
0 |
0 |
T133 |
21982 |
44 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1816 |
0 |
0 |
T90 |
89153 |
101 |
0 |
0 |
T99 |
24882 |
32 |
0 |
0 |
T100 |
16456 |
7 |
0 |
0 |
T102 |
18272 |
11 |
0 |
0 |
T106 |
7822 |
3 |
0 |
0 |
T109 |
7307 |
5 |
0 |
0 |
T111 |
11529 |
5 |
0 |
0 |
T113 |
37146 |
242 |
0 |
0 |
T132 |
18894 |
51 |
0 |
0 |
T133 |
21982 |
24 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1821 |
0 |
0 |
T90 |
89153 |
93 |
0 |
0 |
T99 |
24882 |
38 |
0 |
0 |
T100 |
16456 |
10 |
0 |
0 |
T102 |
18272 |
11 |
0 |
0 |
T106 |
7822 |
17 |
0 |
0 |
T109 |
7307 |
7 |
0 |
0 |
T111 |
11529 |
12 |
0 |
0 |
T113 |
37146 |
235 |
0 |
0 |
T132 |
18894 |
29 |
0 |
0 |
T133 |
21982 |
20 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1854 |
0 |
0 |
T90 |
89153 |
119 |
0 |
0 |
T99 |
24882 |
15 |
0 |
0 |
T100 |
16456 |
25 |
0 |
0 |
T102 |
18272 |
25 |
0 |
0 |
T106 |
7822 |
4 |
0 |
0 |
T109 |
7307 |
21 |
0 |
0 |
T111 |
11529 |
13 |
0 |
0 |
T113 |
37146 |
213 |
0 |
0 |
T132 |
18894 |
51 |
0 |
0 |
T133 |
21982 |
33 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
2813 |
0 |
0 |
T90 |
89153 |
199 |
0 |
0 |
T99 |
24882 |
42 |
0 |
0 |
T100 |
16456 |
22 |
0 |
0 |
T102 |
18272 |
42 |
0 |
0 |
T106 |
7822 |
26 |
0 |
0 |
T109 |
7307 |
38 |
0 |
0 |
T111 |
11529 |
36 |
0 |
0 |
T113 |
37146 |
242 |
0 |
0 |
T132 |
18894 |
57 |
0 |
0 |
T133 |
21982 |
24 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
4247 |
0 |
0 |
T134 |
341644 |
21 |
0 |
0 |
T135 |
0 |
15 |
0 |
0 |
T136 |
0 |
17 |
0 |
0 |
T137 |
0 |
35 |
0 |
0 |
T138 |
0 |
16 |
0 |
0 |
T139 |
0 |
9 |
0 |
0 |
T140 |
0 |
14 |
0 |
0 |
T141 |
0 |
49 |
0 |
0 |
T142 |
0 |
70 |
0 |
0 |
T143 |
0 |
14 |
0 |
0 |
T144 |
1412 |
0 |
0 |
0 |
T145 |
725263 |
0 |
0 |
0 |
T146 |
126286 |
0 |
0 |
0 |
T147 |
23777 |
0 |
0 |
0 |
T148 |
52455 |
0 |
0 |
0 |
T149 |
12410 |
0 |
0 |
0 |
T150 |
123650 |
0 |
0 |
0 |
T151 |
802693 |
0 |
0 |
0 |
T152 |
43936 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1988 |
0 |
0 |
T90 |
89153 |
100 |
0 |
0 |
T99 |
24882 |
29 |
0 |
0 |
T100 |
16456 |
17 |
0 |
0 |
T102 |
18272 |
11 |
0 |
0 |
T106 |
7822 |
22 |
0 |
0 |
T109 |
7307 |
21 |
0 |
0 |
T111 |
11529 |
10 |
0 |
0 |
T113 |
37146 |
213 |
0 |
0 |
T132 |
18894 |
86 |
0 |
0 |
T133 |
21982 |
22 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1904 |
0 |
0 |
T90 |
89153 |
86 |
0 |
0 |
T99 |
24882 |
30 |
0 |
0 |
T100 |
16456 |
23 |
0 |
0 |
T102 |
18272 |
11 |
0 |
0 |
T106 |
7822 |
4 |
0 |
0 |
T109 |
7307 |
7 |
0 |
0 |
T111 |
11529 |
6 |
0 |
0 |
T113 |
37146 |
241 |
0 |
0 |
T132 |
18894 |
70 |
0 |
0 |
T133 |
21982 |
31 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1700 |
0 |
0 |
T90 |
89153 |
69 |
0 |
0 |
T99 |
24882 |
30 |
0 |
0 |
T100 |
16456 |
13 |
0 |
0 |
T102 |
18272 |
13 |
0 |
0 |
T106 |
7822 |
8 |
0 |
0 |
T109 |
7307 |
10 |
0 |
0 |
T111 |
11529 |
15 |
0 |
0 |
T113 |
37146 |
230 |
0 |
0 |
T132 |
18894 |
72 |
0 |
0 |
T133 |
21982 |
21 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1617 |
0 |
0 |
T90 |
89153 |
74 |
0 |
0 |
T99 |
24882 |
13 |
0 |
0 |
T100 |
16456 |
14 |
0 |
0 |
T102 |
18272 |
8 |
0 |
0 |
T106 |
7822 |
4 |
0 |
0 |
T109 |
7307 |
12 |
0 |
0 |
T111 |
11529 |
11 |
0 |
0 |
T113 |
37146 |
187 |
0 |
0 |
T132 |
18894 |
76 |
0 |
0 |
T133 |
21982 |
15 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1646 |
0 |
0 |
T90 |
89153 |
77 |
0 |
0 |
T99 |
24882 |
29 |
0 |
0 |
T100 |
16456 |
19 |
0 |
0 |
T102 |
18272 |
9 |
0 |
0 |
T106 |
7822 |
8 |
0 |
0 |
T109 |
7307 |
11 |
0 |
0 |
T111 |
11529 |
19 |
0 |
0 |
T113 |
37146 |
243 |
0 |
0 |
T132 |
18894 |
74 |
0 |
0 |
T133 |
21982 |
11 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1620 |
0 |
0 |
T90 |
89153 |
64 |
0 |
0 |
T99 |
24882 |
18 |
0 |
0 |
T100 |
16456 |
11 |
0 |
0 |
T102 |
18272 |
18 |
0 |
0 |
T106 |
7822 |
13 |
0 |
0 |
T109 |
7307 |
10 |
0 |
0 |
T111 |
11529 |
8 |
0 |
0 |
T113 |
37146 |
208 |
0 |
0 |
T132 |
18894 |
83 |
0 |
0 |
T133 |
21982 |
15 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
2310 |
0 |
0 |
T90 |
89153 |
98 |
0 |
0 |
T99 |
24882 |
36 |
0 |
0 |
T100 |
16456 |
19 |
0 |
0 |
T102 |
18272 |
29 |
0 |
0 |
T106 |
7822 |
21 |
0 |
0 |
T109 |
7307 |
13 |
0 |
0 |
T111 |
11529 |
35 |
0 |
0 |
T113 |
37146 |
221 |
0 |
0 |
T132 |
18894 |
37 |
0 |
0 |
T133 |
21982 |
32 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1598 |
0 |
0 |
T90 |
89153 |
49 |
0 |
0 |
T99 |
24882 |
25 |
0 |
0 |
T100 |
16456 |
21 |
0 |
0 |
T102 |
18272 |
11 |
0 |
0 |
T106 |
7822 |
5 |
0 |
0 |
T109 |
7307 |
5 |
0 |
0 |
T111 |
11529 |
12 |
0 |
0 |
T113 |
37146 |
209 |
0 |
0 |
T132 |
18894 |
58 |
0 |
0 |
T133 |
21982 |
20 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
2961 |
0 |
0 |
T90 |
89153 |
158 |
0 |
0 |
T99 |
24882 |
42 |
0 |
0 |
T100 |
16456 |
11 |
0 |
0 |
T102 |
18272 |
10 |
0 |
0 |
T106 |
7822 |
19 |
0 |
0 |
T109 |
7307 |
42 |
0 |
0 |
T111 |
11529 |
19 |
0 |
0 |
T113 |
37146 |
227 |
0 |
0 |
T132 |
18894 |
99 |
0 |
0 |
T133 |
21982 |
55 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1930 |
0 |
0 |
T90 |
89153 |
118 |
0 |
0 |
T96 |
24535 |
9 |
0 |
0 |
T99 |
24882 |
25 |
0 |
0 |
T100 |
16456 |
13 |
0 |
0 |
T102 |
18272 |
11 |
0 |
0 |
T106 |
7822 |
19 |
0 |
0 |
T109 |
7307 |
3 |
0 |
0 |
T111 |
11529 |
31 |
0 |
0 |
T132 |
18894 |
42 |
0 |
0 |
T133 |
21982 |
30 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1620 |
0 |
0 |
T90 |
89153 |
56 |
0 |
0 |
T99 |
24882 |
29 |
0 |
0 |
T100 |
16456 |
20 |
0 |
0 |
T102 |
18272 |
15 |
0 |
0 |
T106 |
7822 |
8 |
0 |
0 |
T109 |
7307 |
5 |
0 |
0 |
T111 |
11529 |
8 |
0 |
0 |
T113 |
37146 |
222 |
0 |
0 |
T132 |
18894 |
51 |
0 |
0 |
T133 |
21982 |
27 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1633 |
0 |
0 |
T90 |
89153 |
91 |
0 |
0 |
T96 |
24535 |
2 |
0 |
0 |
T99 |
24882 |
15 |
0 |
0 |
T100 |
16456 |
6 |
0 |
0 |
T102 |
18272 |
25 |
0 |
0 |
T106 |
7822 |
8 |
0 |
0 |
T109 |
7307 |
10 |
0 |
0 |
T111 |
11529 |
13 |
0 |
0 |
T132 |
18894 |
20 |
0 |
0 |
T133 |
21982 |
33 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1693 |
0 |
0 |
T90 |
89153 |
78 |
0 |
0 |
T96 |
24535 |
5 |
0 |
0 |
T99 |
24882 |
12 |
0 |
0 |
T100 |
16456 |
12 |
0 |
0 |
T102 |
18272 |
10 |
0 |
0 |
T106 |
7822 |
3 |
0 |
0 |
T109 |
7307 |
4 |
0 |
0 |
T111 |
11529 |
9 |
0 |
0 |
T132 |
18894 |
82 |
0 |
0 |
T133 |
21982 |
21 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1706 |
0 |
0 |
T90 |
89153 |
79 |
0 |
0 |
T99 |
24882 |
16 |
0 |
0 |
T100 |
16456 |
10 |
0 |
0 |
T102 |
18272 |
27 |
0 |
0 |
T106 |
7822 |
11 |
0 |
0 |
T109 |
7307 |
7 |
0 |
0 |
T111 |
11529 |
3 |
0 |
0 |
T113 |
37146 |
228 |
0 |
0 |
T132 |
18894 |
69 |
0 |
0 |
T133 |
21982 |
38 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1551 |
0 |
0 |
T90 |
89153 |
61 |
0 |
0 |
T99 |
24882 |
18 |
0 |
0 |
T100 |
16456 |
19 |
0 |
0 |
T102 |
18272 |
8 |
0 |
0 |
T106 |
7822 |
7 |
0 |
0 |
T109 |
7307 |
2 |
0 |
0 |
T111 |
11529 |
14 |
0 |
0 |
T113 |
37146 |
185 |
0 |
0 |
T132 |
18894 |
51 |
0 |
0 |
T133 |
21982 |
14 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
584127548 |
1676 |
0 |
0 |
T90 |
89153 |
61 |
0 |
0 |
T99 |
24882 |
12 |
0 |
0 |
T100 |
16456 |
6 |
0 |
0 |
T102 |
18272 |
20 |
0 |
0 |
T106 |
7822 |
12 |
0 |
0 |
T109 |
7307 |
9 |
0 |
0 |
T111 |
11529 |
10 |
0 |
0 |
T113 |
37146 |
242 |
0 |
0 |
T132 |
18894 |
21 |
0 |
0 |
T133 |
21982 |
12 |
0 |
0 |