| T205 |
/workspace/coverage/default/9.spi_device_flash_mode.1019298799 |
|
|
Mar 05 01:37:44 PM PST 24 |
Mar 05 01:38:20 PM PST 24 |
28521506354 ps |
| T388 |
/workspace/coverage/default/7.spi_device_tpm_sts_read.2296908372 |
|
|
Mar 05 01:37:15 PM PST 24 |
Mar 05 01:37:17 PM PST 24 |
118021449 ps |
| T22 |
/workspace/coverage/default/0.spi_device_flash_and_tpm.926820779 |
|
|
Mar 05 01:35:57 PM PST 24 |
Mar 05 01:37:12 PM PST 24 |
6391463459 ps |
| T389 |
/workspace/coverage/default/16.spi_device_flash_all.1367257667 |
|
|
Mar 05 01:38:57 PM PST 24 |
Mar 05 01:40:04 PM PST 24 |
25627821402 ps |
| T390 |
/workspace/coverage/default/11.spi_device_alert_test.932528176 |
|
|
Mar 05 01:38:04 PM PST 24 |
Mar 05 01:38:06 PM PST 24 |
12971547 ps |
| T391 |
/workspace/coverage/default/8.spi_device_flash_all.1130360687 |
|
|
Mar 05 01:37:36 PM PST 24 |
Mar 05 01:40:47 PM PST 24 |
581448948923 ps |
| T392 |
/workspace/coverage/default/47.spi_device_csb_read.2886150862 |
|
|
Mar 05 01:43:33 PM PST 24 |
Mar 05 01:43:34 PM PST 24 |
32544668 ps |
| T393 |
/workspace/coverage/default/35.spi_device_tpm_read_hw_reg.163381450 |
|
|
Mar 05 01:41:40 PM PST 24 |
Mar 05 01:42:06 PM PST 24 |
13114889159 ps |
| T394 |
/workspace/coverage/default/27.spi_device_tpm_all.3495961924 |
|
|
Mar 05 01:40:31 PM PST 24 |
Mar 05 01:41:38 PM PST 24 |
22061743426 ps |
| T395 |
/workspace/coverage/default/21.spi_device_flash_and_tpm.3936102367 |
|
|
Mar 05 01:39:43 PM PST 24 |
Mar 05 01:43:55 PM PST 24 |
59302592609 ps |
| T161 |
/workspace/coverage/default/13.spi_device_stress_all.604557254 |
|
|
Mar 05 01:38:24 PM PST 24 |
Mar 05 01:44:10 PM PST 24 |
44191580619 ps |
| T396 |
/workspace/coverage/default/3.spi_device_tpm_rw.2055726808 |
|
|
Mar 05 01:36:33 PM PST 24 |
Mar 05 01:36:41 PM PST 24 |
617270104 ps |
| T397 |
/workspace/coverage/default/40.spi_device_alert_test.1116089408 |
|
|
Mar 05 01:42:38 PM PST 24 |
Mar 05 01:42:40 PM PST 24 |
38903885 ps |
| T398 |
/workspace/coverage/default/32.spi_device_tpm_rw.3128270092 |
|
|
Mar 05 01:41:19 PM PST 24 |
Mar 05 01:41:22 PM PST 24 |
324484313 ps |
| T254 |
/workspace/coverage/default/4.spi_device_cfg_cmd.4235019549 |
|
|
Mar 05 01:36:56 PM PST 24 |
Mar 05 01:37:01 PM PST 24 |
749880206 ps |
| T399 |
/workspace/coverage/default/7.spi_device_tpm_all.3761616871 |
|
|
Mar 05 01:37:18 PM PST 24 |
Mar 05 01:37:36 PM PST 24 |
4763747244 ps |
| T400 |
/workspace/coverage/default/8.spi_device_mem_parity.3022591847 |
|
|
Mar 05 01:37:24 PM PST 24 |
Mar 05 01:37:25 PM PST 24 |
89891303 ps |
| T401 |
/workspace/coverage/default/42.spi_device_tpm_read_hw_reg.2558147424 |
|
|
Mar 05 01:42:46 PM PST 24 |
Mar 05 01:42:53 PM PST 24 |
2176789974 ps |
| T402 |
/workspace/coverage/default/11.spi_device_tpm_read_hw_reg.2298306516 |
|
|
Mar 05 01:37:59 PM PST 24 |
Mar 05 01:38:08 PM PST 24 |
5260254943 ps |
| T403 |
/workspace/coverage/default/48.spi_device_tpm_read_hw_reg.3311164779 |
|
|
Mar 05 01:43:33 PM PST 24 |
Mar 05 01:43:59 PM PST 24 |
16497055774 ps |
| T404 |
/workspace/coverage/default/5.spi_device_ram_cfg.1786290145 |
|
|
Mar 05 01:36:55 PM PST 24 |
Mar 05 01:36:56 PM PST 24 |
33570521 ps |
| T405 |
/workspace/coverage/default/0.spi_device_pass_cmd_filtering.2196158279 |
|
|
Mar 05 01:35:50 PM PST 24 |
Mar 05 01:35:57 PM PST 24 |
1082195409 ps |
| T406 |
/workspace/coverage/default/40.spi_device_stress_all.3589959690 |
|
|
Mar 05 01:42:47 PM PST 24 |
Mar 05 01:42:49 PM PST 24 |
54958735 ps |
| T407 |
/workspace/coverage/default/49.spi_device_mailbox.3394493521 |
|
|
Mar 05 01:43:46 PM PST 24 |
Mar 05 01:44:30 PM PST 24 |
15750214272 ps |
| T170 |
/workspace/coverage/default/39.spi_device_flash_and_tpm.2658762896 |
|
|
Mar 05 01:42:33 PM PST 24 |
Mar 05 01:44:16 PM PST 24 |
32997432800 ps |
| T408 |
/workspace/coverage/default/5.spi_device_tpm_all.269654056 |
|
|
Mar 05 01:36:57 PM PST 24 |
Mar 05 01:37:31 PM PST 24 |
21062566653 ps |
| T409 |
/workspace/coverage/default/36.spi_device_tpm_rw.3668417813 |
|
|
Mar 05 01:41:51 PM PST 24 |
Mar 05 01:41:52 PM PST 24 |
23786668 ps |
| T410 |
/workspace/coverage/default/14.spi_device_pass_cmd_filtering.1002218286 |
|
|
Mar 05 01:38:36 PM PST 24 |
Mar 05 01:38:42 PM PST 24 |
2961186102 ps |
| T411 |
/workspace/coverage/default/24.spi_device_alert_test.1314473977 |
|
|
Mar 05 01:40:12 PM PST 24 |
Mar 05 01:40:13 PM PST 24 |
12436841 ps |
| T164 |
/workspace/coverage/default/26.spi_device_pass_cmd_filtering.1249637215 |
|
|
Mar 05 01:40:33 PM PST 24 |
Mar 05 01:40:44 PM PST 24 |
13728877195 ps |
| T412 |
/workspace/coverage/default/22.spi_device_csb_read.3498230589 |
|
|
Mar 05 01:39:57 PM PST 24 |
Mar 05 01:40:04 PM PST 24 |
22538599 ps |
| T287 |
/workspace/coverage/default/22.spi_device_flash_mode.1515052396 |
|
|
Mar 05 01:39:50 PM PST 24 |
Mar 05 01:40:15 PM PST 24 |
11410558234 ps |
| T249 |
/workspace/coverage/default/46.spi_device_mailbox.3363433179 |
|
|
Mar 05 01:43:23 PM PST 24 |
Mar 05 01:43:57 PM PST 24 |
20334170320 ps |
| T413 |
/workspace/coverage/default/36.spi_device_tpm_all.686491141 |
|
|
Mar 05 01:41:52 PM PST 24 |
Mar 05 01:42:43 PM PST 24 |
32892637901 ps |
| T174 |
/workspace/coverage/default/0.spi_device_mailbox.278007587 |
|
|
Mar 05 01:35:50 PM PST 24 |
Mar 05 01:35:57 PM PST 24 |
7705825825 ps |
| T414 |
/workspace/coverage/default/41.spi_device_tpm_all.3744057736 |
|
|
Mar 05 01:42:41 PM PST 24 |
Mar 05 01:43:36 PM PST 24 |
124954481626 ps |
| T415 |
/workspace/coverage/default/16.spi_device_tpm_read_hw_reg.354300403 |
|
|
Mar 05 01:38:49 PM PST 24 |
Mar 05 01:38:51 PM PST 24 |
159312288 ps |
| T416 |
/workspace/coverage/default/43.spi_device_alert_test.2734361889 |
|
|
Mar 05 01:43:00 PM PST 24 |
Mar 05 01:43:01 PM PST 24 |
18431416 ps |
| T417 |
/workspace/coverage/default/14.spi_device_flash_all.3073731531 |
|
|
Mar 05 01:38:36 PM PST 24 |
Mar 05 01:38:43 PM PST 24 |
1586631203 ps |
| T418 |
/workspace/coverage/default/38.spi_device_flash_and_tpm.701856709 |
|
|
Mar 05 01:42:21 PM PST 24 |
Mar 05 01:43:10 PM PST 24 |
4243607413 ps |
| T419 |
/workspace/coverage/default/7.spi_device_read_buffer_direct.4207708605 |
|
|
Mar 05 01:37:24 PM PST 24 |
Mar 05 01:37:29 PM PST 24 |
143247949 ps |
| T420 |
/workspace/coverage/default/34.spi_device_csb_read.2923508710 |
|
|
Mar 05 01:41:41 PM PST 24 |
Mar 05 01:41:43 PM PST 24 |
18365370 ps |
| T213 |
/workspace/coverage/default/39.spi_device_flash_and_tpm_min_idle.600418691 |
|
|
Mar 05 01:42:32 PM PST 24 |
Mar 05 01:44:41 PM PST 24 |
34498208432 ps |
| T184 |
/workspace/coverage/default/23.spi_device_flash_and_tpm.3458899437 |
|
|
Mar 05 01:40:07 PM PST 24 |
Mar 05 01:46:07 PM PST 24 |
52474551715 ps |
| T247 |
/workspace/coverage/default/16.spi_device_mailbox.2930837014 |
|
|
Mar 05 01:38:51 PM PST 24 |
Mar 05 01:39:08 PM PST 24 |
13555219283 ps |
| T162 |
/workspace/coverage/default/8.spi_device_pass_cmd_filtering.1549927488 |
|
|
Mar 05 01:37:29 PM PST 24 |
Mar 05 01:37:34 PM PST 24 |
1144431655 ps |
| T421 |
/workspace/coverage/default/3.spi_device_tpm_sts_read.1367590236 |
|
|
Mar 05 01:36:33 PM PST 24 |
Mar 05 01:36:34 PM PST 24 |
35376969 ps |
| T422 |
/workspace/coverage/default/48.spi_device_read_buffer_direct.1784295650 |
|
|
Mar 05 01:43:41 PM PST 24 |
Mar 05 01:43:44 PM PST 24 |
574737952 ps |
| T423 |
/workspace/coverage/default/4.spi_device_read_buffer_direct.2051598927 |
|
|
Mar 05 01:36:55 PM PST 24 |
Mar 05 01:36:59 PM PST 24 |
470515672 ps |
| T424 |
/workspace/coverage/default/1.spi_device_read_buffer_direct.3436344826 |
|
|
Mar 05 01:36:12 PM PST 24 |
Mar 05 01:36:19 PM PST 24 |
1145155291 ps |
| T425 |
/workspace/coverage/default/20.spi_device_flash_and_tpm_min_idle.2449184690 |
|
|
Mar 05 01:39:34 PM PST 24 |
Mar 05 01:41:01 PM PST 24 |
6587812966 ps |
| T426 |
/workspace/coverage/default/15.spi_device_alert_test.3640129804 |
|
|
Mar 05 01:38:49 PM PST 24 |
Mar 05 01:38:49 PM PST 24 |
39286113 ps |
| T427 |
/workspace/coverage/default/12.spi_device_alert_test.1547781866 |
|
|
Mar 05 01:38:18 PM PST 24 |
Mar 05 01:38:19 PM PST 24 |
42396215 ps |
| T428 |
/workspace/coverage/default/36.spi_device_mailbox.835781969 |
|
|
Mar 05 01:42:05 PM PST 24 |
Mar 05 01:42:51 PM PST 24 |
16173036459 ps |
| T429 |
/workspace/coverage/default/6.spi_device_tpm_all.3899953395 |
|
|
Mar 05 01:37:10 PM PST 24 |
Mar 05 01:37:38 PM PST 24 |
4399792188 ps |
| T178 |
/workspace/coverage/default/40.spi_device_intercept.2773367338 |
|
|
Mar 05 01:42:39 PM PST 24 |
Mar 05 01:42:42 PM PST 24 |
461902737 ps |
| T76 |
/workspace/coverage/default/29.spi_device_flash_and_tpm_min_idle.39324747 |
|
|
Mar 05 01:40:56 PM PST 24 |
Mar 05 01:41:59 PM PST 24 |
3042125953 ps |
| T430 |
/workspace/coverage/default/45.spi_device_tpm_rw.1323347928 |
|
|
Mar 05 01:43:18 PM PST 24 |
Mar 05 01:43:19 PM PST 24 |
48286837 ps |
| T431 |
/workspace/coverage/default/28.spi_device_tpm_rw.949925707 |
|
|
Mar 05 01:40:54 PM PST 24 |
Mar 05 01:40:56 PM PST 24 |
111545935 ps |
| T179 |
/workspace/coverage/default/9.spi_device_flash_all.1753450192 |
|
|
Mar 05 01:37:45 PM PST 24 |
Mar 05 01:39:13 PM PST 24 |
16977332840 ps |
| T432 |
/workspace/coverage/default/40.spi_device_upload.587931186 |
|
|
Mar 05 01:42:42 PM PST 24 |
Mar 05 01:42:46 PM PST 24 |
49806515 ps |
| T433 |
/workspace/coverage/default/11.spi_device_flash_all.152718184 |
|
|
Mar 05 01:38:05 PM PST 24 |
Mar 05 01:39:59 PM PST 24 |
55952854217 ps |
| T183 |
/workspace/coverage/default/47.spi_device_flash_all.189076706 |
|
|
Mar 05 01:43:33 PM PST 24 |
Mar 05 01:45:13 PM PST 24 |
105542302324 ps |
| T434 |
/workspace/coverage/default/46.spi_device_tpm_all.882428245 |
|
|
Mar 05 01:43:24 PM PST 24 |
Mar 05 01:44:01 PM PST 24 |
28771060243 ps |
| T267 |
/workspace/coverage/default/22.spi_device_pass_addr_payload_swap.839046382 |
|
|
Mar 05 01:39:54 PM PST 24 |
Mar 05 01:40:01 PM PST 24 |
704281182 ps |
| T435 |
/workspace/coverage/default/13.spi_device_cfg_cmd.4123138444 |
|
|
Mar 05 01:38:26 PM PST 24 |
Mar 05 01:38:33 PM PST 24 |
11135763528 ps |
| T436 |
/workspace/coverage/default/2.spi_device_tpm_all.1982897346 |
|
|
Mar 05 01:36:22 PM PST 24 |
Mar 05 01:36:39 PM PST 24 |
10568049427 ps |
| T437 |
/workspace/coverage/default/3.spi_device_mem_parity.2157351755 |
|
|
Mar 05 01:36:32 PM PST 24 |
Mar 05 01:36:33 PM PST 24 |
114014606 ps |
| T166 |
/workspace/coverage/default/17.spi_device_mailbox.2228931669 |
|
|
Mar 05 01:39:09 PM PST 24 |
Mar 05 01:39:39 PM PST 24 |
22084972966 ps |
| T438 |
/workspace/coverage/default/29.spi_device_alert_test.3663896135 |
|
|
Mar 05 01:40:54 PM PST 24 |
Mar 05 01:40:55 PM PST 24 |
43559432 ps |
| T439 |
/workspace/coverage/default/1.spi_device_ram_cfg.4283953294 |
|
|
Mar 05 01:35:58 PM PST 24 |
Mar 05 01:35:59 PM PST 24 |
17523568 ps |
| T440 |
/workspace/coverage/default/26.spi_device_read_buffer_direct.2848429771 |
|
|
Mar 05 01:40:34 PM PST 24 |
Mar 05 01:40:38 PM PST 24 |
353167896 ps |
| T441 |
/workspace/coverage/default/10.spi_device_tpm_rw.3701504316 |
|
|
Mar 05 01:37:50 PM PST 24 |
Mar 05 01:37:52 PM PST 24 |
67905655 ps |
| T442 |
/workspace/coverage/default/9.spi_device_upload.2013071433 |
|
|
Mar 05 01:37:46 PM PST 24 |
Mar 05 01:38:14 PM PST 24 |
8249414320 ps |
| T443 |
/workspace/coverage/default/35.spi_device_pass_addr_payload_swap.1452952460 |
|
|
Mar 05 01:41:47 PM PST 24 |
Mar 05 01:41:52 PM PST 24 |
1764189458 ps |
| T204 |
/workspace/coverage/default/24.spi_device_flash_and_tpm_min_idle.1608694449 |
|
|
Mar 05 01:40:12 PM PST 24 |
Mar 05 01:46:23 PM PST 24 |
100227094927 ps |
| T253 |
/workspace/coverage/default/33.spi_device_upload.2912867330 |
|
|
Mar 05 01:41:38 PM PST 24 |
Mar 05 01:41:44 PM PST 24 |
280187884 ps |
| T444 |
/workspace/coverage/default/3.spi_device_mailbox.3118714404 |
|
|
Mar 05 01:36:37 PM PST 24 |
Mar 05 01:36:45 PM PST 24 |
1580878830 ps |
| T445 |
/workspace/coverage/default/6.spi_device_flash_and_tpm.217608014 |
|
|
Mar 05 01:37:09 PM PST 24 |
Mar 05 01:38:03 PM PST 24 |
13248524110 ps |
| T446 |
/workspace/coverage/default/42.spi_device_mailbox.1675590177 |
|
|
Mar 05 01:42:56 PM PST 24 |
Mar 05 01:43:51 PM PST 24 |
22455420398 ps |
| T447 |
/workspace/coverage/default/7.spi_device_alert_test.1286232848 |
|
|
Mar 05 01:37:24 PM PST 24 |
Mar 05 01:37:26 PM PST 24 |
13533826 ps |
| T448 |
/workspace/coverage/default/10.spi_device_tpm_read_hw_reg.3676112877 |
|
|
Mar 05 01:37:51 PM PST 24 |
Mar 05 01:37:54 PM PST 24 |
2314180946 ps |
| T449 |
/workspace/coverage/default/11.spi_device_read_buffer_direct.2471022203 |
|
|
Mar 05 01:38:07 PM PST 24 |
Mar 05 01:38:13 PM PST 24 |
139622447 ps |
| T450 |
/workspace/coverage/default/4.spi_device_tpm_all.2431713984 |
|
|
Mar 05 01:36:43 PM PST 24 |
Mar 05 01:37:09 PM PST 24 |
1807556734 ps |
| T218 |
/workspace/coverage/default/46.spi_device_intercept.2505563772 |
|
|
Mar 05 01:43:26 PM PST 24 |
Mar 05 01:43:31 PM PST 24 |
2491650922 ps |
| T451 |
/workspace/coverage/default/34.spi_device_flash_mode.1845626433 |
|
|
Mar 05 01:41:38 PM PST 24 |
Mar 05 01:42:19 PM PST 24 |
15058589683 ps |
| T135 |
/workspace/coverage/default/18.spi_device_stress_all.132588057 |
|
|
Mar 05 01:39:21 PM PST 24 |
Mar 05 01:46:20 PM PST 24 |
55967506786 ps |
| T452 |
/workspace/coverage/default/44.spi_device_mailbox.3118203564 |
|
|
Mar 05 01:43:10 PM PST 24 |
Mar 05 01:43:17 PM PST 24 |
767125153 ps |
| T193 |
/workspace/coverage/default/37.spi_device_intercept.1788273531 |
|
|
Mar 05 01:42:07 PM PST 24 |
Mar 05 01:42:14 PM PST 24 |
991779765 ps |
| T453 |
/workspace/coverage/default/18.spi_device_mem_parity.2060788478 |
|
|
Mar 05 01:39:06 PM PST 24 |
Mar 05 01:39:09 PM PST 24 |
15091207 ps |
| T217 |
/workspace/coverage/default/38.spi_device_flash_all.3461191549 |
|
|
Mar 05 01:42:20 PM PST 24 |
Mar 05 01:44:15 PM PST 24 |
21597765684 ps |
| T454 |
/workspace/coverage/default/26.spi_device_tpm_rw.1102474498 |
|
|
Mar 05 01:40:20 PM PST 24 |
Mar 05 01:40:24 PM PST 24 |
892219966 ps |
| T455 |
/workspace/coverage/default/2.spi_device_cfg_cmd.58814907 |
|
|
Mar 05 01:36:20 PM PST 24 |
Mar 05 01:36:23 PM PST 24 |
353304642 ps |
| T456 |
/workspace/coverage/default/9.spi_device_tpm_read_hw_reg.2735552979 |
|
|
Mar 05 01:37:37 PM PST 24 |
Mar 05 01:37:58 PM PST 24 |
32561455585 ps |
| T457 |
/workspace/coverage/default/23.spi_device_alert_test.3391960661 |
|
|
Mar 05 01:40:04 PM PST 24 |
Mar 05 01:40:07 PM PST 24 |
59476866 ps |
| T185 |
/workspace/coverage/default/35.spi_device_intercept.3292963965 |
|
|
Mar 05 01:41:45 PM PST 24 |
Mar 05 01:41:58 PM PST 24 |
15667133128 ps |
| T458 |
/workspace/coverage/default/34.spi_device_tpm_rw.1471431481 |
|
|
Mar 05 01:41:40 PM PST 24 |
Mar 05 01:41:44 PM PST 24 |
1427287296 ps |
| T459 |
/workspace/coverage/default/24.spi_device_read_buffer_direct.1552051894 |
|
|
Mar 05 01:40:13 PM PST 24 |
Mar 05 01:40:19 PM PST 24 |
1182082906 ps |
| T460 |
/workspace/coverage/default/47.spi_device_cfg_cmd.1638151829 |
|
|
Mar 05 01:43:31 PM PST 24 |
Mar 05 01:43:33 PM PST 24 |
36018576 ps |
| T167 |
/workspace/coverage/default/33.spi_device_pass_cmd_filtering.271911658 |
|
|
Mar 05 01:41:28 PM PST 24 |
Mar 05 01:41:37 PM PST 24 |
1102718885 ps |
| T461 |
/workspace/coverage/default/24.spi_device_flash_and_tpm.3355930603 |
|
|
Mar 05 01:40:15 PM PST 24 |
Mar 05 01:44:16 PM PST 24 |
144230111928 ps |
| T462 |
/workspace/coverage/default/19.spi_device_alert_test.3524473716 |
|
|
Mar 05 01:39:24 PM PST 24 |
Mar 05 01:39:27 PM PST 24 |
14461127 ps |
| T251 |
/workspace/coverage/default/22.spi_device_pass_cmd_filtering.2530164054 |
|
|
Mar 05 01:39:55 PM PST 24 |
Mar 05 01:40:05 PM PST 24 |
946157714 ps |
| T463 |
/workspace/coverage/default/8.spi_device_read_buffer_direct.3414650411 |
|
|
Mar 05 01:37:38 PM PST 24 |
Mar 05 01:37:44 PM PST 24 |
1219330916 ps |
| T464 |
/workspace/coverage/default/45.spi_device_tpm_read_hw_reg.3663524012 |
|
|
Mar 05 01:43:07 PM PST 24 |
Mar 05 01:43:13 PM PST 24 |
5144415697 ps |
| T168 |
/workspace/coverage/default/31.spi_device_mailbox.592947681 |
|
|
Mar 05 01:41:08 PM PST 24 |
Mar 05 01:41:10 PM PST 24 |
165194385 ps |
| T465 |
/workspace/coverage/default/12.spi_device_read_buffer_direct.239463039 |
|
|
Mar 05 01:38:17 PM PST 24 |
Mar 05 01:38:22 PM PST 24 |
15979403795 ps |
| T466 |
/workspace/coverage/default/27.spi_device_flash_and_tpm.1051918278 |
|
|
Mar 05 01:40:39 PM PST 24 |
Mar 05 01:43:32 PM PST 24 |
49374374863 ps |
| T467 |
/workspace/coverage/default/38.spi_device_csb_read.2628406414 |
|
|
Mar 05 01:42:19 PM PST 24 |
Mar 05 01:42:20 PM PST 24 |
60712886 ps |
| T243 |
/workspace/coverage/default/28.spi_device_stress_all.2445719770 |
|
|
Mar 05 01:40:48 PM PST 24 |
Mar 05 01:42:32 PM PST 24 |
39061438018 ps |
| T468 |
/workspace/coverage/default/18.spi_device_flash_and_tpm_min_idle.1775607236 |
|
|
Mar 05 01:39:15 PM PST 24 |
Mar 05 01:39:56 PM PST 24 |
3780786192 ps |
| T469 |
/workspace/coverage/default/0.spi_device_flash_mode.2437066846 |
|
|
Mar 05 01:36:01 PM PST 24 |
Mar 05 01:36:38 PM PST 24 |
8288356895 ps |
| T470 |
/workspace/coverage/default/3.spi_device_alert_test.2263526260 |
|
|
Mar 05 01:36:40 PM PST 24 |
Mar 05 01:36:41 PM PST 24 |
46125326 ps |
| T471 |
/workspace/coverage/default/30.spi_device_tpm_all.41774025 |
|
|
Mar 05 01:40:55 PM PST 24 |
Mar 05 01:41:24 PM PST 24 |
1656260353 ps |
| T288 |
/workspace/coverage/default/21.spi_device_flash_mode.3542219771 |
|
|
Mar 05 01:39:40 PM PST 24 |
Mar 05 01:39:59 PM PST 24 |
5044188381 ps |
| T472 |
/workspace/coverage/default/19.spi_device_mem_parity.4279820755 |
|
|
Mar 05 01:39:18 PM PST 24 |
Mar 05 01:39:22 PM PST 24 |
112251162 ps |
| T473 |
/workspace/coverage/default/21.spi_device_read_buffer_direct.4114698008 |
|
|
Mar 05 01:39:44 PM PST 24 |
Mar 05 01:39:51 PM PST 24 |
6499292568 ps |
| T187 |
/workspace/coverage/default/4.spi_device_flash_and_tpm_min_idle.1786067578 |
|
|
Mar 05 01:36:54 PM PST 24 |
Mar 05 01:43:11 PM PST 24 |
41883671230 ps |
| T474 |
/workspace/coverage/default/10.spi_device_tpm_all.3462795747 |
|
|
Mar 05 01:37:50 PM PST 24 |
Mar 05 01:37:59 PM PST 24 |
1027786398 ps |
| T475 |
/workspace/coverage/default/25.spi_device_flash_and_tpm_min_idle.2913417150 |
|
|
Mar 05 01:40:18 PM PST 24 |
Mar 05 01:41:51 PM PST 24 |
15941981750 ps |
| T476 |
/workspace/coverage/default/26.spi_device_cfg_cmd.3940359470 |
|
|
Mar 05 01:40:37 PM PST 24 |
Mar 05 01:40:40 PM PST 24 |
319248750 ps |
| T477 |
/workspace/coverage/default/11.spi_device_pass_addr_payload_swap.2024076264 |
|
|
Mar 05 01:38:01 PM PST 24 |
Mar 05 01:38:11 PM PST 24 |
25524523577 ps |
| T478 |
/workspace/coverage/default/33.spi_device_flash_and_tpm_min_idle.1586146463 |
|
|
Mar 05 01:41:35 PM PST 24 |
Mar 05 01:42:03 PM PST 24 |
5289286192 ps |
| T479 |
/workspace/coverage/default/19.spi_device_pass_cmd_filtering.2013539944 |
|
|
Mar 05 01:39:14 PM PST 24 |
Mar 05 01:39:25 PM PST 24 |
1819800452 ps |
| T480 |
/workspace/coverage/default/5.spi_device_flash_and_tpm_min_idle.3821439389 |
|
|
Mar 05 01:37:06 PM PST 24 |
Mar 05 01:37:35 PM PST 24 |
5870949542 ps |
| T481 |
/workspace/coverage/default/49.spi_device_alert_test.941145384 |
|
|
Mar 05 01:43:47 PM PST 24 |
Mar 05 01:43:47 PM PST 24 |
14473212 ps |
| T482 |
/workspace/coverage/default/48.spi_device_flash_and_tpm_min_idle.3183847973 |
|
|
Mar 05 01:43:42 PM PST 24 |
Mar 05 01:46:47 PM PST 24 |
30583778053 ps |
| T483 |
/workspace/coverage/default/22.spi_device_intercept.3748703686 |
|
|
Mar 05 01:39:57 PM PST 24 |
Mar 05 01:40:17 PM PST 24 |
8959828960 ps |
| T263 |
/workspace/coverage/default/1.spi_device_flash_and_tpm_min_idle.936027574 |
|
|
Mar 05 01:36:17 PM PST 24 |
Mar 05 01:37:35 PM PST 24 |
3767764018 ps |
| T484 |
/workspace/coverage/default/16.spi_device_csb_read.796730630 |
|
|
Mar 05 01:38:47 PM PST 24 |
Mar 05 01:38:48 PM PST 24 |
21226032 ps |
| T485 |
/workspace/coverage/default/28.spi_device_intercept.3325975350 |
|
|
Mar 05 01:40:50 PM PST 24 |
Mar 05 01:40:58 PM PST 24 |
10550041798 ps |
| T486 |
/workspace/coverage/default/40.spi_device_cfg_cmd.3610963048 |
|
|
Mar 05 01:42:39 PM PST 24 |
Mar 05 01:42:43 PM PST 24 |
621017158 ps |
| T487 |
/workspace/coverage/default/45.spi_device_read_buffer_direct.54769956 |
|
|
Mar 05 01:43:22 PM PST 24 |
Mar 05 01:43:27 PM PST 24 |
208520594 ps |
| T488 |
/workspace/coverage/default/29.spi_device_flash_all.2804237228 |
|
|
Mar 05 01:40:54 PM PST 24 |
Mar 05 01:41:16 PM PST 24 |
6045103540 ps |
| T489 |
/workspace/coverage/default/20.spi_device_tpm_all.2765243916 |
|
|
Mar 05 01:39:23 PM PST 24 |
Mar 05 01:39:43 PM PST 24 |
2808022761 ps |
| T490 |
/workspace/coverage/default/18.spi_device_upload.1236409093 |
|
|
Mar 05 01:39:08 PM PST 24 |
Mar 05 01:39:24 PM PST 24 |
8714936626 ps |
| T491 |
/workspace/coverage/default/7.spi_device_mem_parity.568526351 |
|
|
Mar 05 01:37:15 PM PST 24 |
Mar 05 01:37:18 PM PST 24 |
33020488 ps |
| T492 |
/workspace/coverage/default/26.spi_device_tpm_read_hw_reg.1303204109 |
|
|
Mar 05 01:40:18 PM PST 24 |
Mar 05 01:40:29 PM PST 24 |
7446591616 ps |
| T493 |
/workspace/coverage/default/5.spi_device_pass_addr_payload_swap.1565438530 |
|
|
Mar 05 01:37:04 PM PST 24 |
Mar 05 01:37:10 PM PST 24 |
3422668797 ps |
| T494 |
/workspace/coverage/default/5.spi_device_alert_test.2625254463 |
|
|
Mar 05 01:37:03 PM PST 24 |
Mar 05 01:37:04 PM PST 24 |
24041043 ps |
| T495 |
/workspace/coverage/default/45.spi_device_flash_and_tpm.1544515766 |
|
|
Mar 05 01:43:25 PM PST 24 |
Mar 05 01:44:12 PM PST 24 |
7857180402 ps |
| T200 |
/workspace/coverage/default/26.spi_device_intercept.3811179905 |
|
|
Mar 05 01:40:33 PM PST 24 |
Mar 05 01:40:36 PM PST 24 |
793653238 ps |
| T496 |
/workspace/coverage/default/15.spi_device_flash_and_tpm.3611711338 |
|
|
Mar 05 01:38:47 PM PST 24 |
Mar 05 01:40:17 PM PST 24 |
4640498253 ps |
| T497 |
/workspace/coverage/default/13.spi_device_pass_cmd_filtering.2128327204 |
|
|
Mar 05 01:38:20 PM PST 24 |
Mar 05 01:38:27 PM PST 24 |
2004749309 ps |
| T201 |
/workspace/coverage/default/6.spi_device_flash_all.1330089459 |
|
|
Mar 05 01:37:16 PM PST 24 |
Mar 05 01:39:47 PM PST 24 |
395037846271 ps |
| T498 |
/workspace/coverage/default/30.spi_device_tpm_sts_read.2728303242 |
|
|
Mar 05 01:40:58 PM PST 24 |
Mar 05 01:41:00 PM PST 24 |
91210080 ps |
| T499 |
/workspace/coverage/default/18.spi_device_flash_mode.1213442175 |
|
|
Mar 05 01:39:11 PM PST 24 |
Mar 05 01:39:28 PM PST 24 |
1625219954 ps |
| T136 |
/workspace/coverage/default/27.spi_device_stress_all.1912322049 |
|
|
Mar 05 01:40:52 PM PST 24 |
Mar 05 01:40:53 PM PST 24 |
41438539 ps |
| T500 |
/workspace/coverage/default/24.spi_device_intercept.3030932629 |
|
|
Mar 05 01:40:07 PM PST 24 |
Mar 05 01:40:15 PM PST 24 |
13462168700 ps |
| T188 |
/workspace/coverage/default/14.spi_device_stress_all.1681472620 |
|
|
Mar 05 01:38:43 PM PST 24 |
Mar 05 01:43:50 PM PST 24 |
30197742295 ps |
| T501 |
/workspace/coverage/default/41.spi_device_flash_and_tpm.2597868599 |
|
|
Mar 05 01:42:47 PM PST 24 |
Mar 05 01:46:13 PM PST 24 |
31170694380 ps |
| T502 |
/workspace/coverage/default/13.spi_device_flash_and_tpm_min_idle.3358593541 |
|
|
Mar 05 01:38:26 PM PST 24 |
Mar 05 01:41:46 PM PST 24 |
29198663149 ps |
| T503 |
/workspace/coverage/default/6.spi_device_tpm_read_hw_reg.4206771432 |
|
|
Mar 05 01:37:09 PM PST 24 |
Mar 05 01:37:22 PM PST 24 |
21915707435 ps |
| T504 |
/workspace/coverage/default/25.spi_device_upload.634832018 |
|
|
Mar 05 01:40:15 PM PST 24 |
Mar 05 01:40:30 PM PST 24 |
10718322919 ps |
| T505 |
/workspace/coverage/default/14.spi_device_pass_addr_payload_swap.1236552002 |
|
|
Mar 05 01:38:33 PM PST 24 |
Mar 05 01:38:51 PM PST 24 |
15847578936 ps |
| T506 |
/workspace/coverage/default/3.spi_device_flash_all.576366172 |
|
|
Mar 05 01:36:38 PM PST 24 |
Mar 05 01:39:21 PM PST 24 |
33964704217 ps |
| T507 |
/workspace/coverage/default/19.spi_device_flash_and_tpm.3414100382 |
|
|
Mar 05 01:39:29 PM PST 24 |
Mar 05 01:39:53 PM PST 24 |
14031422052 ps |
| T508 |
/workspace/coverage/default/19.spi_device_tpm_rw.1416155582 |
|
|
Mar 05 01:39:16 PM PST 24 |
Mar 05 01:39:19 PM PST 24 |
100320088 ps |
| T509 |
/workspace/coverage/default/32.spi_device_flash_all.3542155834 |
|
|
Mar 05 01:41:30 PM PST 24 |
Mar 05 01:42:26 PM PST 24 |
65042850028 ps |
| T510 |
/workspace/coverage/default/21.spi_device_tpm_all.87656698 |
|
|
Mar 05 01:39:43 PM PST 24 |
Mar 05 01:40:30 PM PST 24 |
16214767830 ps |
| T511 |
/workspace/coverage/default/6.spi_device_ram_cfg.186022680 |
|
|
Mar 05 01:37:12 PM PST 24 |
Mar 05 01:37:13 PM PST 24 |
14838853 ps |
| T512 |
/workspace/coverage/default/18.spi_device_ram_cfg.3378040161 |
|
|
Mar 05 01:39:06 PM PST 24 |
Mar 05 01:39:08 PM PST 24 |
26016489 ps |
| T513 |
/workspace/coverage/default/38.spi_device_flash_mode.1321969111 |
|
|
Mar 05 01:42:22 PM PST 24 |
Mar 05 01:42:48 PM PST 24 |
4583434787 ps |
| T514 |
/workspace/coverage/default/23.spi_device_flash_and_tpm_min_idle.3986138369 |
|
|
Mar 05 01:40:03 PM PST 24 |
Mar 05 01:47:04 PM PST 24 |
110446093049 ps |
| T515 |
/workspace/coverage/default/21.spi_device_mailbox.2218310358 |
|
|
Mar 05 01:39:42 PM PST 24 |
Mar 05 01:40:26 PM PST 24 |
79921458499 ps |
| T516 |
/workspace/coverage/default/7.spi_device_intercept.1071529143 |
|
|
Mar 05 01:37:16 PM PST 24 |
Mar 05 01:37:20 PM PST 24 |
311639303 ps |
| T517 |
/workspace/coverage/default/1.spi_device_mem_parity.529634200 |
|
|
Mar 05 01:35:58 PM PST 24 |
Mar 05 01:35:59 PM PST 24 |
16005742 ps |
| T518 |
/workspace/coverage/default/12.spi_device_csb_read.4159927135 |
|
|
Mar 05 01:38:06 PM PST 24 |
Mar 05 01:38:07 PM PST 24 |
16681594 ps |
| T519 |
/workspace/coverage/default/31.spi_device_flash_all.4065258434 |
|
|
Mar 05 01:41:13 PM PST 24 |
Mar 05 01:43:02 PM PST 24 |
19386358824 ps |
| T520 |
/workspace/coverage/default/4.spi_device_upload.947523236 |
|
|
Mar 05 01:37:03 PM PST 24 |
Mar 05 01:37:16 PM PST 24 |
29707764450 ps |
| T521 |
/workspace/coverage/default/15.spi_device_cfg_cmd.2228865129 |
|
|
Mar 05 01:38:43 PM PST 24 |
Mar 05 01:38:46 PM PST 24 |
571022167 ps |
| T522 |
/workspace/coverage/default/34.spi_device_tpm_all.1970229933 |
|
|
Mar 05 01:41:36 PM PST 24 |
Mar 05 01:41:41 PM PST 24 |
764458725 ps |
| T523 |
/workspace/coverage/default/35.spi_device_tpm_all.1758960496 |
|
|
Mar 05 01:41:41 PM PST 24 |
Mar 05 01:42:19 PM PST 24 |
7177878654 ps |
| T257 |
/workspace/coverage/default/19.spi_device_flash_all.3358469337 |
|
|
Mar 05 01:39:32 PM PST 24 |
Mar 05 01:41:25 PM PST 24 |
73367522836 ps |
| T524 |
/workspace/coverage/default/17.spi_device_flash_mode.2857738918 |
|
|
Mar 05 01:39:06 PM PST 24 |
Mar 05 01:39:55 PM PST 24 |
17290597806 ps |
| T525 |
/workspace/coverage/default/6.spi_device_csb_read.2290108188 |
|
|
Mar 05 01:37:04 PM PST 24 |
Mar 05 01:37:05 PM PST 24 |
20237868 ps |
| T526 |
/workspace/coverage/default/10.spi_device_pass_cmd_filtering.967588021 |
|
|
Mar 05 01:37:50 PM PST 24 |
Mar 05 01:37:57 PM PST 24 |
1594269194 ps |
| T202 |
/workspace/coverage/default/35.spi_device_flash_and_tpm.272171812 |
|
|
Mar 05 01:41:54 PM PST 24 |
Mar 05 01:42:26 PM PST 24 |
14935632919 ps |
| T527 |
/workspace/coverage/default/46.spi_device_flash_mode.397764012 |
|
|
Mar 05 01:43:27 PM PST 24 |
Mar 05 01:44:15 PM PST 24 |
34197512079 ps |
| T137 |
/workspace/coverage/default/38.spi_device_stress_all.2026839819 |
|
|
Mar 05 01:42:23 PM PST 24 |
Mar 05 01:43:32 PM PST 24 |
5598325178 ps |
| T528 |
/workspace/coverage/default/43.spi_device_tpm_all.2450392736 |
|
|
Mar 05 01:42:55 PM PST 24 |
Mar 05 01:43:32 PM PST 24 |
2820484785 ps |
| T529 |
/workspace/coverage/default/42.spi_device_alert_test.87165362 |
|
|
Mar 05 01:42:53 PM PST 24 |
Mar 05 01:42:54 PM PST 24 |
15395591 ps |
| T138 |
/workspace/coverage/default/21.spi_device_stress_all.686017960 |
|
|
Mar 05 01:39:42 PM PST 24 |
Mar 05 01:39:44 PM PST 24 |
96929222 ps |
| T530 |
/workspace/coverage/default/12.spi_device_cfg_cmd.2786589941 |
|
|
Mar 05 01:38:11 PM PST 24 |
Mar 05 01:38:14 PM PST 24 |
257474505 ps |
| T531 |
/workspace/coverage/default/15.spi_device_mailbox.2753028625 |
|
|
Mar 05 01:38:42 PM PST 24 |
Mar 05 01:39:29 PM PST 24 |
30265050464 ps |
| T532 |
/workspace/coverage/default/38.spi_device_tpm_read_hw_reg.562317616 |
|
|
Mar 05 01:42:14 PM PST 24 |
Mar 05 01:42:25 PM PST 24 |
1776929058 ps |
| T533 |
/workspace/coverage/default/9.spi_device_ram_cfg.1812379175 |
|
|
Mar 05 01:37:41 PM PST 24 |
Mar 05 01:37:42 PM PST 24 |
15419538 ps |
| T534 |
/workspace/coverage/default/15.spi_device_upload.1325985071 |
|
|
Mar 05 01:38:40 PM PST 24 |
Mar 05 01:38:50 PM PST 24 |
3040761105 ps |
| T535 |
/workspace/coverage/default/35.spi_device_read_buffer_direct.673481787 |
|
|
Mar 05 01:41:51 PM PST 24 |
Mar 05 01:41:57 PM PST 24 |
1796473216 ps |
| T536 |
/workspace/coverage/default/30.spi_device_stress_all.1345514059 |
|
|
Mar 05 01:41:06 PM PST 24 |
Mar 05 01:47:28 PM PST 24 |
51986636413 ps |
| T537 |
/workspace/coverage/default/7.spi_device_flash_mode.1767199192 |
|
|
Mar 05 01:37:25 PM PST 24 |
Mar 05 01:37:38 PM PST 24 |
831698510 ps |
| T538 |
/workspace/coverage/default/37.spi_device_pass_addr_payload_swap.786345602 |
|
|
Mar 05 01:42:09 PM PST 24 |
Mar 05 01:42:24 PM PST 24 |
4889066418 ps |
| T539 |
/workspace/coverage/default/42.spi_device_pass_cmd_filtering.2742032597 |
|
|
Mar 05 01:42:49 PM PST 24 |
Mar 05 01:43:10 PM PST 24 |
24735313554 ps |
| T540 |
/workspace/coverage/default/15.spi_device_flash_mode.2525396261 |
|
|
Mar 05 01:38:43 PM PST 24 |
Mar 05 01:39:07 PM PST 24 |
14336443952 ps |
| T541 |
/workspace/coverage/default/24.spi_device_csb_read.1634377995 |
|
|
Mar 05 01:40:03 PM PST 24 |
Mar 05 01:40:06 PM PST 24 |
73372495 ps |
| T542 |
/workspace/coverage/default/36.spi_device_pass_addr_payload_swap.2449892483 |
|
|
Mar 05 01:41:56 PM PST 24 |
Mar 05 01:42:05 PM PST 24 |
2097610768 ps |
| T277 |
/workspace/coverage/default/49.spi_device_flash_all.3530204298 |
|
|
Mar 05 01:43:46 PM PST 24 |
Mar 05 01:45:58 PM PST 24 |
103386179815 ps |
| T543 |
/workspace/coverage/default/9.spi_device_pass_cmd_filtering.2625264277 |
|
|
Mar 05 01:37:44 PM PST 24 |
Mar 05 01:37:49 PM PST 24 |
166477025 ps |
| T544 |
/workspace/coverage/default/33.spi_device_flash_mode.758528358 |
|
|
Mar 05 01:41:35 PM PST 24 |
Mar 05 01:41:48 PM PST 24 |
3981795101 ps |
| T545 |
/workspace/coverage/default/44.spi_device_flash_mode.3863485063 |
|
|
Mar 05 01:43:09 PM PST 24 |
Mar 05 01:43:16 PM PST 24 |
263054340 ps |
| T546 |
/workspace/coverage/default/38.spi_device_intercept.3948585451 |
|
|
Mar 05 01:42:14 PM PST 24 |
Mar 05 01:42:23 PM PST 24 |
2711922881 ps |
| T261 |
/workspace/coverage/default/13.spi_device_flash_all.3803933474 |
|
|
Mar 05 01:38:25 PM PST 24 |
Mar 05 01:39:03 PM PST 24 |
14283427708 ps |
| T547 |
/workspace/coverage/default/37.spi_device_tpm_sts_read.4085704890 |
|
|
Mar 05 01:42:07 PM PST 24 |
Mar 05 01:42:08 PM PST 24 |
172135735 ps |
| T548 |
/workspace/coverage/default/0.spi_device_read_buffer_direct.2897031029 |
|
|
Mar 05 01:35:59 PM PST 24 |
Mar 05 01:36:07 PM PST 24 |
5326390743 ps |
| T549 |
/workspace/coverage/default/23.spi_device_flash_mode.2887285771 |
|
|
Mar 05 01:40:05 PM PST 24 |
Mar 05 01:40:20 PM PST 24 |
1646867216 ps |
| T550 |
/workspace/coverage/default/46.spi_device_tpm_read_hw_reg.3936204245 |
|
|
Mar 05 01:43:25 PM PST 24 |
Mar 05 01:43:27 PM PST 24 |
183234142 ps |
| T551 |
/workspace/coverage/default/22.spi_device_alert_test.1671915241 |
|
|
Mar 05 01:39:57 PM PST 24 |
Mar 05 01:40:03 PM PST 24 |
20774842 ps |
| T552 |
/workspace/coverage/default/19.spi_device_read_buffer_direct.578418803 |
|
|
Mar 05 01:39:34 PM PST 24 |
Mar 05 01:39:39 PM PST 24 |
714603147 ps |
| T553 |
/workspace/coverage/default/19.spi_device_stress_all.1932903025 |
|
|
Mar 05 01:39:26 PM PST 24 |
Mar 05 01:40:26 PM PST 24 |
11619170592 ps |
| T554 |
/workspace/coverage/default/44.spi_device_alert_test.2823155896 |
|
|
Mar 05 01:43:12 PM PST 24 |
Mar 05 01:43:13 PM PST 24 |
40901242 ps |
| T555 |
/workspace/coverage/default/37.spi_device_read_buffer_direct.3190658946 |
|
|
Mar 05 01:42:04 PM PST 24 |
Mar 05 01:42:09 PM PST 24 |
856829289 ps |
| T556 |
/workspace/coverage/default/23.spi_device_pass_addr_payload_swap.722477904 |
|
|
Mar 05 01:40:00 PM PST 24 |
Mar 05 01:40:20 PM PST 24 |
5641461038 ps |
| T557 |
/workspace/coverage/default/17.spi_device_intercept.2818447848 |
|
|
Mar 05 01:38:59 PM PST 24 |
Mar 05 01:39:05 PM PST 24 |
865644099 ps |
| T558 |
/workspace/coverage/default/34.spi_device_pass_cmd_filtering.3808165016 |
|
|
Mar 05 01:41:37 PM PST 24 |
Mar 05 01:41:49 PM PST 24 |
3706773998 ps |
| T559 |
/workspace/coverage/default/42.spi_device_cfg_cmd.2416032836 |
|
|
Mar 05 01:42:53 PM PST 24 |
Mar 05 01:43:00 PM PST 24 |
4732455223 ps |
| T560 |
/workspace/coverage/default/43.spi_device_read_buffer_direct.2413537781 |
|
|
Mar 05 01:43:02 PM PST 24 |
Mar 05 01:43:09 PM PST 24 |
7931065272 ps |
| T561 |
/workspace/coverage/default/42.spi_device_pass_addr_payload_swap.1662946459 |
|
|
Mar 05 01:42:55 PM PST 24 |
Mar 05 01:42:58 PM PST 24 |
329466575 ps |
| T562 |
/workspace/coverage/default/19.spi_device_csb_read.157281072 |
|
|
Mar 05 01:39:18 PM PST 24 |
Mar 05 01:39:21 PM PST 24 |
36158875 ps |
| T563 |
/workspace/coverage/default/23.spi_device_mailbox.253718742 |
|
|
Mar 05 01:40:00 PM PST 24 |
Mar 05 01:40:37 PM PST 24 |
32729041086 ps |
| T564 |
/workspace/coverage/default/18.spi_device_flash_and_tpm.1498959005 |
|
|
Mar 05 01:39:23 PM PST 24 |
Mar 05 01:43:29 PM PST 24 |
283965621001 ps |
| T565 |
/workspace/coverage/default/27.spi_device_flash_and_tpm_min_idle.2832559570 |
|
|
Mar 05 01:40:44 PM PST 24 |
Mar 05 01:41:58 PM PST 24 |
81205193515 ps |
| T566 |
/workspace/coverage/default/0.spi_device_mem_parity.1949976982 |
|
|
Mar 05 01:35:49 PM PST 24 |
Mar 05 01:35:50 PM PST 24 |
117780793 ps |
| T567 |
/workspace/coverage/default/16.spi_device_tpm_all.1889918384 |
|
|
Mar 05 01:38:50 PM PST 24 |
Mar 05 01:39:00 PM PST 24 |
4299703746 ps |
| T568 |
/workspace/coverage/default/20.spi_device_flash_and_tpm.1388506199 |
|
|
Mar 05 01:39:32 PM PST 24 |
Mar 05 01:47:11 PM PST 24 |
913969290048 ps |
| T569 |
/workspace/coverage/default/12.spi_device_upload.1644776767 |
|
|
Mar 05 01:38:12 PM PST 24 |
Mar 05 01:38:18 PM PST 24 |
1254488947 ps |
| T570 |
/workspace/coverage/default/38.spi_device_tpm_rw.1201515278 |
|
|
Mar 05 01:42:15 PM PST 24 |
Mar 05 01:42:20 PM PST 24 |
464823818 ps |
| T571 |
/workspace/coverage/default/47.spi_device_flash_mode.627271617 |
|
|
Mar 05 01:43:34 PM PST 24 |
Mar 05 01:44:14 PM PST 24 |
10306468240 ps |
| T239 |
/workspace/coverage/default/43.spi_device_flash_and_tpm_min_idle.1195553001 |
|
|
Mar 05 01:43:00 PM PST 24 |
Mar 05 01:44:23 PM PST 24 |
7202222544 ps |
| T572 |
/workspace/coverage/default/6.spi_device_read_buffer_direct.643910938 |
|
|
Mar 05 01:37:13 PM PST 24 |
Mar 05 01:37:17 PM PST 24 |
621131256 ps |
| T573 |
/workspace/coverage/default/37.spi_device_mailbox.2655126128 |
|
|
Mar 05 01:42:03 PM PST 24 |
Mar 05 01:42:11 PM PST 24 |
495098628 ps |
| T574 |
/workspace/coverage/default/15.spi_device_tpm_all.591126191 |
|
|
Mar 05 01:38:43 PM PST 24 |
Mar 05 01:38:56 PM PST 24 |
2449910600 ps |
| T575 |
/workspace/coverage/default/7.spi_device_csb_read.2585927777 |
|
|
Mar 05 01:37:16 PM PST 24 |
Mar 05 01:37:17 PM PST 24 |
91503600 ps |
| T242 |
/workspace/coverage/default/9.spi_device_flash_and_tpm.3077811501 |
|
|
Mar 05 01:37:45 PM PST 24 |
Mar 05 01:39:30 PM PST 24 |
70568331134 ps |
| T576 |
/workspace/coverage/default/12.spi_device_intercept.912561940 |
|
|
Mar 05 01:38:11 PM PST 24 |
Mar 05 01:38:17 PM PST 24 |
1098763907 ps |
| T577 |
/workspace/coverage/default/8.spi_device_tpm_sts_read.3626221117 |
|
|
Mar 05 01:37:31 PM PST 24 |
Mar 05 01:37:33 PM PST 24 |
301631857 ps |
| T578 |
/workspace/coverage/default/33.spi_device_read_buffer_direct.3842100939 |
|
|
Mar 05 01:41:34 PM PST 24 |
Mar 05 01:41:40 PM PST 24 |
13681634014 ps |
| T579 |
/workspace/coverage/default/11.spi_device_flash_mode.2013031819 |
|
|
Mar 05 01:38:06 PM PST 24 |
Mar 05 01:38:28 PM PST 24 |
3080253899 ps |
| T580 |
/workspace/coverage/default/22.spi_device_upload.3167727243 |
|
|
Mar 05 01:39:57 PM PST 24 |
Mar 05 01:40:07 PM PST 24 |
1111052545 ps |
| T581 |
/workspace/coverage/default/17.spi_device_ram_cfg.983528509 |
|
|
Mar 05 01:38:57 PM PST 24 |
Mar 05 01:38:58 PM PST 24 |
22044280 ps |
| T582 |
/workspace/coverage/default/1.spi_device_intercept.3730849336 |
|
|
Mar 05 01:36:09 PM PST 24 |
Mar 05 01:36:12 PM PST 24 |
36257675 ps |
| T583 |
/workspace/coverage/default/12.spi_device_pass_cmd_filtering.4220318425 |
|
|
Mar 05 01:38:12 PM PST 24 |
Mar 05 01:38:31 PM PST 24 |
8074684403 ps |
| T584 |
/workspace/coverage/default/15.spi_device_flash_all.2182500569 |
|
|
Mar 05 01:38:42 PM PST 24 |
Mar 05 01:38:53 PM PST 24 |
987066845 ps |
| T585 |
/workspace/coverage/default/32.spi_device_read_buffer_direct.2028424161 |
|
|
Mar 05 01:41:29 PM PST 24 |
Mar 05 01:41:36 PM PST 24 |
1433826926 ps |
| T586 |
/workspace/coverage/default/35.spi_device_tpm_sts_read.535516418 |
|
|
Mar 05 01:41:41 PM PST 24 |
Mar 05 01:41:42 PM PST 24 |
499081609 ps |
| T587 |
/workspace/coverage/default/39.spi_device_tpm_rw.329836331 |
|
|
Mar 05 01:42:24 PM PST 24 |
Mar 05 01:42:28 PM PST 24 |
459358474 ps |
| T588 |
/workspace/coverage/default/23.spi_device_csb_read.3638212381 |
|
|
Mar 05 01:40:01 PM PST 24 |
Mar 05 01:40:06 PM PST 24 |
14768223 ps |
| T589 |
/workspace/coverage/default/45.spi_device_tpm_all.177136716 |
|
|
Mar 05 01:43:12 PM PST 24 |
Mar 05 01:43:39 PM PST 24 |
2332267788 ps |
| T590 |
/workspace/coverage/default/28.spi_device_upload.3208450385 |
|
|
Mar 05 01:40:52 PM PST 24 |
Mar 05 01:40:57 PM PST 24 |
914077337 ps |
| T591 |
/workspace/coverage/default/4.spi_device_csb_read.2856233838 |
|
|
Mar 05 01:36:50 PM PST 24 |
Mar 05 01:36:52 PM PST 24 |
36941139 ps |
| T270 |
/workspace/coverage/default/12.spi_device_flash_all.675608171 |
|
|
Mar 05 01:38:13 PM PST 24 |
Mar 05 01:43:16 PM PST 24 |
77774854715 ps |