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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.93 98.30 94.11 98.61 89.36 97.06 95.83 98.22


Total test records in report: 1081
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T810 /workspace/coverage/default/6.spi_device_read_buffer_direct.151305426 May 23 02:41:55 PM PDT 24 May 23 02:42:10 PM PDT 24 1413920532 ps
T811 /workspace/coverage/default/44.spi_device_flash_mode.3338862884 May 23 02:48:55 PM PDT 24 May 23 02:49:11 PM PDT 24 499139032 ps
T812 /workspace/coverage/default/4.spi_device_flash_mode.1756331054 May 23 02:41:25 PM PDT 24 May 23 02:41:41 PM PDT 24 1161043638 ps
T813 /workspace/coverage/default/3.spi_device_pass_cmd_filtering.1651584535 May 23 02:41:12 PM PDT 24 May 23 02:41:17 PM PDT 24 440742915 ps
T814 /workspace/coverage/default/39.spi_device_tpm_all.2712495706 May 23 02:47:43 PM PDT 24 May 23 02:48:36 PM PDT 24 37376667800 ps
T815 /workspace/coverage/default/8.spi_device_flash_and_tpm_min_idle.139846011 May 23 02:42:33 PM PDT 24 May 23 02:43:36 PM PDT 24 6984895531 ps
T816 /workspace/coverage/default/2.spi_device_cfg_cmd.1467394642 May 23 02:40:58 PM PDT 24 May 23 02:41:03 PM PDT 24 597987278 ps
T817 /workspace/coverage/default/32.spi_device_flash_and_tpm.4278869220 May 23 02:46:34 PM PDT 24 May 23 02:48:53 PM PDT 24 65778850854 ps
T818 /workspace/coverage/default/46.spi_device_csb_read.2839267841 May 23 02:48:59 PM PDT 24 May 23 02:49:05 PM PDT 24 72678360 ps
T819 /workspace/coverage/default/31.spi_device_tpm_rw.242057173 May 23 02:46:17 PM PDT 24 May 23 02:46:20 PM PDT 24 1097303402 ps
T820 /workspace/coverage/default/19.spi_device_flash_mode.401098637 May 23 02:44:36 PM PDT 24 May 23 02:44:58 PM PDT 24 1051835315 ps
T821 /workspace/coverage/default/8.spi_device_intercept.2759876511 May 23 02:42:19 PM PDT 24 May 23 02:42:34 PM PDT 24 1256889078 ps
T822 /workspace/coverage/default/41.spi_device_flash_all.3186603284 May 23 02:48:43 PM PDT 24 May 23 02:49:39 PM PDT 24 34374555739 ps
T823 /workspace/coverage/default/24.spi_device_csb_read.1042744535 May 23 02:45:22 PM PDT 24 May 23 02:45:24 PM PDT 24 33719456 ps
T824 /workspace/coverage/default/8.spi_device_upload.2483843467 May 23 02:42:19 PM PDT 24 May 23 02:42:41 PM PDT 24 10740092995 ps
T825 /workspace/coverage/default/46.spi_device_stress_all.1898180363 May 23 02:49:09 PM PDT 24 May 23 02:49:38 PM PDT 24 5094331902 ps
T826 /workspace/coverage/default/19.spi_device_read_buffer_direct.1658880723 May 23 02:44:36 PM PDT 24 May 23 02:44:51 PM PDT 24 5951045414 ps
T827 /workspace/coverage/default/15.spi_device_tpm_all.1728726129 May 23 02:43:38 PM PDT 24 May 23 02:44:06 PM PDT 24 4617710242 ps
T828 /workspace/coverage/default/38.spi_device_tpm_all.2906161806 May 23 02:47:38 PM PDT 24 May 23 02:48:26 PM PDT 24 7934462256 ps
T829 /workspace/coverage/default/1.spi_device_flash_mode.686882593 May 23 02:40:30 PM PDT 24 May 23 02:40:53 PM PDT 24 1331092014 ps
T830 /workspace/coverage/default/15.spi_device_upload.1339816512 May 23 02:43:54 PM PDT 24 May 23 02:44:16 PM PDT 24 12026578591 ps
T831 /workspace/coverage/default/30.spi_device_flash_mode.2461427510 May 23 02:46:18 PM PDT 24 May 23 02:46:46 PM PDT 24 3668097602 ps
T832 /workspace/coverage/default/12.spi_device_flash_all.3500527518 May 23 02:43:10 PM PDT 24 May 23 02:46:06 PM PDT 24 24376303471 ps
T833 /workspace/coverage/default/8.spi_device_tpm_all.1253363867 May 23 02:42:21 PM PDT 24 May 23 02:43:05 PM PDT 24 16922676665 ps
T834 /workspace/coverage/default/5.spi_device_flash_all.3166245194 May 23 02:41:35 PM PDT 24 May 23 02:42:51 PM PDT 24 32146327584 ps
T835 /workspace/coverage/default/11.spi_device_tpm_all.3888406473 May 23 02:43:01 PM PDT 24 May 23 02:43:26 PM PDT 24 5981652892 ps
T836 /workspace/coverage/default/3.spi_device_upload.2188143147 May 23 02:41:16 PM PDT 24 May 23 02:41:23 PM PDT 24 4481791557 ps
T837 /workspace/coverage/default/38.spi_device_flash_and_tpm.397007037 May 23 02:47:37 PM PDT 24 May 23 02:48:44 PM PDT 24 2945326315 ps
T838 /workspace/coverage/default/30.spi_device_pass_addr_payload_swap.1844779293 May 23 02:46:26 PM PDT 24 May 23 02:46:31 PM PDT 24 1728241908 ps
T839 /workspace/coverage/default/35.spi_device_mailbox.3794717532 May 23 02:46:48 PM PDT 24 May 23 02:46:55 PM PDT 24 1931877874 ps
T840 /workspace/coverage/default/27.spi_device_pass_cmd_filtering.3606022239 May 23 02:45:38 PM PDT 24 May 23 02:45:41 PM PDT 24 101315338 ps
T841 /workspace/coverage/default/1.spi_device_mailbox.3575376272 May 23 02:40:32 PM PDT 24 May 23 02:42:44 PM PDT 24 26613875589 ps
T842 /workspace/coverage/default/10.spi_device_alert_test.1701787468 May 23 02:42:47 PM PDT 24 May 23 02:42:49 PM PDT 24 60374789 ps
T843 /workspace/coverage/default/47.spi_device_tpm_rw.1663429422 May 23 02:49:12 PM PDT 24 May 23 02:49:16 PM PDT 24 111319782 ps
T844 /workspace/coverage/default/24.spi_device_cfg_cmd.2352493506 May 23 02:45:22 PM PDT 24 May 23 02:45:32 PM PDT 24 3141049509 ps
T267 /workspace/coverage/default/13.spi_device_flash_and_tpm.2208629424 May 23 02:43:22 PM PDT 24 May 23 02:48:22 PM PDT 24 22442651167 ps
T845 /workspace/coverage/default/0.spi_device_flash_mode.785888427 May 23 02:40:21 PM PDT 24 May 23 02:40:40 PM PDT 24 12438752267 ps
T846 /workspace/coverage/default/38.spi_device_pass_cmd_filtering.657262655 May 23 02:47:35 PM PDT 24 May 23 02:47:55 PM PDT 24 28089684590 ps
T847 /workspace/coverage/default/6.spi_device_flash_and_tpm_min_idle.3867046408 May 23 02:41:55 PM PDT 24 May 23 02:44:07 PM PDT 24 20462079350 ps
T848 /workspace/coverage/default/44.spi_device_intercept.1419513244 May 23 02:48:57 PM PDT 24 May 23 02:49:14 PM PDT 24 3375223761 ps
T849 /workspace/coverage/default/27.spi_device_tpm_sts_read.2592062498 May 23 02:45:37 PM PDT 24 May 23 02:45:39 PM PDT 24 58539832 ps
T850 /workspace/coverage/default/8.spi_device_flash_and_tpm.565565561 May 23 02:42:32 PM PDT 24 May 23 02:42:54 PM PDT 24 2015391382 ps
T272 /workspace/coverage/default/14.spi_device_pass_addr_payload_swap.1888403454 May 23 02:43:35 PM PDT 24 May 23 02:43:40 PM PDT 24 147605054 ps
T851 /workspace/coverage/default/36.spi_device_tpm_all.2926862031 May 23 02:47:03 PM PDT 24 May 23 02:47:20 PM PDT 24 1040638565 ps
T852 /workspace/coverage/default/46.spi_device_flash_and_tpm.2879979281 May 23 02:49:08 PM PDT 24 May 23 02:51:54 PM PDT 24 53188758767 ps
T853 /workspace/coverage/default/33.spi_device_flash_mode.1558295195 May 23 02:46:34 PM PDT 24 May 23 02:46:49 PM PDT 24 523005295 ps
T854 /workspace/coverage/default/11.spi_device_pass_cmd_filtering.147128112 May 23 02:42:58 PM PDT 24 May 23 02:43:07 PM PDT 24 772834083 ps
T855 /workspace/coverage/default/0.spi_device_tpm_rw.2847362897 May 23 02:40:03 PM PDT 24 May 23 02:40:05 PM PDT 24 16866135 ps
T856 /workspace/coverage/default/44.spi_device_cfg_cmd.2034933022 May 23 02:48:59 PM PDT 24 May 23 02:49:11 PM PDT 24 607134227 ps
T857 /workspace/coverage/default/29.spi_device_tpm_rw.2832062796 May 23 02:46:09 PM PDT 24 May 23 02:46:11 PM PDT 24 182568614 ps
T858 /workspace/coverage/default/38.spi_device_tpm_rw.4073162847 May 23 02:47:36 PM PDT 24 May 23 02:47:39 PM PDT 24 74194813 ps
T859 /workspace/coverage/default/41.spi_device_cfg_cmd.538158918 May 23 02:48:39 PM PDT 24 May 23 02:48:44 PM PDT 24 110446216 ps
T860 /workspace/coverage/default/40.spi_device_pass_cmd_filtering.1948294451 May 23 02:47:43 PM PDT 24 May 23 02:47:52 PM PDT 24 26085165864 ps
T861 /workspace/coverage/default/12.spi_device_intercept.1638028070 May 23 02:43:10 PM PDT 24 May 23 02:43:37 PM PDT 24 3666200516 ps
T862 /workspace/coverage/default/30.spi_device_upload.192900259 May 23 02:46:16 PM PDT 24 May 23 02:46:22 PM PDT 24 3602366880 ps
T863 /workspace/coverage/default/9.spi_device_flash_all.3428142428 May 23 02:42:32 PM PDT 24 May 23 02:44:17 PM PDT 24 25774195871 ps
T864 /workspace/coverage/default/44.spi_device_upload.3534068081 May 23 02:49:01 PM PDT 24 May 23 02:49:13 PM PDT 24 689950005 ps
T865 /workspace/coverage/default/33.spi_device_alert_test.1939753988 May 23 02:46:49 PM PDT 24 May 23 02:46:51 PM PDT 24 22863573 ps
T866 /workspace/coverage/default/9.spi_device_pass_addr_payload_swap.3160621025 May 23 02:42:34 PM PDT 24 May 23 02:42:46 PM PDT 24 4460977947 ps
T867 /workspace/coverage/default/34.spi_device_tpm_read_hw_reg.1982815813 May 23 02:46:48 PM PDT 24 May 23 02:46:50 PM PDT 24 103133285 ps
T868 /workspace/coverage/default/33.spi_device_tpm_all.442356970 May 23 02:46:36 PM PDT 24 May 23 02:47:37 PM PDT 24 11828124072 ps
T869 /workspace/coverage/default/7.spi_device_pass_cmd_filtering.1212010951 May 23 02:42:02 PM PDT 24 May 23 02:42:10 PM PDT 24 1289235967 ps
T870 /workspace/coverage/default/12.spi_device_upload.2699662725 May 23 02:43:09 PM PDT 24 May 23 02:43:16 PM PDT 24 2377661164 ps
T871 /workspace/coverage/default/2.spi_device_flash_and_tpm_min_idle.1795532099 May 23 02:40:58 PM PDT 24 May 23 02:41:41 PM PDT 24 14220919493 ps
T872 /workspace/coverage/default/1.spi_device_cfg_cmd.3770816304 May 23 02:40:32 PM PDT 24 May 23 02:40:38 PM PDT 24 209930301 ps
T873 /workspace/coverage/default/7.spi_device_cfg_cmd.2147230359 May 23 02:42:04 PM PDT 24 May 23 02:42:09 PM PDT 24 189604262 ps
T874 /workspace/coverage/default/33.spi_device_flash_and_tpm.3903754104 May 23 02:46:49 PM PDT 24 May 23 02:47:11 PM PDT 24 4127636893 ps
T875 /workspace/coverage/default/40.spi_device_stress_all.1881868116 May 23 02:47:46 PM PDT 24 May 23 02:47:49 PM PDT 24 125777122 ps
T876 /workspace/coverage/default/46.spi_device_tpm_rw.4080754163 May 23 02:48:58 PM PDT 24 May 23 02:49:07 PM PDT 24 128674231 ps
T877 /workspace/coverage/default/48.spi_device_pass_addr_payload_swap.1778196804 May 23 02:49:36 PM PDT 24 May 23 02:49:40 PM PDT 24 53419798 ps
T878 /workspace/coverage/default/9.spi_device_alert_test.906368217 May 23 02:42:37 PM PDT 24 May 23 02:42:38 PM PDT 24 21227820 ps
T879 /workspace/coverage/default/3.spi_device_read_buffer_direct.1414203177 May 23 02:41:10 PM PDT 24 May 23 02:41:19 PM PDT 24 1878042742 ps
T880 /workspace/coverage/default/37.spi_device_flash_all.2743644856 May 23 02:47:35 PM PDT 24 May 23 02:48:12 PM PDT 24 32017662246 ps
T881 /workspace/coverage/default/2.spi_device_tpm_all.1232857088 May 23 02:40:47 PM PDT 24 May 23 02:41:11 PM PDT 24 6712443011 ps
T882 /workspace/coverage/default/39.spi_device_upload.2360757065 May 23 02:47:51 PM PDT 24 May 23 02:47:54 PM PDT 24 112529997 ps
T883 /workspace/coverage/default/17.spi_device_flash_and_tpm_min_idle.3033476347 May 23 02:44:10 PM PDT 24 May 23 02:44:58 PM PDT 24 3787935994 ps
T884 /workspace/coverage/default/30.spi_device_tpm_rw.717149934 May 23 02:46:02 PM PDT 24 May 23 02:46:04 PM PDT 24 248716268 ps
T885 /workspace/coverage/default/12.spi_device_flash_and_tpm.2308783830 May 23 02:43:09 PM PDT 24 May 23 02:43:43 PM PDT 24 2785300601 ps
T886 /workspace/coverage/default/9.spi_device_stress_all.2576557107 May 23 02:42:37 PM PDT 24 May 23 02:46:50 PM PDT 24 119027751855 ps
T887 /workspace/coverage/default/48.spi_device_csb_read.1136511880 May 23 02:49:38 PM PDT 24 May 23 02:49:41 PM PDT 24 37936317 ps
T888 /workspace/coverage/default/26.spi_device_read_buffer_direct.2150045574 May 23 02:45:34 PM PDT 24 May 23 02:45:39 PM PDT 24 327353565 ps
T889 /workspace/coverage/default/49.spi_device_flash_mode.3308267296 May 23 02:49:37 PM PDT 24 May 23 02:50:03 PM PDT 24 1677683521 ps
T890 /workspace/coverage/default/4.spi_device_tpm_rw.901911264 May 23 02:41:24 PM PDT 24 May 23 02:41:28 PM PDT 24 169693827 ps
T891 /workspace/coverage/default/27.spi_device_csb_read.3209587306 May 23 02:45:36 PM PDT 24 May 23 02:45:38 PM PDT 24 13898098 ps
T892 /workspace/coverage/default/18.spi_device_cfg_cmd.966115864 May 23 02:44:22 PM PDT 24 May 23 02:44:38 PM PDT 24 1126461823 ps
T893 /workspace/coverage/default/31.spi_device_flash_mode.3452234528 May 23 02:46:19 PM PDT 24 May 23 02:46:52 PM PDT 24 4341687952 ps
T894 /workspace/coverage/default/49.spi_device_tpm_rw.4084309258 May 23 02:49:39 PM PDT 24 May 23 02:49:43 PM PDT 24 393313834 ps
T895 /workspace/coverage/default/11.spi_device_alert_test.2340179199 May 23 02:42:59 PM PDT 24 May 23 02:43:01 PM PDT 24 46469302 ps
T896 /workspace/coverage/default/8.spi_device_tpm_sts_read.3920910243 May 23 02:42:19 PM PDT 24 May 23 02:42:20 PM PDT 24 254141264 ps
T897 /workspace/coverage/default/48.spi_device_stress_all.3437146318 May 23 02:49:36 PM PDT 24 May 23 02:49:39 PM PDT 24 41260781 ps
T898 /workspace/coverage/default/23.spi_device_alert_test.3968727571 May 23 02:45:08 PM PDT 24 May 23 02:45:10 PM PDT 24 21247751 ps
T899 /workspace/coverage/default/28.spi_device_flash_and_tpm_min_idle.2027267328 May 23 02:46:07 PM PDT 24 May 23 02:52:21 PM PDT 24 162732573346 ps
T900 /workspace/coverage/default/22.spi_device_tpm_sts_read.3990518729 May 23 02:44:49 PM PDT 24 May 23 02:44:51 PM PDT 24 146181004 ps
T901 /workspace/coverage/default/17.spi_device_flash_and_tpm.228949639 May 23 02:44:11 PM PDT 24 May 23 02:44:57 PM PDT 24 1758287303 ps
T269 /workspace/coverage/default/15.spi_device_flash_and_tpm_min_idle.3795495287 May 23 02:43:55 PM PDT 24 May 23 02:44:56 PM PDT 24 2218410005 ps
T902 /workspace/coverage/default/44.spi_device_alert_test.1954670360 May 23 02:48:55 PM PDT 24 May 23 02:48:58 PM PDT 24 13391249 ps
T903 /workspace/coverage/default/13.spi_device_tpm_read_hw_reg.3804703732 May 23 02:43:10 PM PDT 24 May 23 02:43:21 PM PDT 24 6578118846 ps
T266 /workspace/coverage/default/4.spi_device_stress_all.602842655 May 23 02:41:24 PM PDT 24 May 23 02:46:01 PM PDT 24 212448243996 ps
T904 /workspace/coverage/default/38.spi_device_cfg_cmd.2904411054 May 23 02:47:36 PM PDT 24 May 23 02:47:42 PM PDT 24 526322419 ps
T74 /workspace/coverage/default/0.spi_device_ram_cfg.3691427254 May 23 02:39:48 PM PDT 24 May 23 02:39:50 PM PDT 24 29003559 ps
T905 /workspace/coverage/default/18.spi_device_tpm_read_hw_reg.3158279964 May 23 02:44:07 PM PDT 24 May 23 02:44:12 PM PDT 24 817128296 ps
T906 /workspace/coverage/default/25.spi_device_tpm_all.67736068 May 23 02:45:21 PM PDT 24 May 23 02:45:44 PM PDT 24 6346191496 ps
T907 /workspace/coverage/default/1.spi_device_flash_and_tpm_min_idle.1822456982 May 23 02:40:33 PM PDT 24 May 23 02:40:59 PM PDT 24 11498204896 ps
T908 /workspace/coverage/default/20.spi_device_upload.4201275445 May 23 02:44:37 PM PDT 24 May 23 02:44:45 PM PDT 24 271648811 ps
T909 /workspace/coverage/default/22.spi_device_flash_and_tpm_min_idle.1250769752 May 23 02:45:07 PM PDT 24 May 23 02:48:44 PM PDT 24 24019667345 ps
T910 /workspace/coverage/default/45.spi_device_alert_test.2141900879 May 23 02:48:58 PM PDT 24 May 23 02:49:03 PM PDT 24 14347316 ps
T911 /workspace/coverage/default/14.spi_device_tpm_all.457014970 May 23 02:43:33 PM PDT 24 May 23 02:43:52 PM PDT 24 5436092371 ps
T912 /workspace/coverage/default/24.spi_device_stress_all.1644993743 May 23 02:45:23 PM PDT 24 May 23 02:50:43 PM PDT 24 59237359144 ps
T913 /workspace/coverage/default/31.spi_device_tpm_sts_read.3632480313 May 23 02:46:20 PM PDT 24 May 23 02:46:21 PM PDT 24 149341223 ps
T914 /workspace/coverage/default/24.spi_device_mailbox.2626585851 May 23 02:45:22 PM PDT 24 May 23 02:45:36 PM PDT 24 2109920367 ps
T274 /workspace/coverage/default/41.spi_device_flash_and_tpm.1263074063 May 23 02:48:43 PM PDT 24 May 23 02:53:40 PM PDT 24 27682037948 ps
T915 /workspace/coverage/default/22.spi_device_read_buffer_direct.3113964493 May 23 02:44:49 PM PDT 24 May 23 02:44:56 PM PDT 24 1320513912 ps
T916 /workspace/coverage/default/18.spi_device_tpm_all.3182197808 May 23 02:44:05 PM PDT 24 May 23 02:44:28 PM PDT 24 3098435085 ps
T917 /workspace/coverage/default/19.spi_device_tpm_sts_read.1393440530 May 23 02:44:35 PM PDT 24 May 23 02:44:38 PM PDT 24 52324908 ps
T918 /workspace/coverage/default/19.spi_device_tpm_all.310674866 May 23 02:44:24 PM PDT 24 May 23 02:44:34 PM PDT 24 1477725152 ps
T919 /workspace/coverage/default/26.spi_device_alert_test.4262262965 May 23 02:45:37 PM PDT 24 May 23 02:45:39 PM PDT 24 15060841 ps
T273 /workspace/coverage/default/39.spi_device_stress_all.548987372 May 23 02:47:47 PM PDT 24 May 23 02:48:54 PM PDT 24 5091030037 ps
T920 /workspace/coverage/default/40.spi_device_alert_test.2719283026 May 23 02:48:41 PM PDT 24 May 23 02:48:44 PM PDT 24 13058104 ps
T921 /workspace/coverage/default/27.spi_device_tpm_rw.3078613938 May 23 02:45:40 PM PDT 24 May 23 02:45:44 PM PDT 24 279249780 ps
T922 /workspace/coverage/default/19.spi_device_csb_read.3244222594 May 23 02:44:23 PM PDT 24 May 23 02:44:26 PM PDT 24 24392161 ps
T923 /workspace/coverage/default/13.spi_device_flash_mode.985078801 May 23 02:43:22 PM PDT 24 May 23 02:43:39 PM PDT 24 1486852554 ps
T924 /workspace/coverage/default/36.spi_device_intercept.4005318710 May 23 02:47:01 PM PDT 24 May 23 02:47:10 PM PDT 24 2432546739 ps
T925 /workspace/coverage/default/17.spi_device_tpm_sts_read.2439119384 May 23 02:44:03 PM PDT 24 May 23 02:44:05 PM PDT 24 24931213 ps
T926 /workspace/coverage/default/40.spi_device_flash_all.3305387491 May 23 02:47:46 PM PDT 24 May 23 02:49:42 PM PDT 24 19032034570 ps
T927 /workspace/coverage/default/41.spi_device_flash_and_tpm_min_idle.1944476486 May 23 02:48:40 PM PDT 24 May 23 02:50:02 PM PDT 24 5624414523 ps
T928 /workspace/coverage/default/25.spi_device_tpm_rw.1796413373 May 23 02:45:21 PM PDT 24 May 23 02:45:25 PM PDT 24 166213181 ps
T929 /workspace/coverage/default/44.spi_device_pass_addr_payload_swap.3526246060 May 23 02:48:57 PM PDT 24 May 23 02:49:04 PM PDT 24 131638289 ps
T930 /workspace/coverage/default/43.spi_device_upload.933790141 May 23 02:49:00 PM PDT 24 May 23 02:49:11 PM PDT 24 528121653 ps
T931 /workspace/coverage/default/6.spi_device_tpm_all.397380920 May 23 02:41:50 PM PDT 24 May 23 02:42:42 PM PDT 24 25223297735 ps
T932 /workspace/coverage/default/25.spi_device_read_buffer_direct.2593435236 May 23 02:45:34 PM PDT 24 May 23 02:45:38 PM PDT 24 295541537 ps
T275 /workspace/coverage/default/16.spi_device_flash_and_tpm.3503423212 May 23 02:43:58 PM PDT 24 May 23 02:56:08 PM PDT 24 315049913033 ps
T933 /workspace/coverage/default/16.spi_device_alert_test.3023257964 May 23 02:43:56 PM PDT 24 May 23 02:43:57 PM PDT 24 62780979 ps
T934 /workspace/coverage/default/34.spi_device_mailbox.1680587749 May 23 02:46:48 PM PDT 24 May 23 02:47:02 PM PDT 24 828085661 ps
T935 /workspace/coverage/default/28.spi_device_mailbox.184145397 May 23 02:45:50 PM PDT 24 May 23 02:47:48 PM PDT 24 14449846423 ps
T936 /workspace/coverage/default/45.spi_device_tpm_sts_read.4019246230 May 23 02:48:59 PM PDT 24 May 23 02:49:06 PM PDT 24 144770028 ps
T937 /workspace/coverage/default/21.spi_device_pass_cmd_filtering.1767220333 May 23 02:44:47 PM PDT 24 May 23 02:44:59 PM PDT 24 5382315568 ps
T938 /workspace/coverage/default/25.spi_device_alert_test.2042036303 May 23 02:45:35 PM PDT 24 May 23 02:45:36 PM PDT 24 45513096 ps
T939 /workspace/coverage/default/21.spi_device_tpm_read_hw_reg.2285659573 May 23 02:45:02 PM PDT 24 May 23 02:45:14 PM PDT 24 18700702595 ps
T199 /workspace/coverage/default/33.spi_device_flash_all.2686052324 May 23 02:46:52 PM PDT 24 May 23 02:48:10 PM PDT 24 15148240738 ps
T940 /workspace/coverage/default/6.spi_device_pass_cmd_filtering.2789301679 May 23 02:41:50 PM PDT 24 May 23 02:41:53 PM PDT 24 108831031 ps
T941 /workspace/coverage/default/27.spi_device_intercept.1427227213 May 23 02:45:37 PM PDT 24 May 23 02:45:57 PM PDT 24 2168358976 ps
T942 /workspace/coverage/default/21.spi_device_tpm_all.1556199910 May 23 02:44:48 PM PDT 24 May 23 02:45:00 PM PDT 24 1641753267 ps
T943 /workspace/coverage/default/27.spi_device_upload.380059670 May 23 02:45:38 PM PDT 24 May 23 02:45:57 PM PDT 24 4777224243 ps
T944 /workspace/coverage/default/9.spi_device_tpm_sts_read.3308217693 May 23 02:42:33 PM PDT 24 May 23 02:42:34 PM PDT 24 22175605 ps
T945 /workspace/coverage/default/11.spi_device_cfg_cmd.2212673550 May 23 02:42:58 PM PDT 24 May 23 02:43:01 PM PDT 24 53537294 ps
T946 /workspace/coverage/default/24.spi_device_read_buffer_direct.2827342841 May 23 02:45:23 PM PDT 24 May 23 02:45:29 PM PDT 24 234719912 ps
T947 /workspace/coverage/default/37.spi_device_pass_cmd_filtering.647359312 May 23 02:47:38 PM PDT 24 May 23 02:47:51 PM PDT 24 14523649991 ps
T948 /workspace/coverage/default/0.spi_device_pass_addr_payload_swap.1146902603 May 23 02:40:03 PM PDT 24 May 23 02:40:06 PM PDT 24 98688020 ps
T949 /workspace/coverage/default/48.spi_device_tpm_rw.2891575059 May 23 02:49:37 PM PDT 24 May 23 02:49:39 PM PDT 24 84229367 ps
T950 /workspace/coverage/default/39.spi_device_cfg_cmd.2215055232 May 23 02:47:42 PM PDT 24 May 23 02:47:46 PM PDT 24 84405519 ps
T951 /workspace/coverage/default/12.spi_device_csb_read.1790091587 May 23 02:42:59 PM PDT 24 May 23 02:43:01 PM PDT 24 18369338 ps
T952 /workspace/coverage/default/19.spi_device_stress_all.3629636780 May 23 02:44:36 PM PDT 24 May 23 02:53:40 PM PDT 24 236775714565 ps
T953 /workspace/coverage/default/45.spi_device_upload.1704610255 May 23 02:48:54 PM PDT 24 May 23 02:49:15 PM PDT 24 18048455565 ps
T954 /workspace/coverage/default/20.spi_device_read_buffer_direct.2943378587 May 23 02:44:34 PM PDT 24 May 23 02:44:40 PM PDT 24 2517652353 ps
T955 /workspace/coverage/default/11.spi_device_intercept.691336860 May 23 02:42:58 PM PDT 24 May 23 02:43:05 PM PDT 24 851749332 ps
T956 /workspace/coverage/default/38.spi_device_mailbox.663836885 May 23 02:47:37 PM PDT 24 May 23 02:47:52 PM PDT 24 6766108723 ps
T115 /workspace/coverage/cover_reg_top/3.spi_device_csr_rw.2139518412 May 23 02:02:57 PM PDT 24 May 23 02:03:00 PM PDT 24 254140164 ps
T70 /workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.803794896 May 23 02:02:31 PM PDT 24 May 23 02:02:34 PM PDT 24 56086747 ps
T71 /workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.2802981280 May 23 02:03:22 PM PDT 24 May 23 02:03:44 PM PDT 24 1213935207 ps
T72 /workspace/coverage/cover_reg_top/19.spi_device_tl_errors.2220354085 May 23 02:04:07 PM PDT 24 May 23 02:04:11 PM PDT 24 42654398 ps
T94 /workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.1301745000 May 23 02:03:10 PM PDT 24 May 23 02:03:23 PM PDT 24 566714505 ps
T95 /workspace/coverage/cover_reg_top/5.spi_device_tl_errors.3535446734 May 23 02:03:10 PM PDT 24 May 23 02:03:16 PM PDT 24 70112974 ps
T957 /workspace/coverage/cover_reg_top/2.spi_device_intr_test.3898613541 May 23 02:02:44 PM PDT 24 May 23 02:02:45 PM PDT 24 36297809 ps
T116 /workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.1022511326 May 23 02:03:08 PM PDT 24 May 23 02:03:17 PM PDT 24 112835725 ps
T958 /workspace/coverage/cover_reg_top/11.spi_device_intr_test.1300673643 May 23 02:03:33 PM PDT 24 May 23 02:03:34 PM PDT 24 29192017 ps
T117 /workspace/coverage/cover_reg_top/16.spi_device_csr_rw.3270805868 May 23 02:03:49 PM PDT 24 May 23 02:03:52 PM PDT 24 292331098 ps
T96 /workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.1655843217 May 23 02:03:48 PM PDT 24 May 23 02:04:08 PM PDT 24 1129237063 ps
T97 /workspace/coverage/cover_reg_top/14.spi_device_tl_errors.1987537194 May 23 02:03:35 PM PDT 24 May 23 02:03:39 PM PDT 24 1212344686 ps
T98 /workspace/coverage/cover_reg_top/1.spi_device_tl_errors.132905497 May 23 02:02:41 PM PDT 24 May 23 02:02:45 PM PDT 24 232197319 ps
T959 /workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.2165981762 May 23 02:04:07 PM PDT 24 May 23 02:04:11 PM PDT 24 190791895 ps
T960 /workspace/coverage/cover_reg_top/10.spi_device_intr_test.1221437299 May 23 02:03:21 PM PDT 24 May 23 02:03:23 PM PDT 24 13673955 ps
T961 /workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.137336102 May 23 02:02:17 PM PDT 24 May 23 02:02:32 PM PDT 24 2544535499 ps
T118 /workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.903213183 May 23 02:02:56 PM PDT 24 May 23 02:02:59 PM PDT 24 133815480 ps
T119 /workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.3782996465 May 23 02:02:44 PM PDT 24 May 23 02:02:58 PM PDT 24 794482599 ps
T962 /workspace/coverage/cover_reg_top/24.spi_device_intr_test.4117965184 May 23 02:04:07 PM PDT 24 May 23 02:04:09 PM PDT 24 12545746 ps
T963 /workspace/coverage/cover_reg_top/6.spi_device_intr_test.3832786289 May 23 02:03:09 PM PDT 24 May 23 02:03:11 PM PDT 24 51869937 ps
T964 /workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.1215509445 May 23 02:03:09 PM PDT 24 May 23 02:03:13 PM PDT 24 386706442 ps
T113 /workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.3945712856 May 23 02:02:43 PM PDT 24 May 23 02:02:45 PM PDT 24 25981547 ps
T114 /workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.3277909746 May 23 02:02:59 PM PDT 24 May 23 02:03:02 PM PDT 24 80192370 ps
T965 /workspace/coverage/cover_reg_top/43.spi_device_intr_test.1931914288 May 23 02:04:22 PM PDT 24 May 23 02:04:25 PM PDT 24 14962286 ps
T103 /workspace/coverage/cover_reg_top/7.spi_device_tl_errors.3976581667 May 23 02:03:11 PM PDT 24 May 23 02:03:14 PM PDT 24 136119755 ps
T966 /workspace/coverage/cover_reg_top/18.spi_device_intr_test.2193018730 May 23 02:04:07 PM PDT 24 May 23 02:04:09 PM PDT 24 16747677 ps
T148 /workspace/coverage/cover_reg_top/8.spi_device_csr_rw.3656262544 May 23 02:03:21 PM PDT 24 May 23 02:03:24 PM PDT 24 84084409 ps
T967 /workspace/coverage/cover_reg_top/47.spi_device_intr_test.964118279 May 23 02:04:22 PM PDT 24 May 23 02:04:24 PM PDT 24 19068565 ps
T968 /workspace/coverage/cover_reg_top/21.spi_device_intr_test.1579094432 May 23 02:04:06 PM PDT 24 May 23 02:04:08 PM PDT 24 70966594 ps
T969 /workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.3803453933 May 23 02:02:44 PM PDT 24 May 23 02:02:47 PM PDT 24 430283895 ps
T970 /workspace/coverage/cover_reg_top/1.spi_device_csr_rw.1163636920 May 23 02:02:32 PM PDT 24 May 23 02:02:35 PM PDT 24 35914684 ps
T971 /workspace/coverage/cover_reg_top/23.spi_device_intr_test.957624988 May 23 02:04:11 PM PDT 24 May 23 02:04:12 PM PDT 24 11167512 ps
T972 /workspace/coverage/cover_reg_top/7.spi_device_intr_test.431159457 May 23 02:03:22 PM PDT 24 May 23 02:03:23 PM PDT 24 27755837 ps
T144 /workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.8493284 May 23 02:02:46 PM PDT 24 May 23 02:02:50 PM PDT 24 705220479 ps
T973 /workspace/coverage/cover_reg_top/35.spi_device_intr_test.2246145708 May 23 02:04:09 PM PDT 24 May 23 02:04:11 PM PDT 24 52593119 ps
T167 /workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.2006311932 May 23 02:02:43 PM PDT 24 May 23 02:02:57 PM PDT 24 825091352 ps
T164 /workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.2845924665 May 23 02:03:51 PM PDT 24 May 23 02:04:00 PM PDT 24 922951343 ps
T165 /workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.1993447885 May 23 02:03:48 PM PDT 24 May 23 02:04:13 PM PDT 24 3440117318 ps
T145 /workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.1177211504 May 23 02:03:51 PM PDT 24 May 23 02:03:55 PM PDT 24 78782177 ps
T974 /workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.1650128226 May 23 02:03:09 PM PDT 24 May 23 02:03:12 PM PDT 24 38315674 ps
T975 /workspace/coverage/cover_reg_top/3.spi_device_intr_test.4139022896 May 23 02:02:47 PM PDT 24 May 23 02:02:48 PM PDT 24 19458289 ps
T976 /workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.2405133215 May 23 02:02:45 PM PDT 24 May 23 02:02:49 PM PDT 24 354766343 ps
T977 /workspace/coverage/cover_reg_top/38.spi_device_intr_test.4251811876 May 23 02:04:27 PM PDT 24 May 23 02:04:29 PM PDT 24 41454565 ps
T978 /workspace/coverage/cover_reg_top/34.spi_device_intr_test.3198704868 May 23 02:04:06 PM PDT 24 May 23 02:04:08 PM PDT 24 45806547 ps
T979 /workspace/coverage/cover_reg_top/14.spi_device_intr_test.2083831256 May 23 02:03:34 PM PDT 24 May 23 02:03:35 PM PDT 24 12759807 ps
T980 /workspace/coverage/cover_reg_top/0.spi_device_mem_walk.350956070 May 23 02:02:23 PM PDT 24 May 23 02:02:24 PM PDT 24 26985134 ps
T120 /workspace/coverage/cover_reg_top/12.spi_device_csr_rw.1526261602 May 23 02:03:33 PM PDT 24 May 23 02:03:35 PM PDT 24 76957244 ps
T109 /workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.110369799 May 23 02:03:36 PM PDT 24 May 23 02:03:39 PM PDT 24 54402708 ps
T981 /workspace/coverage/cover_reg_top/27.spi_device_intr_test.170086171 May 23 02:04:08 PM PDT 24 May 23 02:04:10 PM PDT 24 13508325 ps
T982 /workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.878616773 May 23 02:03:33 PM PDT 24 May 23 02:03:37 PM PDT 24 82974035 ps
T121 /workspace/coverage/cover_reg_top/14.spi_device_csr_rw.420751960 May 23 02:03:34 PM PDT 24 May 23 02:03:36 PM PDT 24 326209456 ps
T983 /workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.3521374131 May 23 02:03:50 PM PDT 24 May 23 02:03:52 PM PDT 24 93976843 ps
T984 /workspace/coverage/cover_reg_top/28.spi_device_intr_test.3298396530 May 23 02:04:09 PM PDT 24 May 23 02:04:11 PM PDT 24 37810012 ps
T122 /workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.556020910 May 23 02:02:31 PM PDT 24 May 23 02:02:32 PM PDT 24 82937228 ps
T985 /workspace/coverage/cover_reg_top/1.spi_device_intr_test.145090529 May 23 02:02:35 PM PDT 24 May 23 02:02:36 PM PDT 24 27340905 ps
T986 /workspace/coverage/cover_reg_top/29.spi_device_intr_test.352347214 May 23 02:04:07 PM PDT 24 May 23 02:04:09 PM PDT 24 41656010 ps
T987 /workspace/coverage/cover_reg_top/44.spi_device_intr_test.3995881860 May 23 02:04:21 PM PDT 24 May 23 02:04:23 PM PDT 24 12136604 ps
T988 /workspace/coverage/cover_reg_top/11.spi_device_csr_rw.3715319702 May 23 02:03:36 PM PDT 24 May 23 02:03:39 PM PDT 24 151682099 ps
T146 /workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.2043003670 May 23 02:03:50 PM PDT 24 May 23 02:03:54 PM PDT 24 79760700 ps
T989 /workspace/coverage/cover_reg_top/4.spi_device_mem_walk.3022359989 May 23 02:03:10 PM PDT 24 May 23 02:03:12 PM PDT 24 18749564 ps
T990 /workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.2853972962 May 23 02:03:39 PM PDT 24 May 23 02:03:42 PM PDT 24 27515367 ps
T166 /workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.3276280170 May 23 02:02:44 PM PDT 24 May 23 02:03:04 PM PDT 24 2945599086 ps
T104 /workspace/coverage/cover_reg_top/0.spi_device_tl_errors.1973218323 May 23 02:02:18 PM PDT 24 May 23 02:02:22 PM PDT 24 474215104 ps
T110 /workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.3775672690 May 23 02:03:40 PM PDT 24 May 23 02:03:44 PM PDT 24 310986188 ps
T124 /workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.4269707942 May 23 02:02:44 PM PDT 24 May 23 02:03:23 PM PDT 24 20154266866 ps
T991 /workspace/coverage/cover_reg_top/10.spi_device_tl_errors.2308138428 May 23 02:03:20 PM PDT 24 May 23 02:03:24 PM PDT 24 40741141 ps
T992 /workspace/coverage/cover_reg_top/45.spi_device_intr_test.2372152075 May 23 02:04:25 PM PDT 24 May 23 02:04:26 PM PDT 24 25778468 ps
T993 /workspace/coverage/cover_reg_top/22.spi_device_intr_test.2654446700 May 23 02:04:09 PM PDT 24 May 23 02:04:11 PM PDT 24 124356680 ps
T125 /workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.121444810 May 23 02:02:59 PM PDT 24 May 23 02:03:25 PM PDT 24 6035447416 ps
T84 /workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.700378710 May 23 02:03:09 PM PDT 24 May 23 02:03:11 PM PDT 24 109012271 ps
T994 /workspace/coverage/cover_reg_top/9.spi_device_intr_test.2033405795 May 23 02:03:22 PM PDT 24 May 23 02:03:23 PM PDT 24 17051745 ps
T995 /workspace/coverage/cover_reg_top/41.spi_device_intr_test.1446564937 May 23 02:04:24 PM PDT 24 May 23 02:04:26 PM PDT 24 52963775 ps
T168 /workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.1466211977 May 23 02:03:09 PM PDT 24 May 23 02:03:25 PM PDT 24 540697874 ps
T996 /workspace/coverage/cover_reg_top/0.spi_device_intr_test.1373566986 May 23 02:02:18 PM PDT 24 May 23 02:02:19 PM PDT 24 28869386 ps
T997 /workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.2254033389 May 23 02:03:35 PM PDT 24 May 23 02:03:39 PM PDT 24 78193760 ps
T998 /workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.2470342747 May 23 02:04:08 PM PDT 24 May 23 02:04:11 PM PDT 24 95582425 ps
T123 /workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.3003130961 May 23 02:02:45 PM PDT 24 May 23 02:03:07 PM PDT 24 2297899363 ps
T999 /workspace/coverage/cover_reg_top/4.spi_device_intr_test.872074205 May 23 02:02:59 PM PDT 24 May 23 02:03:01 PM PDT 24 11760107 ps
T1000 /workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.889893238 May 23 02:03:22 PM PDT 24 May 23 02:03:25 PM PDT 24 167682495 ps
T126 /workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.3579155628 May 23 02:02:57 PM PDT 24 May 23 02:03:15 PM PDT 24 3768726970 ps
T147 /workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.469395664 May 23 02:03:34 PM PDT 24 May 23 02:03:51 PM PDT 24 2706720663 ps
T149 /workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.2678847296 May 23 02:03:09 PM PDT 24 May 23 02:03:12 PM PDT 24 61576041 ps
T1001 /workspace/coverage/cover_reg_top/2.spi_device_csr_rw.2379509193 May 23 02:02:45 PM PDT 24 May 23 02:02:48 PM PDT 24 71213820 ps
T1002 /workspace/coverage/cover_reg_top/40.spi_device_intr_test.1985215880 May 23 02:04:22 PM PDT 24 May 23 02:04:24 PM PDT 24 18582942 ps
T112 /workspace/coverage/cover_reg_top/16.spi_device_tl_errors.2813404374 May 23 02:03:49 PM PDT 24 May 23 02:03:52 PM PDT 24 46775878 ps
T169 /workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.2555153531 May 23 02:03:08 PM PDT 24 May 23 02:03:31 PM PDT 24 3319756497 ps
T1003 /workspace/coverage/cover_reg_top/7.spi_device_csr_rw.1814136812 May 23 02:03:23 PM PDT 24 May 23 02:03:25 PM PDT 24 169579294 ps
T1004 /workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.3156168498 May 23 02:03:22 PM PDT 24 May 23 02:03:24 PM PDT 24 97976167 ps
T170 /workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.1157519726 May 23 02:04:08 PM PDT 24 May 23 02:04:30 PM PDT 24 1211047354 ps
T107 /workspace/coverage/cover_reg_top/8.spi_device_tl_errors.3095860634 May 23 02:03:22 PM PDT 24 May 23 02:03:28 PM PDT 24 175687079 ps
T1005 /workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.4201236167 May 23 02:04:10 PM PDT 24 May 23 02:04:13 PM PDT 24 112384625 ps
T1006 /workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.2660330960 May 23 02:02:19 PM PDT 24 May 23 02:02:39 PM PDT 24 300102987 ps
T1007 /workspace/coverage/cover_reg_top/18.spi_device_csr_rw.669547265 May 23 02:04:08 PM PDT 24 May 23 02:04:11 PM PDT 24 34805824 ps
T1008 /workspace/coverage/cover_reg_top/15.spi_device_intr_test.3267630289 May 23 02:03:51 PM PDT 24 May 23 02:03:52 PM PDT 24 15910271 ps
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