Assert Coverage for Module : 
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2620 | 
0 | 
0 | 
| T97 | 
14806 | 
249 | 
0 | 
0 | 
| T98 | 
27463 | 
7 | 
0 | 
0 | 
| T99 | 
5224 | 
3 | 
0 | 
0 | 
| T122 | 
8793 | 
237 | 
0 | 
0 | 
| T123 | 
35329 | 
2 | 
0 | 
0 | 
| T124 | 
6572 | 
166 | 
0 | 
0 | 
| T126 | 
15709 | 
57 | 
0 | 
0 | 
| T133 | 
11785 | 
9 | 
0 | 
0 | 
| T134 | 
5493 | 
2 | 
0 | 
0 | 
| T135 | 
4699 | 
2 | 
0 | 
0 | 
addr_swap_data_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2321 | 
0 | 
0 | 
| T107 | 
1915 | 
3 | 
0 | 
0 | 
| T123 | 
35329 | 
45 | 
0 | 
0 | 
| T125 | 
89497 | 
49 | 
0 | 
0 | 
| T126 | 
15709 | 
4 | 
0 | 
0 | 
| T134 | 
5493 | 
7 | 
0 | 
0 | 
| T137 | 
3848 | 
4 | 
0 | 
0 | 
| T139 | 
3958 | 
8 | 
0 | 
0 | 
| T146 | 
10547 | 
7 | 
0 | 
0 | 
| T174 | 
90751 | 
226 | 
0 | 
0 | 
| T175 | 
84270 | 
509 | 
0 | 
0 | 
addr_swap_mask_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2382 | 
0 | 
0 | 
| T107 | 
1915 | 
5 | 
0 | 
0 | 
| T123 | 
35329 | 
21 | 
0 | 
0 | 
| T125 | 
89497 | 
63 | 
0 | 
0 | 
| T134 | 
5493 | 
3 | 
0 | 
0 | 
| T139 | 
3958 | 
6 | 
0 | 
0 | 
| T146 | 
10547 | 
9 | 
0 | 
0 | 
| T148 | 
90655 | 
230 | 
0 | 
0 | 
| T174 | 
90751 | 
205 | 
0 | 
0 | 
| T175 | 
84270 | 
530 | 
0 | 
0 | 
| T176 | 
6899 | 
11 | 
0 | 
0 | 
cfg_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
3198 | 
0 | 
0 | 
| T123 | 
35329 | 
87 | 
0 | 
0 | 
| T125 | 
89497 | 
147 | 
0 | 
0 | 
| T134 | 
5493 | 
10 | 
0 | 
0 | 
| T137 | 
3848 | 
7 | 
0 | 
0 | 
| T139 | 
3958 | 
11 | 
0 | 
0 | 
| T146 | 
10547 | 
27 | 
0 | 
0 | 
| T148 | 
90655 | 
264 | 
0 | 
0 | 
| T174 | 
90751 | 
269 | 
0 | 
0 | 
| T175 | 
84270 | 
523 | 
0 | 
0 | 
| T176 | 
6899 | 
24 | 
0 | 
0 | 
cmd_filter_0_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
12139 | 
0 | 
0 | 
| T107 | 
1915 | 
3 | 
0 | 
0 | 
| T123 | 
35329 | 
589 | 
0 | 
0 | 
| T125 | 
89497 | 
848 | 
0 | 
0 | 
| T134 | 
5493 | 
4 | 
0 | 
0 | 
| T139 | 
3958 | 
9 | 
0 | 
0 | 
| T146 | 
10547 | 
112 | 
0 | 
0 | 
| T148 | 
90655 | 
231 | 
0 | 
0 | 
| T174 | 
90751 | 
216 | 
0 | 
0 | 
| T175 | 
84270 | 
500 | 
0 | 
0 | 
| T176 | 
6899 | 
21 | 
0 | 
0 | 
cmd_filter_1_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
13811 | 
0 | 
0 | 
| T107 | 
1915 | 
8 | 
0 | 
0 | 
| T108 | 
2192 | 
1 | 
0 | 
0 | 
| T123 | 
35329 | 
733 | 
0 | 
0 | 
| T125 | 
89497 | 
1023 | 
0 | 
0 | 
| T134 | 
5493 | 
3 | 
0 | 
0 | 
| T137 | 
3848 | 
41 | 
0 | 
0 | 
| T139 | 
3958 | 
4 | 
0 | 
0 | 
| T146 | 
10547 | 
5 | 
0 | 
0 | 
| T174 | 
90751 | 
249 | 
0 | 
0 | 
| T175 | 
84270 | 
511 | 
0 | 
0 | 
cmd_filter_2_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
13948 | 
0 | 
0 | 
| T107 | 
1915 | 
6 | 
0 | 
0 | 
| T123 | 
35329 | 
782 | 
0 | 
0 | 
| T125 | 
89497 | 
976 | 
0 | 
0 | 
| T134 | 
5493 | 
66 | 
0 | 
0 | 
| T139 | 
3958 | 
9 | 
0 | 
0 | 
| T146 | 
10547 | 
152 | 
0 | 
0 | 
| T148 | 
90655 | 
206 | 
0 | 
0 | 
| T174 | 
90751 | 
261 | 
0 | 
0 | 
| T175 | 
84270 | 
493 | 
0 | 
0 | 
| T176 | 
6899 | 
26 | 
0 | 
0 | 
cmd_filter_3_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
13747 | 
0 | 
0 | 
| T107 | 
1915 | 
4 | 
0 | 
0 | 
| T108 | 
2192 | 
3 | 
0 | 
0 | 
| T123 | 
35329 | 
801 | 
0 | 
0 | 
| T125 | 
89497 | 
905 | 
0 | 
0 | 
| T134 | 
5493 | 
57 | 
0 | 
0 | 
| T137 | 
3848 | 
87 | 
0 | 
0 | 
| T139 | 
3958 | 
99 | 
0 | 
0 | 
| T146 | 
10547 | 
254 | 
0 | 
0 | 
| T174 | 
90751 | 
220 | 
0 | 
0 | 
| T175 | 
84270 | 
471 | 
0 | 
0 | 
cmd_filter_4_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
12570 | 
0 | 
0 | 
| T107 | 
1915 | 
4 | 
0 | 
0 | 
| T108 | 
2192 | 
6 | 
0 | 
0 | 
| T123 | 
35329 | 
781 | 
0 | 
0 | 
| T125 | 
89497 | 
1108 | 
0 | 
0 | 
| T137 | 
3848 | 
1 | 
0 | 
0 | 
| T139 | 
3958 | 
4 | 
0 | 
0 | 
| T146 | 
10547 | 
119 | 
0 | 
0 | 
| T174 | 
90751 | 
253 | 
0 | 
0 | 
| T175 | 
84270 | 
534 | 
0 | 
0 | 
| T176 | 
6899 | 
3 | 
0 | 
0 | 
cmd_filter_5_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
12941 | 
0 | 
0 | 
| T107 | 
1915 | 
2 | 
0 | 
0 | 
| T123 | 
35329 | 
434 | 
0 | 
0 | 
| T125 | 
89497 | 
674 | 
0 | 
0 | 
| T134 | 
5493 | 
9 | 
0 | 
0 | 
| T137 | 
3848 | 
65 | 
0 | 
0 | 
| T139 | 
3958 | 
129 | 
0 | 
0 | 
| T146 | 
10547 | 
193 | 
0 | 
0 | 
| T174 | 
90751 | 
193 | 
0 | 
0 | 
| T175 | 
84270 | 
562 | 
0 | 
0 | 
| T176 | 
6899 | 
6 | 
0 | 
0 | 
cmd_filter_6_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
12801 | 
0 | 
0 | 
| T107 | 
1915 | 
4 | 
0 | 
0 | 
| T108 | 
2192 | 
4 | 
0 | 
0 | 
| T123 | 
35329 | 
589 | 
0 | 
0 | 
| T125 | 
89497 | 
687 | 
0 | 
0 | 
| T134 | 
5493 | 
7 | 
0 | 
0 | 
| T137 | 
3848 | 
48 | 
0 | 
0 | 
| T139 | 
3958 | 
2 | 
0 | 
0 | 
| T146 | 
10547 | 
146 | 
0 | 
0 | 
| T174 | 
90751 | 
255 | 
0 | 
0 | 
| T175 | 
84270 | 
529 | 
0 | 
0 | 
cmd_filter_7_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
12068 | 
0 | 
0 | 
| T107 | 
1915 | 
1 | 
0 | 
0 | 
| T123 | 
35329 | 
832 | 
0 | 
0 | 
| T125 | 
89497 | 
717 | 
0 | 
0 | 
| T134 | 
5493 | 
85 | 
0 | 
0 | 
| T137 | 
3848 | 
52 | 
0 | 
0 | 
| T139 | 
3958 | 
106 | 
0 | 
0 | 
| T146 | 
10547 | 
14 | 
0 | 
0 | 
| T174 | 
90751 | 
204 | 
0 | 
0 | 
| T175 | 
84270 | 
521 | 
0 | 
0 | 
| T176 | 
6899 | 
27 | 
0 | 
0 | 
cmd_info_0_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6840 | 
0 | 
0 | 
| T107 | 
1915 | 
2 | 
0 | 
0 | 
| T108 | 
2192 | 
7 | 
0 | 
0 | 
| T123 | 
35329 | 
221 | 
0 | 
0 | 
| T125 | 
89497 | 
424 | 
0 | 
0 | 
| T134 | 
5493 | 
43 | 
0 | 
0 | 
| T137 | 
3848 | 
9 | 
0 | 
0 | 
| T139 | 
3958 | 
46 | 
0 | 
0 | 
| T146 | 
10547 | 
64 | 
0 | 
0 | 
| T174 | 
90751 | 
259 | 
0 | 
0 | 
| T175 | 
84270 | 
569 | 
0 | 
0 | 
cmd_info_10_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6390 | 
0 | 
0 | 
| T107 | 
1915 | 
3 | 
0 | 
0 | 
| T108 | 
2192 | 
7 | 
0 | 
0 | 
| T123 | 
35329 | 
172 | 
0 | 
0 | 
| T125 | 
89497 | 
380 | 
0 | 
0 | 
| T134 | 
5493 | 
3 | 
0 | 
0 | 
| T137 | 
3848 | 
11 | 
0 | 
0 | 
| T139 | 
3958 | 
6 | 
0 | 
0 | 
| T146 | 
10547 | 
99 | 
0 | 
0 | 
| T174 | 
90751 | 
222 | 
0 | 
0 | 
| T175 | 
84270 | 
527 | 
0 | 
0 | 
cmd_info_11_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6546 | 
0 | 
0 | 
| T107 | 
1915 | 
7 | 
0 | 
0 | 
| T123 | 
35329 | 
328 | 
0 | 
0 | 
| T125 | 
89497 | 
436 | 
0 | 
0 | 
| T134 | 
5493 | 
3 | 
0 | 
0 | 
| T137 | 
3848 | 
19 | 
0 | 
0 | 
| T139 | 
3958 | 
48 | 
0 | 
0 | 
| T146 | 
10547 | 
43 | 
0 | 
0 | 
| T174 | 
90751 | 
231 | 
0 | 
0 | 
| T175 | 
84270 | 
537 | 
0 | 
0 | 
| T176 | 
6899 | 
27 | 
0 | 
0 | 
cmd_info_12_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6334 | 
0 | 
0 | 
| T107 | 
1915 | 
1 | 
0 | 
0 | 
| T123 | 
35329 | 
339 | 
0 | 
0 | 
| T125 | 
89497 | 
494 | 
0 | 
0 | 
| T134 | 
5493 | 
29 | 
0 | 
0 | 
| T139 | 
3958 | 
3 | 
0 | 
0 | 
| T146 | 
10547 | 
63 | 
0 | 
0 | 
| T148 | 
90655 | 
251 | 
0 | 
0 | 
| T174 | 
90751 | 
178 | 
0 | 
0 | 
| T175 | 
84270 | 
551 | 
0 | 
0 | 
| T176 | 
6899 | 
13 | 
0 | 
0 | 
cmd_info_13_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6881 | 
0 | 
0 | 
| T97 | 
14806 | 
2 | 
0 | 
0 | 
| T107 | 
1915 | 
8 | 
0 | 
0 | 
| T123 | 
35329 | 
361 | 
0 | 
0 | 
| T125 | 
89497 | 
331 | 
0 | 
0 | 
| T134 | 
5493 | 
5 | 
0 | 
0 | 
| T137 | 
3848 | 
27 | 
0 | 
0 | 
| T139 | 
3958 | 
4 | 
0 | 
0 | 
| T146 | 
10547 | 
53 | 
0 | 
0 | 
| T174 | 
90751 | 
175 | 
0 | 
0 | 
| T175 | 
84270 | 
508 | 
0 | 
0 | 
cmd_info_14_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6599 | 
0 | 
0 | 
| T107 | 
1915 | 
4 | 
0 | 
0 | 
| T123 | 
35329 | 
184 | 
0 | 
0 | 
| T125 | 
89497 | 
477 | 
0 | 
0 | 
| T134 | 
5493 | 
36 | 
0 | 
0 | 
| T137 | 
3848 | 
18 | 
0 | 
0 | 
| T139 | 
3958 | 
7 | 
0 | 
0 | 
| T146 | 
10547 | 
57 | 
0 | 
0 | 
| T174 | 
90751 | 
218 | 
0 | 
0 | 
| T175 | 
84270 | 
574 | 
0 | 
0 | 
| T176 | 
6899 | 
22 | 
0 | 
0 | 
cmd_info_15_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6755 | 
0 | 
0 | 
| T107 | 
1915 | 
4 | 
0 | 
0 | 
| T123 | 
35329 | 
293 | 
0 | 
0 | 
| T125 | 
89497 | 
359 | 
0 | 
0 | 
| T137 | 
3848 | 
1 | 
0 | 
0 | 
| T139 | 
3958 | 
1 | 
0 | 
0 | 
| T146 | 
10547 | 
53 | 
0 | 
0 | 
| T148 | 
90655 | 
205 | 
0 | 
0 | 
| T174 | 
90751 | 
245 | 
0 | 
0 | 
| T175 | 
84270 | 
560 | 
0 | 
0 | 
| T176 | 
6899 | 
14 | 
0 | 
0 | 
cmd_info_16_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6742 | 
0 | 
0 | 
| T107 | 
1915 | 
7 | 
0 | 
0 | 
| T108 | 
2192 | 
4 | 
0 | 
0 | 
| T123 | 
35329 | 
146 | 
0 | 
0 | 
| T125 | 
89497 | 
508 | 
0 | 
0 | 
| T137 | 
3848 | 
23 | 
0 | 
0 | 
| T139 | 
3958 | 
4 | 
0 | 
0 | 
| T146 | 
10547 | 
152 | 
0 | 
0 | 
| T174 | 
90751 | 
222 | 
0 | 
0 | 
| T175 | 
84270 | 
520 | 
0 | 
0 | 
| T176 | 
6899 | 
17 | 
0 | 
0 | 
cmd_info_17_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6535 | 
0 | 
0 | 
| T107 | 
1915 | 
2 | 
0 | 
0 | 
| T123 | 
35329 | 
198 | 
0 | 
0 | 
| T125 | 
89497 | 
323 | 
0 | 
0 | 
| T134 | 
5493 | 
38 | 
0 | 
0 | 
| T139 | 
3958 | 
42 | 
0 | 
0 | 
| T146 | 
10547 | 
53 | 
0 | 
0 | 
| T148 | 
90655 | 
239 | 
0 | 
0 | 
| T174 | 
90751 | 
216 | 
0 | 
0 | 
| T175 | 
84270 | 
563 | 
0 | 
0 | 
| T176 | 
6899 | 
4 | 
0 | 
0 | 
cmd_info_18_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6323 | 
0 | 
0 | 
| T107 | 
1915 | 
1 | 
0 | 
0 | 
| T108 | 
2192 | 
5 | 
0 | 
0 | 
| T123 | 
35329 | 
261 | 
0 | 
0 | 
| T125 | 
89497 | 
229 | 
0 | 
0 | 
| T134 | 
5493 | 
39 | 
0 | 
0 | 
| T139 | 
3958 | 
53 | 
0 | 
0 | 
| T146 | 
10547 | 
10 | 
0 | 
0 | 
| T174 | 
90751 | 
260 | 
0 | 
0 | 
| T175 | 
84270 | 
512 | 
0 | 
0 | 
| T176 | 
6899 | 
6 | 
0 | 
0 | 
cmd_info_19_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6972 | 
0 | 
0 | 
| T107 | 
1915 | 
6 | 
0 | 
0 | 
| T123 | 
35329 | 
276 | 
0 | 
0 | 
| T125 | 
89497 | 
447 | 
0 | 
0 | 
| T134 | 
5493 | 
8 | 
0 | 
0 | 
| T137 | 
3848 | 
3 | 
0 | 
0 | 
| T139 | 
3958 | 
47 | 
0 | 
0 | 
| T146 | 
10547 | 
8 | 
0 | 
0 | 
| T174 | 
90751 | 
221 | 
0 | 
0 | 
| T175 | 
84270 | 
531 | 
0 | 
0 | 
| T176 | 
6899 | 
40 | 
0 | 
0 | 
cmd_info_1_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6468 | 
0 | 
0 | 
| T107 | 
1915 | 
7 | 
0 | 
0 | 
| T108 | 
2192 | 
6 | 
0 | 
0 | 
| T123 | 
35329 | 
249 | 
0 | 
0 | 
| T125 | 
89497 | 
393 | 
0 | 
0 | 
| T134 | 
5493 | 
10 | 
0 | 
0 | 
| T137 | 
3848 | 
18 | 
0 | 
0 | 
| T139 | 
3958 | 
46 | 
0 | 
0 | 
| T146 | 
10547 | 
127 | 
0 | 
0 | 
| T174 | 
90751 | 
224 | 
0 | 
0 | 
| T175 | 
84270 | 
481 | 
0 | 
0 | 
cmd_info_20_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6692 | 
0 | 
0 | 
| T97 | 
14806 | 
13 | 
0 | 
0 | 
| T107 | 
1915 | 
6 | 
0 | 
0 | 
| T108 | 
2192 | 
10 | 
0 | 
0 | 
| T123 | 
35329 | 
329 | 
0 | 
0 | 
| T125 | 
89497 | 
398 | 
0 | 
0 | 
| T134 | 
5493 | 
27 | 
0 | 
0 | 
| T137 | 
3848 | 
4 | 
0 | 
0 | 
| T139 | 
3958 | 
59 | 
0 | 
0 | 
| T174 | 
90751 | 
248 | 
0 | 
0 | 
| T175 | 
84270 | 
538 | 
0 | 
0 | 
cmd_info_21_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6318 | 
0 | 
0 | 
| T123 | 
35329 | 
203 | 
0 | 
0 | 
| T125 | 
89497 | 
340 | 
0 | 
0 | 
| T134 | 
5493 | 
31 | 
0 | 
0 | 
| T137 | 
3848 | 
1 | 
0 | 
0 | 
| T139 | 
3958 | 
72 | 
0 | 
0 | 
| T146 | 
10547 | 
92 | 
0 | 
0 | 
| T148 | 
90655 | 
232 | 
0 | 
0 | 
| T174 | 
90751 | 
203 | 
0 | 
0 | 
| T175 | 
84270 | 
482 | 
0 | 
0 | 
| T176 | 
6899 | 
3 | 
0 | 
0 | 
cmd_info_22_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6450 | 
0 | 
0 | 
| T107 | 
1915 | 
1 | 
0 | 
0 | 
| T123 | 
35329 | 
207 | 
0 | 
0 | 
| T125 | 
89497 | 
578 | 
0 | 
0 | 
| T137 | 
3848 | 
2 | 
0 | 
0 | 
| T139 | 
3958 | 
8 | 
0 | 
0 | 
| T146 | 
10547 | 
77 | 
0 | 
0 | 
| T148 | 
90655 | 
214 | 
0 | 
0 | 
| T174 | 
90751 | 
199 | 
0 | 
0 | 
| T175 | 
84270 | 
511 | 
0 | 
0 | 
| T176 | 
6899 | 
9 | 
0 | 
0 | 
cmd_info_23_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6881 | 
0 | 
0 | 
| T107 | 
1915 | 
2 | 
0 | 
0 | 
| T108 | 
2192 | 
6 | 
0 | 
0 | 
| T123 | 
35329 | 
331 | 
0 | 
0 | 
| T125 | 
89497 | 
435 | 
0 | 
0 | 
| T134 | 
5493 | 
33 | 
0 | 
0 | 
| T137 | 
3848 | 
25 | 
0 | 
0 | 
| T146 | 
10547 | 
107 | 
0 | 
0 | 
| T148 | 
90655 | 
217 | 
0 | 
0 | 
| T174 | 
90751 | 
228 | 
0 | 
0 | 
| T175 | 
84270 | 
532 | 
0 | 
0 | 
cmd_info_2_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
5888 | 
0 | 
0 | 
| T107 | 
1915 | 
6 | 
0 | 
0 | 
| T108 | 
2192 | 
4 | 
0 | 
0 | 
| T123 | 
35329 | 
210 | 
0 | 
0 | 
| T125 | 
89497 | 
461 | 
0 | 
0 | 
| T134 | 
5493 | 
4 | 
0 | 
0 | 
| T137 | 
3848 | 
8 | 
0 | 
0 | 
| T139 | 
3958 | 
26 | 
0 | 
0 | 
| T146 | 
10547 | 
89 | 
0 | 
0 | 
| T174 | 
90751 | 
219 | 
0 | 
0 | 
| T175 | 
84270 | 
539 | 
0 | 
0 | 
cmd_info_3_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6581 | 
0 | 
0 | 
| T107 | 
1915 | 
1 | 
0 | 
0 | 
| T123 | 
35329 | 
148 | 
0 | 
0 | 
| T125 | 
89497 | 
579 | 
0 | 
0 | 
| T134 | 
5493 | 
3 | 
0 | 
0 | 
| T137 | 
3848 | 
17 | 
0 | 
0 | 
| T139 | 
3958 | 
44 | 
0 | 
0 | 
| T146 | 
10547 | 
114 | 
0 | 
0 | 
| T174 | 
90751 | 
208 | 
0 | 
0 | 
| T175 | 
84270 | 
522 | 
0 | 
0 | 
| T176 | 
6899 | 
32 | 
0 | 
0 | 
cmd_info_4_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6542 | 
0 | 
0 | 
| T107 | 
1915 | 
8 | 
0 | 
0 | 
| T123 | 
35329 | 
274 | 
0 | 
0 | 
| T125 | 
89497 | 
564 | 
0 | 
0 | 
| T134 | 
5493 | 
4 | 
0 | 
0 | 
| T137 | 
3848 | 
18 | 
0 | 
0 | 
| T139 | 
3958 | 
2 | 
0 | 
0 | 
| T146 | 
10547 | 
5 | 
0 | 
0 | 
| T174 | 
90751 | 
219 | 
0 | 
0 | 
| T175 | 
84270 | 
601 | 
0 | 
0 | 
| T176 | 
6899 | 
30 | 
0 | 
0 | 
cmd_info_5_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6246 | 
0 | 
0 | 
| T107 | 
1915 | 
2 | 
0 | 
0 | 
| T123 | 
35329 | 
137 | 
0 | 
0 | 
| T125 | 
89497 | 
289 | 
0 | 
0 | 
| T134 | 
5493 | 
31 | 
0 | 
0 | 
| T139 | 
3958 | 
1 | 
0 | 
0 | 
| T146 | 
10547 | 
116 | 
0 | 
0 | 
| T148 | 
90655 | 
234 | 
0 | 
0 | 
| T174 | 
90751 | 
205 | 
0 | 
0 | 
| T175 | 
84270 | 
504 | 
0 | 
0 | 
| T176 | 
6899 | 
36 | 
0 | 
0 | 
cmd_info_6_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6904 | 
0 | 
0 | 
| T107 | 
1915 | 
1 | 
0 | 
0 | 
| T108 | 
2192 | 
6 | 
0 | 
0 | 
| T123 | 
35329 | 
433 | 
0 | 
0 | 
| T125 | 
89497 | 
420 | 
0 | 
0 | 
| T134 | 
5493 | 
42 | 
0 | 
0 | 
| T137 | 
3848 | 
6 | 
0 | 
0 | 
| T139 | 
3958 | 
3 | 
0 | 
0 | 
| T146 | 
10547 | 
154 | 
0 | 
0 | 
| T174 | 
90751 | 
275 | 
0 | 
0 | 
| T175 | 
84270 | 
522 | 
0 | 
0 | 
cmd_info_7_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6532 | 
0 | 
0 | 
| T97 | 
14806 | 
5 | 
0 | 
0 | 
| T107 | 
1915 | 
7 | 
0 | 
0 | 
| T123 | 
35329 | 
248 | 
0 | 
0 | 
| T125 | 
89497 | 
419 | 
0 | 
0 | 
| T134 | 
5493 | 
5 | 
0 | 
0 | 
| T137 | 
3848 | 
33 | 
0 | 
0 | 
| T139 | 
3958 | 
8 | 
0 | 
0 | 
| T146 | 
10547 | 
64 | 
0 | 
0 | 
| T174 | 
90751 | 
219 | 
0 | 
0 | 
| T175 | 
84270 | 
506 | 
0 | 
0 | 
cmd_info_8_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6137 | 
0 | 
0 | 
| T107 | 
1915 | 
8 | 
0 | 
0 | 
| T123 | 
35329 | 
133 | 
0 | 
0 | 
| T125 | 
89497 | 
408 | 
0 | 
0 | 
| T137 | 
3848 | 
37 | 
0 | 
0 | 
| T139 | 
3958 | 
6 | 
0 | 
0 | 
| T146 | 
10547 | 
143 | 
0 | 
0 | 
| T148 | 
90655 | 
239 | 
0 | 
0 | 
| T174 | 
90751 | 
230 | 
0 | 
0 | 
| T175 | 
84270 | 
543 | 
0 | 
0 | 
| T176 | 
6899 | 
31 | 
0 | 
0 | 
cmd_info_9_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
6844 | 
0 | 
0 | 
| T107 | 
1915 | 
6 | 
0 | 
0 | 
| T108 | 
2192 | 
6 | 
0 | 
0 | 
| T123 | 
35329 | 
387 | 
0 | 
0 | 
| T125 | 
89497 | 
481 | 
0 | 
0 | 
| T134 | 
5493 | 
33 | 
0 | 
0 | 
| T139 | 
3958 | 
9 | 
0 | 
0 | 
| T146 | 
10547 | 
80 | 
0 | 
0 | 
| T174 | 
90751 | 
208 | 
0 | 
0 | 
| T175 | 
84270 | 
538 | 
0 | 
0 | 
| T176 | 
6899 | 
13 | 
0 | 
0 | 
cmd_info_en4b_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2715 | 
0 | 
0 | 
| T107 | 
1915 | 
1 | 
0 | 
0 | 
| T108 | 
2192 | 
4 | 
0 | 
0 | 
| T123 | 
35329 | 
50 | 
0 | 
0 | 
| T125 | 
89497 | 
101 | 
0 | 
0 | 
| T137 | 
3848 | 
6 | 
0 | 
0 | 
| T139 | 
3958 | 
6 | 
0 | 
0 | 
| T146 | 
10547 | 
13 | 
0 | 
0 | 
| T174 | 
90751 | 
234 | 
0 | 
0 | 
| T175 | 
84270 | 
539 | 
0 | 
0 | 
| T176 | 
6899 | 
8 | 
0 | 
0 | 
cmd_info_ex4b_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2794 | 
0 | 
0 | 
| T107 | 
1915 | 
6 | 
0 | 
0 | 
| T108 | 
2192 | 
9 | 
0 | 
0 | 
| T123 | 
35329 | 
55 | 
0 | 
0 | 
| T125 | 
89497 | 
100 | 
0 | 
0 | 
| T134 | 
5493 | 
1 | 
0 | 
0 | 
| T139 | 
3958 | 
9 | 
0 | 
0 | 
| T146 | 
10547 | 
1 | 
0 | 
0 | 
| T174 | 
90751 | 
228 | 
0 | 
0 | 
| T175 | 
84270 | 
524 | 
0 | 
0 | 
| T176 | 
6899 | 
25 | 
0 | 
0 | 
cmd_info_wrdi_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2687 | 
0 | 
0 | 
| T107 | 
1915 | 
5 | 
0 | 
0 | 
| T123 | 
35329 | 
42 | 
0 | 
0 | 
| T125 | 
89497 | 
64 | 
0 | 
0 | 
| T137 | 
3848 | 
4 | 
0 | 
0 | 
| T146 | 
10547 | 
19 | 
0 | 
0 | 
| T148 | 
90655 | 
237 | 
0 | 
0 | 
| T174 | 
90751 | 
182 | 
0 | 
0 | 
| T175 | 
84270 | 
491 | 
0 | 
0 | 
| T176 | 
6899 | 
22 | 
0 | 
0 | 
| T177 | 
93761 | 
162 | 
0 | 
0 | 
cmd_info_wren_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2708 | 
0 | 
0 | 
| T107 | 
1915 | 
6 | 
0 | 
0 | 
| T123 | 
35329 | 
38 | 
0 | 
0 | 
| T125 | 
89497 | 
93 | 
0 | 
0 | 
| T134 | 
5493 | 
9 | 
0 | 
0 | 
| T137 | 
3848 | 
3 | 
0 | 
0 | 
| T139 | 
3958 | 
6 | 
0 | 
0 | 
| T146 | 
10547 | 
19 | 
0 | 
0 | 
| T174 | 
90751 | 
230 | 
0 | 
0 | 
| T175 | 
84270 | 
585 | 
0 | 
0 | 
| T176 | 
6899 | 
40 | 
0 | 
0 | 
intercept_en_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
3741 | 
0 | 
0 | 
| T108 | 
2192 | 
2 | 
0 | 
0 | 
| T123 | 
35329 | 
104 | 
0 | 
0 | 
| T125 | 
89497 | 
139 | 
0 | 
0 | 
| T134 | 
5493 | 
3 | 
0 | 
0 | 
| T137 | 
3848 | 
7 | 
0 | 
0 | 
| T139 | 
3958 | 
5 | 
0 | 
0 | 
| T146 | 
10547 | 
48 | 
0 | 
0 | 
| T174 | 
90751 | 
236 | 
0 | 
0 | 
| T175 | 
84270 | 
533 | 
0 | 
0 | 
| T176 | 
6899 | 
14 | 
0 | 
0 | 
intr_enable_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
5429 | 
0 | 
0 | 
| T24 | 
200409 | 
25 | 
0 | 
0 | 
| T33 | 
8230 | 
0 | 
0 | 
0 | 
| T42 | 
168101 | 
0 | 
0 | 
0 | 
| T43 | 
207369 | 
0 | 
0 | 
0 | 
| T119 | 
120213 | 
0 | 
0 | 
0 | 
| T120 | 
289857 | 
0 | 
0 | 
0 | 
| T128 | 
57516 | 
0 | 
0 | 
0 | 
| T150 | 
0 | 
36 | 
0 | 
0 | 
| T151 | 
0 | 
12 | 
0 | 
0 | 
| T167 | 
132692 | 
0 | 
0 | 
0 | 
| T178 | 
0 | 
22 | 
0 | 
0 | 
| T179 | 
0 | 
92 | 
0 | 
0 | 
| T180 | 
0 | 
36 | 
0 | 
0 | 
| T181 | 
0 | 
36 | 
0 | 
0 | 
| T182 | 
0 | 
20 | 
0 | 
0 | 
| T183 | 
0 | 
15 | 
0 | 
0 | 
| T184 | 
0 | 
62 | 
0 | 
0 | 
| T185 | 
743 | 
0 | 
0 | 
0 | 
| T186 | 
1337 | 
0 | 
0 | 
0 | 
jedec_cc_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2795 | 
0 | 
0 | 
| T107 | 
1915 | 
6 | 
0 | 
0 | 
| T108 | 
2192 | 
4 | 
0 | 
0 | 
| T123 | 
35329 | 
46 | 
0 | 
0 | 
| T125 | 
89497 | 
89 | 
0 | 
0 | 
| T126 | 
15709 | 
4 | 
0 | 
0 | 
| T139 | 
3958 | 
3 | 
0 | 
0 | 
| T146 | 
10547 | 
14 | 
0 | 
0 | 
| T174 | 
90751 | 
254 | 
0 | 
0 | 
| T175 | 
84270 | 
564 | 
0 | 
0 | 
| T176 | 
6899 | 
34 | 
0 | 
0 | 
jedec_id_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2801 | 
0 | 
0 | 
| T108 | 
2192 | 
9 | 
0 | 
0 | 
| T123 | 
35329 | 
59 | 
0 | 
0 | 
| T125 | 
89497 | 
73 | 
0 | 
0 | 
| T134 | 
5493 | 
6 | 
0 | 
0 | 
| T137 | 
3848 | 
3 | 
0 | 
0 | 
| T139 | 
3958 | 
4 | 
0 | 
0 | 
| T146 | 
10547 | 
17 | 
0 | 
0 | 
| T174 | 
90751 | 
220 | 
0 | 
0 | 
| T175 | 
84270 | 
574 | 
0 | 
0 | 
| T176 | 
6899 | 
18 | 
0 | 
0 | 
mailbox_addr_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2230 | 
0 | 
0 | 
| T107 | 
1915 | 
2 | 
0 | 
0 | 
| T108 | 
2192 | 
3 | 
0 | 
0 | 
| T123 | 
35329 | 
33 | 
0 | 
0 | 
| T125 | 
89497 | 
78 | 
0 | 
0 | 
| T137 | 
3848 | 
9 | 
0 | 
0 | 
| T146 | 
10547 | 
13 | 
0 | 
0 | 
| T148 | 
90655 | 
219 | 
0 | 
0 | 
| T174 | 
90751 | 
205 | 
0 | 
0 | 
| T175 | 
84270 | 
505 | 
0 | 
0 | 
| T176 | 
6899 | 
24 | 
0 | 
0 | 
payload_swap_data_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2419 | 
0 | 
0 | 
| T107 | 
1915 | 
1 | 
0 | 
0 | 
| T108 | 
2192 | 
2 | 
0 | 
0 | 
| T123 | 
35329 | 
50 | 
0 | 
0 | 
| T125 | 
89497 | 
62 | 
0 | 
0 | 
| T137 | 
3848 | 
2 | 
0 | 
0 | 
| T146 | 
10547 | 
15 | 
0 | 
0 | 
| T148 | 
90655 | 
198 | 
0 | 
0 | 
| T174 | 
90751 | 
216 | 
0 | 
0 | 
| T175 | 
84270 | 
519 | 
0 | 
0 | 
| T176 | 
6899 | 
26 | 
0 | 
0 | 
payload_swap_mask_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2342 | 
0 | 
0 | 
| T107 | 
1915 | 
5 | 
0 | 
0 | 
| T108 | 
2192 | 
3 | 
0 | 
0 | 
| T123 | 
35329 | 
22 | 
0 | 
0 | 
| T125 | 
89497 | 
48 | 
0 | 
0 | 
| T139 | 
3958 | 
2 | 
0 | 
0 | 
| T146 | 
10547 | 
16 | 
0 | 
0 | 
| T148 | 
90655 | 
237 | 
0 | 
0 | 
| T174 | 
90751 | 
173 | 
0 | 
0 | 
| T175 | 
84270 | 
538 | 
0 | 
0 | 
| T176 | 
6899 | 
3 | 
0 | 
0 | 
read_threshold_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2270 | 
0 | 
0 | 
| T97 | 
14806 | 
9 | 
0 | 
0 | 
| T107 | 
1915 | 
2 | 
0 | 
0 | 
| T108 | 
2192 | 
1 | 
0 | 
0 | 
| T123 | 
35329 | 
32 | 
0 | 
0 | 
| T125 | 
89497 | 
54 | 
0 | 
0 | 
| T139 | 
3958 | 
7 | 
0 | 
0 | 
| T146 | 
10547 | 
15 | 
0 | 
0 | 
| T174 | 
90751 | 
222 | 
0 | 
0 | 
| T175 | 
84270 | 
526 | 
0 | 
0 | 
| T176 | 
6899 | 
21 | 
0 | 
0 | 
tpm_access_0_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
3537 | 
0 | 
0 | 
| T107 | 
1915 | 
1 | 
0 | 
0 | 
| T123 | 
35329 | 
104 | 
0 | 
0 | 
| T125 | 
89497 | 
206 | 
0 | 
0 | 
| T137 | 
3848 | 
22 | 
0 | 
0 | 
| T139 | 
3958 | 
24 | 
0 | 
0 | 
| T146 | 
10547 | 
45 | 
0 | 
0 | 
| T148 | 
90655 | 
210 | 
0 | 
0 | 
| T174 | 
90751 | 
223 | 
0 | 
0 | 
| T175 | 
84270 | 
593 | 
0 | 
0 | 
| T176 | 
6899 | 
20 | 
0 | 
0 | 
tpm_access_1_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2436 | 
0 | 
0 | 
| T107 | 
1915 | 
4 | 
0 | 
0 | 
| T123 | 
35329 | 
31 | 
0 | 
0 | 
| T125 | 
89497 | 
50 | 
0 | 
0 | 
| T139 | 
3958 | 
8 | 
0 | 
0 | 
| T146 | 
10547 | 
11 | 
0 | 
0 | 
| T148 | 
90655 | 
207 | 
0 | 
0 | 
| T174 | 
90751 | 
241 | 
0 | 
0 | 
| T175 | 
84270 | 
519 | 
0 | 
0 | 
| T176 | 
6899 | 
18 | 
0 | 
0 | 
| T177 | 
93761 | 
136 | 
0 | 
0 | 
tpm_cfg_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
3943 | 
0 | 
0 | 
| T107 | 
1915 | 
10 | 
0 | 
0 | 
| T108 | 
2192 | 
1 | 
0 | 
0 | 
| T123 | 
35329 | 
125 | 
0 | 
0 | 
| T125 | 
89497 | 
182 | 
0 | 
0 | 
| T134 | 
5493 | 
8 | 
0 | 
0 | 
| T137 | 
3848 | 
7 | 
0 | 
0 | 
| T139 | 
3958 | 
14 | 
0 | 
0 | 
| T146 | 
10547 | 
31 | 
0 | 
0 | 
| T174 | 
90751 | 
252 | 
0 | 
0 | 
| T175 | 
84270 | 
577 | 
0 | 
0 | 
tpm_did_vid_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2809 | 
0 | 
0 | 
| T107 | 
1915 | 
9 | 
0 | 
0 | 
| T123 | 
35329 | 
45 | 
0 | 
0 | 
| T125 | 
89497 | 
66 | 
0 | 
0 | 
| T134 | 
5493 | 
4 | 
0 | 
0 | 
| T146 | 
10547 | 
10 | 
0 | 
0 | 
| T148 | 
90655 | 
214 | 
0 | 
0 | 
| T174 | 
90751 | 
233 | 
0 | 
0 | 
| T175 | 
84270 | 
478 | 
0 | 
0 | 
| T176 | 
6899 | 
30 | 
0 | 
0 | 
| T177 | 
93761 | 
190 | 
0 | 
0 | 
tpm_int_enable_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2401 | 
0 | 
0 | 
| T107 | 
1915 | 
4 | 
0 | 
0 | 
| T108 | 
2192 | 
1 | 
0 | 
0 | 
| T123 | 
35329 | 
31 | 
0 | 
0 | 
| T125 | 
89497 | 
50 | 
0 | 
0 | 
| T134 | 
5493 | 
5 | 
0 | 
0 | 
| T146 | 
10547 | 
6 | 
0 | 
0 | 
| T148 | 
90655 | 
228 | 
0 | 
0 | 
| T174 | 
90751 | 
223 | 
0 | 
0 | 
| T175 | 
84270 | 
517 | 
0 | 
0 | 
| T176 | 
6899 | 
25 | 
0 | 
0 | 
tpm_int_status_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2537 | 
0 | 
0 | 
| T107 | 
1915 | 
2 | 
0 | 
0 | 
| T123 | 
35329 | 
37 | 
0 | 
0 | 
| T125 | 
89497 | 
71 | 
0 | 
0 | 
| T134 | 
5493 | 
3 | 
0 | 
0 | 
| T139 | 
3958 | 
4 | 
0 | 
0 | 
| T146 | 
10547 | 
10 | 
0 | 
0 | 
| T148 | 
90655 | 
235 | 
0 | 
0 | 
| T174 | 
90751 | 
235 | 
0 | 
0 | 
| T175 | 
84270 | 
586 | 
0 | 
0 | 
| T176 | 
6899 | 
17 | 
0 | 
0 | 
tpm_int_vector_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2448 | 
0 | 
0 | 
| T107 | 
1915 | 
4 | 
0 | 
0 | 
| T108 | 
2192 | 
1 | 
0 | 
0 | 
| T123 | 
35329 | 
31 | 
0 | 
0 | 
| T125 | 
89497 | 
75 | 
0 | 
0 | 
| T137 | 
3848 | 
5 | 
0 | 
0 | 
| T139 | 
3958 | 
4 | 
0 | 
0 | 
| T146 | 
10547 | 
8 | 
0 | 
0 | 
| T174 | 
90751 | 
237 | 
0 | 
0 | 
| T175 | 
84270 | 
569 | 
0 | 
0 | 
| T176 | 
6899 | 
28 | 
0 | 
0 | 
tpm_intf_capability_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2446 | 
0 | 
0 | 
| T123 | 
35329 | 
41 | 
0 | 
0 | 
| T125 | 
89497 | 
59 | 
0 | 
0 | 
| T134 | 
5493 | 
2 | 
0 | 
0 | 
| T137 | 
3848 | 
5 | 
0 | 
0 | 
| T146 | 
10547 | 
3 | 
0 | 
0 | 
| T148 | 
90655 | 
209 | 
0 | 
0 | 
| T174 | 
90751 | 
212 | 
0 | 
0 | 
| T175 | 
84270 | 
521 | 
0 | 
0 | 
| T176 | 
6899 | 
35 | 
0 | 
0 | 
| T177 | 
93761 | 
114 | 
0 | 
0 | 
tpm_rid_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2488 | 
0 | 
0 | 
| T107 | 
1915 | 
6 | 
0 | 
0 | 
| T108 | 
2192 | 
3 | 
0 | 
0 | 
| T123 | 
35329 | 
45 | 
0 | 
0 | 
| T125 | 
89497 | 
55 | 
0 | 
0 | 
| T134 | 
5493 | 
5 | 
0 | 
0 | 
| T137 | 
3848 | 
4 | 
0 | 
0 | 
| T139 | 
3958 | 
7 | 
0 | 
0 | 
| T146 | 
10547 | 
16 | 
0 | 
0 | 
| T174 | 
90751 | 
220 | 
0 | 
0 | 
| T175 | 
84270 | 
573 | 
0 | 
0 | 
tpm_sts_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444927349 | 
2436 | 
0 | 
0 | 
| T107 | 
1915 | 
3 | 
0 | 
0 | 
| T123 | 
35329 | 
30 | 
0 | 
0 | 
| T125 | 
89497 | 
65 | 
0 | 
0 | 
| T137 | 
3848 | 
3 | 
0 | 
0 | 
| T139 | 
3958 | 
7 | 
0 | 
0 | 
| T146 | 
10547 | 
12 | 
0 | 
0 | 
| T148 | 
90655 | 
217 | 
0 | 
0 | 
| T174 | 
90751 | 
222 | 
0 | 
0 | 
| T175 | 
84270 | 
548 | 
0 | 
0 | 
| T176 | 
6899 | 
22 | 
0 | 
0 |