Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
92.52	95.20	84.31	97.00		90.62	95.45	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	464757517	4078	0	0
addr_swap_data_rd_A	464757517	1313	0	0
addr_swap_mask_rd_A	464757517	1272	0	0
cfg_rd_A	464757517	1714	0	0
cmd_filter_0_rd_A	464757517	6950	0	0
cmd_filter_1_rd_A	464757517	7044	0	0
cmd_filter_2_rd_A	464757517	6463	0	0
cmd_filter_3_rd_A	464757517	6969	0	0
cmd_filter_4_rd_A	464757517	6541	0	0
cmd_filter_5_rd_A	464757517	5721	0	0
cmd_filter_6_rd_A	464757517	6445	0	0
cmd_filter_7_rd_A	464757517	6991	0	0
cmd_info_0_rd_A	464757517	3571	0	0
cmd_info_10_rd_A	464757517	3439	0	0
cmd_info_11_rd_A	464757517	3951	0	0
cmd_info_12_rd_A	464757517	3312	0	0
cmd_info_13_rd_A	464757517	3762	0	0
cmd_info_14_rd_A	464757517	3084	0	0
cmd_info_15_rd_A	464757517	3377	0	0
cmd_info_16_rd_A	464757517	3390	0	0
cmd_info_17_rd_A	464757517	3022	0	0
cmd_info_18_rd_A	464757517	3426	0	0
cmd_info_19_rd_A	464757517	3229	0	0
cmd_info_1_rd_A	464757517	3637	0	0
cmd_info_20_rd_A	464757517	3433	0	0
cmd_info_21_rd_A	464757517	3423	0	0
cmd_info_22_rd_A	464757517	3266	0	0
cmd_info_23_rd_A	464757517	3291	0	0
cmd_info_2_rd_A	464757517	3550	0	0
cmd_info_3_rd_A	464757517	3331	0	0
cmd_info_4_rd_A	464757517	3377	0	0
cmd_info_5_rd_A	464757517	3867	0	0
cmd_info_6_rd_A	464757517	2793	0	0
cmd_info_7_rd_A	464757517	3174	0	0
cmd_info_8_rd_A	464757517	3291	0	0
cmd_info_9_rd_A	464757517	3770	0	0
cmd_info_en4b_rd_A	464757517	1415	0	0
cmd_info_ex4b_rd_A	464757517	1348	0	0
cmd_info_wrdi_rd_A	464757517	1485	0	0
cmd_info_wren_rd_A	464757517	1527	0	0
intercept_en_rd_A	464757517	1724	0	0
intr_enable_rd_A	464757517	2991	0	0
jedec_cc_rd_A	464757517	1332	0	0
jedec_id_rd_A	464757517	1622	0	0
mailbox_addr_rd_A	464757517	1198	0	0
payload_swap_data_rd_A	464757517	1262	0	0
payload_swap_mask_rd_A	464757517	1313	0	0
read_threshold_rd_A	464757517	1384	0	0
tpm_access_0_rd_A	464757517	1822	0	0
tpm_access_1_rd_A	464757517	1291	0	0
tpm_cfg_rd_A	464757517	1942	0	0
tpm_did_vid_rd_A	464757517	1478	0	0
tpm_int_enable_rd_A	464757517	1305	0	0
tpm_int_status_rd_A	464757517	1306	0	0
tpm_int_vector_rd_A	464757517	1332	0	0
tpm_intf_capability_rd_A	464757517	1302	0	0
tpm_rid_rd_A	464757517	1265	0	0
tpm_sts_rd_A	464757517	1342	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	4078	0	0
T94	2570	122	0	0
T95	5255	17	0	0
T96	33656	2	0	0
T115	13485	231	0	0
T116	5710	221	0	0
T117	20394	2	0	0
T122	10136	131	0	0
T126	5168	211	0	0
T128	5214	19	0	0
T129	4585	2	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1313	0	0
T96	33656	23	0	0
T102	4677	8	0	0
T103	3474	4	0	0
T129	4585	7	0	0
T131	16100	13	0	0
T133	12786	3	0	0
T140	7508	5	0	0
T154	6269	6	0	0
T165	17525	21	0	0
T166	15026	1	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1272	0	0
T96	33656	26	0	0
T102	4677	13	0	0
T103	3474	6	0	0
T129	4585	3	0	0
T131	16100	41	0	0
T133	12786	14	0	0
T140	7508	3	0	0
T154	6269	8	0	0
T165	17525	31	0	0
T166	15026	64	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1714	0	0
T96	33656	65	0	0
T102	4677	14	0	0
T103	3474	7	0	0
T122	10136	8	0	0
T129	4585	7	0	0
T131	16100	43	0	0
T133	12786	33	0	0
T140	7508	3	0	0
T154	6269	18	0	0
T165	17525	30	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	6950	0	0
T96	33656	465	0	0
T102	4677	10	0	0
T103	3474	8	0	0
T129	4585	2	0	0
T131	16100	242	0	0
T133	12786	125	0	0
T140	7508	63	0	0
T154	6269	10	0	0
T165	17525	23	0	0
T166	15026	59	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	7044	0	0
T96	33656	232	0	0
T102	4677	18	0	0
T103	3474	9	0	0
T129	4585	46	0	0
T131	16100	384	0	0
T133	12786	385	0	0
T140	7508	122	0	0
T154	6269	11	0	0
T165	17525	69	0	0
T166	15026	7	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	6463	0	0
T96	33656	355	0	0
T102	4677	13	0	0
T103	3474	14	0	0
T129	4585	5	0	0
T131	16100	303	0	0
T133	12786	202	0	0
T140	7508	141	0	0
T154	6269	9	0	0
T165	17525	52	0	0
T166	15026	45	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	6969	0	0
T96	33656	369	0	0
T102	4677	12	0	0
T103	3474	13	0	0
T131	16100	365	0	0
T133	12786	116	0	0
T140	7508	44	0	0
T154	6269	260	0	0
T165	17525	26	0	0
T166	15026	114	0	0
T167	181034	475	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	6541	0	0
T96	33656	271	0	0
T102	4677	17	0	0
T129	4585	48	0	0
T131	16100	132	0	0
T133	12786	352	0	0
T140	7508	4	0	0
T154	6269	130	0	0
T165	17525	36	0	0
T166	15026	83	0	0
T167	181034	492	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	5721	0	0
T96	33656	323	0	0
T102	4677	7	0	0
T129	4585	72	0	0
T131	16100	29	0	0
T133	12786	101	0	0
T140	7508	40	0	0
T154	6269	9	0	0
T165	17525	43	0	0
T166	15026	67	0	0
T167	181034	402	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	6445	0	0
T96	33656	442	0	0
T102	4677	9	0	0
T103	3474	8	0	0
T129	4585	48	0	0
T131	16100	253	0	0
T133	12786	132	0	0
T140	7508	10	0	0
T154	6269	2	0	0
T165	17525	35	0	0
T166	15026	52	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	6991	0	0
T96	33656	654	0	0
T102	4677	13	0	0
T103	3474	11	0	0
T129	4585	9	0	0
T131	16100	224	0	0
T133	12786	260	0	0
T140	7508	52	0	0
T154	6269	164	0	0
T165	17525	27	0	0
T166	15026	98	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3571	0	0
T96	33656	211	0	0
T102	4677	11	0	0
T103	3474	6	0	0
T122	10136	5	0	0
T129	4585	2	0	0
T131	16100	82	0	0
T133	12786	55	0	0
T140	7508	17	0	0
T154	6269	12	0	0
T165	17525	34	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3439	0	0
T96	33656	175	0	0
T102	4677	16	0	0
T103	3474	15	0	0
T122	10136	3	0	0
T129	4585	11	0	0
T131	16100	21	0	0
T133	12786	106	0	0
T140	7508	39	0	0
T154	6269	67	0	0
T165	17525	32	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3951	0	0
T96	33656	143	0	0
T102	4677	4	0	0
T103	3474	7	0	0
T131	16100	21	0	0
T133	12786	43	0	0
T140	7508	66	0	0
T154	6269	76	0	0
T165	17525	58	0	0
T166	15026	39	0	0
T167	181034	476	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3312	0	0
T96	33656	84	0	0
T102	4677	13	0	0
T103	3474	6	0	0
T129	4585	14	0	0
T131	16100	120	0	0
T133	12786	89	0	0
T140	7508	40	0	0
T154	6269	47	0	0
T165	17525	25	0	0
T166	15026	42	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3762	0	0
T96	33656	126	0	0
T102	4677	11	0	0
T103	3474	2	0	0
T129	4585	22	0	0
T131	16100	89	0	0
T133	12786	38	0	0
T140	7508	23	0	0
T154	6269	67	0	0
T165	17525	74	0	0
T166	15026	28	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3084	0	0
T96	33656	107	0	0
T102	4677	15	0	0
T103	3474	2	0	0
T129	4585	25	0	0
T131	16100	80	0	0
T133	12786	73	0	0
T140	7508	57	0	0
T154	6269	55	0	0
T165	17525	45	0	0
T166	15026	22	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3377	0	0
T96	33656	155	0	0
T102	4677	13	0	0
T103	3474	4	0	0
T129	4585	10	0	0
T131	16100	69	0	0
T133	12786	43	0	0
T140	7508	38	0	0
T154	6269	67	0	0
T165	17525	37	0	0
T166	15026	57	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3390	0	0
T96	33656	137	0	0
T102	4677	12	0	0
T103	3474	4	0	0
T129	4585	5	0	0
T131	16100	13	0	0
T133	12786	153	0	0
T140	7508	13	0	0
T154	6269	66	0	0
T165	17525	26	0	0
T166	15026	41	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3022	0	0
T96	33656	77	0	0
T102	4677	16	0	0
T103	3474	8	0	0
T129	4585	42	0	0
T131	16100	108	0	0
T133	12786	97	0	0
T140	7508	20	0	0
T154	6269	8	0	0
T165	17525	43	0	0
T166	15026	38	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3426	0	0
T96	33656	137	0	0
T102	4677	11	0	0
T103	3474	13	0	0
T129	4585	22	0	0
T131	16100	124	0	0
T133	12786	147	0	0
T140	7508	87	0	0
T154	6269	48	0	0
T165	17525	2	0	0
T166	15026	25	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3229	0	0
T96	33656	243	0	0
T102	4677	4	0	0
T103	3474	2	0	0
T131	16100	64	0	0
T133	12786	58	0	0
T140	7508	48	0	0
T154	6269	13	0	0
T165	17525	84	0	0
T166	15026	6	0	0
T167	181034	469	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3637	0	0
T96	33656	127	0	0
T102	4677	8	0	0
T103	3474	4	0	0
T129	4585	34	0	0
T131	16100	114	0	0
T133	12786	97	0	0
T140	7508	41	0	0
T154	6269	42	0	0
T165	17525	94	0	0
T166	15026	41	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3433	0	0
T96	33656	152	0	0
T102	4677	13	0	0
T103	3474	8	0	0
T122	10136	3	0	0
T129	4585	27	0	0
T131	16100	122	0	0
T133	12786	123	0	0
T140	7508	8	0	0
T154	6269	46	0	0
T165	17525	72	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3423	0	0
T96	33656	154	0	0
T102	4677	15	0	0
T103	3474	3	0	0
T129	4585	8	0	0
T131	16100	107	0	0
T133	12786	117	0	0
T140	7508	57	0	0
T154	6269	5	0	0
T165	17525	25	0	0
T166	15026	91	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3266	0	0
T96	33656	225	0	0
T102	4677	18	0	0
T103	3474	11	0	0
T129	4585	16	0	0
T131	16100	104	0	0
T133	12786	110	0	0
T140	7508	19	0	0
T154	6269	12	0	0
T165	17525	27	0	0
T166	15026	37	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3291	0	0
T96	33656	170	0	0
T102	4677	21	0	0
T103	3474	10	0	0
T129	4585	4	0	0
T131	16100	45	0	0
T133	12786	128	0	0
T140	7508	33	0	0
T154	6269	78	0	0
T165	17525	28	0	0
T166	15026	68	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3550	0	0
T96	33656	64	0	0
T102	4677	12	0	0
T103	3474	8	0	0
T129	4585	13	0	0
T131	16100	124	0	0
T133	12786	125	0	0
T154	6269	51	0	0
T165	17525	52	0	0
T166	15026	48	0	0
T167	181034	454	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3331	0	0
T96	33656	228	0	0
T102	4677	12	0	0
T103	3474	14	0	0
T129	4585	1	0	0
T131	16100	49	0	0
T133	12786	96	0	0
T140	7508	2	0	0
T154	6269	50	0	0
T165	17525	8	0	0
T166	15026	63	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3377	0	0
T96	33656	143	0	0
T102	4677	18	0	0
T103	3474	9	0	0
T129	4585	4	0	0
T131	16100	86	0	0
T133	12786	64	0	0
T140	7508	18	0	0
T154	6269	82	0	0
T165	17525	41	0	0
T166	15026	61	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3867	0	0
T96	33656	109	0	0
T102	4677	18	0	0
T103	3474	10	0	0
T129	4585	27	0	0
T131	16100	55	0	0
T133	12786	106	0	0
T140	7508	39	0	0
T154	6269	41	0	0
T165	17525	39	0	0
T166	15026	27	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	2793	0	0
T96	33656	169	0	0
T102	4677	10	0	0
T103	3474	6	0	0
T129	4585	2	0	0
T131	16100	74	0	0
T133	12786	6	0	0
T154	6269	108	0	0
T165	17525	52	0	0
T166	15026	55	0	0
T167	181034	409	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3174	0	0
T96	33656	230	0	0
T102	4677	20	0	0
T103	3474	14	0	0
T131	16100	174	0	0
T133	12786	69	0	0
T140	7508	6	0	0
T154	6269	58	0	0
T165	17525	46	0	0
T166	15026	48	0	0
T167	181034	452	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3291	0	0
T96	33656	119	0	0
T102	4677	14	0	0
T103	3474	11	0	0
T129	4585	3	0	0
T131	16100	22	0	0
T133	12786	129	0	0
T140	7508	29	0	0
T154	6269	11	0	0
T165	17525	28	0	0
T166	15026	32	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	3770	0	0
T96	33656	98	0	0
T102	4677	13	0	0
T103	3474	8	0	0
T129	4585	18	0	0
T131	16100	113	0	0
T133	12786	117	0	0
T140	7508	44	0	0
T154	6269	8	0	0
T165	17525	26	0	0
T166	15026	27	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1415	0	0
T96	33656	20	0	0
T102	4677	15	0	0
T103	3474	7	0	0
T129	4585	7	0	0
T131	16100	34	0	0
T133	12786	26	0	0
T140	7508	6	0	0
T154	6269	6	0	0
T165	17525	10	0	0
T166	15026	59	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1348	0	0
T96	33656	38	0	0
T102	4677	9	0	0
T103	3474	8	0	0
T129	4585	2	0	0
T131	16100	21	0	0
T133	12786	13	0	0
T154	6269	26	0	0
T165	17525	23	0	0
T166	15026	19	0	0
T167	181034	415	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1485	0	0
T96	33656	18	0	0
T102	4677	5	0	0
T103	3474	10	0	0
T129	4585	7	0	0
T131	16100	32	0	0
T133	12786	12	0	0
T140	7508	1	0	0
T154	6269	10	0	0
T165	17525	60	0	0
T166	15026	66	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1527	0	0
T96	33656	15	0	0
T102	4677	19	0	0
T129	4585	1	0	0
T131	16100	22	0	0
T133	12786	17	0	0
T154	6269	14	0	0
T165	17525	41	0	0
T166	15026	25	0	0
T167	181034	484	0	0
T168	37083	223	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1724	0	0
T96	33656	26	0	0
T102	4677	11	0	0
T103	3474	7	0	0
T129	4585	2	0	0
T131	16100	39	0	0
T133	12786	34	0	0
T140	7508	16	0	0
T154	6269	31	0	0
T165	17525	33	0	0
T166	15026	31	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	2991	0	0
T20	5698	40	0	0
T21	498649	0	0	0
T22	27005	0	0	0
T23	3465	0	0	0
T25	62036	0	0	0
T26	1976	0	0	0
T27	383439	0	0	0
T28	7725	0	0	0
T38	3727	0	0	0
T40	0	27	0	0
T97	0	30	0	0
T106	40337	0	0	0
T142	0	4	0	0
T169	0	21	0	0
T170	0	49	0	0
T171	0	18	0	0
T172	0	32	0	0
T173	0	19	0	0
T174	0	70	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1332	0	0
T96	33656	20	0	0
T102	4677	4	0	0
T103	3474	11	0	0
T129	4585	2	0	0
T131	16100	25	0	0
T133	12786	1	0	0
T140	7508	3	0	0
T154	6269	24	0	0
T165	17525	3	0	0
T166	15026	46	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1622	0	0
T96	33656	41	0	0
T102	4677	8	0	0
T103	3474	7	0	0
T129	4585	3	0	0
T131	16100	41	0	0
T133	12786	16	0	0
T140	7508	1	0	0
T154	6269	9	0	0
T165	17525	39	0	0
T166	15026	64	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1198	0	0
T96	33656	17	0	0
T102	4677	17	0	0
T103	3474	2	0	0
T129	4585	10	0	0
T131	16100	27	0	0
T133	12786	9	0	0
T140	7508	1	0	0
T154	6269	7	0	0
T165	17525	19	0	0
T166	15026	26	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1262	0	0
T96	33656	11	0	0
T102	4677	6	0	0
T103	3474	5	0	0
T129	4585	14	0	0
T131	16100	21	0	0
T133	12786	13	0	0
T140	7508	2	0	0
T154	6269	12	0	0
T165	17525	24	0	0
T166	15026	29	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1313	0	0
T96	33656	18	0	0
T102	4677	5	0	0
T103	3474	16	0	0
T129	4585	6	0	0
T131	16100	34	0	0
T133	12786	14	0	0
T154	6269	11	0	0
T165	17525	43	0	0
T166	15026	25	0	0
T167	181034	421	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1384	0	0
T96	33656	26	0	0
T102	4677	8	0	0
T103	3474	5	0	0
T129	4585	5	0	0
T131	16100	27	0	0
T133	12786	7	0	0
T140	7508	7	0	0
T165	17525	22	0	0
T166	15026	69	0	0
T167	181034	434	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1822	0	0
T96	33656	48	0	0
T102	4677	16	0	0
T103	3474	11	0	0
T129	4585	7	0	0
T131	16100	30	0	0
T133	12786	31	0	0
T140	7508	10	0	0
T154	6269	35	0	0
T165	17525	19	0	0
T166	15026	36	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1291	0	0
T96	33656	10	0	0
T102	4677	11	0	0
T103	3474	8	0	0
T129	4585	9	0	0
T131	16100	8	0	0
T133	12786	19	0	0
T140	7508	4	0	0
T154	6269	4	0	0
T165	17525	28	0	0
T166	15026	62	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1942	0	0
T96	33656	60	0	0
T102	4677	18	0	0
T103	3474	2	0	0
T129	4585	5	0	0
T131	16100	42	0	0
T133	12786	48	0	0
T140	7508	3	0	0
T154	6269	7	0	0
T165	17525	23	0	0
T166	15026	40	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1478	0	0
T96	33656	24	0	0
T102	4677	5	0	0
T103	3474	7	0	0
T122	10136	2	0	0
T129	4585	7	0	0
T131	16100	44	0	0
T133	12786	20	0	0
T154	6269	15	0	0
T165	17525	9	0	0
T166	15026	40	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1305	0	0
T96	33656	28	0	0
T102	4677	21	0	0
T129	4585	13	0	0
T131	16100	18	0	0
T133	12786	10	0	0
T154	6269	16	0	0
T165	17525	51	0	0
T166	15026	20	0	0
T167	181034	460	0	0
T168	37083	198	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1306	0	0
T96	33656	11	0	0
T102	4677	5	0	0
T103	3474	3	0	0
T129	4585	2	0	0
T131	16100	19	0	0
T133	12786	2	0	0
T140	7508	6	0	0
T154	6269	8	0	0
T165	17525	43	0	0
T166	15026	52	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1332	0	0
T96	33656	10	0	0
T102	4677	9	0	0
T103	3474	8	0	0
T129	4585	4	0	0
T131	16100	22	0	0
T133	12786	15	0	0
T140	7508	1	0	0
T154	6269	2	0	0
T165	17525	56	0	0
T166	15026	49	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1302	0	0
T96	33656	16	0	0
T102	4677	14	0	0
T103	3474	5	0	0
T129	4585	2	0	0
T131	16100	21	0	0
T133	12786	10	0	0
T140	7508	13	0	0
T154	6269	8	0	0
T165	17525	28	0	0
T166	15026	92	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1265	0	0
T96	33656	22	0	0
T102	4677	7	0	0
T103	3474	8	0	0
T131	16100	20	0	0
T133	12786	5	0	0
T154	6269	13	0	0
T165	17525	39	0	0
T166	15026	41	0	0
T167	181034	459	0	0
T168	37083	215	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	464757517	1342	0	0
T96	33656	21	0	0
T102	4677	10	0	0
T103	3474	7	0	0
T129	4585	1	0	0
T131	16100	34	0	0
T133	12786	11	0	0
T154	6269	4	0	0
T165	17525	17	0	0
T166	15026	27	0	0
T167	181034	445	0	0