| T359 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm_min_idle.1963465756 |
|
|
Sep 04 08:13:50 AM UTC 24 |
Sep 04 08:15:15 AM UTC 24 |
30037822159 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.4116965381 |
|
|
Sep 04 08:15:05 AM UTC 24 |
Sep 04 08:15:15 AM UTC 24 |
3260673313 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_and_tpm.2746535413 |
|
|
Sep 04 08:14:36 AM UTC 24 |
Sep 04 08:15:18 AM UTC 24 |
23856190134 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_cfg_cmd.1712803739 |
|
|
Sep 04 08:15:13 AM UTC 24 |
Sep 04 08:15:18 AM UTC 24 |
209511988 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_intercept.3939856753 |
|
|
Sep 04 08:15:09 AM UTC 24 |
Sep 04 08:15:19 AM UTC 24 |
1557082556 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm_min_idle.4163379569 |
|
|
Sep 04 08:14:06 AM UTC 24 |
Sep 04 08:15:20 AM UTC 24 |
3603133265 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_mailbox.594279151 |
|
|
Sep 04 08:14:51 AM UTC 24 |
Sep 04 08:15:21 AM UTC 24 |
4784196392 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.917018226 |
|
|
Sep 04 08:15:16 AM UTC 24 |
Sep 04 08:15:22 AM UTC 24 |
91747923 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_alert_test.3499248869 |
|
|
Sep 04 08:15:21 AM UTC 24 |
Sep 04 08:15:23 AM UTC 24 |
38426856 ps |
| T42 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/0.spi_device_flash_and_tpm.2341318770 |
|
|
Sep 04 08:03:55 AM UTC 24 |
Sep 04 08:15:24 AM UTC 24 |
132049988631 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_csb_read.2001748641 |
|
|
Sep 04 08:15:22 AM UTC 24 |
Sep 04 08:15:24 AM UTC 24 |
17755223 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_mailbox.1025762603 |
|
|
Sep 04 08:15:10 AM UTC 24 |
Sep 04 08:15:27 AM UTC 24 |
7182986165 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_upload.196829207 |
|
|
Sep 04 08:15:12 AM UTC 24 |
Sep 04 08:15:27 AM UTC 24 |
3025441814 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.3511060851 |
|
|
Sep 04 08:15:25 AM UTC 24 |
Sep 04 08:15:28 AM UTC 24 |
323071152 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_rw.4275607238 |
|
|
Sep 04 08:15:25 AM UTC 24 |
Sep 04 08:15:30 AM UTC 24 |
481152718 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode.1930903386 |
|
|
Sep 04 08:15:13 AM UTC 24 |
Sep 04 08:15:30 AM UTC 24 |
986414206 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_stress_all.2090709843 |
|
|
Sep 04 08:15:20 AM UTC 24 |
Sep 04 08:15:34 AM UTC 24 |
811169981 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.4068584537 |
|
|
Sep 04 08:15:28 AM UTC 24 |
Sep 04 08:15:34 AM UTC 24 |
225486353 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_upload.2038114365 |
|
|
Sep 04 08:15:31 AM UTC 24 |
Sep 04 08:15:37 AM UTC 24 |
1872310135 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.2801395288 |
|
|
Sep 04 08:14:05 AM UTC 24 |
Sep 04 08:15:38 AM UTC 24 |
24350932143 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/5.spi_device_flash_and_tpm.1613164319 |
|
|
Sep 04 08:06:59 AM UTC 24 |
Sep 04 08:15:39 AM UTC 24 |
185098258495 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.3723515193 |
|
|
Sep 04 08:15:28 AM UTC 24 |
Sep 04 08:15:40 AM UTC 24 |
667920291 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_cfg_cmd.2054861482 |
|
|
Sep 04 08:15:35 AM UTC 24 |
Sep 04 08:15:41 AM UTC 24 |
1618340937 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode.172187283 |
|
|
Sep 04 08:14:56 AM UTC 24 |
Sep 04 08:15:41 AM UTC 24 |
6053048131 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_mailbox.2593212054 |
|
|
Sep 04 08:13:42 AM UTC 24 |
Sep 04 08:15:42 AM UTC 24 |
26597853259 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_all.2156950662 |
|
|
Sep 04 08:15:24 AM UTC 24 |
Sep 04 08:15:43 AM UTC 24 |
7546892094 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.2172872514 |
|
|
Sep 04 08:15:23 AM UTC 24 |
Sep 04 08:15:44 AM UTC 24 |
2869614556 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_all.3542662703 |
|
|
Sep 04 08:14:35 AM UTC 24 |
Sep 04 08:15:44 AM UTC 24 |
25908985399 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_alert_test.3988961794 |
|
|
Sep 04 08:15:44 AM UTC 24 |
Sep 04 08:15:46 AM UTC 24 |
24073488 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_csb_read.4153419008 |
|
|
Sep 04 08:15:44 AM UTC 24 |
Sep 04 08:15:46 AM UTC 24 |
19660729 ps |
| T264 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_stress_all.2894548740 |
|
|
Sep 04 08:13:11 AM UTC 24 |
Sep 04 08:15:48 AM UTC 24 |
17892128965 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.1874186375 |
|
|
Sep 04 08:15:47 AM UTC 24 |
Sep 04 08:15:50 AM UTC 24 |
43783972 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_all.244995076 |
|
|
Sep 04 08:15:06 AM UTC 24 |
Sep 04 08:15:50 AM UTC 24 |
9912020643 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_rw.1245457285 |
|
|
Sep 04 08:15:47 AM UTC 24 |
Sep 04 08:15:50 AM UTC 24 |
366695584 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_mailbox.15318128 |
|
|
Sep 04 08:15:31 AM UTC 24 |
Sep 04 08:15:52 AM UTC 24 |
2597157342 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.346174170 |
|
|
Sep 04 08:15:39 AM UTC 24 |
Sep 04 08:15:54 AM UTC 24 |
3554280605 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_all.567631539 |
|
|
Sep 04 08:15:45 AM UTC 24 |
Sep 04 08:15:55 AM UTC 24 |
3668986998 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.1619067382 |
|
|
Sep 04 08:15:45 AM UTC 24 |
Sep 04 08:15:56 AM UTC 24 |
42793434045 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_stress_all.2513326041 |
|
|
Sep 04 08:10:37 AM UTC 24 |
Sep 04 08:17:20 AM UTC 24 |
42679835876 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.3792025160 |
|
|
Sep 04 08:13:45 AM UTC 24 |
Sep 04 08:15:56 AM UTC 24 |
59152828361 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_intercept.1201377374 |
|
|
Sep 04 08:15:52 AM UTC 24 |
Sep 04 08:15:57 AM UTC 24 |
138416125 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode_ignore_cmds.719990701 |
|
|
Sep 04 08:15:14 AM UTC 24 |
Sep 04 08:16:01 AM UTC 24 |
25020261131 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_intercept.2062465266 |
|
|
Sep 04 08:15:29 AM UTC 24 |
Sep 04 08:16:05 AM UTC 24 |
5193949982 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_upload.2911873605 |
|
|
Sep 04 08:15:53 AM UTC 24 |
Sep 04 08:16:06 AM UTC 24 |
2706931164 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.3545689728 |
|
|
Sep 04 08:15:51 AM UTC 24 |
Sep 04 08:16:07 AM UTC 24 |
607443100 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode.2843059163 |
|
|
Sep 04 08:15:56 AM UTC 24 |
Sep 04 08:16:10 AM UTC 24 |
1354639481 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_alert_test.621755763 |
|
|
Sep 04 08:16:08 AM UTC 24 |
Sep 04 08:16:10 AM UTC 24 |
13920666 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_cfg_cmd.2819172446 |
|
|
Sep 04 08:15:55 AM UTC 24 |
Sep 04 08:16:11 AM UTC 24 |
1520659962 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_and_tpm_min_idle.4149158557 |
|
|
Sep 04 08:15:19 AM UTC 24 |
Sep 04 08:16:12 AM UTC 24 |
3319655921 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_mailbox.3766829262 |
|
|
Sep 04 08:15:52 AM UTC 24 |
Sep 04 08:16:13 AM UTC 24 |
1321197497 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_csb_read.2578383756 |
|
|
Sep 04 08:16:11 AM UTC 24 |
Sep 04 08:16:13 AM UTC 24 |
38358057 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.3806909504 |
|
|
Sep 04 08:15:57 AM UTC 24 |
Sep 04 08:16:14 AM UTC 24 |
1449903615 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.3920225603 |
|
|
Sep 04 08:16:13 AM UTC 24 |
Sep 04 08:16:15 AM UTC 24 |
258936553 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_all.4088927566 |
|
|
Sep 04 08:12:28 AM UTC 24 |
Sep 04 08:16:16 AM UTC 24 |
27744654081 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_rw.3662953932 |
|
|
Sep 04 08:16:13 AM UTC 24 |
Sep 04 08:16:16 AM UTC 24 |
58762124 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.989255764 |
|
|
Sep 04 08:16:11 AM UTC 24 |
Sep 04 08:16:17 AM UTC 24 |
1339893085 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_all.1315388088 |
|
|
Sep 04 08:14:20 AM UTC 24 |
Sep 04 08:16:20 AM UTC 24 |
23476480848 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_intercept.55382501 |
|
|
Sep 04 08:16:17 AM UTC 24 |
Sep 04 08:16:20 AM UTC 24 |
30591673 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_upload.2585869651 |
|
|
Sep 04 08:16:17 AM UTC 24 |
Sep 04 08:16:21 AM UTC 24 |
287305064 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_cfg_cmd.995150094 |
|
|
Sep 04 08:16:18 AM UTC 24 |
Sep 04 08:16:21 AM UTC 24 |
33659995 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm.2503647780 |
|
|
Sep 04 08:14:21 AM UTC 24 |
Sep 04 08:16:22 AM UTC 24 |
7645725624 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_all.1881513553 |
|
|
Sep 04 08:16:12 AM UTC 24 |
Sep 04 08:16:32 AM UTC 24 |
3353498670 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.3016772742 |
|
|
Sep 04 08:16:14 AM UTC 24 |
Sep 04 08:16:34 AM UTC 24 |
8679942301 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.4186139642 |
|
|
Sep 04 08:16:22 AM UTC 24 |
Sep 04 08:16:35 AM UTC 24 |
905591987 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode.2507971195 |
|
|
Sep 04 08:16:21 AM UTC 24 |
Sep 04 08:16:36 AM UTC 24 |
230528720 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_alert_test.366863598 |
|
|
Sep 04 08:16:36 AM UTC 24 |
Sep 04 08:16:38 AM UTC 24 |
20104460 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_all.3193067000 |
|
|
Sep 04 08:14:58 AM UTC 24 |
Sep 04 08:16:38 AM UTC 24 |
34371369415 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_stress_all.762898834 |
|
|
Sep 04 08:16:36 AM UTC 24 |
Sep 04 08:16:38 AM UTC 24 |
293297634 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.3970941797 |
|
|
Sep 04 08:15:48 AM UTC 24 |
Sep 04 08:16:39 AM UTC 24 |
38407501020 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_csb_read.607482957 |
|
|
Sep 04 08:16:37 AM UTC 24 |
Sep 04 08:16:39 AM UTC 24 |
15948666 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_stress_all.431294201 |
|
|
Sep 04 08:13:51 AM UTC 24 |
Sep 04 08:16:40 AM UTC 24 |
23382862174 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.3685283543 |
|
|
Sep 04 08:16:39 AM UTC 24 |
Sep 04 08:16:41 AM UTC 24 |
135083331 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_rw.524793221 |
|
|
Sep 04 08:16:40 AM UTC 24 |
Sep 04 08:16:43 AM UTC 24 |
35935858 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_all.4186234038 |
|
|
Sep 04 08:16:39 AM UTC 24 |
Sep 04 08:16:45 AM UTC 24 |
400754756 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_intercept.2955671093 |
|
|
Sep 04 08:16:42 AM UTC 24 |
Sep 04 08:16:46 AM UTC 24 |
108179732 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.2337336011 |
|
|
Sep 04 08:16:40 AM UTC 24 |
Sep 04 08:16:48 AM UTC 24 |
3539729361 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.3936032002 |
|
|
Sep 04 08:16:14 AM UTC 24 |
Sep 04 08:16:49 AM UTC 24 |
107712953641 ps |
| T238 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.3755734406 |
|
|
Sep 04 08:11:41 AM UTC 24 |
Sep 04 08:16:52 AM UTC 24 |
103221468626 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_all.311464022 |
|
|
Sep 04 08:15:16 AM UTC 24 |
Sep 04 08:16:53 AM UTC 24 |
25783731687 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_and_tpm_min_idle.1308831395 |
|
|
Sep 04 08:15:01 AM UTC 24 |
Sep 04 08:16:53 AM UTC 24 |
8899900881 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.2870652748 |
|
|
Sep 04 08:16:40 AM UTC 24 |
Sep 04 08:16:54 AM UTC 24 |
1739243183 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_upload.1624707217 |
|
|
Sep 04 08:16:46 AM UTC 24 |
Sep 04 08:16:55 AM UTC 24 |
423662420 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_mailbox.2844594800 |
|
|
Sep 04 08:16:44 AM UTC 24 |
Sep 04 08:16:56 AM UTC 24 |
1154510512 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_all.2504093258 |
|
|
Sep 04 08:16:54 AM UTC 24 |
Sep 04 08:16:56 AM UTC 24 |
40889531 ps |
| T288 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_stress_all.147304019 |
|
|
Sep 04 08:09:17 AM UTC 24 |
Sep 04 08:16:57 AM UTC 24 |
55189805494 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode.278520109 |
|
|
Sep 04 08:15:35 AM UTC 24 |
Sep 04 08:16:57 AM UTC 24 |
15191633248 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_stress_all.2978953764 |
|
|
Sep 04 08:16:55 AM UTC 24 |
Sep 04 08:16:58 AM UTC 24 |
62870110 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_alert_test.3156265330 |
|
|
Sep 04 08:16:56 AM UTC 24 |
Sep 04 08:16:59 AM UTC 24 |
33598860 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_and_tpm.3939783132 |
|
|
Sep 04 08:15:40 AM UTC 24 |
Sep 04 08:16:59 AM UTC 24 |
16463864259 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_csb_read.344129242 |
|
|
Sep 04 08:16:58 AM UTC 24 |
Sep 04 08:17:00 AM UTC 24 |
64629589 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.3153974404 |
|
|
Sep 04 08:16:58 AM UTC 24 |
Sep 04 08:17:00 AM UTC 24 |
14494847 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.616826543 |
|
|
Sep 04 08:16:53 AM UTC 24 |
Sep 04 08:17:00 AM UTC 24 |
359141067 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode.534525672 |
|
|
Sep 04 08:16:49 AM UTC 24 |
Sep 04 08:17:01 AM UTC 24 |
11476908064 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.3994583238 |
|
|
Sep 04 08:16:59 AM UTC 24 |
Sep 04 08:17:01 AM UTC 24 |
122182435 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_and_tpm_min_idle.1921785588 |
|
|
Sep 04 08:14:42 AM UTC 24 |
Sep 04 08:17:02 AM UTC 24 |
63299869785 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_and_tpm_min_idle.1560519670 |
|
|
Sep 04 08:16:32 AM UTC 24 |
Sep 04 08:17:03 AM UTC 24 |
5356623377 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.4251475544 |
|
|
Sep 04 08:16:39 AM UTC 24 |
Sep 04 08:17:04 AM UTC 24 |
6085183830 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_rw.1256959135 |
|
|
Sep 04 08:17:00 AM UTC 24 |
Sep 04 08:17:07 AM UTC 24 |
665148823 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_cfg_cmd.3689589096 |
|
|
Sep 04 08:17:02 AM UTC 24 |
Sep 04 08:17:07 AM UTC 24 |
114662056 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.2006448234 |
|
|
Sep 04 08:17:00 AM UTC 24 |
Sep 04 08:17:08 AM UTC 24 |
1647111131 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_cfg_cmd.3284954842 |
|
|
Sep 04 08:16:47 AM UTC 24 |
Sep 04 08:17:08 AM UTC 24 |
24734521352 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_mailbox.1633690799 |
|
|
Sep 04 08:17:02 AM UTC 24 |
Sep 04 08:17:09 AM UTC 24 |
327314653 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_all.1905754350 |
|
|
Sep 04 08:16:58 AM UTC 24 |
Sep 04 08:17:09 AM UTC 24 |
1070935161 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode_ignore_cmds.1950424134 |
|
|
Sep 04 08:15:38 AM UTC 24 |
Sep 04 08:17:10 AM UTC 24 |
6458992053 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_intercept.3804000359 |
|
|
Sep 04 08:17:00 AM UTC 24 |
Sep 04 08:17:10 AM UTC 24 |
2197906888 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_all.3917644689 |
|
|
Sep 04 08:17:08 AM UTC 24 |
Sep 04 08:17:11 AM UTC 24 |
18163047 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_and_tpm_min_idle.4079611538 |
|
|
Sep 04 08:16:55 AM UTC 24 |
Sep 04 08:17:11 AM UTC 24 |
1824460802 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_alert_test.1219520226 |
|
|
Sep 04 08:17:10 AM UTC 24 |
Sep 04 08:17:12 AM UTC 24 |
13778156 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode.3941443611 |
|
|
Sep 04 08:17:03 AM UTC 24 |
Sep 04 08:17:12 AM UTC 24 |
1513710845 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_csb_read.202360911 |
|
|
Sep 04 08:17:11 AM UTC 24 |
Sep 04 08:17:13 AM UTC 24 |
54998015 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_and_tpm.124456390 |
|
|
Sep 04 08:16:54 AM UTC 24 |
Sep 04 08:17:13 AM UTC 24 |
1285286092 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.3257632961 |
|
|
Sep 04 08:17:12 AM UTC 24 |
Sep 04 08:17:14 AM UTC 24 |
67290271 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_rw.4124698493 |
|
|
Sep 04 08:17:12 AM UTC 24 |
Sep 04 08:17:14 AM UTC 24 |
62138456 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_all.5255541 |
|
|
Sep 04 08:17:12 AM UTC 24 |
Sep 04 08:17:17 AM UTC 24 |
242341544 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.775345802 |
|
|
Sep 04 08:17:05 AM UTC 24 |
Sep 04 08:17:19 AM UTC 24 |
1161596194 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_intercept.1599670771 |
|
|
Sep 04 08:17:13 AM UTC 24 |
Sep 04 08:17:20 AM UTC 24 |
1481855484 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_mode_ignore_cmds.1467292589 |
|
|
Sep 04 08:17:20 AM UTC 24 |
Sep 04 08:17:22 AM UTC 24 |
54149805 ps |
| T243 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_upload.2062223214 |
|
|
Sep 04 08:17:02 AM UTC 24 |
Sep 04 08:17:24 AM UTC 24 |
38097684426 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_cfg_cmd.1471312393 |
|
|
Sep 04 08:17:16 AM UTC 24 |
Sep 04 08:17:24 AM UTC 24 |
2489193146 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.1914734734 |
|
|
Sep 04 08:17:13 AM UTC 24 |
Sep 04 08:17:24 AM UTC 24 |
847053225 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_alert_test.2749442586 |
|
|
Sep 04 08:17:24 AM UTC 24 |
Sep 04 08:17:26 AM UTC 24 |
24928937 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_mailbox.2686020007 |
|
|
Sep 04 08:17:14 AM UTC 24 |
Sep 04 08:17:27 AM UTC 24 |
1894318155 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.1911658539 |
|
|
Sep 04 08:17:00 AM UTC 24 |
Sep 04 08:17:27 AM UTC 24 |
10339867637 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.1776017079 |
|
|
Sep 04 08:17:21 AM UTC 24 |
Sep 04 08:17:27 AM UTC 24 |
88560676 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_all.1225887463 |
|
|
Sep 04 08:13:46 AM UTC 24 |
Sep 04 08:17:27 AM UTC 24 |
136505184221 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm.2742991491 |
|
|
Sep 04 08:16:01 AM UTC 24 |
Sep 04 08:17:29 AM UTC 24 |
17046185889 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.2278321886 |
|
|
Sep 04 08:17:13 AM UTC 24 |
Sep 04 08:17:29 AM UTC 24 |
9757220066 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.224035241 |
|
|
Sep 04 08:17:28 AM UTC 24 |
Sep 04 08:17:30 AM UTC 24 |
16664936 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_csb_read.4181585464 |
|
|
Sep 04 08:17:28 AM UTC 24 |
Sep 04 08:17:30 AM UTC 24 |
84333964 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_all.3259211004 |
|
|
Sep 04 08:17:28 AM UTC 24 |
Sep 04 08:17:30 AM UTC 24 |
62326477 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_upload.3168790177 |
|
|
Sep 04 08:17:16 AM UTC 24 |
Sep 04 08:17:30 AM UTC 24 |
3439147612 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_mode.3931072614 |
|
|
Sep 04 08:17:18 AM UTC 24 |
Sep 04 08:17:30 AM UTC 24 |
3901555255 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_stress_all.4144043543 |
|
|
Sep 04 08:14:43 AM UTC 24 |
Sep 04 08:17:31 AM UTC 24 |
28593188199 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_rw.3755952120 |
|
|
Sep 04 08:17:29 AM UTC 24 |
Sep 04 08:17:33 AM UTC 24 |
231301658 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_all.78494568 |
|
|
Sep 04 08:18:25 AM UTC 24 |
Sep 04 08:18:55 AM UTC 24 |
5292196936 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.1706375154 |
|
|
Sep 04 08:17:12 AM UTC 24 |
Sep 04 08:17:33 AM UTC 24 |
11399990468 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.2888030109 |
|
|
Sep 04 08:17:30 AM UTC 24 |
Sep 04 08:17:34 AM UTC 24 |
748458271 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.1978558742 |
|
|
Sep 04 08:17:30 AM UTC 24 |
Sep 04 08:17:34 AM UTC 24 |
141925444 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_cfg_cmd.3122289526 |
|
|
Sep 04 08:17:32 AM UTC 24 |
Sep 04 08:17:37 AM UTC 24 |
261196917 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.1298523236 |
|
|
Sep 04 08:17:28 AM UTC 24 |
Sep 04 08:17:38 AM UTC 24 |
1404187919 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_alert_test.1388324231 |
|
|
Sep 04 08:17:38 AM UTC 24 |
Sep 04 08:17:40 AM UTC 24 |
36616685 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_csb_read.200040244 |
|
|
Sep 04 08:17:41 AM UTC 24 |
Sep 04 08:17:44 AM UTC 24 |
60250167 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode.1163252936 |
|
|
Sep 04 08:17:32 AM UTC 24 |
Sep 04 08:17:45 AM UTC 24 |
1713377410 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm_min_idle.3590732831 |
|
|
Sep 04 08:16:06 AM UTC 24 |
Sep 04 08:17:46 AM UTC 24 |
19615542588 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.2360256439 |
|
|
Sep 04 08:17:47 AM UTC 24 |
Sep 04 08:17:49 AM UTC 24 |
192980490 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_upload.925845551 |
|
|
Sep 04 08:17:32 AM UTC 24 |
Sep 04 08:17:52 AM UTC 24 |
3637069956 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_rw.2639249097 |
|
|
Sep 04 08:17:50 AM UTC 24 |
Sep 04 08:17:53 AM UTC 24 |
101125440 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.318836364 |
|
|
Sep 04 08:17:34 AM UTC 24 |
Sep 04 08:17:53 AM UTC 24 |
4726731464 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_all.95790448 |
|
|
Sep 04 08:17:34 AM UTC 24 |
Sep 04 08:17:58 AM UTC 24 |
599723471 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_intercept.3339488387 |
|
|
Sep 04 08:17:54 AM UTC 24 |
Sep 04 08:17:59 AM UTC 24 |
89081721 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode_ignore_cmds.1679535582 |
|
|
Sep 04 08:14:58 AM UTC 24 |
Sep 04 08:18:00 AM UTC 24 |
91444329771 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_all.4196382610 |
|
|
Sep 04 08:15:40 AM UTC 24 |
Sep 04 08:18:01 AM UTC 24 |
52661331919 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.620697419 |
|
|
Sep 04 08:17:54 AM UTC 24 |
Sep 04 08:18:02 AM UTC 24 |
454423460 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.4251928465 |
|
|
Sep 04 08:17:53 AM UTC 24 |
Sep 04 08:18:04 AM UTC 24 |
4990989789 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode_ignore_cmds.429645583 |
|
|
Sep 04 08:17:04 AM UTC 24 |
Sep 04 08:18:04 AM UTC 24 |
20717924995 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_all.3933933135 |
|
|
Sep 04 08:17:46 AM UTC 24 |
Sep 04 08:18:05 AM UTC 24 |
15497618311 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_mailbox.496564199 |
|
|
Sep 04 08:17:59 AM UTC 24 |
Sep 04 08:18:07 AM UTC 24 |
258504545 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.3784050810 |
|
|
Sep 04 08:17:44 AM UTC 24 |
Sep 04 08:18:07 AM UTC 24 |
4838318685 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_alert_test.1975256950 |
|
|
Sep 04 08:18:08 AM UTC 24 |
Sep 04 08:18:10 AM UTC 24 |
23284134 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_intercept.2086678566 |
|
|
Sep 04 08:17:30 AM UTC 24 |
Sep 04 08:18:11 AM UTC 24 |
14879386116 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_upload.314795887 |
|
|
Sep 04 08:18:00 AM UTC 24 |
Sep 04 08:18:11 AM UTC 24 |
2204550659 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.3229914010 |
|
|
Sep 04 08:18:05 AM UTC 24 |
Sep 04 08:18:12 AM UTC 24 |
290061045 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_csb_read.4056527954 |
|
|
Sep 04 08:18:11 AM UTC 24 |
Sep 04 08:18:13 AM UTC 24 |
52152772 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.1909170232 |
|
|
Sep 04 08:18:13 AM UTC 24 |
Sep 04 08:18:15 AM UTC 24 |
33739017 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.1907144009 |
|
|
Sep 04 08:18:13 AM UTC 24 |
Sep 04 08:18:15 AM UTC 24 |
88935718 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode.285272189 |
|
|
Sep 04 08:18:02 AM UTC 24 |
Sep 04 08:18:17 AM UTC 24 |
3570544439 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_and_tpm_min_idle.2370258605 |
|
|
Sep 04 08:15:42 AM UTC 24 |
Sep 04 08:18:17 AM UTC 24 |
14364307562 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_cfg_cmd.3121633329 |
|
|
Sep 04 08:18:01 AM UTC 24 |
Sep 04 08:18:17 AM UTC 24 |
2266612026 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_all.1931345985 |
|
|
Sep 04 08:17:21 AM UTC 24 |
Sep 04 08:18:19 AM UTC 24 |
3424175296 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_rw.4073881814 |
|
|
Sep 04 08:18:14 AM UTC 24 |
Sep 04 08:18:21 AM UTC 24 |
444796495 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.1111515505 |
|
|
Sep 04 08:18:16 AM UTC 24 |
Sep 04 08:18:21 AM UTC 24 |
126566853 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.94469505 |
|
|
Sep 04 08:18:16 AM UTC 24 |
Sep 04 08:18:24 AM UTC 24 |
780422982 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_intercept.3449065189 |
|
|
Sep 04 08:18:18 AM UTC 24 |
Sep 04 08:18:24 AM UTC 24 |
826842269 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode_ignore_cmds.2448327850 |
|
|
Sep 04 08:16:50 AM UTC 24 |
Sep 04 08:18:26 AM UTC 24 |
19410946214 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_upload.1942673454 |
|
|
Sep 04 08:18:18 AM UTC 24 |
Sep 04 08:18:26 AM UTC 24 |
1422327727 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_mode.2345590447 |
|
|
Sep 04 08:18:22 AM UTC 24 |
Sep 04 08:18:28 AM UTC 24 |
763612831 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_all.715656325 |
|
|
Sep 04 08:16:22 AM UTC 24 |
Sep 04 08:18:30 AM UTC 24 |
28794056664 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.2055582632 |
|
|
Sep 04 08:18:25 AM UTC 24 |
Sep 04 08:18:32 AM UTC 24 |
887587171 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_alert_test.373730816 |
|
|
Sep 04 08:18:31 AM UTC 24 |
Sep 04 08:18:34 AM UTC 24 |
37658407 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.760386788 |
|
|
Sep 04 08:10:52 AM UTC 24 |
Sep 04 08:18:34 AM UTC 24 |
141446546989 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_mailbox.67967983 |
|
|
Sep 04 08:16:17 AM UTC 24 |
Sep 04 08:18:35 AM UTC 24 |
23753902865 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_csb_read.402748141 |
|
|
Sep 04 08:18:33 AM UTC 24 |
Sep 04 08:18:36 AM UTC 24 |
65148565 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_all.4082793781 |
|
|
Sep 04 08:18:13 AM UTC 24 |
Sep 04 08:18:36 AM UTC 24 |
10368321665 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.224373285 |
|
|
Sep 04 08:18:34 AM UTC 24 |
Sep 04 08:18:38 AM UTC 24 |
310115792 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_cfg_cmd.4157742346 |
|
|
Sep 04 08:18:19 AM UTC 24 |
Sep 04 08:18:38 AM UTC 24 |
5130765967 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.361144785 |
|
|
Sep 04 08:18:36 AM UTC 24 |
Sep 04 08:18:39 AM UTC 24 |
32637106 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_rw.1953685874 |
|
|
Sep 04 08:18:37 AM UTC 24 |
Sep 04 08:18:39 AM UTC 24 |
35840690 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm_min_idle.2775128603 |
|
|
Sep 04 08:14:21 AM UTC 24 |
Sep 04 08:18:42 AM UTC 24 |
45726133201 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_mailbox.3858646622 |
|
|
Sep 04 08:18:18 AM UTC 24 |
Sep 04 08:18:47 AM UTC 24 |
5531019563 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.277229586 |
|
|
Sep 04 08:18:37 AM UTC 24 |
Sep 04 08:18:47 AM UTC 24 |
561333448 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.2078708690 |
|
|
Sep 04 08:18:39 AM UTC 24 |
Sep 04 08:18:48 AM UTC 24 |
947862823 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_mode_ignore_cmds.89795038 |
|
|
Sep 04 08:14:31 AM UTC 24 |
Sep 04 08:18:48 AM UTC 24 |
31262841517 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_cfg_cmd.382644712 |
|
|
Sep 04 08:18:43 AM UTC 24 |
Sep 04 08:18:57 AM UTC 24 |
3507318407 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_upload.3923692852 |
|
|
Sep 04 08:18:40 AM UTC 24 |
Sep 04 08:18:57 AM UTC 24 |
5228412203 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_mailbox.3965250632 |
|
|
Sep 04 08:18:40 AM UTC 24 |
Sep 04 08:18:57 AM UTC 24 |
450654437 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm.4259427359 |
|
|
Sep 04 08:13:49 AM UTC 24 |
Sep 04 08:18:58 AM UTC 24 |
94704316038 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.4134140159 |
|
|
Sep 04 08:18:49 AM UTC 24 |
Sep 04 08:19:00 AM UTC 24 |
927818274 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_and_tpm_min_idle.1448587645 |
|
|
Sep 04 08:13:30 AM UTC 24 |
Sep 04 08:19:00 AM UTC 24 |
77166215907 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_alert_test.3357037708 |
|
|
Sep 04 08:18:58 AM UTC 24 |
Sep 04 08:19:00 AM UTC 24 |
46219504 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_csb_read.559273289 |
|
|
Sep 04 08:18:59 AM UTC 24 |
Sep 04 08:19:01 AM UTC 24 |
73918165 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_all.1065358318 |
|
|
Sep 04 08:10:33 AM UTC 24 |
Sep 04 08:19:03 AM UTC 24 |
57058231329 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.2336354275 |
|
|
Sep 04 08:19:01 AM UTC 24 |
Sep 04 08:19:04 AM UTC 24 |
27958368 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_intercept.3934081190 |
|
|
Sep 04 08:18:39 AM UTC 24 |
Sep 04 08:19:05 AM UTC 24 |
6732308290 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_rw.3943299631 |
|
|
Sep 04 08:19:03 AM UTC 24 |
Sep 04 08:19:05 AM UTC 24 |
110231592 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/2.spi_device_stress_all.3524263912 |
|
|
Sep 04 08:05:11 AM UTC 24 |
Sep 04 08:19:06 AM UTC 24 |
463913766023 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_addr_payload_swap.3654274380 |
|
|
Sep 04 08:19:05 AM UTC 24 |
Sep 04 08:19:09 AM UTC 24 |
442034590 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_all.166418800 |
|
|
Sep 04 08:18:35 AM UTC 24 |
Sep 04 08:19:11 AM UTC 24 |
11753224023 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_read_hw_reg.3394728303 |
|
|
Sep 04 08:19:00 AM UTC 24 |
Sep 04 08:19:17 AM UTC 24 |
4558048375 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_cmd_filtering.3171731184 |
|
|
Sep 04 08:19:04 AM UTC 24 |
Sep 04 08:19:17 AM UTC 24 |
4889814445 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_and_tpm_min_idle.322808461 |
|
|
Sep 04 08:18:27 AM UTC 24 |
Sep 04 08:19:17 AM UTC 24 |
6728242086 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_mailbox.1408749864 |
|
|
Sep 04 08:17:30 AM UTC 24 |
Sep 04 08:19:17 AM UTC 24 |
10762097598 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_all.281192854 |
|
|
Sep 04 08:18:50 AM UTC 24 |
Sep 04 08:19:20 AM UTC 24 |
1089880875 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_all.3291211093 |
|
|
Sep 04 08:19:01 AM UTC 24 |
Sep 04 08:19:21 AM UTC 24 |
2079998464 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_cfg_cmd.1550199046 |
|
|
Sep 04 08:19:10 AM UTC 24 |
Sep 04 08:19:21 AM UTC 24 |
3714257446 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.422648355 |
|
|
Sep 04 08:19:18 AM UTC 24 |
Sep 04 08:19:24 AM UTC 24 |
135149271 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_alert_test.1243625910 |
|
|
Sep 04 08:19:22 AM UTC 24 |
Sep 04 08:19:24 AM UTC 24 |
25749096 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_csb_read.1225932852 |
|
|
Sep 04 08:19:22 AM UTC 24 |
Sep 04 08:19:24 AM UTC 24 |
15882279 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_mode_ignore_cmds.2676032494 |
|
|
Sep 04 08:18:22 AM UTC 24 |
Sep 04 08:19:24 AM UTC 24 |
5083525636 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_read_hw_reg.3925606010 |
|
|
Sep 04 08:19:25 AM UTC 24 |
Sep 04 08:19:28 AM UTC 24 |
11721822 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_sts_read.147900886 |
|
|
Sep 04 08:19:25 AM UTC 24 |
Sep 04 08:19:28 AM UTC 24 |
66872198 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_mode.1453319409 |
|
|
Sep 04 08:19:12 AM UTC 24 |
Sep 04 08:19:29 AM UTC 24 |
1657684457 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_stress_all.2489264479 |
|
|
Sep 04 08:15:43 AM UTC 24 |
Sep 04 08:19:30 AM UTC 24 |
113194428046 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_rw.3497726040 |
|
|
Sep 04 08:19:25 AM UTC 24 |
Sep 04 08:19:32 AM UTC 24 |
452252685 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_addr_payload_swap.4053672686 |
|
|
Sep 04 08:19:29 AM UTC 24 |
Sep 04 08:19:33 AM UTC 24 |
177635155 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_intercept.2981853086 |
|
|
Sep 04 08:19:30 AM UTC 24 |
Sep 04 08:19:34 AM UTC 24 |
36248201 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_upload.2841946970 |
|
|
Sep 04 08:19:07 AM UTC 24 |
Sep 04 08:19:34 AM UTC 24 |
14158452146 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_all.2983075858 |
|
|
Sep 04 08:18:05 AM UTC 24 |
Sep 04 08:19:37 AM UTC 24 |
10363781169 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_and_tpm_min_idle.307557685 |
|
|
Sep 04 08:17:08 AM UTC 24 |
Sep 04 08:19:38 AM UTC 24 |
58420921194 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_cfg_cmd.1575706382 |
|
|
Sep 04 08:19:34 AM UTC 24 |
Sep 04 08:19:39 AM UTC 24 |
57960066 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_intercept.4081875208 |
|
|
Sep 04 08:19:06 AM UTC 24 |
Sep 04 08:19:41 AM UTC 24 |
50006125955 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_and_tpm.646352131 |
|
|
Sep 04 08:17:35 AM UTC 24 |
Sep 04 08:19:42 AM UTC 24 |
46142968830 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_upload.891406760 |
|
|
Sep 04 08:19:32 AM UTC 24 |
Sep 04 08:19:43 AM UTC 24 |
4604539938 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_cmd_filtering.1842748980 |
|
|
Sep 04 08:19:29 AM UTC 24 |
Sep 04 08:19:45 AM UTC 24 |
2033365937 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_alert_test.1338510261 |
|
|
Sep 04 08:19:44 AM UTC 24 |
Sep 04 08:19:46 AM UTC 24 |
10984179 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_csb_read.661201571 |
|
|
Sep 04 08:19:46 AM UTC 24 |
Sep 04 08:19:48 AM UTC 24 |
16323169 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_read_hw_reg.1268723146 |
|
|
Sep 04 08:19:47 AM UTC 24 |
Sep 04 08:19:50 AM UTC 24 |
125367078 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_sts_read.481693149 |
|
|
Sep 04 08:19:51 AM UTC 24 |
Sep 04 08:19:54 AM UTC 24 |
80849931 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_mailbox.1955326669 |
|
|
Sep 04 08:19:06 AM UTC 24 |
Sep 04 08:19:57 AM UTC 24 |
19474130472 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_and_tpm_min_idle.3906815171 |
|
|
Sep 04 08:18:58 AM UTC 24 |
Sep 04 08:19:57 AM UTC 24 |
29308039007 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_rw.4275524024 |
|
|
Sep 04 08:19:55 AM UTC 24 |
Sep 04 08:19:58 AM UTC 24 |
207366358 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_read_buffer_direct.796709811 |
|
|
Sep 04 08:19:38 AM UTC 24 |
Sep 04 08:19:59 AM UTC 24 |
2159764363 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_and_tpm.1938491763 |
|
|
Sep 04 08:19:18 AM UTC 24 |
Sep 04 08:20:00 AM UTC 24 |
6092002422 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode_ignore_cmds.57938753 |
|
|
Sep 04 08:16:21 AM UTC 24 |
Sep 04 08:20:01 AM UTC 24 |
54871265173 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_pass_addr_payload_swap.1042330391 |
|
|
Sep 04 08:19:58 AM UTC 24 |
Sep 04 08:20:02 AM UTC 24 |
119140581 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_pass_cmd_filtering.2062595011 |
|
|
Sep 04 08:19:58 AM UTC 24 |
Sep 04 08:20:03 AM UTC 24 |
54378385 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_mailbox.2548105189 |
|
|
Sep 04 08:19:31 AM UTC 24 |
Sep 04 08:20:04 AM UTC 24 |
4732591317 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_mailbox.2211322383 |
|
|
Sep 04 08:20:00 AM UTC 24 |
Sep 04 08:20:05 AM UTC 24 |
249111541 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_cfg_cmd.948942721 |
|
|
Sep 04 08:20:02 AM UTC 24 |
Sep 04 08:20:06 AM UTC 24 |
253599141 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_mode.22372056 |
|
|
Sep 04 08:18:47 AM UTC 24 |
Sep 04 08:20:06 AM UTC 24 |
4140529753 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_09_03/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode_ignore_cmds.4254778159 |
|
|
Sep 04 08:17:32 AM UTC 24 |
Sep 04 08:20:06 AM UTC 24 |
16770027489 ps |