Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
86.03	90.27	78.43	96.94		78.12	86.36	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	106204354	3559	0	0
addr_swap_data_rd_A	106204354	2812	0	0
addr_swap_mask_rd_A	106204354	2530	0	0
cfg_rd_A	106204354	2909	0	0
cmd_filter_0_rd_A	106204354	6197	0	0
cmd_filter_1_rd_A	106204354	6599	0	0
cmd_filter_2_rd_A	106204354	5523	0	0
cmd_filter_3_rd_A	106204354	6399	0	0
cmd_filter_4_rd_A	106204354	5871	0	0
cmd_filter_5_rd_A	106204354	6678	0	0
cmd_filter_6_rd_A	106204354	5560	0	0
cmd_filter_7_rd_A	106204354	6281	0	0
cmd_info_0_rd_A	106204354	3845	0	0
cmd_info_10_rd_A	106204354	4071	0	0
cmd_info_11_rd_A	106204354	4004	0	0
cmd_info_12_rd_A	106204354	3882	0	0
cmd_info_13_rd_A	106204354	3923	0	0
cmd_info_14_rd_A	106204354	4263	0	0
cmd_info_15_rd_A	106204354	4070	0	0
cmd_info_16_rd_A	106204354	3980	0	0
cmd_info_17_rd_A	106204354	4066	0	0
cmd_info_18_rd_A	106204354	4430	0	0
cmd_info_19_rd_A	106204354	4171	0	0
cmd_info_1_rd_A	106204354	3939	0	0
cmd_info_20_rd_A	106204354	4064	0	0
cmd_info_21_rd_A	106204354	4017	0	0
cmd_info_22_rd_A	106204354	4085	0	0
cmd_info_23_rd_A	106204354	4326	0	0
cmd_info_2_rd_A	106204354	3665	0	0
cmd_info_3_rd_A	106204354	4060	0	0
cmd_info_4_rd_A	106204354	3766	0	0
cmd_info_5_rd_A	106204354	4154	0	0
cmd_info_6_rd_A	106204354	4267	0	0
cmd_info_7_rd_A	106204354	4216	0	0
cmd_info_8_rd_A	106204354	4206	0	0
cmd_info_9_rd_A	106204354	4159	0	0
cmd_info_en4b_rd_A	106204354	2916	0	0
cmd_info_ex4b_rd_A	106204354	2613	0	0
cmd_info_wrdi_rd_A	106204354	2826	0	0
cmd_info_wren_rd_A	106204354	2564	0	0
intercept_en_rd_A	106204354	3025	0	0
intr_enable_rd_A	106204354	4014	0	0
jedec_cc_rd_A	106204354	2802	0	0
jedec_id_rd_A	106204354	2647	0	0
mailbox_addr_rd_A	106204354	2717	0	0
payload_swap_data_rd_A	106204354	2797	0	0
payload_swap_mask_rd_A	106204354	2698	0	0
read_threshold_rd_A	106204354	2617	0	0
tpm_access_0_rd_A	106204354	3058	0	0
tpm_access_1_rd_A	106204354	2661	0	0
tpm_cfg_rd_A	106204354	3219	0	0
tpm_did_vid_rd_A	106204354	2840	0	0
tpm_int_enable_rd_A	106204354	2630	0	0
tpm_int_status_rd_A	106204354	2715	0	0
tpm_int_vector_rd_A	106204354	2684	0	0
tpm_intf_capability_rd_A	106204354	2661	0	0
tpm_rid_rd_A	106204354	2656	0	0
tpm_sts_rd_A	106204354	2721	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	3559	0	0
T101	10518	1	0	0
T102	2403	3	0	0
T105	2597	49	0	0
T108	67501	5	0	0
T109	19970	338	0	0
T110	13656	182	0	0
T118	5340	14	0	0
T121	2093	6	0	0
T125	28979	4	0	0
T126	2450	7	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2812	0	0
T42	8572	2	0	0
T96	3976	6	0	0
T104	4534	8	0	0
T108	67501	91	0	0
T129	3471	3	0	0
T131	10232	13	0	0
T132	37248	233	0	0
T142	17862	48	0	0
T149	63955	58	0	0
T150	7219	37	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2530	0	0
T42	8572	2	0	0
T96	3976	6	0	0
T104	4534	2	0	0
T108	67501	64	0	0
T129	3471	8	0	0
T131	10232	6	0	0
T132	37248	249	0	0
T142	17862	14	0	0
T149	63955	54	0	0
T151	5707	6	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2909	0	0
T42	8572	10	0	0
T96	3976	3	0	0
T104	4534	16	0	0
T108	67501	157	0	0
T129	3471	12	0	0
T131	10232	17	0	0
T132	37248	198	0	0
T142	17862	22	0	0
T149	63955	83	0	0
T151	5707	10	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	6197	0	0
T42	8572	5	0	0
T96	3976	7	0	0
T104	4534	116	0	0
T108	67501	1202	0	0
T131	10232	114	0	0
T132	37248	268	0	0
T142	17862	40	0	0
T149	63955	608	0	0
T150	7219	44	0	0
T151	5707	118	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	6599	0	0
T42	8572	241	0	0
T96	3976	10	0	0
T104	4534	6	0	0
T108	67501	1195	0	0
T129	3471	97	0	0
T131	10232	336	0	0
T132	37248	240	0	0
T142	17862	61	0	0
T149	63955	771	0	0
T151	5707	95	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	5523	0	0
T42	8572	134	0	0
T96	3976	8	0	0
T104	4534	8	0	0
T108	67501	858	0	0
T131	10232	18	0	0
T132	37248	226	0	0
T142	17862	9	0	0
T149	63955	415	0	0
T150	7219	7	0	0
T151	5707	5	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	6399	0	0
T42	8572	121	0	0
T96	3976	4	0	0
T104	4534	114	0	0
T108	67501	1223	0	0
T129	3471	2	0	0
T131	10232	206	0	0
T132	37248	243	0	0
T142	17862	64	0	0
T149	63955	694	0	0
T151	5707	101	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	5871	0	0
T42	8572	3	0	0
T96	3976	7	0	0
T104	4534	5	0	0
T108	67501	977	0	0
T129	3471	130	0	0
T131	10232	255	0	0
T132	37248	275	0	0
T142	17862	45	0	0
T149	63955	825	0	0
T151	5707	10	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	6678	0	0
T42	8572	247	0	0
T96	3976	1	0	0
T104	4534	13	0	0
T108	67501	754	0	0
T129	3471	5	0	0
T131	10232	226	0	0
T132	37248	271	0	0
T142	17862	56	0	0
T149	63955	838	0	0
T151	5707	112	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	5560	0	0
T42	8572	242	0	0
T104	4534	3	0	0
T108	67501	887	0	0
T129	3471	1	0	0
T131	10232	12	0	0
T132	37248	228	0	0
T142	17862	28	0	0
T149	63955	918	0	0
T151	5707	3	0	0
T152	16194	210	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	6281	0	0
T42	8572	5	0	0
T104	4534	3	0	0
T108	67501	1309	0	0
T129	3471	128	0	0
T131	10232	104	0	0
T132	37248	229	0	0
T142	17862	65	0	0
T149	63955	440	0	0
T150	7219	10	0	0
T151	5707	103	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	3845	0	0
T42	8572	65	0	0
T96	3976	3	0	0
T104	4534	4	0	0
T108	67501	463	0	0
T129	3471	6	0	0
T131	10232	41	0	0
T132	37248	203	0	0
T142	17862	65	0	0
T149	63955	344	0	0
T151	5707	8	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4071	0	0
T42	8572	57	0	0
T96	3976	7	0	0
T104	4534	2	0	0
T108	67501	512	0	0
T129	3471	2	0	0
T131	10232	53	0	0
T132	37248	205	0	0
T142	17862	57	0	0
T149	63955	314	0	0
T151	5707	2	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4004	0	0
T42	8572	61	0	0
T96	3976	8	0	0
T104	4534	46	0	0
T108	67501	634	0	0
T131	10232	95	0	0
T132	37248	246	0	0
T142	17862	35	0	0
T149	63955	242	0	0
T150	7219	27	0	0
T151	5707	54	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	3882	0	0
T42	8572	93	0	0
T96	3976	7	0	0
T104	4534	4	0	0
T108	67501	599	0	0
T117	19740	7	0	0
T129	3471	48	0	0
T131	10232	68	0	0
T142	17862	79	0	0
T149	63955	117	0	0
T151	5707	10	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	3923	0	0
T42	8572	8	0	0
T96	3976	17	0	0
T104	4534	52	0	0
T108	67501	522	0	0
T131	10232	139	0	0
T132	37248	246	0	0
T142	17862	16	0	0
T149	63955	250	0	0
T150	7219	18	0	0
T151	5707	4	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4263	0	0
T42	8572	122	0	0
T104	4534	42	0	0
T108	67501	644	0	0
T129	3471	39	0	0
T131	10232	62	0	0
T132	37248	207	0	0
T142	17862	27	0	0
T149	63955	279	0	0
T150	7219	1	0	0
T151	5707	48	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4070	0	0
T42	8572	120	0	0
T96	3976	12	0	0
T104	4534	8	0	0
T108	67501	533	0	0
T109	19970	5	0	0
T129	3471	57	0	0
T131	10232	17	0	0
T142	17862	29	0	0
T149	63955	285	0	0
T151	5707	58	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	3980	0	0
T42	8572	102	0	0
T96	3976	14	0	0
T104	4534	4	0	0
T108	67501	476	0	0
T129	3471	5	0	0
T131	10232	41	0	0
T132	37248	193	0	0
T142	17862	47	0	0
T149	63955	273	0	0
T151	5707	60	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4066	0	0
T42	8572	56	0	0
T96	3976	6	0	0
T104	4534	2	0	0
T108	67501	568	0	0
T129	3471	49	0	0
T131	10232	35	0	0
T132	37248	270	0	0
T142	17862	30	0	0
T149	63955	263	0	0
T151	5707	54	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4430	0	0
T42	8572	46	0	0
T96	3976	6	0	0
T104	4534	59	0	0
T108	67501	725	0	0
T129	3471	3	0	0
T131	10232	43	0	0
T132	37248	238	0	0
T142	17862	33	0	0
T149	63955	326	0	0
T151	5707	2	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4171	0	0
T42	8572	51	0	0
T96	3976	6	0	0
T104	4534	68	0	0
T108	67501	335	0	0
T131	10232	48	0	0
T132	37248	250	0	0
T142	17862	38	0	0
T149	63955	349	0	0
T150	7219	24	0	0
T151	5707	36	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	3939	0	0
T42	8572	95	0	0
T96	3976	3	0	0
T104	4534	2	0	0
T108	67501	461	0	0
T131	10232	175	0	0
T132	37248	254	0	0
T142	17862	8	0	0
T149	63955	210	0	0
T150	7219	21	0	0
T151	5707	7	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4064	0	0
T42	8572	84	0	0
T104	4534	43	0	0
T108	67501	484	0	0
T129	3471	53	0	0
T131	10232	33	0	0
T132	37248	289	0	0
T142	17862	57	0	0
T149	63955	275	0	0
T150	7219	13	0	0
T151	5707	5	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4017	0	0
T42	8572	34	0	0
T96	3976	1	0	0
T104	4534	1	0	0
T108	67501	587	0	0
T129	3471	1	0	0
T131	10232	54	0	0
T132	37248	260	0	0
T142	17862	43	0	0
T149	63955	221	0	0
T151	5707	2	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4085	0	0
T42	8572	70	0	0
T96	3976	6	0	0
T104	4534	7	0	0
T108	67501	520	0	0
T129	3471	9	0	0
T131	10232	39	0	0
T132	37248	238	0	0
T142	17862	4	0	0
T149	63955	287	0	0
T151	5707	41	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4326	0	0
T42	8572	90	0	0
T96	3976	4	0	0
T104	4534	57	0	0
T108	67501	495	0	0
T129	3471	5	0	0
T131	10232	69	0	0
T132	37248	254	0	0
T142	17862	35	0	0
T149	63955	330	0	0
T151	5707	13	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	3665	0	0
T42	8572	2	0	0
T96	3976	2	0	0
T104	4534	11	0	0
T108	67501	344	0	0
T129	3471	5	0	0
T131	10232	110	0	0
T132	37248	213	0	0
T142	17862	14	0	0
T149	63955	326	0	0
T151	5707	4	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4060	0	0
T42	8572	93	0	0
T96	3976	14	0	0
T104	4534	3	0	0
T108	67501	371	0	0
T129	3471	46	0	0
T131	10232	85	0	0
T132	37248	248	0	0
T142	17862	14	0	0
T149	63955	240	0	0
T151	5707	45	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	3766	0	0
T42	8572	61	0	0
T96	3976	13	0	0
T104	4534	14	0	0
T108	67501	333	0	0
T109	19970	7	0	0
T117	19740	2	0	0
T129	3471	37	0	0
T142	17862	35	0	0
T149	63955	321	0	0
T151	5707	4	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4154	0	0
T42	8572	81	0	0
T96	3976	15	0	0
T104	4534	41	0	0
T108	67501	279	0	0
T129	3471	39	0	0
T131	10232	130	0	0
T132	37248	263	0	0
T142	17862	29	0	0
T149	63955	254	0	0
T151	5707	12	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4267	0	0
T42	8572	46	0	0
T96	3976	4	0	0
T104	4534	2	0	0
T108	67501	601	0	0
T131	10232	84	0	0
T132	37248	239	0	0
T142	17862	40	0	0
T149	63955	290	0	0
T150	7219	35	0	0
T151	5707	53	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4216	0	0
T42	8572	50	0	0
T96	3976	10	0	0
T104	4534	11	0	0
T108	67501	652	0	0
T129	3471	2	0	0
T131	10232	63	0	0
T132	37248	239	0	0
T142	17862	42	0	0
T149	63955	203	0	0
T151	5707	45	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4206	0	0
T42	8572	45	0	0
T96	3976	13	0	0
T104	4534	47	0	0
T108	67501	544	0	0
T117	19740	9	0	0
T129	3471	27	0	0
T131	10232	51	0	0
T142	17862	62	0	0
T149	63955	241	0	0
T151	5707	36	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4159	0	0
T42	8572	56	0	0
T96	3976	4	0	0
T104	4534	2	0	0
T108	67501	434	0	0
T129	3471	9	0	0
T131	10232	65	0	0
T132	37248	302	0	0
T142	17862	61	0	0
T149	63955	252	0	0
T151	5707	2	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2916	0	0
T42	8572	15	0	0
T96	3976	12	0	0
T104	4534	11	0	0
T108	67501	106	0	0
T129	3471	10	0	0
T131	10232	11	0	0
T132	37248	305	0	0
T142	17862	47	0	0
T149	63955	61	0	0
T151	5707	9	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2613	0	0
T42	8572	9	0	0
T96	3976	5	0	0
T104	4534	14	0	0
T108	67501	88	0	0
T131	10232	28	0	0
T132	37248	237	0	0
T142	17862	40	0	0
T149	63955	50	0	0
T150	7219	21	0	0
T151	5707	12	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2826	0	0
T42	8572	18	0	0
T96	3976	7	0	0
T104	4534	4	0	0
T108	67501	116	0	0
T129	3471	2	0	0
T131	10232	27	0	0
T132	37248	256	0	0
T142	17862	22	0	0
T149	63955	66	0	0
T151	5707	11	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2564	0	0
T42	8572	5	0	0
T96	3976	5	0	0
T104	4534	19	0	0
T108	67501	119	0	0
T129	3471	6	0	0
T131	10232	21	0	0
T132	37248	226	0	0
T142	17862	49	0	0
T149	63955	37	0	0
T151	5707	5	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	3025	0	0
T42	8572	23	0	0
T96	3976	5	0	0
T104	4534	11	0	0
T108	67501	244	0	0
T129	3471	4	0	0
T131	10232	10	0	0
T132	37248	250	0	0
T142	17862	24	0	0
T149	63955	129	0	0
T151	5707	12	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	4014	0	0
T42	0	29	0	0
T43	5258	36	0	0
T89	404520	0	0	0
T96	0	5	0	0
T104	0	3	0	0
T108	0	354	0	0
T153	0	7	0	0
T154	0	112	0	0
T155	0	8	0	0
T156	0	11	0	0
T157	0	31	0	0
T158	219356	0	0	0
T159	33309	0	0	0
T160	303291	0	0	0
T161	751	0	0	0
T162	1050	0	0	0
T163	363446	0	0	0
T164	246642	0	0	0
T165	181697	0	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2802	0	0
T42	8572	8	0	0
T96	3976	7	0	0
T104	4534	6	0	0
T108	67501	118	0	0
T129	3471	3	0	0
T131	10232	25	0	0
T132	37248	200	0	0
T142	17862	27	0	0
T149	63955	46	0	0
T151	5707	12	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2647	0	0
T42	8572	8	0	0
T96	3976	16	0	0
T104	4534	7	0	0
T108	67501	97	0	0
T129	3471	6	0	0
T131	10232	12	0	0
T132	37248	201	0	0
T142	17862	46	0	0
T149	63955	40	0	0
T151	5707	15	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2717	0	0
T42	8572	4	0	0
T96	3976	4	0	0
T104	4534	6	0	0
T108	67501	61	0	0
T109	19970	1	0	0
T129	3471	1	0	0
T131	10232	8	0	0
T142	17862	33	0	0
T149	63955	38	0	0
T151	5707	9	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2797	0	0
T42	8572	9	0	0
T96	3976	3	0	0
T104	4534	8	0	0
T108	67501	108	0	0
T110	13656	6	0	0
T129	3471	8	0	0
T131	10232	22	0	0
T142	17862	20	0	0
T149	63955	51	0	0
T151	5707	10	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2698	0	0
T42	8572	3	0	0
T96	3976	3	0	0
T104	4534	1	0	0
T108	67501	87	0	0
T129	3471	8	0	0
T131	10232	10	0	0
T132	37248	247	0	0
T142	17862	43	0	0
T149	63955	32	0	0
T151	5707	1	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2617	0	0
T42	8572	16	0	0
T96	3976	11	0	0
T104	4534	9	0	0
T108	67501	79	0	0
T131	10232	12	0	0
T132	37248	262	0	0
T142	17862	41	0	0
T149	63955	30	0	0
T150	7219	10	0	0
T151	5707	6	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	3058	0	0
T42	8572	5	0	0
T96	3976	10	0	0
T104	4534	26	0	0
T108	67501	279	0	0
T131	10232	22	0	0
T132	37248	203	0	0
T142	17862	63	0	0
T149	63955	66	0	0
T150	7219	20	0	0
T151	5707	3	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2661	0	0
T42	8572	12	0	0
T96	3976	12	0	0
T104	4534	4	0	0
T108	67501	67	0	0
T129	3471	1	0	0
T131	10232	2	0	0
T132	37248	237	0	0
T142	17862	42	0	0
T149	63955	83	0	0
T151	5707	8	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	3219	0	0
T42	8572	6	0	0
T104	4534	10	0	0
T108	67501	327	0	0
T129	3471	4	0	0
T131	10232	37	0	0
T132	37248	232	0	0
T142	17862	51	0	0
T149	63955	126	0	0
T150	7219	21	0	0
T151	5707	33	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2840	0	0
T42	8572	4	0	0
T96	3976	4	0	0
T104	4534	11	0	0
T108	67501	128	0	0
T129	3471	10	0	0
T131	10232	17	0	0
T132	37248	239	0	0
T142	17862	42	0	0
T149	63955	98	0	0
T151	5707	8	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2630	0	0
T42	8572	5	0	0
T96	3976	7	0	0
T104	4534	3	0	0
T108	67501	67	0	0
T129	3471	5	0	0
T131	10232	17	0	0
T132	37248	269	0	0
T142	17862	28	0	0
T149	63955	37	0	0
T151	5707	10	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2715	0	0
T42	8572	5	0	0
T96	3976	6	0	0
T104	4534	13	0	0
T108	67501	68	0	0
T129	3471	7	0	0
T131	10232	14	0	0
T132	37248	262	0	0
T142	17862	44	0	0
T149	63955	39	0	0
T152	16194	20	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2684	0	0
T42	8572	17	0	0
T96	3976	2	0	0
T104	4534	6	0	0
T108	67501	56	0	0
T129	3471	4	0	0
T131	10232	8	0	0
T132	37248	202	0	0
T142	17862	62	0	0
T149	63955	50	0	0
T151	5707	9	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2661	0	0
T42	8572	5	0	0
T96	3976	6	0	0
T104	4534	8	0	0
T108	67501	60	0	0
T129	3471	5	0	0
T131	10232	16	0	0
T132	37248	251	0	0
T142	17862	30	0	0
T149	63955	38	0	0
T151	5707	11	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2656	0	0
T42	8572	2	0	0
T104	4534	3	0	0
T108	67501	74	0	0
T109	19970	6	0	0
T129	3471	9	0	0
T131	10232	17	0	0
T132	37248	267	0	0
T142	17862	15	0	0
T149	63955	51	0	0
T151	5707	11	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	106204354	2721	0	0
T42	8572	15	0	0
T96	3976	8	0	0
T104	4534	8	0	0
T108	67501	85	0	0
T129	3471	10	0	0
T131	10232	12	0	0
T132	37248	251	0	0
T142	17862	16	0	0
T149	63955	47	0	0
T151	5707	5	0	0