T203 |
/workspace/coverage/default/40.spi_device_pass_cmd_filtering.3913498849 |
|
|
Apr 16 02:54:08 PM PDT 24 |
Apr 16 02:54:12 PM PDT 24 |
2086206366 ps |
T631 |
/workspace/coverage/default/14.spi_device_csb_read.2839278993 |
|
|
Apr 16 02:52:45 PM PDT 24 |
Apr 16 02:52:47 PM PDT 24 |
61118633 ps |
T632 |
/workspace/coverage/default/33.spi_device_tpm_all.1410786971 |
|
|
Apr 16 02:53:41 PM PDT 24 |
Apr 16 02:54:06 PM PDT 24 |
7023768887 ps |
T337 |
/workspace/coverage/default/16.spi_device_pass_addr_payload_swap.3409982593 |
|
|
Apr 16 02:52:58 PM PDT 24 |
Apr 16 02:53:08 PM PDT 24 |
904651053 ps |
T633 |
/workspace/coverage/default/35.spi_device_csb_read.3047471367 |
|
|
Apr 16 02:53:48 PM PDT 24 |
Apr 16 02:53:50 PM PDT 24 |
32828211 ps |
T634 |
/workspace/coverage/default/8.spi_device_csb_read.1674208552 |
|
|
Apr 16 02:52:29 PM PDT 24 |
Apr 16 02:52:31 PM PDT 24 |
24198659 ps |
T208 |
/workspace/coverage/default/38.spi_device_intercept.4000892786 |
|
|
Apr 16 02:54:00 PM PDT 24 |
Apr 16 02:54:09 PM PDT 24 |
3767481191 ps |
T635 |
/workspace/coverage/default/4.spi_device_tpm_sts_read.1572633494 |
|
|
Apr 16 02:52:17 PM PDT 24 |
Apr 16 02:52:20 PM PDT 24 |
325752399 ps |
T636 |
/workspace/coverage/default/30.spi_device_flash_mode.1640672015 |
|
|
Apr 16 02:53:32 PM PDT 24 |
Apr 16 02:54:23 PM PDT 24 |
14512033832 ps |
T637 |
/workspace/coverage/default/2.spi_device_mailbox.3135935213 |
|
|
Apr 16 02:52:12 PM PDT 24 |
Apr 16 02:52:16 PM PDT 24 |
153459233 ps |
T638 |
/workspace/coverage/default/3.spi_device_csb_read.2852535255 |
|
|
Apr 16 02:52:11 PM PDT 24 |
Apr 16 02:52:12 PM PDT 24 |
18937442 ps |
T251 |
/workspace/coverage/default/44.spi_device_pass_addr_payload_swap.3243136664 |
|
|
Apr 16 02:54:22 PM PDT 24 |
Apr 16 02:54:46 PM PDT 24 |
33699355491 ps |
T291 |
/workspace/coverage/default/34.spi_device_flash_mode.2152265222 |
|
|
Apr 16 02:53:47 PM PDT 24 |
Apr 16 02:54:53 PM PDT 24 |
15457759494 ps |
T639 |
/workspace/coverage/default/44.spi_device_pass_cmd_filtering.2273956066 |
|
|
Apr 16 02:54:21 PM PDT 24 |
Apr 16 02:54:29 PM PDT 24 |
6371789005 ps |
T640 |
/workspace/coverage/default/4.spi_device_alert_test.2426543260 |
|
|
Apr 16 02:52:23 PM PDT 24 |
Apr 16 02:52:26 PM PDT 24 |
50608892 ps |
T641 |
/workspace/coverage/default/11.spi_device_tpm_rw.2182210345 |
|
|
Apr 16 02:52:41 PM PDT 24 |
Apr 16 02:52:45 PM PDT 24 |
370221946 ps |
T642 |
/workspace/coverage/default/15.spi_device_read_buffer_direct.3602665587 |
|
|
Apr 16 02:52:57 PM PDT 24 |
Apr 16 02:53:03 PM PDT 24 |
124369945 ps |
T643 |
/workspace/coverage/default/23.spi_device_alert_test.3989767032 |
|
|
Apr 16 02:53:10 PM PDT 24 |
Apr 16 02:53:12 PM PDT 24 |
33751897 ps |
T385 |
/workspace/coverage/default/7.spi_device_tpm_all.4064599090 |
|
|
Apr 16 02:52:25 PM PDT 24 |
Apr 16 02:53:02 PM PDT 24 |
40503454336 ps |
T315 |
/workspace/coverage/default/32.spi_device_cfg_cmd.3239624659 |
|
|
Apr 16 02:53:43 PM PDT 24 |
Apr 16 02:53:47 PM PDT 24 |
287830369 ps |
T644 |
/workspace/coverage/default/15.spi_device_tpm_rw.2149216932 |
|
|
Apr 16 02:52:55 PM PDT 24 |
Apr 16 02:52:59 PM PDT 24 |
187103288 ps |
T344 |
/workspace/coverage/default/40.spi_device_mailbox.206948510 |
|
|
Apr 16 02:54:08 PM PDT 24 |
Apr 16 02:54:17 PM PDT 24 |
357209076 ps |
T645 |
/workspace/coverage/default/35.spi_device_tpm_sts_read.262717391 |
|
|
Apr 16 02:53:47 PM PDT 24 |
Apr 16 02:53:50 PM PDT 24 |
86906803 ps |
T646 |
/workspace/coverage/default/18.spi_device_alert_test.1642770008 |
|
|
Apr 16 02:52:59 PM PDT 24 |
Apr 16 02:53:02 PM PDT 24 |
22052779 ps |
T209 |
/workspace/coverage/default/41.spi_device_intercept.1432725697 |
|
|
Apr 16 02:54:09 PM PDT 24 |
Apr 16 02:54:17 PM PDT 24 |
1861331844 ps |
T328 |
/workspace/coverage/default/27.spi_device_intercept.418815372 |
|
|
Apr 16 02:53:27 PM PDT 24 |
Apr 16 02:53:36 PM PDT 24 |
1507074472 ps |
T647 |
/workspace/coverage/default/18.spi_device_tpm_rw.401166653 |
|
|
Apr 16 02:52:58 PM PDT 24 |
Apr 16 02:53:00 PM PDT 24 |
32864484 ps |
T648 |
/workspace/coverage/default/39.spi_device_csb_read.3886752082 |
|
|
Apr 16 02:54:00 PM PDT 24 |
Apr 16 02:54:02 PM PDT 24 |
16691191 ps |
T352 |
/workspace/coverage/default/13.spi_device_flash_mode.2571562344 |
|
|
Apr 16 02:52:43 PM PDT 24 |
Apr 16 02:53:43 PM PDT 24 |
3480917915 ps |
T649 |
/workspace/coverage/default/49.spi_device_tpm_sts_read.989023755 |
|
|
Apr 16 02:54:40 PM PDT 24 |
Apr 16 02:54:42 PM PDT 24 |
53712134 ps |
T313 |
/workspace/coverage/default/21.spi_device_upload.424146393 |
|
|
Apr 16 02:53:12 PM PDT 24 |
Apr 16 02:53:38 PM PDT 24 |
33053981009 ps |
T650 |
/workspace/coverage/default/34.spi_device_csb_read.707735242 |
|
|
Apr 16 02:53:44 PM PDT 24 |
Apr 16 02:53:46 PM PDT 24 |
51589971 ps |
T300 |
/workspace/coverage/default/17.spi_device_upload.2379142068 |
|
|
Apr 16 02:52:55 PM PDT 24 |
Apr 16 02:52:58 PM PDT 24 |
411811932 ps |
T189 |
/workspace/coverage/default/19.spi_device_pass_cmd_filtering.996704321 |
|
|
Apr 16 02:52:59 PM PDT 24 |
Apr 16 02:53:22 PM PDT 24 |
34088034392 ps |
T339 |
/workspace/coverage/default/12.spi_device_pass_addr_payload_swap.785961547 |
|
|
Apr 16 02:52:41 PM PDT 24 |
Apr 16 02:52:43 PM PDT 24 |
654210030 ps |
T651 |
/workspace/coverage/default/8.spi_device_tpm_sts_read.3100667944 |
|
|
Apr 16 02:52:29 PM PDT 24 |
Apr 16 02:52:31 PM PDT 24 |
42751070 ps |
T652 |
/workspace/coverage/default/37.spi_device_csb_read.1321511117 |
|
|
Apr 16 02:53:55 PM PDT 24 |
Apr 16 02:53:58 PM PDT 24 |
15090619 ps |
T107 |
/workspace/coverage/default/33.spi_device_mailbox.4015115414 |
|
|
Apr 16 02:53:44 PM PDT 24 |
Apr 16 02:54:26 PM PDT 24 |
9651148661 ps |
T653 |
/workspace/coverage/default/15.spi_device_intercept.1476071436 |
|
|
Apr 16 02:52:51 PM PDT 24 |
Apr 16 02:52:57 PM PDT 24 |
972410138 ps |
T218 |
/workspace/coverage/default/39.spi_device_pass_cmd_filtering.432624463 |
|
|
Apr 16 02:54:03 PM PDT 24 |
Apr 16 02:54:13 PM PDT 24 |
6618797531 ps |
T654 |
/workspace/coverage/default/22.spi_device_tpm_read_hw_reg.1552901171 |
|
|
Apr 16 02:53:10 PM PDT 24 |
Apr 16 02:53:22 PM PDT 24 |
1568512159 ps |
T192 |
/workspace/coverage/default/16.spi_device_intercept.3861032209 |
|
|
Apr 16 02:52:54 PM PDT 24 |
Apr 16 02:53:01 PM PDT 24 |
423962933 ps |
T256 |
/workspace/coverage/default/5.spi_device_pass_cmd_filtering.1504706078 |
|
|
Apr 16 02:52:19 PM PDT 24 |
Apr 16 02:52:29 PM PDT 24 |
2189745380 ps |
T655 |
/workspace/coverage/default/9.spi_device_tpm_all.3362708958 |
|
|
Apr 16 02:52:32 PM PDT 24 |
Apr 16 02:52:41 PM PDT 24 |
2480914595 ps |
T277 |
/workspace/coverage/default/33.spi_device_pass_cmd_filtering.636830396 |
|
|
Apr 16 02:53:42 PM PDT 24 |
Apr 16 02:54:11 PM PDT 24 |
19524989531 ps |
T656 |
/workspace/coverage/default/45.spi_device_tpm_read_hw_reg.503240000 |
|
|
Apr 16 02:54:21 PM PDT 24 |
Apr 16 02:54:29 PM PDT 24 |
1258656151 ps |
T180 |
/workspace/coverage/default/8.spi_device_pass_addr_payload_swap.1917045427 |
|
|
Apr 16 02:52:32 PM PDT 24 |
Apr 16 02:52:56 PM PDT 24 |
8566583270 ps |
T302 |
/workspace/coverage/default/47.spi_device_pass_cmd_filtering.1383310389 |
|
|
Apr 16 02:54:34 PM PDT 24 |
Apr 16 02:55:06 PM PDT 24 |
38609846913 ps |
T83 |
/workspace/coverage/default/15.spi_device_pass_addr_payload_swap.3290719950 |
|
|
Apr 16 02:52:51 PM PDT 24 |
Apr 16 02:52:55 PM PDT 24 |
2105270642 ps |
T657 |
/workspace/coverage/default/23.spi_device_tpm_rw.878579273 |
|
|
Apr 16 02:53:15 PM PDT 24 |
Apr 16 02:53:16 PM PDT 24 |
71758458 ps |
T658 |
/workspace/coverage/default/18.spi_device_tpm_all.1666475951 |
|
|
Apr 16 02:53:07 PM PDT 24 |
Apr 16 02:53:11 PM PDT 24 |
1026778544 ps |
T659 |
/workspace/coverage/default/0.spi_device_mem_parity.3392514967 |
|
|
Apr 16 02:52:13 PM PDT 24 |
Apr 16 02:52:16 PM PDT 24 |
101693289 ps |
T660 |
/workspace/coverage/default/31.spi_device_csb_read.3612238912 |
|
|
Apr 16 02:53:38 PM PDT 24 |
Apr 16 02:53:40 PM PDT 24 |
146408312 ps |
T661 |
/workspace/coverage/default/3.spi_device_mem_parity.4165005619 |
|
|
Apr 16 02:52:23 PM PDT 24 |
Apr 16 02:52:26 PM PDT 24 |
131622549 ps |
T662 |
/workspace/coverage/default/11.spi_device_read_buffer_direct.810799404 |
|
|
Apr 16 02:52:43 PM PDT 24 |
Apr 16 02:52:48 PM PDT 24 |
490800239 ps |
T663 |
/workspace/coverage/default/25.spi_device_tpm_rw.1919117122 |
|
|
Apr 16 02:53:18 PM PDT 24 |
Apr 16 02:53:21 PM PDT 24 |
426866455 ps |
T343 |
/workspace/coverage/default/20.spi_device_mailbox.4243835084 |
|
|
Apr 16 02:53:08 PM PDT 24 |
Apr 16 02:53:21 PM PDT 24 |
543490089 ps |
T664 |
/workspace/coverage/default/41.spi_device_alert_test.2027155381 |
|
|
Apr 16 02:54:14 PM PDT 24 |
Apr 16 02:54:16 PM PDT 24 |
11704422 ps |
T336 |
/workspace/coverage/default/24.spi_device_pass_addr_payload_swap.91875679 |
|
|
Apr 16 02:53:13 PM PDT 24 |
Apr 16 02:53:45 PM PDT 24 |
41037412546 ps |
T258 |
/workspace/coverage/default/42.spi_device_upload.2216906429 |
|
|
Apr 16 02:54:17 PM PDT 24 |
Apr 16 02:54:23 PM PDT 24 |
1220978549 ps |
T665 |
/workspace/coverage/default/2.spi_device_tpm_all.1794649852 |
|
|
Apr 16 02:52:14 PM PDT 24 |
Apr 16 02:53:08 PM PDT 24 |
39566964798 ps |
T247 |
/workspace/coverage/default/32.spi_device_pass_cmd_filtering.2854496945 |
|
|
Apr 16 02:53:35 PM PDT 24 |
Apr 16 02:53:43 PM PDT 24 |
963528604 ps |
T666 |
/workspace/coverage/default/44.spi_device_csb_read.3454931164 |
|
|
Apr 16 02:54:15 PM PDT 24 |
Apr 16 02:54:17 PM PDT 24 |
82062741 ps |
T91 |
/workspace/coverage/default/30.spi_device_intercept.338955615 |
|
|
Apr 16 02:53:32 PM PDT 24 |
Apr 16 02:53:43 PM PDT 24 |
877786953 ps |
T667 |
/workspace/coverage/default/20.spi_device_tpm_sts_read.1947817888 |
|
|
Apr 16 02:52:59 PM PDT 24 |
Apr 16 02:53:01 PM PDT 24 |
28392251 ps |
T668 |
/workspace/coverage/default/28.spi_device_read_buffer_direct.3308848715 |
|
|
Apr 16 02:53:31 PM PDT 24 |
Apr 16 02:53:42 PM PDT 24 |
3327234415 ps |
T669 |
/workspace/coverage/default/41.spi_device_tpm_sts_read.1154357946 |
|
|
Apr 16 02:54:14 PM PDT 24 |
Apr 16 02:54:16 PM PDT 24 |
48765740 ps |
T670 |
/workspace/coverage/default/13.spi_device_tpm_rw.2368530774 |
|
|
Apr 16 02:52:45 PM PDT 24 |
Apr 16 02:52:51 PM PDT 24 |
398626513 ps |
T348 |
/workspace/coverage/default/47.spi_device_flash_mode.168775288 |
|
|
Apr 16 02:54:34 PM PDT 24 |
Apr 16 02:54:58 PM PDT 24 |
841728552 ps |
T671 |
/workspace/coverage/default/10.spi_device_tpm_rw.3179134232 |
|
|
Apr 16 02:52:35 PM PDT 24 |
Apr 16 02:52:38 PM PDT 24 |
101370239 ps |
T341 |
/workspace/coverage/default/27.spi_device_pass_addr_payload_swap.3575325389 |
|
|
Apr 16 02:53:21 PM PDT 24 |
Apr 16 02:53:34 PM PDT 24 |
2882860170 ps |
T672 |
/workspace/coverage/default/3.spi_device_read_buffer_direct.3742366213 |
|
|
Apr 16 02:52:19 PM PDT 24 |
Apr 16 02:52:31 PM PDT 24 |
3732720326 ps |
T673 |
/workspace/coverage/default/5.spi_device_tpm_rw.1606295963 |
|
|
Apr 16 02:52:23 PM PDT 24 |
Apr 16 02:52:30 PM PDT 24 |
101701225 ps |
T297 |
/workspace/coverage/default/2.spi_device_flash_mode.2252018315 |
|
|
Apr 16 02:52:16 PM PDT 24 |
Apr 16 02:52:54 PM PDT 24 |
3174893744 ps |
T204 |
/workspace/coverage/default/42.spi_device_mailbox.849210485 |
|
|
Apr 16 02:54:14 PM PDT 24 |
Apr 16 02:54:27 PM PDT 24 |
2517425323 ps |
T674 |
/workspace/coverage/default/16.spi_device_tpm_all.2987769682 |
|
|
Apr 16 02:52:48 PM PDT 24 |
Apr 16 02:53:28 PM PDT 24 |
4727940610 ps |
T675 |
/workspace/coverage/default/3.spi_device_tpm_read_hw_reg.2524576347 |
|
|
Apr 16 02:52:17 PM PDT 24 |
Apr 16 02:52:27 PM PDT 24 |
2732696351 ps |
T676 |
/workspace/coverage/default/30.spi_device_tpm_all.4090152317 |
|
|
Apr 16 02:53:31 PM PDT 24 |
Apr 16 02:54:15 PM PDT 24 |
6715209206 ps |
T271 |
/workspace/coverage/default/37.spi_device_cfg_cmd.1154297610 |
|
|
Apr 16 02:53:55 PM PDT 24 |
Apr 16 02:54:22 PM PDT 24 |
3645649385 ps |
T274 |
/workspace/coverage/default/32.spi_device_upload.224828741 |
|
|
Apr 16 02:53:43 PM PDT 24 |
Apr 16 02:53:51 PM PDT 24 |
471366717 ps |
T677 |
/workspace/coverage/default/17.spi_device_tpm_rw.3692577300 |
|
|
Apr 16 02:53:02 PM PDT 24 |
Apr 16 02:53:05 PM PDT 24 |
176637997 ps |
T678 |
/workspace/coverage/default/8.spi_device_tpm_read_hw_reg.485570841 |
|
|
Apr 16 02:52:29 PM PDT 24 |
Apr 16 02:52:33 PM PDT 24 |
6578119736 ps |
T679 |
/workspace/coverage/default/19.spi_device_mailbox.2241458808 |
|
|
Apr 16 02:53:03 PM PDT 24 |
Apr 16 02:53:22 PM PDT 24 |
3437233822 ps |
T680 |
/workspace/coverage/default/43.spi_device_tpm_rw.1719333343 |
|
|
Apr 16 02:54:18 PM PDT 24 |
Apr 16 02:54:20 PM PDT 24 |
178156540 ps |
T354 |
/workspace/coverage/default/9.spi_device_flash_mode.1861633022 |
|
|
Apr 16 02:52:35 PM PDT 24 |
Apr 16 02:53:14 PM PDT 24 |
2356737824 ps |
T681 |
/workspace/coverage/default/23.spi_device_read_buffer_direct.1449181005 |
|
|
Apr 16 02:53:15 PM PDT 24 |
Apr 16 02:53:19 PM PDT 24 |
174673011 ps |
T682 |
/workspace/coverage/default/7.spi_device_tpm_rw.4146070593 |
|
|
Apr 16 02:52:23 PM PDT 24 |
Apr 16 02:52:33 PM PDT 24 |
1153597600 ps |
T308 |
/workspace/coverage/default/48.spi_device_mailbox.2624076986 |
|
|
Apr 16 02:54:36 PM PDT 24 |
Apr 16 02:55:51 PM PDT 24 |
31502642451 ps |
T683 |
/workspace/coverage/default/6.spi_device_mem_parity.4148970519 |
|
|
Apr 16 02:52:20 PM PDT 24 |
Apr 16 02:52:23 PM PDT 24 |
147171681 ps |
T304 |
/workspace/coverage/default/45.spi_device_mailbox.1037599495 |
|
|
Apr 16 02:54:29 PM PDT 24 |
Apr 16 02:54:36 PM PDT 24 |
4213420904 ps |
T263 |
/workspace/coverage/default/17.spi_device_mailbox.2418578807 |
|
|
Apr 16 02:52:58 PM PDT 24 |
Apr 16 02:53:04 PM PDT 24 |
116062929 ps |
T684 |
/workspace/coverage/default/25.spi_device_csb_read.4126652033 |
|
|
Apr 16 02:53:18 PM PDT 24 |
Apr 16 02:53:20 PM PDT 24 |
47299698 ps |
T685 |
/workspace/coverage/default/46.spi_device_tpm_rw.1043270757 |
|
|
Apr 16 02:54:27 PM PDT 24 |
Apr 16 02:54:38 PM PDT 24 |
937472181 ps |
T686 |
/workspace/coverage/default/29.spi_device_read_buffer_direct.863437988 |
|
|
Apr 16 02:53:35 PM PDT 24 |
Apr 16 02:53:41 PM PDT 24 |
130021216 ps |
T244 |
/workspace/coverage/default/27.spi_device_upload.2478757541 |
|
|
Apr 16 02:53:28 PM PDT 24 |
Apr 16 02:53:35 PM PDT 24 |
1058602124 ps |
T687 |
/workspace/coverage/default/36.spi_device_intercept.1669867359 |
|
|
Apr 16 02:53:51 PM PDT 24 |
Apr 16 02:54:06 PM PDT 24 |
2909081681 ps |
T346 |
/workspace/coverage/default/36.spi_device_flash_mode.3272760380 |
|
|
Apr 16 02:53:53 PM PDT 24 |
Apr 16 02:54:09 PM PDT 24 |
1219844121 ps |
T353 |
/workspace/coverage/default/11.spi_device_flash_mode.2419118121 |
|
|
Apr 16 02:52:41 PM PDT 24 |
Apr 16 02:53:30 PM PDT 24 |
12224620531 ps |
T255 |
/workspace/coverage/default/9.spi_device_mailbox.434611870 |
|
|
Apr 16 02:52:32 PM PDT 24 |
Apr 16 02:53:29 PM PDT 24 |
13325688371 ps |
T688 |
/workspace/coverage/default/48.spi_device_tpm_all.2480260163 |
|
|
Apr 16 02:54:34 PM PDT 24 |
Apr 16 02:54:57 PM PDT 24 |
9250428498 ps |
T84 |
/workspace/coverage/default/36.spi_device_pass_addr_payload_swap.812941700 |
|
|
Apr 16 02:53:51 PM PDT 24 |
Apr 16 02:54:08 PM PDT 24 |
3288515494 ps |
T689 |
/workspace/coverage/default/21.spi_device_flash_mode.1617052599 |
|
|
Apr 16 02:53:13 PM PDT 24 |
Apr 16 02:54:30 PM PDT 24 |
17000183672 ps |
T342 |
/workspace/coverage/default/23.spi_device_mailbox.2529540608 |
|
|
Apr 16 02:53:08 PM PDT 24 |
Apr 16 02:53:20 PM PDT 24 |
552730534 ps |
T320 |
/workspace/coverage/default/11.spi_device_intercept.4263303793 |
|
|
Apr 16 02:52:39 PM PDT 24 |
Apr 16 02:52:47 PM PDT 24 |
2280091108 ps |
T690 |
/workspace/coverage/default/10.spi_device_mem_parity.1874178378 |
|
|
Apr 16 02:52:33 PM PDT 24 |
Apr 16 02:52:35 PM PDT 24 |
27106007 ps |
T301 |
/workspace/coverage/default/21.spi_device_intercept.4260328181 |
|
|
Apr 16 02:53:03 PM PDT 24 |
Apr 16 02:53:09 PM PDT 24 |
1127274065 ps |
T691 |
/workspace/coverage/default/10.spi_device_upload.3785026857 |
|
|
Apr 16 02:52:36 PM PDT 24 |
Apr 16 02:52:43 PM PDT 24 |
1063276913 ps |
T327 |
/workspace/coverage/default/31.spi_device_mailbox.2067042563 |
|
|
Apr 16 02:53:37 PM PDT 24 |
Apr 16 02:54:13 PM PDT 24 |
12865246304 ps |
T692 |
/workspace/coverage/default/19.spi_device_cfg_cmd.929126797 |
|
|
Apr 16 02:53:07 PM PDT 24 |
Apr 16 02:53:11 PM PDT 24 |
243823815 ps |
T224 |
/workspace/coverage/default/40.spi_device_pass_addr_payload_swap.3917378119 |
|
|
Apr 16 02:54:11 PM PDT 24 |
Apr 16 02:54:23 PM PDT 24 |
3120409373 ps |
T306 |
/workspace/coverage/default/37.spi_device_mailbox.692072133 |
|
|
Apr 16 02:53:55 PM PDT 24 |
Apr 16 02:54:53 PM PDT 24 |
5337445411 ps |
T693 |
/workspace/coverage/default/0.spi_device_read_buffer_direct.2838457033 |
|
|
Apr 16 02:52:16 PM PDT 24 |
Apr 16 02:52:23 PM PDT 24 |
1339917581 ps |
T694 |
/workspace/coverage/default/3.spi_device_tpm_rw.1921215655 |
|
|
Apr 16 02:52:25 PM PDT 24 |
Apr 16 02:52:28 PM PDT 24 |
142235035 ps |
T695 |
/workspace/coverage/default/28.spi_device_alert_test.3150474612 |
|
|
Apr 16 02:53:33 PM PDT 24 |
Apr 16 02:53:35 PM PDT 24 |
13413488 ps |
T696 |
/workspace/coverage/default/12.spi_device_tpm_rw.1038345414 |
|
|
Apr 16 02:52:41 PM PDT 24 |
Apr 16 02:52:48 PM PDT 24 |
390789189 ps |
T697 |
/workspace/coverage/default/30.spi_device_alert_test.3560878400 |
|
|
Apr 16 02:53:42 PM PDT 24 |
Apr 16 02:53:44 PM PDT 24 |
14877158 ps |
T698 |
/workspace/coverage/default/25.spi_device_tpm_sts_read.955741839 |
|
|
Apr 16 02:53:23 PM PDT 24 |
Apr 16 02:53:24 PM PDT 24 |
66836400 ps |
T699 |
/workspace/coverage/default/41.spi_device_tpm_rw.2590832234 |
|
|
Apr 16 02:54:09 PM PDT 24 |
Apr 16 02:54:12 PM PDT 24 |
538440537 ps |
T326 |
/workspace/coverage/default/20.spi_device_pass_cmd_filtering.2760952171 |
|
|
Apr 16 02:53:01 PM PDT 24 |
Apr 16 02:53:06 PM PDT 24 |
1851968569 ps |
T700 |
/workspace/coverage/default/8.spi_device_pass_cmd_filtering.1844077791 |
|
|
Apr 16 02:52:29 PM PDT 24 |
Apr 16 02:52:34 PM PDT 24 |
893873687 ps |
T701 |
/workspace/coverage/default/15.spi_device_tpm_sts_read.3085493946 |
|
|
Apr 16 02:52:55 PM PDT 24 |
Apr 16 02:52:57 PM PDT 24 |
54629127 ps |
T702 |
/workspace/coverage/default/35.spi_device_read_buffer_direct.2692700191 |
|
|
Apr 16 02:53:52 PM PDT 24 |
Apr 16 02:53:59 PM PDT 24 |
264569617 ps |
T703 |
/workspace/coverage/default/26.spi_device_read_buffer_direct.344560991 |
|
|
Apr 16 02:53:23 PM PDT 24 |
Apr 16 02:53:28 PM PDT 24 |
1038136990 ps |
T292 |
/workspace/coverage/default/24.spi_device_flash_mode.2674417542 |
|
|
Apr 16 02:53:13 PM PDT 24 |
Apr 16 02:53:28 PM PDT 24 |
493827705 ps |
T704 |
/workspace/coverage/default/19.spi_device_tpm_sts_read.3894613564 |
|
|
Apr 16 02:52:56 PM PDT 24 |
Apr 16 02:52:58 PM PDT 24 |
202099831 ps |
T195 |
/workspace/coverage/default/37.spi_device_pass_cmd_filtering.2644245994 |
|
|
Apr 16 02:53:55 PM PDT 24 |
Apr 16 02:53:58 PM PDT 24 |
282527247 ps |
T705 |
/workspace/coverage/default/9.spi_device_cfg_cmd.3891829837 |
|
|
Apr 16 02:52:30 PM PDT 24 |
Apr 16 02:52:34 PM PDT 24 |
223247928 ps |
T706 |
/workspace/coverage/default/48.spi_device_alert_test.1965146708 |
|
|
Apr 16 02:54:41 PM PDT 24 |
Apr 16 02:54:42 PM PDT 24 |
24229129 ps |
T707 |
/workspace/coverage/default/15.spi_device_flash_mode.128092070 |
|
|
Apr 16 02:52:52 PM PDT 24 |
Apr 16 02:53:11 PM PDT 24 |
1133178851 ps |
T708 |
/workspace/coverage/default/27.spi_device_tpm_read_hw_reg.280297454 |
|
|
Apr 16 02:53:21 PM PDT 24 |
Apr 16 02:53:30 PM PDT 24 |
2088221464 ps |
T709 |
/workspace/coverage/default/22.spi_device_flash_mode.1264660627 |
|
|
Apr 16 02:53:16 PM PDT 24 |
Apr 16 02:54:24 PM PDT 24 |
30850238944 ps |
T264 |
/workspace/coverage/default/45.spi_device_intercept.11806250 |
|
|
Apr 16 02:54:29 PM PDT 24 |
Apr 16 02:54:34 PM PDT 24 |
96851745 ps |
T710 |
/workspace/coverage/default/42.spi_device_tpm_sts_read.2802014832 |
|
|
Apr 16 02:54:13 PM PDT 24 |
Apr 16 02:54:16 PM PDT 24 |
139183545 ps |
T711 |
/workspace/coverage/default/24.spi_device_tpm_read_hw_reg.3916576647 |
|
|
Apr 16 02:53:11 PM PDT 24 |
Apr 16 02:53:18 PM PDT 24 |
1814998359 ps |
T332 |
/workspace/coverage/default/25.spi_device_pass_addr_payload_swap.1600446776 |
|
|
Apr 16 02:53:22 PM PDT 24 |
Apr 16 02:53:46 PM PDT 24 |
6464561156 ps |
T712 |
/workspace/coverage/default/20.spi_device_alert_test.1717734528 |
|
|
Apr 16 02:53:11 PM PDT 24 |
Apr 16 02:53:13 PM PDT 24 |
22226563 ps |
T713 |
/workspace/coverage/default/7.spi_device_tpm_read_hw_reg.1425987256 |
|
|
Apr 16 02:52:24 PM PDT 24 |
Apr 16 02:52:31 PM PDT 24 |
1761322015 ps |
T714 |
/workspace/coverage/default/1.spi_device_tpm_sts_read.766292050 |
|
|
Apr 16 02:52:20 PM PDT 24 |
Apr 16 02:52:22 PM PDT 24 |
51662679 ps |
T715 |
/workspace/coverage/default/13.spi_device_mem_parity.2177117822 |
|
|
Apr 16 02:52:45 PM PDT 24 |
Apr 16 02:52:47 PM PDT 24 |
25618996 ps |
T716 |
/workspace/coverage/default/1.spi_device_pass_cmd_filtering.1663638500 |
|
|
Apr 16 02:52:12 PM PDT 24 |
Apr 16 02:52:22 PM PDT 24 |
4664890443 ps |
T92 |
/workspace/coverage/default/25.spi_device_intercept.872793367 |
|
|
Apr 16 02:53:19 PM PDT 24 |
Apr 16 02:53:36 PM PDT 24 |
1299371273 ps |
T717 |
/workspace/coverage/default/10.spi_device_tpm_all.3511171318 |
|
|
Apr 16 02:52:30 PM PDT 24 |
Apr 16 02:53:12 PM PDT 24 |
6231296957 ps |
T718 |
/workspace/coverage/default/47.spi_device_csb_read.2203493887 |
|
|
Apr 16 02:54:33 PM PDT 24 |
Apr 16 02:54:35 PM PDT 24 |
81269989 ps |
T196 |
/workspace/coverage/default/31.spi_device_pass_cmd_filtering.3237865775 |
|
|
Apr 16 02:53:37 PM PDT 24 |
Apr 16 02:53:47 PM PDT 24 |
6117307566 ps |
T719 |
/workspace/coverage/default/36.spi_device_csb_read.327069357 |
|
|
Apr 16 02:53:53 PM PDT 24 |
Apr 16 02:53:55 PM PDT 24 |
136873952 ps |
T266 |
/workspace/coverage/default/23.spi_device_intercept.3396737642 |
|
|
Apr 16 02:53:10 PM PDT 24 |
Apr 16 02:53:40 PM PDT 24 |
16961868033 ps |
T720 |
/workspace/coverage/default/28.spi_device_tpm_all.3449776965 |
|
|
Apr 16 02:53:33 PM PDT 24 |
Apr 16 02:53:54 PM PDT 24 |
8544192006 ps |
T340 |
/workspace/coverage/default/3.spi_device_pass_addr_payload_swap.946150122 |
|
|
Apr 16 02:52:24 PM PDT 24 |
Apr 16 02:52:30 PM PDT 24 |
1048939170 ps |
T721 |
/workspace/coverage/default/39.spi_device_alert_test.58716849 |
|
|
Apr 16 02:54:05 PM PDT 24 |
Apr 16 02:54:06 PM PDT 24 |
18210323 ps |
T722 |
/workspace/coverage/default/37.spi_device_tpm_sts_read.2498451552 |
|
|
Apr 16 02:53:54 PM PDT 24 |
Apr 16 02:53:56 PM PDT 24 |
287594201 ps |
T85 |
/workspace/coverage/default/33.spi_device_pass_addr_payload_swap.1473113124 |
|
|
Apr 16 02:53:43 PM PDT 24 |
Apr 16 02:54:11 PM PDT 24 |
12062568466 ps |
T723 |
/workspace/coverage/default/8.spi_device_alert_test.1611345353 |
|
|
Apr 16 02:52:26 PM PDT 24 |
Apr 16 02:52:28 PM PDT 24 |
91680802 ps |
T228 |
/workspace/coverage/default/30.spi_device_pass_cmd_filtering.3486300980 |
|
|
Apr 16 02:53:31 PM PDT 24 |
Apr 16 02:53:38 PM PDT 24 |
1423388669 ps |
T724 |
/workspace/coverage/default/13.spi_device_read_buffer_direct.1374162468 |
|
|
Apr 16 02:52:46 PM PDT 24 |
Apr 16 02:52:56 PM PDT 24 |
4783271628 ps |
T347 |
/workspace/coverage/default/12.spi_device_intercept.2334074334 |
|
|
Apr 16 02:52:42 PM PDT 24 |
Apr 16 02:53:03 PM PDT 24 |
6581369364 ps |
T725 |
/workspace/coverage/default/21.spi_device_tpm_all.1391211566 |
|
|
Apr 16 02:53:07 PM PDT 24 |
Apr 16 02:53:35 PM PDT 24 |
10671963717 ps |
T316 |
/workspace/coverage/default/1.spi_device_upload.4254508797 |
|
|
Apr 16 02:52:16 PM PDT 24 |
Apr 16 02:52:30 PM PDT 24 |
2980829788 ps |
T52 |
/workspace/coverage/default/4.spi_device_sec_cm.3196270253 |
|
|
Apr 16 02:52:21 PM PDT 24 |
Apr 16 02:52:25 PM PDT 24 |
330870442 ps |
T726 |
/workspace/coverage/default/36.spi_device_read_buffer_direct.572394147 |
|
|
Apr 16 02:53:55 PM PDT 24 |
Apr 16 02:54:09 PM PDT 24 |
1387997075 ps |
T727 |
/workspace/coverage/default/20.spi_device_tpm_rw.782271360 |
|
|
Apr 16 02:53:02 PM PDT 24 |
Apr 16 02:53:19 PM PDT 24 |
356421063 ps |
T728 |
/workspace/coverage/default/40.spi_device_flash_mode.4173206352 |
|
|
Apr 16 02:54:12 PM PDT 24 |
Apr 16 02:56:59 PM PDT 24 |
48216687847 ps |
T220 |
/workspace/coverage/default/22.spi_device_intercept.1048746807 |
|
|
Apr 16 02:53:11 PM PDT 24 |
Apr 16 02:53:41 PM PDT 24 |
10372333325 ps |
T345 |
/workspace/coverage/default/14.spi_device_mailbox.2049402467 |
|
|
Apr 16 02:52:57 PM PDT 24 |
Apr 16 02:56:05 PM PDT 24 |
21040595630 ps |
T729 |
/workspace/coverage/default/26.spi_device_cfg_cmd.2706307041 |
|
|
Apr 16 02:53:23 PM PDT 24 |
Apr 16 02:53:28 PM PDT 24 |
590529439 ps |
T730 |
/workspace/coverage/default/49.spi_device_pass_cmd_filtering.2931862310 |
|
|
Apr 16 02:54:44 PM PDT 24 |
Apr 16 02:54:50 PM PDT 24 |
678726338 ps |
T731 |
/workspace/coverage/default/31.spi_device_flash_mode.1371113056 |
|
|
Apr 16 02:53:38 PM PDT 24 |
Apr 16 02:53:53 PM PDT 24 |
1682297888 ps |
T732 |
/workspace/coverage/default/15.spi_device_csb_read.142482112 |
|
|
Apr 16 02:52:53 PM PDT 24 |
Apr 16 02:52:55 PM PDT 24 |
13868792 ps |
T733 |
/workspace/coverage/default/47.spi_device_tpm_all.2889630304 |
|
|
Apr 16 02:54:30 PM PDT 24 |
Apr 16 02:54:44 PM PDT 24 |
6496192620 ps |
T734 |
/workspace/coverage/default/32.spi_device_tpm_sts_read.655813205 |
|
|
Apr 16 02:53:37 PM PDT 24 |
Apr 16 02:53:40 PM PDT 24 |
566047027 ps |
T735 |
/workspace/coverage/default/3.spi_device_alert_test.2736965101 |
|
|
Apr 16 02:52:20 PM PDT 24 |
Apr 16 02:52:22 PM PDT 24 |
54175004 ps |
T736 |
/workspace/coverage/default/0.spi_device_tpm_all.857496960 |
|
|
Apr 16 02:52:12 PM PDT 24 |
Apr 16 02:52:19 PM PDT 24 |
837754460 ps |
T265 |
/workspace/coverage/default/48.spi_device_intercept.2143702870 |
|
|
Apr 16 02:54:36 PM PDT 24 |
Apr 16 02:54:48 PM PDT 24 |
4600665776 ps |
T737 |
/workspace/coverage/default/37.spi_device_tpm_read_hw_reg.3892616803 |
|
|
Apr 16 02:53:55 PM PDT 24 |
Apr 16 02:54:26 PM PDT 24 |
66591463210 ps |
T738 |
/workspace/coverage/default/19.spi_device_read_buffer_direct.807076914 |
|
|
Apr 16 02:53:01 PM PDT 24 |
Apr 16 02:53:06 PM PDT 24 |
1005382076 ps |
T739 |
/workspace/coverage/default/17.spi_device_tpm_read_hw_reg.1303742683 |
|
|
Apr 16 02:53:02 PM PDT 24 |
Apr 16 02:53:35 PM PDT 24 |
11961452255 ps |
T740 |
/workspace/coverage/default/27.spi_device_stress_all.3996187214 |
|
|
Apr 16 02:53:28 PM PDT 24 |
Apr 16 02:53:30 PM PDT 24 |
33834186 ps |
T741 |
/workspace/coverage/default/38.spi_device_upload.192607268 |
|
|
Apr 16 02:54:03 PM PDT 24 |
Apr 16 02:54:29 PM PDT 24 |
33298355311 ps |
T267 |
/workspace/coverage/default/45.spi_device_pass_addr_payload_swap.2550931032 |
|
|
Apr 16 02:54:21 PM PDT 24 |
Apr 16 02:54:28 PM PDT 24 |
1391949025 ps |
T742 |
/workspace/coverage/default/4.spi_device_read_buffer_direct.1194043552 |
|
|
Apr 16 02:52:20 PM PDT 24 |
Apr 16 02:52:28 PM PDT 24 |
512995680 ps |
T40 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.3956177311 |
|
|
Apr 16 02:50:29 PM PDT 24 |
Apr 16 02:50:30 PM PDT 24 |
166481993 ps |
T41 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.3378663133 |
|
|
Apr 16 02:50:28 PM PDT 24 |
Apr 16 02:50:40 PM PDT 24 |
390485835 ps |
T42 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.2155724031 |
|
|
Apr 16 02:50:45 PM PDT 24 |
Apr 16 02:50:48 PM PDT 24 |
389733589 ps |
T96 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.680986541 |
|
|
Apr 16 02:50:35 PM PDT 24 |
Apr 16 02:50:38 PM PDT 24 |
284112925 ps |
T101 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.4268089577 |
|
|
Apr 16 02:50:46 PM PDT 24 |
Apr 16 02:50:54 PM PDT 24 |
438330397 ps |
T102 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.4222514196 |
|
|
Apr 16 02:50:47 PM PDT 24 |
Apr 16 02:50:49 PM PDT 24 |
24796505 ps |
T743 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.4231964292 |
|
|
Apr 16 02:50:33 PM PDT 24 |
Apr 16 02:50:35 PM PDT 24 |
14292146 ps |
T103 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.1259607455 |
|
|
Apr 16 02:50:50 PM PDT 24 |
Apr 16 02:50:58 PM PDT 24 |
606859780 ps |
T155 |
/workspace/coverage/cover_reg_top/5.spi_device_intr_test.3599125040 |
|
|
Apr 16 02:50:39 PM PDT 24 |
Apr 16 02:50:41 PM PDT 24 |
14353752 ps |
T744 |
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.329060617 |
|
|
Apr 16 02:50:52 PM PDT 24 |
Apr 16 02:50:54 PM PDT 24 |
28787028 ps |
T104 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.1632417383 |
|
|
Apr 16 02:50:50 PM PDT 24 |
Apr 16 02:50:53 PM PDT 24 |
206159752 ps |
T156 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.85096269 |
|
|
Apr 16 02:50:27 PM PDT 24 |
Apr 16 02:50:28 PM PDT 24 |
42632015 ps |
T138 |
/workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.4273934243 |
|
|
Apr 16 02:50:35 PM PDT 24 |
Apr 16 02:50:40 PM PDT 24 |
113125752 ps |
T108 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.401170848 |
|
|
Apr 16 02:50:47 PM PDT 24 |
Apr 16 02:51:03 PM PDT 24 |
1406277384 ps |
T139 |
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.3913741525 |
|
|
Apr 16 02:50:48 PM PDT 24 |
Apr 16 02:50:52 PM PDT 24 |
135098069 ps |
T745 |
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.1296732851 |
|
|
Apr 16 02:50:30 PM PDT 24 |
Apr 16 02:50:31 PM PDT 24 |
15036109 ps |
T105 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_errors.2299624294 |
|
|
Apr 16 02:50:38 PM PDT 24 |
Apr 16 02:50:42 PM PDT 24 |
25996504 ps |
T127 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.3521143476 |
|
|
Apr 16 02:50:32 PM PDT 24 |
Apr 16 02:50:35 PM PDT 24 |
37983383 ps |
T109 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.3303545574 |
|
|
Apr 16 02:50:44 PM PDT 24 |
Apr 16 02:50:49 PM PDT 24 |
768135433 ps |
T121 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.1256989044 |
|
|
Apr 16 02:50:44 PM PDT 24 |
Apr 16 02:50:47 PM PDT 24 |
87311285 ps |
T125 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.3540168657 |
|
|
Apr 16 02:50:47 PM PDT 24 |
Apr 16 02:50:55 PM PDT 24 |
298767622 ps |
T157 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.4172120135 |
|
|
Apr 16 02:50:44 PM PDT 24 |
Apr 16 02:50:45 PM PDT 24 |
16606215 ps |
T118 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.1707229228 |
|
|
Apr 16 02:50:43 PM PDT 24 |
Apr 16 02:50:48 PM PDT 24 |
213704576 ps |
T126 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.2830458109 |
|
|
Apr 16 02:50:43 PM PDT 24 |
Apr 16 02:50:45 PM PDT 24 |
84552597 ps |
T140 |
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.2572091563 |
|
|
Apr 16 02:50:27 PM PDT 24 |
Apr 16 02:50:30 PM PDT 24 |
652895193 ps |
T746 |
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.1442571695 |
|
|
Apr 16 02:50:51 PM PDT 24 |
Apr 16 02:50:52 PM PDT 24 |
18545075 ps |
T361 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.2520058909 |
|
|
Apr 16 02:50:41 PM PDT 24 |
Apr 16 02:50:56 PM PDT 24 |
575720206 ps |
T141 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.3933197137 |
|
|
Apr 16 02:50:38 PM PDT 24 |
Apr 16 02:50:41 PM PDT 24 |
124931595 ps |
T747 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.2218503362 |
|
|
Apr 16 02:50:31 PM PDT 24 |
Apr 16 02:50:32 PM PDT 24 |
17413595 ps |
T110 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_errors.3735253869 |
|
|
Apr 16 02:50:36 PM PDT 24 |
Apr 16 02:50:42 PM PDT 24 |
569098132 ps |
T748 |
/workspace/coverage/cover_reg_top/38.spi_device_intr_test.4236547037 |
|
|
Apr 16 02:50:57 PM PDT 24 |
Apr 16 02:50:59 PM PDT 24 |
31725845 ps |
T151 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.1365917741 |
|
|
Apr 16 02:50:41 PM PDT 24 |
Apr 16 02:50:44 PM PDT 24 |
59476445 ps |
T128 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.4023347162 |
|
|
Apr 16 02:50:32 PM PDT 24 |
Apr 16 02:51:09 PM PDT 24 |
526189447 ps |
T111 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_errors.3737121560 |
|
|
Apr 16 02:50:33 PM PDT 24 |
Apr 16 02:50:36 PM PDT 24 |
61879795 ps |
T142 |
/workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.3631342207 |
|
|
Apr 16 02:50:48 PM PDT 24 |
Apr 16 02:50:54 PM PDT 24 |
893191154 ps |
T749 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.4183072946 |
|
|
Apr 16 02:50:46 PM PDT 24 |
Apr 16 02:50:49 PM PDT 24 |
28911184 ps |
T750 |
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.2786070697 |
|
|
Apr 16 02:50:56 PM PDT 24 |
Apr 16 02:50:57 PM PDT 24 |
15392992 ps |
T751 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.2490578420 |
|
|
Apr 16 02:50:53 PM PDT 24 |
Apr 16 02:50:55 PM PDT 24 |
45748719 ps |
T143 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.4142217047 |
|
|
Apr 16 02:50:34 PM PDT 24 |
Apr 16 02:50:39 PM PDT 24 |
59079971 ps |
T144 |
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.677684086 |
|
|
Apr 16 02:50:45 PM PDT 24 |
Apr 16 02:50:50 PM PDT 24 |
166208899 ps |
T145 |
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.136102437 |
|
|
Apr 16 02:50:47 PM PDT 24 |
Apr 16 02:50:50 PM PDT 24 |
29612944 ps |
T117 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.352415528 |
|
|
Apr 16 02:50:49 PM PDT 24 |
Apr 16 02:50:55 PM PDT 24 |
199416714 ps |
T129 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_rw.839811593 |
|
|
Apr 16 02:50:44 PM PDT 24 |
Apr 16 02:50:46 PM PDT 24 |
138945893 ps |
T752 |
/workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.4176232790 |
|
|
Apr 16 02:50:49 PM PDT 24 |
Apr 16 02:50:53 PM PDT 24 |
108409861 ps |
T149 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.2322300130 |
|
|
Apr 16 02:50:48 PM PDT 24 |
Apr 16 02:51:05 PM PDT 24 |
659332671 ps |
T130 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.384203647 |
|
|
Apr 16 02:50:31 PM PDT 24 |
Apr 16 02:50:44 PM PDT 24 |
189854911 ps |
T114 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_errors.3291803226 |
|
|
Apr 16 02:50:35 PM PDT 24 |
Apr 16 02:50:39 PM PDT 24 |
70772678 ps |
T131 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.1464226994 |
|
|
Apr 16 02:50:48 PM PDT 24 |
Apr 16 02:50:51 PM PDT 24 |
113707283 ps |
T753 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.26629677 |
|
|
Apr 16 02:50:36 PM PDT 24 |
Apr 16 02:50:45 PM PDT 24 |
112768542 ps |
T754 |
/workspace/coverage/cover_reg_top/9.spi_device_intr_test.3361452080 |
|
|
Apr 16 02:50:37 PM PDT 24 |
Apr 16 02:50:39 PM PDT 24 |
33533355 ps |
T755 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.148711842 |
|
|
Apr 16 02:50:36 PM PDT 24 |
Apr 16 02:51:13 PM PDT 24 |
7212131877 ps |
T756 |
/workspace/coverage/cover_reg_top/40.spi_device_intr_test.1703395033 |
|
|
Apr 16 02:50:51 PM PDT 24 |
Apr 16 02:50:52 PM PDT 24 |
37195184 ps |
T757 |
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.2110291203 |
|
|
Apr 16 02:51:00 PM PDT 24 |
Apr 16 02:51:02 PM PDT 24 |
31628104 ps |
T367 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.1479178330 |
|
|
Apr 16 02:50:45 PM PDT 24 |
Apr 16 02:51:01 PM PDT 24 |
2397816037 ps |
T758 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.460568591 |
|
|
Apr 16 02:50:52 PM PDT 24 |
Apr 16 02:50:54 PM PDT 24 |
15231175 ps |
T132 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.268498438 |
|
|
Apr 16 02:50:35 PM PDT 24 |
Apr 16 02:50:45 PM PDT 24 |
392092829 ps |
T759 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.47340215 |
|
|
Apr 16 02:50:37 PM PDT 24 |
Apr 16 02:50:40 PM PDT 24 |
13439744 ps |
T150 |
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.3451691732 |
|
|
Apr 16 02:50:48 PM PDT 24 |
Apr 16 02:50:51 PM PDT 24 |
300856857 ps |
T760 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.2947385955 |
|
|
Apr 16 02:50:32 PM PDT 24 |
Apr 16 02:50:36 PM PDT 24 |
148711083 ps |
T761 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.1690376669 |
|
|
Apr 16 02:50:48 PM PDT 24 |
Apr 16 02:50:50 PM PDT 24 |
45597886 ps |
T762 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.3603551148 |
|
|
Apr 16 02:50:46 PM PDT 24 |
Apr 16 02:50:48 PM PDT 24 |
92403023 ps |
T152 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.2849957916 |
|
|
Apr 16 02:50:35 PM PDT 24 |
Apr 16 02:50:40 PM PDT 24 |
490747666 ps |
T763 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.2475534967 |
|
|
Apr 16 02:50:52 PM PDT 24 |
Apr 16 02:50:54 PM PDT 24 |
23492879 ps |
T764 |
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.1354950430 |
|
|
Apr 16 02:50:51 PM PDT 24 |
Apr 16 02:50:53 PM PDT 24 |
12935508 ps |
T765 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.3376330309 |
|
|
Apr 16 02:50:57 PM PDT 24 |
Apr 16 02:50:59 PM PDT 24 |
12309033 ps |
T368 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.2611211276 |
|
|
Apr 16 02:50:47 PM PDT 24 |
Apr 16 02:50:56 PM PDT 24 |
288176273 ps |
T766 |
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.943405193 |
|
|
Apr 16 02:50:54 PM PDT 24 |
Apr 16 02:50:56 PM PDT 24 |
14773921 ps |
T97 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.274983658 |
|
|
Apr 16 02:50:36 PM PDT 24 |
Apr 16 02:50:39 PM PDT 24 |
55948805 ps |
T767 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.4128898609 |
|
|
Apr 16 02:50:42 PM PDT 24 |
Apr 16 02:50:44 PM PDT 24 |
27366630 ps |
T768 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.3203813968 |
|
|
Apr 16 02:50:30 PM PDT 24 |
Apr 16 02:50:31 PM PDT 24 |
33439247 ps |
T769 |
/workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.4162573452 |
|
|
Apr 16 02:50:38 PM PDT 24 |
Apr 16 02:50:42 PM PDT 24 |
159269797 ps |