Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.95 98.35 94.20 98.61 89.36 97.14 95.81 98.17


Total test records in report: 1101
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T811 /workspace/coverage/default/12.spi_device_mailbox.2618561311 May 16 01:27:05 PM PDT 24 May 16 01:27:37 PM PDT 24 2066401400 ps
T812 /workspace/coverage/default/24.spi_device_mailbox.1411601941 May 16 01:27:48 PM PDT 24 May 16 01:28:20 PM PDT 24 528629517 ps
T813 /workspace/coverage/default/40.spi_device_stress_all.3808393324 May 16 01:28:41 PM PDT 24 May 16 01:28:54 PM PDT 24 53777242 ps
T814 /workspace/coverage/default/13.spi_device_pass_cmd_filtering.116196112 May 16 01:27:06 PM PDT 24 May 16 01:27:35 PM PDT 24 3551930312 ps
T815 /workspace/coverage/default/5.spi_device_mailbox.1527450029 May 16 01:26:45 PM PDT 24 May 16 01:27:02 PM PDT 24 1558751395 ps
T816 /workspace/coverage/default/30.spi_device_cfg_cmd.2840714950 May 16 01:28:08 PM PDT 24 May 16 01:28:36 PM PDT 24 970238406 ps
T817 /workspace/coverage/default/47.spi_device_flash_mode.395076931 May 16 01:29:06 PM PDT 24 May 16 01:29:22 PM PDT 24 273469414 ps
T818 /workspace/coverage/default/2.spi_device_pass_cmd_filtering.656687059 May 16 01:26:34 PM PDT 24 May 16 01:26:59 PM PDT 24 24380435648 ps
T238 /workspace/coverage/default/45.spi_device_stress_all.2647992660 May 16 01:29:09 PM PDT 24 May 16 01:31:09 PM PDT 24 8786349101 ps
T819 /workspace/coverage/default/32.spi_device_read_buffer_direct.170388919 May 16 01:28:06 PM PDT 24 May 16 01:28:34 PM PDT 24 10974555864 ps
T820 /workspace/coverage/default/46.spi_device_stress_all.3719444617 May 16 01:29:05 PM PDT 24 May 16 01:29:16 PM PDT 24 94779016 ps
T821 /workspace/coverage/default/43.spi_device_upload.3679496487 May 16 01:28:52 PM PDT 24 May 16 01:29:13 PM PDT 24 5570906826 ps
T822 /workspace/coverage/default/32.spi_device_cfg_cmd.1183753141 May 16 01:28:09 PM PDT 24 May 16 01:28:30 PM PDT 24 387869635 ps
T239 /workspace/coverage/default/0.spi_device_pass_addr_payload_swap.3819996375 May 16 01:26:21 PM PDT 24 May 16 01:26:44 PM PDT 24 3804995854 ps
T823 /workspace/coverage/default/5.spi_device_cfg_cmd.1926680129 May 16 01:26:40 PM PDT 24 May 16 01:27:04 PM PDT 24 903571913 ps
T824 /workspace/coverage/default/25.spi_device_upload.3087024114 May 16 01:27:46 PM PDT 24 May 16 01:28:08 PM PDT 24 249057408 ps
T825 /workspace/coverage/default/8.spi_device_upload.187709334 May 16 01:26:49 PM PDT 24 May 16 01:27:10 PM PDT 24 2098600403 ps
T24 /workspace/coverage/default/28.spi_device_flash_and_tpm_min_idle.2343019052 May 16 01:28:00 PM PDT 24 May 16 01:31:16 PM PDT 24 18097586781 ps
T826 /workspace/coverage/default/40.spi_device_flash_mode.2888802890 May 16 01:28:38 PM PDT 24 May 16 01:28:57 PM PDT 24 872020691 ps
T827 /workspace/coverage/default/4.spi_device_tpm_read_hw_reg.3588367740 May 16 01:26:29 PM PDT 24 May 16 01:26:50 PM PDT 24 2200279229 ps
T828 /workspace/coverage/default/23.spi_device_tpm_rw.2346528054 May 16 01:27:36 PM PDT 24 May 16 01:27:56 PM PDT 24 69365228 ps
T829 /workspace/coverage/default/15.spi_device_intercept.3357005445 May 16 01:27:07 PM PDT 24 May 16 01:27:32 PM PDT 24 691892547 ps
T830 /workspace/coverage/default/42.spi_device_read_buffer_direct.2502291655 May 16 01:28:47 PM PDT 24 May 16 01:29:07 PM PDT 24 919611402 ps
T831 /workspace/coverage/default/9.spi_device_tpm_all.627142814 May 16 01:26:45 PM PDT 24 May 16 01:27:15 PM PDT 24 3765799221 ps
T832 /workspace/coverage/default/42.spi_device_cfg_cmd.4003557329 May 16 01:28:48 PM PDT 24 May 16 01:29:02 PM PDT 24 106546896 ps
T833 /workspace/coverage/default/21.spi_device_tpm_sts_read.1438842480 May 16 01:27:31 PM PDT 24 May 16 01:27:52 PM PDT 24 226095641 ps
T834 /workspace/coverage/default/45.spi_device_tpm_read_hw_reg.744168928 May 16 01:28:51 PM PDT 24 May 16 01:29:08 PM PDT 24 542970265 ps
T835 /workspace/coverage/default/18.spi_device_tpm_all.3651138822 May 16 01:27:14 PM PDT 24 May 16 01:27:43 PM PDT 24 4153341877 ps
T836 /workspace/coverage/default/33.spi_device_pass_cmd_filtering.3078163169 May 16 01:28:17 PM PDT 24 May 16 01:28:41 PM PDT 24 11312575880 ps
T224 /workspace/coverage/default/42.spi_device_flash_all.2914830212 May 16 01:28:47 PM PDT 24 May 16 01:30:11 PM PDT 24 12393835013 ps
T837 /workspace/coverage/default/44.spi_device_pass_addr_payload_swap.2122175038 May 16 01:28:51 PM PDT 24 May 16 01:29:06 PM PDT 24 134159775 ps
T838 /workspace/coverage/default/0.spi_device_tpm_all.1345081603 May 16 01:26:24 PM PDT 24 May 16 01:27:06 PM PDT 24 2538766638 ps
T839 /workspace/coverage/default/8.spi_device_pass_cmd_filtering.1369883351 May 16 01:26:47 PM PDT 24 May 16 01:27:06 PM PDT 24 616243790 ps
T840 /workspace/coverage/default/6.spi_device_mem_parity.2528321434 May 16 01:26:42 PM PDT 24 May 16 01:26:57 PM PDT 24 46771830 ps
T841 /workspace/coverage/default/29.spi_device_tpm_read_hw_reg.2548307323 May 16 01:27:55 PM PDT 24 May 16 01:28:18 PM PDT 24 1679329453 ps
T842 /workspace/coverage/default/0.spi_device_tpm_sts_read.925881624 May 16 01:26:19 PM PDT 24 May 16 01:26:36 PM PDT 24 32092722 ps
T843 /workspace/coverage/default/14.spi_device_tpm_all.1890063286 May 16 01:27:13 PM PDT 24 May 16 01:27:49 PM PDT 24 1748636847 ps
T844 /workspace/coverage/default/46.spi_device_flash_and_tpm.1606393583 May 16 01:29:08 PM PDT 24 May 16 01:29:21 PM PDT 24 330452371 ps
T845 /workspace/coverage/default/46.spi_device_mailbox.1904450126 May 16 01:29:05 PM PDT 24 May 16 01:29:53 PM PDT 24 3353971290 ps
T846 /workspace/coverage/default/32.spi_device_tpm_all.2839128528 May 16 01:28:10 PM PDT 24 May 16 01:28:37 PM PDT 24 6724012984 ps
T847 /workspace/coverage/default/45.spi_device_pass_addr_payload_swap.851057306 May 16 01:29:05 PM PDT 24 May 16 01:29:34 PM PDT 24 16766599003 ps
T848 /workspace/coverage/default/42.spi_device_tpm_read_hw_reg.420374973 May 16 01:28:47 PM PDT 24 May 16 01:29:15 PM PDT 24 10313478709 ps
T849 /workspace/coverage/default/11.spi_device_flash_and_tpm_min_idle.2681627955 May 16 01:27:03 PM PDT 24 May 16 01:29:49 PM PDT 24 34145020554 ps
T850 /workspace/coverage/default/19.spi_device_stress_all.845282482 May 16 01:27:24 PM PDT 24 May 16 01:29:47 PM PDT 24 49430389063 ps
T851 /workspace/coverage/default/34.spi_device_mailbox.591565823 May 16 01:28:17 PM PDT 24 May 16 01:28:41 PM PDT 24 1202363948 ps
T852 /workspace/coverage/default/39.spi_device_flash_and_tpm.3713560861 May 16 01:28:40 PM PDT 24 May 16 01:29:52 PM PDT 24 15304844518 ps
T213 /workspace/coverage/default/28.spi_device_flash_all.3138003843 May 16 01:28:01 PM PDT 24 May 16 01:35:32 PM PDT 24 66964898469 ps
T853 /workspace/coverage/default/47.spi_device_tpm_all.575033397 May 16 01:29:08 PM PDT 24 May 16 01:29:47 PM PDT 24 4508443834 ps
T854 /workspace/coverage/default/4.spi_device_mem_parity.437689428 May 16 01:26:26 PM PDT 24 May 16 01:26:44 PM PDT 24 30309953 ps
T855 /workspace/coverage/default/33.spi_device_read_buffer_direct.3450963667 May 16 01:28:16 PM PDT 24 May 16 01:28:35 PM PDT 24 988768818 ps
T856 /workspace/coverage/default/29.spi_device_tpm_rw.848225040 May 16 01:27:57 PM PDT 24 May 16 01:28:16 PM PDT 24 130004304 ps
T857 /workspace/coverage/default/36.spi_device_tpm_read_hw_reg.3462404035 May 16 01:28:27 PM PDT 24 May 16 01:28:44 PM PDT 24 908324063 ps
T858 /workspace/coverage/default/10.spi_device_csb_read.3494059918 May 16 01:26:59 PM PDT 24 May 16 01:27:21 PM PDT 24 39405856 ps
T859 /workspace/coverage/default/21.spi_device_tpm_all.3675014290 May 16 01:27:24 PM PDT 24 May 16 01:28:04 PM PDT 24 5061180102 ps
T860 /workspace/coverage/default/39.spi_device_cfg_cmd.1555637759 May 16 01:28:40 PM PDT 24 May 16 01:29:04 PM PDT 24 2745566648 ps
T861 /workspace/coverage/default/15.spi_device_cfg_cmd.457495846 May 16 01:27:12 PM PDT 24 May 16 01:27:57 PM PDT 24 16289953276 ps
T862 /workspace/coverage/default/28.spi_device_read_buffer_direct.2038219101 May 16 01:27:54 PM PDT 24 May 16 01:28:18 PM PDT 24 342365353 ps
T214 /workspace/coverage/default/33.spi_device_flash_and_tpm.287733821 May 16 01:28:17 PM PDT 24 May 16 01:32:52 PM PDT 24 100550796545 ps
T863 /workspace/coverage/default/17.spi_device_tpm_all.1953475700 May 16 01:27:16 PM PDT 24 May 16 01:27:43 PM PDT 24 791199815 ps
T864 /workspace/coverage/default/5.spi_device_flash_mode.1922725804 May 16 01:26:35 PM PDT 24 May 16 01:26:57 PM PDT 24 1384540463 ps
T865 /workspace/coverage/default/21.spi_device_flash_all.1669250108 May 16 01:27:36 PM PDT 24 May 16 01:31:18 PM PDT 24 116205254074 ps
T866 /workspace/coverage/default/11.spi_device_tpm_sts_read.2628716398 May 16 01:26:58 PM PDT 24 May 16 01:27:18 PM PDT 24 57505718 ps
T867 /workspace/coverage/default/4.spi_device_flash_and_tpm_min_idle.3575108418 May 16 01:26:35 PM PDT 24 May 16 01:27:12 PM PDT 24 4703953973 ps
T868 /workspace/coverage/default/38.spi_device_upload.156111768 May 16 01:28:32 PM PDT 24 May 16 01:28:48 PM PDT 24 1069007124 ps
T869 /workspace/coverage/default/25.spi_device_intercept.2197772234 May 16 01:27:52 PM PDT 24 May 16 01:28:32 PM PDT 24 7576139087 ps
T870 /workspace/coverage/default/3.spi_device_upload.2217245715 May 16 01:26:36 PM PDT 24 May 16 01:27:06 PM PDT 24 13477094052 ps
T871 /workspace/coverage/default/31.spi_device_stress_all.170068475 May 16 01:28:06 PM PDT 24 May 16 01:28:23 PM PDT 24 290331112 ps
T70 /workspace/coverage/default/3.spi_device_sec_cm.2526742795 May 16 01:26:34 PM PDT 24 May 16 01:26:50 PM PDT 24 144515841 ps
T872 /workspace/coverage/default/6.spi_device_alert_test.392678227 May 16 01:26:44 PM PDT 24 May 16 01:26:58 PM PDT 24 30490256 ps
T873 /workspace/coverage/default/6.spi_device_cfg_cmd.1096979863 May 16 01:26:53 PM PDT 24 May 16 01:27:30 PM PDT 24 2890383197 ps
T874 /workspace/coverage/default/23.spi_device_flash_all.937419379 May 16 01:27:35 PM PDT 24 May 16 01:28:36 PM PDT 24 2452824123 ps
T875 /workspace/coverage/default/49.spi_device_tpm_read_hw_reg.3681523695 May 16 01:29:23 PM PDT 24 May 16 01:29:51 PM PDT 24 5410361109 ps
T876 /workspace/coverage/default/18.spi_device_flash_all.2174290151 May 16 01:27:15 PM PDT 24 May 16 01:27:38 PM PDT 24 148476442 ps
T877 /workspace/coverage/default/10.spi_device_tpm_rw.2382276359 May 16 01:27:01 PM PDT 24 May 16 01:27:23 PM PDT 24 12724874 ps
T250 /workspace/coverage/default/19.spi_device_flash_all.878529114 May 16 01:27:26 PM PDT 24 May 16 01:28:46 PM PDT 24 33769568654 ps
T878 /workspace/coverage/default/7.spi_device_intercept.4017015782 May 16 01:26:49 PM PDT 24 May 16 01:27:06 PM PDT 24 72451284 ps
T879 /workspace/coverage/default/12.spi_device_pass_cmd_filtering.3485992956 May 16 01:26:59 PM PDT 24 May 16 01:27:21 PM PDT 24 225692197 ps
T880 /workspace/coverage/default/37.spi_device_pass_cmd_filtering.2545396654 May 16 01:28:32 PM PDT 24 May 16 01:28:49 PM PDT 24 1573164567 ps
T881 /workspace/coverage/default/45.spi_device_tpm_rw.3506858932 May 16 01:29:06 PM PDT 24 May 16 01:29:17 PM PDT 24 109299009 ps
T882 /workspace/coverage/default/6.spi_device_stress_all.3501803674 May 16 01:26:47 PM PDT 24 May 16 01:27:17 PM PDT 24 3970541394 ps
T883 /workspace/coverage/default/9.spi_device_alert_test.1200650307 May 16 01:26:59 PM PDT 24 May 16 01:27:19 PM PDT 24 58501456 ps
T884 /workspace/coverage/default/29.spi_device_pass_cmd_filtering.229771175 May 16 01:27:55 PM PDT 24 May 16 01:28:18 PM PDT 24 532995407 ps
T885 /workspace/coverage/default/32.spi_device_mailbox.303767655 May 16 01:28:10 PM PDT 24 May 16 01:28:32 PM PDT 24 2016583362 ps
T886 /workspace/coverage/default/7.spi_device_tpm_sts_read.3087713567 May 16 01:26:50 PM PDT 24 May 16 01:27:06 PM PDT 24 61541160 ps
T887 /workspace/coverage/default/24.spi_device_csb_read.3734129452 May 16 01:27:35 PM PDT 24 May 16 01:27:55 PM PDT 24 22164765 ps
T888 /workspace/coverage/default/49.spi_device_intercept.3073646093 May 16 01:29:18 PM PDT 24 May 16 01:29:34 PM PDT 24 880253750 ps
T889 /workspace/coverage/default/34.spi_device_tpm_all.3355789936 May 16 01:28:15 PM PDT 24 May 16 01:28:55 PM PDT 24 8334334694 ps
T890 /workspace/coverage/default/24.spi_device_tpm_all.654195443 May 16 01:27:39 PM PDT 24 May 16 01:28:15 PM PDT 24 6772843896 ps
T891 /workspace/coverage/default/26.spi_device_pass_cmd_filtering.83686975 May 16 01:27:46 PM PDT 24 May 16 01:28:14 PM PDT 24 2541544129 ps
T892 /workspace/coverage/default/15.spi_device_mailbox.1258658010 May 16 01:27:05 PM PDT 24 May 16 01:27:38 PM PDT 24 542417843 ps
T893 /workspace/coverage/default/40.spi_device_alert_test.870911875 May 16 01:28:41 PM PDT 24 May 16 01:28:54 PM PDT 24 94290551 ps
T894 /workspace/coverage/default/9.spi_device_pass_cmd_filtering.1108373323 May 16 01:26:58 PM PDT 24 May 16 01:27:22 PM PDT 24 1833482301 ps
T47 /workspace/coverage/default/47.spi_device_flash_and_tpm.2344100123 May 16 01:29:07 PM PDT 24 May 16 01:33:33 PM PDT 24 22163441034 ps
T895 /workspace/coverage/default/25.spi_device_alert_test.4273284672 May 16 01:27:49 PM PDT 24 May 16 01:28:07 PM PDT 24 25006758 ps
T896 /workspace/coverage/default/24.spi_device_read_buffer_direct.4198031968 May 16 01:27:47 PM PDT 24 May 16 01:28:14 PM PDT 24 3600851320 ps
T897 /workspace/coverage/default/26.spi_device_mailbox.2869532367 May 16 01:27:44 PM PDT 24 May 16 01:28:17 PM PDT 24 1056066899 ps
T898 /workspace/coverage/default/18.spi_device_flash_mode.2665407832 May 16 01:27:14 PM PDT 24 May 16 01:27:40 PM PDT 24 360680621 ps
T899 /workspace/coverage/default/45.spi_device_csb_read.820758467 May 16 01:28:50 PM PDT 24 May 16 01:29:04 PM PDT 24 16722069 ps
T900 /workspace/coverage/default/21.spi_device_mailbox.3751053111 May 16 01:27:26 PM PDT 24 May 16 01:27:48 PM PDT 24 277822302 ps
T901 /workspace/coverage/default/3.spi_device_alert_test.202210271 May 16 01:26:29 PM PDT 24 May 16 01:26:46 PM PDT 24 14723611 ps
T902 /workspace/coverage/default/40.spi_device_tpm_read_hw_reg.2744852436 May 16 01:28:39 PM PDT 24 May 16 01:29:05 PM PDT 24 20950742276 ps
T903 /workspace/coverage/default/13.spi_device_tpm_all.1770298636 May 16 01:26:58 PM PDT 24 May 16 01:27:39 PM PDT 24 4348523117 ps
T904 /workspace/coverage/default/18.spi_device_cfg_cmd.1009783517 May 16 01:27:16 PM PDT 24 May 16 01:27:41 PM PDT 24 65182801 ps
T905 /workspace/coverage/default/35.spi_device_csb_read.2105656690 May 16 01:28:19 PM PDT 24 May 16 01:28:34 PM PDT 24 13350349 ps
T906 /workspace/coverage/default/9.spi_device_tpm_sts_read.1169413415 May 16 01:26:52 PM PDT 24 May 16 01:27:09 PM PDT 24 190646704 ps
T907 /workspace/coverage/default/8.spi_device_flash_and_tpm.4268222603 May 16 01:26:48 PM PDT 24 May 16 01:27:05 PM PDT 24 179866493 ps
T908 /workspace/coverage/default/24.spi_device_pass_cmd_filtering.1520683217 May 16 01:27:38 PM PDT 24 May 16 01:28:00 PM PDT 24 354794563 ps
T909 /workspace/coverage/default/28.spi_device_tpm_all.2115618046 May 16 01:27:55 PM PDT 24 May 16 01:28:46 PM PDT 24 6822711534 ps
T248 /workspace/coverage/default/36.spi_device_flash_and_tpm.1312696892 May 16 01:28:27 PM PDT 24 May 16 01:34:41 PM PDT 24 228964608372 ps
T910 /workspace/coverage/default/35.spi_device_pass_addr_payload_swap.3036220957 May 16 01:28:19 PM PDT 24 May 16 01:28:39 PM PDT 24 634276199 ps
T911 /workspace/coverage/default/15.spi_device_upload.755715906 May 16 01:27:04 PM PDT 24 May 16 01:27:33 PM PDT 24 2782578884 ps
T912 /workspace/coverage/default/45.spi_device_tpm_sts_read.1768050988 May 16 01:28:50 PM PDT 24 May 16 01:29:03 PM PDT 24 169126041 ps
T913 /workspace/coverage/default/0.spi_device_flash_mode.4168306402 May 16 01:26:20 PM PDT 24 May 16 01:26:43 PM PDT 24 353266898 ps
T48 /workspace/coverage/default/22.spi_device_stress_all.1797093907 May 16 01:27:40 PM PDT 24 May 16 01:33:29 PM PDT 24 83047326079 ps
T914 /workspace/coverage/default/42.spi_device_tpm_rw.3151167136 May 16 01:28:46 PM PDT 24 May 16 01:28:59 PM PDT 24 164368950 ps
T915 /workspace/coverage/default/37.spi_device_intercept.2923907662 May 16 01:28:27 PM PDT 24 May 16 01:28:44 PM PDT 24 2690111731 ps
T916 /workspace/coverage/default/3.spi_device_pass_addr_payload_swap.4201729049 May 16 01:26:45 PM PDT 24 May 16 01:27:05 PM PDT 24 4562671153 ps
T917 /workspace/coverage/default/1.spi_device_tpm_sts_read.1658798073 May 16 01:26:30 PM PDT 24 May 16 01:26:47 PM PDT 24 105857116 ps
T918 /workspace/coverage/default/18.spi_device_stress_all.4095447111 May 16 01:27:16 PM PDT 24 May 16 01:32:19 PM PDT 24 32329913245 ps
T919 /workspace/coverage/default/20.spi_device_flash_and_tpm_min_idle.2951089329 May 16 01:27:26 PM PDT 24 May 16 01:28:10 PM PDT 24 1095925972 ps
T920 /workspace/coverage/default/13.spi_device_flash_all.2315400033 May 16 01:27:01 PM PDT 24 May 16 01:28:10 PM PDT 24 8438025548 ps
T921 /workspace/coverage/default/27.spi_device_csb_read.1038460759 May 16 01:27:52 PM PDT 24 May 16 01:28:10 PM PDT 24 56034185 ps
T922 /workspace/coverage/default/25.spi_device_flash_mode.1214615831 May 16 01:27:45 PM PDT 24 May 16 01:28:07 PM PDT 24 265459464 ps
T923 /workspace/coverage/default/30.spi_device_flash_and_tpm.909202398 May 16 01:28:08 PM PDT 24 May 16 01:40:26 PM PDT 24 303578958099 ps
T924 /workspace/coverage/default/15.spi_device_tpm_rw.234363626 May 16 01:27:09 PM PDT 24 May 16 01:27:34 PM PDT 24 183042035 ps
T925 /workspace/coverage/default/19.spi_device_tpm_sts_read.3467759808 May 16 01:27:20 PM PDT 24 May 16 01:27:42 PM PDT 24 95373981 ps
T926 /workspace/coverage/default/5.spi_device_pass_cmd_filtering.2495978895 May 16 01:26:33 PM PDT 24 May 16 01:27:01 PM PDT 24 3188519317 ps
T927 /workspace/coverage/default/1.spi_device_read_buffer_direct.386884663 May 16 01:26:29 PM PDT 24 May 16 01:26:49 PM PDT 24 106532160 ps
T928 /workspace/coverage/default/49.spi_device_read_buffer_direct.1639295823 May 16 01:29:18 PM PDT 24 May 16 01:29:36 PM PDT 24 598753979 ps
T929 /workspace/coverage/default/16.spi_device_pass_addr_payload_swap.2356221093 May 16 01:27:13 PM PDT 24 May 16 01:27:37 PM PDT 24 32879714 ps
T930 /workspace/coverage/default/7.spi_device_pass_cmd_filtering.828973233 May 16 01:26:48 PM PDT 24 May 16 01:27:12 PM PDT 24 4885890248 ps
T931 /workspace/coverage/default/22.spi_device_csb_read.3629954614 May 16 01:27:27 PM PDT 24 May 16 01:27:49 PM PDT 24 136230698 ps
T932 /workspace/coverage/default/41.spi_device_pass_cmd_filtering.3661308363 May 16 01:28:40 PM PDT 24 May 16 01:28:58 PM PDT 24 2039463702 ps
T933 /workspace/coverage/default/24.spi_device_flash_mode.2006488074 May 16 01:27:43 PM PDT 24 May 16 01:28:06 PM PDT 24 927385247 ps
T934 /workspace/coverage/default/25.spi_device_flash_and_tpm.1693280318 May 16 01:27:52 PM PDT 24 May 16 01:30:43 PM PDT 24 323936046806 ps
T935 /workspace/coverage/default/25.spi_device_mailbox.3134496353 May 16 01:27:47 PM PDT 24 May 16 01:28:13 PM PDT 24 604465120 ps
T936 /workspace/coverage/default/38.spi_device_mailbox.2550109366 May 16 01:28:29 PM PDT 24 May 16 01:28:44 PM PDT 24 52723836 ps
T937 /workspace/coverage/default/24.spi_device_flash_all.1142493200 May 16 01:27:47 PM PDT 24 May 16 01:28:06 PM PDT 24 66760693 ps
T211 /workspace/coverage/default/47.spi_device_flash_all.3458693988 May 16 01:29:06 PM PDT 24 May 16 01:36:28 PM PDT 24 242515137108 ps
T938 /workspace/coverage/default/46.spi_device_tpm_rw.1665099266 May 16 01:29:08 PM PDT 24 May 16 01:29:19 PM PDT 24 34229739 ps
T939 /workspace/coverage/default/34.spi_device_tpm_sts_read.3077828012 May 16 01:28:21 PM PDT 24 May 16 01:28:35 PM PDT 24 64332001 ps
T940 /workspace/coverage/default/27.spi_device_upload.2932736750 May 16 01:27:50 PM PDT 24 May 16 01:28:20 PM PDT 24 12647598573 ps
T941 /workspace/coverage/default/14.spi_device_flash_all.3817375450 May 16 01:27:06 PM PDT 24 May 16 01:30:20 PM PDT 24 24564457083 ps
T942 /workspace/coverage/default/14.spi_device_alert_test.1967267496 May 16 01:27:04 PM PDT 24 May 16 01:27:27 PM PDT 24 10877768 ps
T943 /workspace/coverage/default/2.spi_device_flash_all.2936850988 May 16 01:26:37 PM PDT 24 May 16 01:26:53 PM PDT 24 10799879 ps
T944 /workspace/coverage/default/11.spi_device_pass_cmd_filtering.285021490 May 16 01:27:03 PM PDT 24 May 16 01:27:32 PM PDT 24 14041911156 ps
T945 /workspace/coverage/default/41.spi_device_flash_and_tpm.570121826 May 16 01:28:40 PM PDT 24 May 16 01:28:57 PM PDT 24 5688670632 ps
T946 /workspace/coverage/default/46.spi_device_tpm_all.901787319 May 16 01:29:07 PM PDT 24 May 16 01:30:01 PM PDT 24 9044473069 ps
T947 /workspace/coverage/default/31.spi_device_intercept.2740492164 May 16 01:28:05 PM PDT 24 May 16 01:28:38 PM PDT 24 4425977070 ps
T948 /workspace/coverage/default/8.spi_device_mem_parity.1836022411 May 16 01:26:49 PM PDT 24 May 16 01:27:06 PM PDT 24 14851929 ps
T949 /workspace/coverage/default/4.spi_device_flash_all.41622415 May 16 01:26:43 PM PDT 24 May 16 01:37:08 PM PDT 24 87750612562 ps
T950 /workspace/coverage/default/44.spi_device_intercept.458300930 May 16 01:28:49 PM PDT 24 May 16 01:29:05 PM PDT 24 662581166 ps
T951 /workspace/coverage/default/49.spi_device_mailbox.148265573 May 16 01:29:18 PM PDT 24 May 16 01:29:32 PM PDT 24 208422312 ps
T952 /workspace/coverage/default/42.spi_device_pass_cmd_filtering.1195133142 May 16 01:28:47 PM PDT 24 May 16 01:29:04 PM PDT 24 217843662 ps
T953 /workspace/coverage/default/10.spi_device_upload.2706657448 May 16 01:26:56 PM PDT 24 May 16 01:27:15 PM PDT 24 230572450 ps
T954 /workspace/coverage/default/44.spi_device_pass_cmd_filtering.4157440738 May 16 01:28:50 PM PDT 24 May 16 01:29:22 PM PDT 24 22123023662 ps
T955 /workspace/coverage/default/25.spi_device_cfg_cmd.2002955593 May 16 01:27:48 PM PDT 24 May 16 01:28:15 PM PDT 24 607043070 ps
T956 /workspace/coverage/default/31.spi_device_alert_test.3457277505 May 16 01:28:09 PM PDT 24 May 16 01:28:25 PM PDT 24 12829365 ps
T957 /workspace/coverage/default/32.spi_device_alert_test.1225019000 May 16 01:28:17 PM PDT 24 May 16 01:28:30 PM PDT 24 15037626 ps
T958 /workspace/coverage/default/41.spi_device_tpm_read_hw_reg.3789915805 May 16 01:28:41 PM PDT 24 May 16 01:29:11 PM PDT 24 22157146253 ps
T959 /workspace/coverage/default/8.spi_device_pass_addr_payload_swap.945010224 May 16 01:26:55 PM PDT 24 May 16 01:27:17 PM PDT 24 1041936477 ps
T960 /workspace/coverage/default/24.spi_device_alert_test.4183271484 May 16 01:27:48 PM PDT 24 May 16 01:28:06 PM PDT 24 21941018 ps
T961 /workspace/coverage/default/20.spi_device_alert_test.1277425145 May 16 01:27:25 PM PDT 24 May 16 01:27:46 PM PDT 24 24816564 ps
T962 /workspace/coverage/default/26.spi_device_upload.3509585180 May 16 01:27:49 PM PDT 24 May 16 01:28:19 PM PDT 24 2554634997 ps
T963 /workspace/coverage/default/34.spi_device_stress_all.3561498945 May 16 01:28:16 PM PDT 24 May 16 01:28:33 PM PDT 24 476070398 ps
T964 /workspace/coverage/default/3.spi_device_mem_parity.557981451 May 16 01:26:30 PM PDT 24 May 16 01:26:47 PM PDT 24 51974326 ps
T965 /workspace/coverage/default/10.spi_device_tpm_all.4187993864 May 16 01:26:59 PM PDT 24 May 16 01:28:08 PM PDT 24 35496482870 ps
T966 /workspace/coverage/default/15.spi_device_alert_test.709752461 May 16 01:27:12 PM PDT 24 May 16 01:27:35 PM PDT 24 32353054 ps
T967 /workspace/coverage/default/41.spi_device_tpm_rw.2763296508 May 16 01:28:42 PM PDT 24 May 16 01:28:55 PM PDT 24 100416020 ps
T968 /workspace/coverage/default/46.spi_device_flash_all.2941826556 May 16 01:29:07 PM PDT 24 May 16 01:31:00 PM PDT 24 23999898524 ps
T969 /workspace/coverage/default/22.spi_device_flash_and_tpm_min_idle.3682451206 May 16 01:27:37 PM PDT 24 May 16 01:29:04 PM PDT 24 8440681820 ps
T970 /workspace/coverage/default/36.spi_device_pass_addr_payload_swap.3932107017 May 16 01:28:27 PM PDT 24 May 16 01:28:53 PM PDT 24 4351686214 ps
T971 /workspace/coverage/default/14.spi_device_upload.2855780896 May 16 01:27:05 PM PDT 24 May 16 01:27:32 PM PDT 24 1718230465 ps
T972 /workspace/coverage/default/5.spi_device_upload.487798528 May 16 01:26:44 PM PDT 24 May 16 01:27:00 PM PDT 24 112345691 ps
T973 /workspace/coverage/default/5.spi_device_csb_read.928531073 May 16 01:26:49 PM PDT 24 May 16 01:27:05 PM PDT 24 23572019 ps
T974 /workspace/coverage/default/28.spi_device_flash_and_tpm.4263381588 May 16 01:27:54 PM PDT 24 May 16 01:29:55 PM PDT 24 5423853955 ps
T975 /workspace/coverage/cover_reg_top/29.spi_device_intr_test.3047697517 May 16 12:59:41 PM PDT 24 May 16 01:00:19 PM PDT 24 12689523 ps
T976 /workspace/coverage/cover_reg_top/34.spi_device_intr_test.3270397683 May 16 12:59:43 PM PDT 24 May 16 01:00:21 PM PDT 24 99838613 ps
T125 /workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.3589695591 May 16 12:59:10 PM PDT 24 May 16 12:59:54 PM PDT 24 3880695654 ps
T126 /workspace/coverage/cover_reg_top/5.spi_device_csr_rw.3906245420 May 16 12:59:24 PM PDT 24 May 16 01:00:03 PM PDT 24 147970913 ps
T98 /workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.912301895 May 16 12:59:09 PM PDT 24 May 16 12:59:52 PM PDT 24 1404114332 ps
T977 /workspace/coverage/cover_reg_top/21.spi_device_intr_test.3160841572 May 16 12:59:38 PM PDT 24 May 16 01:00:17 PM PDT 24 46326774 ps
T978 /workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.24794765 May 16 12:59:10 PM PDT 24 May 16 01:00:21 PM PDT 24 6954503847 ps
T99 /workspace/coverage/cover_reg_top/14.spi_device_tl_errors.4010302221 May 16 12:59:29 PM PDT 24 May 16 01:00:09 PM PDT 24 2702880706 ps
T162 /workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.3818876023 May 16 12:59:27 PM PDT 24 May 16 01:00:42 PM PDT 24 2988683574 ps
T86 /workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.503250199 May 16 12:59:12 PM PDT 24 May 16 12:59:47 PM PDT 24 149604945 ps
T100 /workspace/coverage/cover_reg_top/2.spi_device_tl_errors.451672464 May 16 12:59:12 PM PDT 24 May 16 12:59:49 PM PDT 24 491861088 ps
T151 /workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.470764026 May 16 12:59:30 PM PDT 24 May 16 01:00:10 PM PDT 24 352831565 ps
T101 /workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.3667841234 May 16 12:59:28 PM PDT 24 May 16 01:00:08 PM PDT 24 110453734 ps
T152 /workspace/coverage/cover_reg_top/4.spi_device_csr_rw.2093906069 May 16 12:59:16 PM PDT 24 May 16 12:59:55 PM PDT 24 147014694 ps
T102 /workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.3325449206 May 16 12:59:18 PM PDT 24 May 16 01:00:11 PM PDT 24 1096082251 ps
T105 /workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.980186220 May 16 12:59:29 PM PDT 24 May 16 01:00:07 PM PDT 24 130965914 ps
T119 /workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.2518078401 May 16 12:59:36 PM PDT 24 May 16 01:00:19 PM PDT 24 259350210 ps
T103 /workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.1733552123 May 16 12:59:12 PM PDT 24 May 16 12:59:59 PM PDT 24 935099208 ps
T979 /workspace/coverage/cover_reg_top/32.spi_device_intr_test.1776388973 May 16 12:59:43 PM PDT 24 May 16 01:00:21 PM PDT 24 14536050 ps
T980 /workspace/coverage/cover_reg_top/2.spi_device_intr_test.2425025251 May 16 12:59:10 PM PDT 24 May 16 12:59:45 PM PDT 24 54310691 ps
T981 /workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.2078882171 May 16 12:59:28 PM PDT 24 May 16 01:00:08 PM PDT 24 44802101 ps
T163 /workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.2365693892 May 16 12:59:26 PM PDT 24 May 16 01:00:07 PM PDT 24 227476390 ps
T127 /workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.2398622328 May 16 12:59:10 PM PDT 24 May 16 12:59:47 PM PDT 24 257155060 ps
T120 /workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.2118250947 May 16 12:59:28 PM PDT 24 May 16 01:00:26 PM PDT 24 6991730018 ps
T982 /workspace/coverage/cover_reg_top/39.spi_device_intr_test.570980764 May 16 12:59:34 PM PDT 24 May 16 01:00:14 PM PDT 24 19234113 ps
T983 /workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.2820475705 May 16 12:59:09 PM PDT 24 May 16 12:59:47 PM PDT 24 114767525 ps
T121 /workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.169639172 May 16 12:59:18 PM PDT 24 May 16 01:00:12 PM PDT 24 1183115036 ps
T984 /workspace/coverage/cover_reg_top/4.spi_device_intr_test.287963868 May 16 12:59:16 PM PDT 24 May 16 12:59:54 PM PDT 24 28759444 ps
T985 /workspace/coverage/cover_reg_top/17.spi_device_intr_test.3631671720 May 16 12:59:38 PM PDT 24 May 16 01:00:17 PM PDT 24 50065165 ps
T104 /workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.3651227659 May 16 12:59:09 PM PDT 24 May 16 12:59:46 PM PDT 24 383546896 ps
T986 /workspace/coverage/cover_reg_top/47.spi_device_intr_test.4198310698 May 16 12:59:39 PM PDT 24 May 16 01:00:18 PM PDT 24 11436742 ps
T987 /workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.685827533 May 16 12:59:19 PM PDT 24 May 16 12:59:58 PM PDT 24 2109409415 ps
T87 /workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.331917693 May 16 12:59:09 PM PDT 24 May 16 12:59:45 PM PDT 24 178067690 ps
T988 /workspace/coverage/cover_reg_top/1.spi_device_csr_rw.3296888378 May 16 12:59:08 PM PDT 24 May 16 12:59:45 PM PDT 24 20169412 ps
T128 /workspace/coverage/cover_reg_top/2.spi_device_csr_rw.4076951186 May 16 12:59:14 PM PDT 24 May 16 12:59:51 PM PDT 24 20750011 ps
T111 /workspace/coverage/cover_reg_top/11.spi_device_tl_errors.3868881168 May 16 12:59:27 PM PDT 24 May 16 01:00:06 PM PDT 24 62682901 ps
T122 /workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.3898342253 May 16 12:59:15 PM PDT 24 May 16 12:59:53 PM PDT 24 24295999 ps
T989 /workspace/coverage/cover_reg_top/13.spi_device_tl_errors.1705385399 May 16 12:59:26 PM PDT 24 May 16 01:00:05 PM PDT 24 21357790 ps
T113 /workspace/coverage/cover_reg_top/17.spi_device_tl_errors.2559590213 May 16 12:59:35 PM PDT 24 May 16 01:00:17 PM PDT 24 171828205 ps
T990 /workspace/coverage/cover_reg_top/15.spi_device_intr_test.4288280382 May 16 12:59:30 PM PDT 24 May 16 01:00:08 PM PDT 24 39239299 ps
T129 /workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.2787563645 May 16 12:59:27 PM PDT 24 May 16 01:00:26 PM PDT 24 1380750141 ps
T115 /workspace/coverage/cover_reg_top/19.spi_device_tl_errors.4179802402 May 16 12:59:36 PM PDT 24 May 16 01:00:18 PM PDT 24 174719286 ps
T88 /workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.668848814 May 16 12:59:27 PM PDT 24 May 16 01:00:06 PM PDT 24 171312613 ps
T991 /workspace/coverage/cover_reg_top/7.spi_device_tl_errors.2443274435 May 16 12:59:15 PM PDT 24 May 16 12:59:54 PM PDT 24 78098114 ps
T992 /workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.775027239 May 16 12:59:27 PM PDT 24 May 16 01:00:07 PM PDT 24 159532649 ps
T130 /workspace/coverage/cover_reg_top/10.spi_device_csr_rw.1623093995 May 16 12:59:28 PM PDT 24 May 16 01:00:07 PM PDT 24 248910442 ps
T993 /workspace/coverage/cover_reg_top/3.spi_device_csr_rw.3814533733 May 16 12:59:17 PM PDT 24 May 16 12:59:54 PM PDT 24 39099157 ps
T252 /workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.3697797124 May 16 12:59:40 PM PDT 24 May 16 01:00:31 PM PDT 24 1123361956 ps
T131 /workspace/coverage/cover_reg_top/16.spi_device_csr_rw.4253815791 May 16 12:59:29 PM PDT 24 May 16 01:00:09 PM PDT 24 54080397 ps
T132 /workspace/coverage/cover_reg_top/8.spi_device_csr_rw.588304710 May 16 12:59:26 PM PDT 24 May 16 01:00:06 PM PDT 24 53201617 ps
T133 /workspace/coverage/cover_reg_top/6.spi_device_csr_rw.3429876153 May 16 12:59:18 PM PDT 24 May 16 12:59:55 PM PDT 24 31604604 ps
T994 /workspace/coverage/cover_reg_top/33.spi_device_intr_test.3632240075 May 16 12:59:37 PM PDT 24 May 16 01:00:18 PM PDT 24 14996188 ps
T995 /workspace/coverage/cover_reg_top/14.spi_device_intr_test.3400167387 May 16 12:59:28 PM PDT 24 May 16 01:00:06 PM PDT 24 35223724 ps
T996 /workspace/coverage/cover_reg_top/19.spi_device_intr_test.1341655184 May 16 12:59:41 PM PDT 24 May 16 01:00:19 PM PDT 24 22366911 ps
T997 /workspace/coverage/cover_reg_top/1.spi_device_intr_test.3394640149 May 16 12:59:07 PM PDT 24 May 16 12:59:44 PM PDT 24 17925256 ps
T998 /workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.527265829 May 16 12:59:22 PM PDT 24 May 16 01:00:00 PM PDT 24 196211826 ps
T164 /workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.3964965224 May 16 12:59:11 PM PDT 24 May 16 12:59:49 PM PDT 24 922844841 ps
T999 /workspace/coverage/cover_reg_top/22.spi_device_intr_test.2693958036 May 16 12:59:40 PM PDT 24 May 16 01:00:19 PM PDT 24 52538219 ps
T134 /workspace/coverage/cover_reg_top/17.spi_device_csr_rw.3765875553 May 16 12:59:37 PM PDT 24 May 16 01:00:18 PM PDT 24 137132568 ps
T1000 /workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.4000285481 May 16 12:59:34 PM PDT 24 May 16 01:00:14 PM PDT 24 70160348 ps
T1001 /workspace/coverage/cover_reg_top/23.spi_device_intr_test.4132777014 May 16 12:59:35 PM PDT 24 May 16 01:00:15 PM PDT 24 35782831 ps
T1002 /workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.3444346536 May 16 12:59:34 PM PDT 24 May 16 01:00:15 PM PDT 24 50508413 ps
T253 /workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.3629552922 May 16 12:59:26 PM PDT 24 May 16 01:00:17 PM PDT 24 819354680 ps
T1003 /workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.2628289974 May 16 12:59:28 PM PDT 24 May 16 01:00:08 PM PDT 24 215836559 ps
T116 /workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.1368408593 May 16 12:59:33 PM PDT 24 May 16 01:00:14 PM PDT 24 53185462 ps
T89 /workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.3849174676 May 16 12:59:11 PM PDT 24 May 16 12:59:46 PM PDT 24 74050983 ps
T1004 /workspace/coverage/cover_reg_top/42.spi_device_intr_test.3580056396 May 16 12:59:35 PM PDT 24 May 16 01:00:16 PM PDT 24 56124411 ps
T1005 /workspace/coverage/cover_reg_top/26.spi_device_intr_test.101558444 May 16 12:59:37 PM PDT 24 May 16 01:00:17 PM PDT 24 35195355 ps
T1006 /workspace/coverage/cover_reg_top/20.spi_device_intr_test.3234776437 May 16 12:59:36 PM PDT 24 May 16 01:00:16 PM PDT 24 32992548 ps
T1007 /workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.3690720973 May 16 12:59:36 PM PDT 24 May 16 01:00:19 PM PDT 24 213591008 ps
T1008 /workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.3400472548 May 16 12:59:18 PM PDT 24 May 16 12:59:58 PM PDT 24 228910497 ps
T165 /workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.1521776044 May 16 12:59:26 PM PDT 24 May 16 01:00:18 PM PDT 24 625601185 ps
T1009 /workspace/coverage/cover_reg_top/25.spi_device_intr_test.2162343863 May 16 12:59:36 PM PDT 24 May 16 01:00:16 PM PDT 24 13293720 ps
T1010 /workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.910168835 May 16 12:59:30 PM PDT 24 May 16 01:00:10 PM PDT 24 85946267 ps
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