Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.95 98.35 94.20 98.61 89.36 97.14 95.81 98.17


Total tests in report: 1101
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
80.67 80.67 97.55 97.55 88.92 88.92 69.35 69.35 86.67 86.67 96.01 96.01 84.83 84.83 41.39 41.39 /workspace/coverage/default/43.spi_device_flash_and_tpm.504187670
86.80 6.13 97.65 0.10 91.17 2.25 89.88 20.54 91.11 4.44 96.19 0.19 84.97 0.14 56.63 15.23 /workspace/coverage/default/30.spi_device_stress_all.1899188393
89.55 2.75 98.05 0.40 92.20 1.04 91.87 1.98 93.33 2.22 96.63 0.44 84.97 0.00 69.78 13.16 /workspace/coverage/default/39.spi_device_stress_all.587118985
91.10 1.56 98.05 0.00 92.31 0.11 92.26 0.40 93.33 0.00 96.67 0.03 93.79 8.82 71.32 1.53 /workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.3667841234
92.12 1.02 98.08 0.03 92.40 0.09 92.26 0.00 93.33 0.00 96.75 0.08 93.79 0.00 78.24 6.92 /workspace/coverage/default/26.spi_device_stress_all.3073601731
92.70 0.58 98.08 0.00 92.41 0.01 92.26 0.00 93.33 0.00 96.75 0.00 93.93 0.14 82.15 3.91 /workspace/coverage/default/27.spi_device_stress_all.2396192756
93.27 0.57 98.09 0.01 92.41 0.00 96.23 3.97 93.33 0.00 96.75 0.00 93.93 0.00 82.15 0.00 /workspace/coverage/default/0.spi_device_ram_cfg.94580972
93.68 0.41 98.09 0.00 92.41 0.00 96.23 0.00 93.33 0.00 96.75 0.00 93.93 0.00 85.01 2.87 /workspace/coverage/default/11.spi_device_flash_and_tpm.2241930852
94.03 0.35 98.12 0.03 92.44 0.02 96.23 0.00 93.33 0.00 96.80 0.05 93.93 0.00 87.39 2.37 /workspace/coverage/default/43.spi_device_stress_all.3322152004
94.35 0.32 98.13 0.01 92.48 0.04 98.02 1.79 93.33 0.00 96.82 0.02 94.08 0.14 87.64 0.25 /workspace/coverage/default/0.spi_device_sec_cm.1014444346
94.61 0.25 98.13 0.00 92.48 0.00 98.02 0.00 93.33 0.00 96.82 0.00 94.08 0.00 89.42 1.78 /workspace/coverage/default/1.spi_device_stress_all.226619893
94.86 0.25 98.24 0.11 93.01 0.54 98.02 0.00 93.33 0.00 96.97 0.15 94.65 0.58 89.76 0.35 /workspace/coverage/default/49.spi_device_flash_mode.959514009
95.06 0.20 98.24 0.00 93.01 0.00 98.02 0.00 93.33 0.00 96.97 0.00 94.65 0.00 91.20 1.43 /workspace/coverage/default/14.spi_device_flash_and_tpm_min_idle.479949267
95.23 0.17 98.25 0.01 93.12 0.11 98.02 0.00 93.33 0.00 96.99 0.02 94.65 0.00 92.24 1.04 /workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.2118250947
95.37 0.14 98.25 0.00 93.12 0.00 98.02 0.00 93.33 0.00 96.99 0.00 95.66 1.01 92.24 0.00 /workspace/coverage/cover_reg_top/5.spi_device_csr_rw.3906245420
95.51 0.14 98.25 0.00 93.81 0.69 98.02 0.00 93.33 0.00 96.99 0.00 95.66 0.00 92.53 0.30 /workspace/coverage/cover_reg_top/14.spi_device_tl_errors.4010302221
95.65 0.13 98.25 0.00 93.81 0.00 98.02 0.00 93.33 0.00 96.99 0.00 95.66 0.00 93.47 0.94 /workspace/coverage/default/21.spi_device_flash_and_tpm.1297710963
95.76 0.11 98.25 0.00 93.81 0.00 98.02 0.00 93.33 0.00 96.99 0.00 95.66 0.00 94.26 0.79 /workspace/coverage/default/0.spi_device_flash_and_tpm.4193077261
95.85 0.09 98.31 0.06 93.90 0.09 98.41 0.40 93.33 0.00 97.07 0.08 95.66 0.00 94.26 0.00 /workspace/coverage/default/0.spi_device_mem_parity.2651697440
95.93 0.08 98.31 0.00 93.90 0.00 98.41 0.00 93.33 0.00 97.07 0.00 95.66 0.00 94.81 0.54 /workspace/coverage/default/38.spi_device_flash_and_tpm.2913983153
96.01 0.08 98.31 0.00 93.90 0.00 98.41 0.00 93.33 0.00 97.07 0.00 95.66 0.00 95.35 0.54 /workspace/coverage/default/9.spi_device_stress_all.1958632625
96.06 0.06 98.31 0.00 93.90 0.00 98.41 0.00 93.33 0.00 97.07 0.00 95.81 0.14 95.60 0.25 /workspace/coverage/default/10.spi_device_stress_all.4076457911
96.11 0.05 98.31 0.00 93.90 0.00 98.41 0.00 93.33 0.00 97.07 0.00 95.81 0.00 95.94 0.35 /workspace/coverage/default/14.spi_device_flash_and_tpm.170533659
96.16 0.05 98.31 0.00 93.90 0.00 98.41 0.00 93.33 0.00 97.07 0.00 95.81 0.00 96.29 0.35 /workspace/coverage/default/24.spi_device_stress_all.1525824011
96.20 0.04 98.33 0.03 93.94 0.04 98.61 0.20 93.33 0.00 97.07 0.00 95.81 0.00 96.29 0.00 /workspace/coverage/default/22.spi_device_alert_test.500517139
96.23 0.04 98.33 0.00 93.94 0.00 98.61 0.00 93.33 0.00 97.07 0.00 95.81 0.00 96.54 0.25 /workspace/coverage/default/11.spi_device_stress_all.252420952
96.26 0.03 98.33 0.00 94.07 0.14 98.61 0.00 93.33 0.00 97.07 0.00 95.81 0.00 96.59 0.05 /workspace/coverage/cover_reg_top/15.spi_device_tl_errors.125069507
96.28 0.02 98.33 0.00 94.07 0.00 98.61 0.00 93.33 0.00 97.07 0.00 95.81 0.00 96.74 0.15 /workspace/coverage/default/13.spi_device_flash_and_tpm.2723500175
96.30 0.02 98.33 0.00 94.07 0.00 98.61 0.00 93.33 0.00 97.07 0.00 95.81 0.00 96.88 0.15 /workspace/coverage/default/39.spi_device_flash_all.2108121561
96.32 0.02 98.34 0.01 94.07 0.00 98.61 0.00 93.33 0.00 97.09 0.02 95.81 0.00 96.98 0.10 /workspace/coverage/default/14.spi_device_intercept.390728555
96.34 0.02 98.35 0.01 94.07 0.00 98.61 0.00 93.33 0.00 97.11 0.02 95.81 0.00 97.08 0.10 /workspace/coverage/default/6.spi_device_tpm_all.2939430257
96.35 0.01 98.35 0.00 94.07 0.00 98.61 0.00 93.33 0.00 97.11 0.00 95.81 0.00 97.18 0.10 /workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.1733552123
96.37 0.01 98.35 0.00 94.07 0.00 98.61 0.00 93.33 0.00 97.11 0.00 95.81 0.00 97.28 0.10 /workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.3629552922
96.38 0.01 98.35 0.00 94.07 0.00 98.61 0.00 93.33 0.00 97.11 0.00 95.81 0.00 97.38 0.10 /workspace/coverage/default/13.spi_device_stress_all.3158627363
96.39 0.01 98.35 0.00 94.07 0.00 98.61 0.00 93.33 0.00 97.11 0.00 95.81 0.00 97.48 0.10 /workspace/coverage/default/15.spi_device_flash_mode.3672177985
96.41 0.01 98.35 0.00 94.07 0.00 98.61 0.00 93.33 0.00 97.11 0.00 95.81 0.00 97.58 0.10 /workspace/coverage/default/17.spi_device_flash_and_tpm.3754553670
96.42 0.01 98.35 0.00 94.07 0.00 98.61 0.00 93.33 0.00 97.11 0.00 95.81 0.00 97.68 0.10 /workspace/coverage/default/17.spi_device_flash_and_tpm_min_idle.1362810851
96.44 0.01 98.35 0.00 94.07 0.00 98.61 0.00 93.33 0.00 97.11 0.00 95.81 0.00 97.77 0.10 /workspace/coverage/default/22.spi_device_flash_all.2546970514
96.45 0.01 98.35 0.00 94.07 0.00 98.61 0.00 93.33 0.00 97.11 0.00 95.81 0.00 97.87 0.10 /workspace/coverage/default/40.spi_device_flash_and_tpm_min_idle.4059096437
96.47 0.01 98.35 0.00 94.07 0.00 98.61 0.00 93.33 0.00 97.11 0.00 95.81 0.00 97.97 0.10 /workspace/coverage/default/42.spi_device_flash_all.2914830212
96.48 0.01 98.35 0.00 94.12 0.05 98.61 0.00 93.33 0.00 97.14 0.03 95.81 0.00 97.97 0.00 /workspace/coverage/default/0.spi_device_intercept.991794504
96.48 0.01 98.35 0.00 94.12 0.00 98.61 0.00 93.33 0.00 97.14 0.00 95.81 0.00 98.02 0.05 /workspace/coverage/default/10.spi_device_flash_all.1633491363
96.49 0.01 98.35 0.00 94.12 0.00 98.61 0.00 93.33 0.00 97.14 0.00 95.81 0.00 98.07 0.05 /workspace/coverage/default/16.spi_device_flash_and_tpm_min_idle.524498383
96.50 0.01 98.35 0.00 94.12 0.00 98.61 0.00 93.33 0.00 97.14 0.00 95.81 0.00 98.12 0.05 /workspace/coverage/default/17.spi_device_stress_all.50662855
96.51 0.01 98.35 0.00 94.12 0.00 98.61 0.00 93.33 0.00 97.14 0.00 95.81 0.00 98.17 0.05 /workspace/coverage/default/19.spi_device_flash_all.878529114
96.51 0.01 98.35 0.00 94.16 0.04 98.61 0.00 93.33 0.00 97.14 0.00 95.81 0.00 98.17 0.00 /workspace/coverage/cover_reg_top/17.spi_device_tl_errors.2559590213
96.51 0.01 98.35 0.00 94.19 0.02 98.61 0.00 93.33 0.00 97.14 0.00 95.81 0.00 98.17 0.00 /workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.3849174676
96.52 0.01 98.35 0.00 94.20 0.01 98.61 0.00 93.33 0.00 97.14 0.00 95.81 0.00 98.17 0.00 /workspace/coverage/default/23.spi_device_flash_and_tpm.1920682634

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.3339033023
/workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.538484610
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.3704343318
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.4212194888
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.3935423030
/workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.2069097758
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.2534640379
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.1342629758
/workspace/coverage/cover_reg_top/0.spi_device_tl_errors.2914851623
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.3630419602
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.24794765
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.503250199
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.3651227659
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.3296888378
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.3394640149
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.2398622328
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.2413445465
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.3964965224
/workspace/coverage/cover_reg_top/1.spi_device_tl_errors.512688277
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.912301895
/workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.1820503928
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.1623093995
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.503940461
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.470764026
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.1401295229
/workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.1843437075
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.1368408593
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.3800652661
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.3776381671
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.3755736759
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.3868881168
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.980186220
/workspace/coverage/cover_reg_top/12.spi_device_csr_rw.1368673662
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.3690492214
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.860740205
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.509554281
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.1521776044
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.2628289974
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.3303350675
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.2334820349
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.2339065769
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.1705385399
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.1539237144
/workspace/coverage/cover_reg_top/14.spi_device_csr_rw.697569030
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.3400167387
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.2078882171
/workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.910168835
/workspace/coverage/cover_reg_top/15.spi_device_csr_rw.3219899352
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.4288280382
/workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.775027239
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.1862121118
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.2518078401
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.4253815791
/workspace/coverage/cover_reg_top/16.spi_device_intr_test.2731543694
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.4139669453
/workspace/coverage/cover_reg_top/16.spi_device_tl_errors.339443446
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.2719538325
/workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.3885652453
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.3765875553
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.3631671720
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.4000285481
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.75097509
/workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.3444346536
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.1968524671
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.428055801
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.2786233851
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.382132542
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.3697797124
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.3690720973
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.2560146176
/workspace/coverage/cover_reg_top/19.spi_device_intr_test.1341655184
/workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.2266759425
/workspace/coverage/cover_reg_top/19.spi_device_tl_errors.4179802402
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.2560110730
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.3589695591
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.85471129
/workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.331917693
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.527265829
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.4076951186
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.2425025251
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.1732512844
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.2897700463
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.2820475705
/workspace/coverage/cover_reg_top/2.spi_device_tl_errors.451672464
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.1653597173
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.3234776437
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.3160841572
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.2693958036
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.4132777014
/workspace/coverage/cover_reg_top/24.spi_device_intr_test.3853518184
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.2162343863
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.101558444
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.571754476
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.3499143867
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.3047697517
/workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.1598133063
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.2802688077
/workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.668848814
/workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.473017889
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.3814533733
/workspace/coverage/cover_reg_top/3.spi_device_intr_test.3622704044
/workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.4137489663
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.4121531745
/workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.3400472548
/workspace/coverage/cover_reg_top/3.spi_device_tl_errors.3889488995
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.2472322208
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.1958447259
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.4137565474
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.1776388973
/workspace/coverage/cover_reg_top/33.spi_device_intr_test.3632240075
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.3270397683
/workspace/coverage/cover_reg_top/35.spi_device_intr_test.4145987344
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.4159834282
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.30366804
/workspace/coverage/cover_reg_top/38.spi_device_intr_test.3332667800
/workspace/coverage/cover_reg_top/39.spi_device_intr_test.570980764
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.2787563645
/workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.3818876023
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.1966918673
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.3898342253
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.2093906069
/workspace/coverage/cover_reg_top/4.spi_device_intr_test.287963868
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.4224032561
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.3990019395
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.2157458027
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.2299545991
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.1987002003
/workspace/coverage/cover_reg_top/40.spi_device_intr_test.4216400588
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.801853297
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.3580056396
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.47065801
/workspace/coverage/cover_reg_top/44.spi_device_intr_test.460192303
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.3233776043
/workspace/coverage/cover_reg_top/46.spi_device_intr_test.573120397
/workspace/coverage/cover_reg_top/47.spi_device_intr_test.4198310698
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.2818602179
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.2992730447
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.260999182
/workspace/coverage/cover_reg_top/5.spi_device_intr_test.1080342502
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.323943546
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/workspace/coverage/default/9.spi_device_read_buffer_direct.396064721
/workspace/coverage/default/9.spi_device_tpm_all.627142814
/workspace/coverage/default/9.spi_device_tpm_read_hw_reg.2098488123
/workspace/coverage/default/9.spi_device_tpm_rw.3132248953
/workspace/coverage/default/9.spi_device_tpm_sts_read.1169413415
/workspace/coverage/default/9.spi_device_upload.1083344669



Total test records in report: 1101
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/18.spi_device_tpm_sts_read.34291061 May 16 01:27:13 PM PDT 24 May 16 01:27:37 PM PDT 24 118612343 ps
T2 /workspace/coverage/default/46.spi_device_read_buffer_direct.3768401813 May 16 01:29:06 PM PDT 24 May 16 01:29:24 PM PDT 24 722269770 ps
T3 /workspace/coverage/default/7.spi_device_upload.3291574530 May 16 01:26:59 PM PDT 24 May 16 01:27:31 PM PDT 24 741765034 ps
T4 /workspace/coverage/default/1.spi_device_tpm_all.1255228710 May 16 01:26:16 PM PDT 24 May 16 01:26:33 PM PDT 24 60464468 ps
T5 /workspace/coverage/default/0.spi_device_mem_parity.2651697440 May 16 01:26:21 PM PDT 24 May 16 01:26:39 PM PDT 24 25049571 ps
T6 /workspace/coverage/default/8.spi_device_mailbox.1909848625 May 16 01:26:49 PM PDT 24 May 16 01:27:12 PM PDT 24 3588633609 ps
T7 /workspace/coverage/default/27.spi_device_tpm_all.959458273 May 16 01:27:49 PM PDT 24 May 16 01:28:07 PM PDT 24 23613618 ps
T8 /workspace/coverage/default/43.spi_device_flash_and_tpm.504187670 May 16 01:28:51 PM PDT 24 May 16 01:34:46 PM PDT 24 30283427677 ps
T9 /workspace/coverage/default/14.spi_device_intercept.390728555 May 16 01:27:04 PM PDT 24 May 16 01:27:34 PM PDT 24 781139055 ps
T10 /workspace/coverage/default/29.spi_device_tpm_all.3256049455 May 16 01:28:00 PM PDT 24 May 16 01:28:43 PM PDT 24 28758233267 ps
T11 /workspace/coverage/default/22.spi_device_pass_cmd_filtering.3685255864 May 16 01:27:37 PM PDT 24 May 16 01:28:16 PM PDT 24 10190024697 ps
T12 /workspace/coverage/default/26.spi_device_flash_mode.27795129 May 16 01:27:46 PM PDT 24 May 16 01:28:26 PM PDT 24 1278479888 ps
T13 /workspace/coverage/default/34.spi_device_read_buffer_direct.1171709278 May 16 01:28:19 PM PDT 24 May 16 01:28:41 PM PDT 24 467663472 ps
T14 /workspace/coverage/default/6.spi_device_intercept.2647084827 May 16 01:26:48 PM PDT 24 May 16 01:27:07 PM PDT 24 103036024 ps
T15 /workspace/coverage/default/40.spi_device_intercept.379052962 May 16 01:28:39 PM PDT 24 May 16 01:28:56 PM PDT 24 551925822 ps
T16 /workspace/coverage/default/30.spi_device_stress_all.1899188393 May 16 01:28:05 PM PDT 24 May 16 01:34:10 PM PDT 24 70959262691 ps
T36 /workspace/coverage/default/49.spi_device_pass_cmd_filtering.161979385 May 16 01:29:19 PM PDT 24 May 16 01:29:37 PM PDT 24 5579963548 ps
T17 /workspace/coverage/default/48.spi_device_csb_read.352267555 May 16 01:29:13 PM PDT 24 May 16 01:29:24 PM PDT 24 59130737 ps
T18 /workspace/coverage/default/11.spi_device_flash_and_tpm.2241930852 May 16 01:27:01 PM PDT 24 May 16 01:31:29 PM PDT 24 76455094623 ps
T109 /workspace/coverage/default/37.spi_device_cfg_cmd.2507026515 May 16 01:28:29 PM PDT 24 May 16 01:28:44 PM PDT 24 59251847 ps
T106 /workspace/coverage/default/41.spi_device_intercept.3856062344 May 16 01:28:40 PM PDT 24 May 16 01:28:58 PM PDT 24 1008484699 ps
T19 /workspace/coverage/default/19.spi_device_tpm_read_hw_reg.2170007996 May 16 01:27:16 PM PDT 24 May 16 01:27:47 PM PDT 24 12165869626 ps
T80 /workspace/coverage/default/0.spi_device_tpm_rw.2972136401 May 16 01:26:24 PM PDT 24 May 16 01:26:42 PM PDT 24 12712500 ps
T107 /workspace/coverage/default/44.spi_device_mailbox.3295469990 May 16 01:28:55 PM PDT 24 May 16 01:29:09 PM PDT 24 293715626 ps
T38 /workspace/coverage/default/39.spi_device_read_buffer_direct.867351870 May 16 01:28:39 PM PDT 24 May 16 01:29:00 PM PDT 24 3330199879 ps
T20 /workspace/coverage/default/42.spi_device_csb_read.479193272 May 16 01:28:46 PM PDT 24 May 16 01:28:59 PM PDT 24 18427680 ps
T21 /workspace/coverage/default/34.spi_device_flash_and_tpm.2161318567 May 16 01:28:16 PM PDT 24 May 16 01:29:02 PM PDT 24 6621702359 ps
T22 /workspace/coverage/default/38.spi_device_csb_read.2794984859 May 16 01:28:29 PM PDT 24 May 16 01:28:42 PM PDT 24 25570060 ps
T58 /workspace/coverage/default/29.spi_device_alert_test.2953575448 May 16 01:28:08 PM PDT 24 May 16 01:28:25 PM PDT 24 23951715 ps
T27 /workspace/coverage/default/12.spi_device_flash_and_tpm_min_idle.2067547913 May 16 01:27:07 PM PDT 24 May 16 01:29:18 PM PDT 24 19813243083 ps
T123 /workspace/coverage/default/2.spi_device_intercept.237940154 May 16 01:26:33 PM PDT 24 May 16 01:26:51 PM PDT 24 120809244 ps
T124 /workspace/coverage/default/11.spi_device_intercept.1825541310 May 16 01:27:02 PM PDT 24 May 16 01:27:27 PM PDT 24 268831309 ps
T28 /workspace/coverage/default/17.spi_device_flash_and_tpm_min_idle.1362810851 May 16 01:27:16 PM PDT 24 May 16 01:33:36 PM PDT 24 39622984653 ps
T110 /workspace/coverage/default/33.spi_device_pass_addr_payload_swap.3122046943 May 16 01:28:15 PM PDT 24 May 16 01:28:38 PM PDT 24 3217583599 ps
T307 /workspace/coverage/default/39.spi_device_csb_read.2919218892 May 16 01:28:34 PM PDT 24 May 16 01:28:48 PM PDT 24 17280632 ps
T308 /workspace/coverage/default/18.spi_device_pass_cmd_filtering.1823637824 May 16 01:27:16 PM PDT 24 May 16 01:27:41 PM PDT 24 218933594 ps
T42 /workspace/coverage/default/28.spi_device_tpm_sts_read.1525626177 May 16 01:27:56 PM PDT 24 May 16 01:28:13 PM PDT 24 56911125 ps
T25 /workspace/coverage/default/9.spi_device_mem_parity.3448097008 May 16 01:26:47 PM PDT 24 May 16 01:27:04 PM PDT 24 17866021 ps
T93 /workspace/coverage/default/44.spi_device_tpm_read_hw_reg.4030413514 May 16 01:28:52 PM PDT 24 May 16 01:29:19 PM PDT 24 4623463957 ps
T26 /workspace/coverage/default/2.spi_device_mem_parity.2126100849 May 16 01:26:26 PM PDT 24 May 16 01:26:44 PM PDT 24 146341947 ps
T43 /workspace/coverage/default/41.spi_device_upload.2624603113 May 16 01:28:41 PM PDT 24 May 16 01:29:03 PM PDT 24 6631321144 ps
T37 /workspace/coverage/default/43.spi_device_flash_and_tpm_min_idle.2023092958 May 16 01:28:54 PM PDT 24 May 16 01:29:45 PM PDT 24 6915142672 ps
T59 /workspace/coverage/default/8.spi_device_alert_test.3481325440 May 16 01:26:57 PM PDT 24 May 16 01:27:16 PM PDT 24 15072806 ps
T61 /workspace/coverage/default/13.spi_device_alert_test.3203293922 May 16 01:27:04 PM PDT 24 May 16 01:27:27 PM PDT 24 18038754 ps
T60 /workspace/coverage/default/46.spi_device_alert_test.1024212889 May 16 01:29:06 PM PDT 24 May 16 01:29:17 PM PDT 24 40898302 ps
T198 /workspace/coverage/default/38.spi_device_pass_cmd_filtering.2623459006 May 16 01:28:32 PM PDT 24 May 16 01:28:53 PM PDT 24 2540370641 ps
T39 /workspace/coverage/default/12.spi_device_flash_and_tpm.1752393145 May 16 01:27:01 PM PDT 24 May 16 01:28:29 PM PDT 24 40673229031 ps
T40 /workspace/coverage/default/4.spi_device_flash_and_tpm.3954245419 May 16 01:26:50 PM PDT 24 May 16 01:27:09 PM PDT 24 1615184160 ps
T154 /workspace/coverage/default/49.spi_device_flash_mode.959514009 May 16 01:29:17 PM PDT 24 May 16 01:29:39 PM PDT 24 231330779 ps
T108 /workspace/coverage/default/42.spi_device_mailbox.2843951109 May 16 01:28:42 PM PDT 24 May 16 01:30:33 PM PDT 24 13162923208 ps
T309 /workspace/coverage/default/40.spi_device_tpm_sts_read.1996865224 May 16 01:28:38 PM PDT 24 May 16 01:28:52 PM PDT 24 15125388 ps
T310 /workspace/coverage/default/3.spi_device_mailbox.3121759373 May 16 01:26:33 PM PDT 24 May 16 01:26:50 PM PDT 24 98598123 ps
T41 /workspace/coverage/default/48.spi_device_flash_and_tpm_min_idle.3074626320 May 16 01:29:21 PM PDT 24 May 16 01:34:40 PM PDT 24 63523266346 ps
T305 /workspace/coverage/default/39.spi_device_tpm_rw.2557753650 May 16 01:28:32 PM PDT 24 May 16 01:28:45 PM PDT 24 111468441 ps
T29 /workspace/coverage/default/14.spi_device_flash_and_tpm_min_idle.479949267 May 16 01:27:05 PM PDT 24 May 16 01:39:55 PM PDT 24 420012249944 ps
T62 /workspace/coverage/default/13.spi_device_stress_all.3158627363 May 16 01:27:08 PM PDT 24 May 16 01:27:31 PM PDT 24 107029445 ps
T311 /workspace/coverage/default/49.spi_device_alert_test.3731931378 May 16 01:29:18 PM PDT 24 May 16 01:29:31 PM PDT 24 15252731 ps
T155 /workspace/coverage/default/14.spi_device_read_buffer_direct.3532894789 May 16 01:27:02 PM PDT 24 May 16 01:27:33 PM PDT 24 2174823733 ps
T94 /workspace/coverage/default/29.spi_device_tpm_sts_read.4096758495 May 16 01:27:55 PM PDT 24 May 16 01:28:13 PM PDT 24 63928510 ps
T30 /workspace/coverage/default/21.spi_device_flash_and_tpm.1297710963 May 16 01:27:25 PM PDT 24 May 16 01:34:40 PM PDT 24 476317510140 ps
T181 /workspace/coverage/default/20.spi_device_pass_cmd_filtering.2923669460 May 16 01:27:22 PM PDT 24 May 16 01:27:50 PM PDT 24 1129394031 ps
T156 /workspace/coverage/default/36.spi_device_read_buffer_direct.2658297817 May 16 01:28:29 PM PDT 24 May 16 01:28:46 PM PDT 24 379503066 ps
T31 /workspace/coverage/default/46.spi_device_flash_and_tpm_min_idle.1662736286 May 16 01:29:09 PM PDT 24 May 16 01:33:46 PM PDT 24 156571622675 ps
T200 /workspace/coverage/default/36.spi_device_pass_cmd_filtering.1416036085 May 16 01:28:32 PM PDT 24 May 16 01:28:50 PM PDT 24 5049765523 ps
T312 /workspace/coverage/default/41.spi_device_alert_test.2140822114 May 16 01:28:40 PM PDT 24 May 16 01:28:54 PM PDT 24 33311117 ps
T298 /workspace/coverage/default/13.spi_device_flash_and_tpm_min_idle.3446009347 May 16 01:27:03 PM PDT 24 May 16 01:27:43 PM PDT 24 1840926160 ps
T188 /workspace/coverage/default/48.spi_device_upload.360707033 May 16 01:29:06 PM PDT 24 May 16 01:29:25 PM PDT 24 716626850 ps
T302 /workspace/coverage/default/12.spi_device_tpm_all.1855189572 May 16 01:27:00 PM PDT 24 May 16 01:27:24 PM PDT 24 3119885582 ps
T177 /workspace/coverage/default/24.spi_device_flash_and_tpm_min_idle.4240107852 May 16 01:27:47 PM PDT 24 May 16 01:34:21 PM PDT 24 86431106689 ps
T313 /workspace/coverage/default/47.spi_device_pass_cmd_filtering.1666957590 May 16 01:29:06 PM PDT 24 May 16 01:29:18 PM PDT 24 55969307 ps
T314 /workspace/coverage/default/47.spi_device_tpm_rw.2755085960 May 16 01:29:06 PM PDT 24 May 16 01:29:17 PM PDT 24 75048412 ps
T157 /workspace/coverage/default/43.spi_device_read_buffer_direct.2435460523 May 16 01:28:49 PM PDT 24 May 16 01:29:05 PM PDT 24 82474278 ps
T158 /workspace/coverage/default/9.spi_device_read_buffer_direct.396064721 May 16 01:26:57 PM PDT 24 May 16 01:27:22 PM PDT 24 1125506843 ps
T207 /workspace/coverage/default/22.spi_device_upload.2491090463 May 16 01:27:40 PM PDT 24 May 16 01:28:14 PM PDT 24 19119489561 ps
T315 /workspace/coverage/default/30.spi_device_alert_test.3199443441 May 16 01:28:06 PM PDT 24 May 16 01:28:23 PM PDT 24 12397575 ps
T316 /workspace/coverage/default/6.spi_device_tpm_sts_read.195305608 May 16 01:26:39 PM PDT 24 May 16 01:26:55 PM PDT 24 314246839 ps
T317 /workspace/coverage/default/42.spi_device_tpm_sts_read.1707838542 May 16 01:28:45 PM PDT 24 May 16 01:28:58 PM PDT 24 106743454 ps
T32 /workspace/coverage/default/14.spi_device_flash_and_tpm.170533659 May 16 01:27:11 PM PDT 24 May 16 01:31:56 PM PDT 24 86787014007 ps
T306 /workspace/coverage/default/3.spi_device_tpm_read_hw_reg.1760750338 May 16 01:26:32 PM PDT 24 May 16 01:26:52 PM PDT 24 2072664534 ps
T318 /workspace/coverage/default/15.spi_device_mem_parity.2248802306 May 16 01:27:03 PM PDT 24 May 16 01:27:26 PM PDT 24 30249429 ps
T33 /workspace/coverage/default/37.spi_device_flash_all.3742507539 May 16 01:28:32 PM PDT 24 May 16 01:33:18 PM PDT 24 37738560041 ps
T34 /workspace/coverage/default/17.spi_device_stress_all.50662855 May 16 01:27:13 PM PDT 24 May 16 01:35:30 PM PDT 24 42980989347 ps
T319 /workspace/coverage/default/41.spi_device_csb_read.117449472 May 16 01:28:47 PM PDT 24 May 16 01:28:59 PM PDT 24 18516657 ps
T303 /workspace/coverage/default/43.spi_device_tpm_all.3268550438 May 16 01:28:54 PM PDT 24 May 16 01:29:51 PM PDT 24 7749445864 ps
T304 /workspace/coverage/default/27.spi_device_flash_and_tpm.3884268064 May 16 01:27:55 PM PDT 24 May 16 01:28:38 PM PDT 24 18522487960 ps
T178 /workspace/coverage/default/0.spi_device_flash_and_tpm.4193077261 May 16 01:26:18 PM PDT 24 May 16 01:28:03 PM PDT 24 6228354234 ps
T320 /workspace/coverage/default/1.spi_device_tpm_read_hw_reg.3589528104 May 16 01:26:17 PM PDT 24 May 16 01:26:40 PM PDT 24 4752295133 ps
T321 /workspace/coverage/default/22.spi_device_alert_test.500517139 May 16 01:27:38 PM PDT 24 May 16 01:27:57 PM PDT 24 35270827 ps
T195 /workspace/coverage/default/15.spi_device_pass_cmd_filtering.860910487 May 16 01:27:06 PM PDT 24 May 16 01:27:33 PM PDT 24 2264288458 ps
T189 /workspace/coverage/default/39.spi_device_mailbox.2142518804 May 16 01:28:39 PM PDT 24 May 16 01:30:18 PM PDT 24 55765139524 ps
T322 /workspace/coverage/default/6.spi_device_mailbox.1936152065 May 16 01:26:53 PM PDT 24 May 16 01:27:13 PM PDT 24 34817620 ps
T35 /workspace/coverage/default/14.spi_device_pass_addr_payload_swap.824443524 May 16 01:27:06 PM PDT 24 May 16 01:27:44 PM PDT 24 24019265021 ps
T323 /workspace/coverage/default/14.spi_device_mem_parity.1324125743 May 16 01:27:09 PM PDT 24 May 16 01:27:31 PM PDT 24 132370191 ps
T324 /workspace/coverage/default/45.spi_device_tpm_all.2471743527 May 16 01:28:52 PM PDT 24 May 16 01:29:15 PM PDT 24 6006248936 ps
T179 /workspace/coverage/default/44.spi_device_flash_and_tpm_min_idle.4134809568 May 16 01:28:53 PM PDT 24 May 16 01:30:00 PM PDT 24 2809395652 ps
T184 /workspace/coverage/default/16.spi_device_mailbox.2189482675 May 16 01:27:12 PM PDT 24 May 16 01:27:58 PM PDT 24 4095499318 ps
T84 /workspace/coverage/default/1.spi_device_flash_all.2558923409 May 16 01:26:45 PM PDT 24 May 16 01:27:47 PM PDT 24 9573838122 ps
T259 /workspace/coverage/default/38.spi_device_pass_addr_payload_swap.3336564806 May 16 01:28:33 PM PDT 24 May 16 01:28:51 PM PDT 24 606110910 ps
T63 /workspace/coverage/default/39.spi_device_stress_all.587118985 May 16 01:28:41 PM PDT 24 May 16 01:38:06 PM PDT 24 60120625816 ps
T95 /workspace/coverage/default/33.spi_device_cfg_cmd.4082719745 May 16 01:28:14 PM PDT 24 May 16 01:28:38 PM PDT 24 1086789608 ps
T325 /workspace/coverage/default/45.spi_device_pass_cmd_filtering.3120617302 May 16 01:29:06 PM PDT 24 May 16 01:29:18 PM PDT 24 134043362 ps
T326 /workspace/coverage/default/16.spi_device_tpm_read_hw_reg.3891157557 May 16 01:27:15 PM PDT 24 May 16 01:27:48 PM PDT 24 13928053810 ps
T300 /workspace/coverage/default/2.spi_device_tpm_all.222230746 May 16 01:26:36 PM PDT 24 May 16 01:27:15 PM PDT 24 7861092244 ps
T251 /workspace/coverage/default/14.spi_device_tpm_rw.1021786924 May 16 01:27:08 PM PDT 24 May 16 01:27:32 PM PDT 24 113625452 ps
T187 /workspace/coverage/default/47.spi_device_intercept.3365432544 May 16 01:29:09 PM PDT 24 May 16 01:29:24 PM PDT 24 139270381 ps
T136 /workspace/coverage/default/41.spi_device_flash_and_tpm_min_idle.3131522508 May 16 01:28:42 PM PDT 24 May 16 01:32:14 PM PDT 24 41582214344 ps
T137 /workspace/coverage/default/11.spi_device_flash_all.2751141540 May 16 01:27:06 PM PDT 24 May 16 01:30:33 PM PDT 24 97143326632 ps
T138 /workspace/coverage/default/49.spi_device_flash_and_tpm.3424315639 May 16 01:29:25 PM PDT 24 May 16 01:29:54 PM PDT 24 2397630318 ps
T139 /workspace/coverage/default/16.spi_device_flash_mode.1869261212 May 16 01:27:13 PM PDT 24 May 16 01:27:47 PM PDT 24 581580719 ps
T140 /workspace/coverage/default/20.spi_device_cfg_cmd.1365312904 May 16 01:27:31 PM PDT 24 May 16 01:27:53 PM PDT 24 73244524 ps
T141 /workspace/coverage/default/3.spi_device_tpm_all.1294935558 May 16 01:26:37 PM PDT 24 May 16 01:27:26 PM PDT 24 12100745281 ps
T142 /workspace/coverage/default/13.spi_device_tpm_rw.103985178 May 16 01:27:05 PM PDT 24 May 16 01:27:29 PM PDT 24 114931813 ps
T143 /workspace/coverage/default/22.spi_device_tpm_sts_read.3559525349 May 16 01:27:37 PM PDT 24 May 16 01:27:57 PM PDT 24 108399674 ps
T144 /workspace/coverage/default/47.spi_device_csb_read.2126353396 May 16 01:29:07 PM PDT 24 May 16 01:29:18 PM PDT 24 42010380 ps
T145 /workspace/coverage/default/34.spi_device_tpm_rw.3042087300 May 16 01:28:16 PM PDT 24 May 16 01:28:39 PM PDT 24 204724701 ps
T159 /workspace/coverage/default/22.spi_device_flash_mode.3478286054 May 16 01:27:39 PM PDT 24 May 16 01:28:15 PM PDT 24 1329866833 ps
T299 /workspace/coverage/default/45.spi_device_flash_and_tpm.24088289 May 16 01:29:09 PM PDT 24 May 16 01:29:45 PM PDT 24 2587033169 ps
T327 /workspace/coverage/default/2.spi_device_tpm_sts_read.3813801049 May 16 01:26:28 PM PDT 24 May 16 01:26:45 PM PDT 24 200636142 ps
T328 /workspace/coverage/default/31.spi_device_tpm_all.3622371689 May 16 01:28:07 PM PDT 24 May 16 01:28:24 PM PDT 24 13081180 ps
T196 /workspace/coverage/default/31.spi_device_pass_addr_payload_swap.870373133 May 16 01:28:05 PM PDT 24 May 16 01:28:23 PM PDT 24 346706901 ps
T329 /workspace/coverage/default/24.spi_device_cfg_cmd.3591151276 May 16 01:27:44 PM PDT 24 May 16 01:28:07 PM PDT 24 189992943 ps
T330 /workspace/coverage/default/33.spi_device_alert_test.1793224387 May 16 01:28:17 PM PDT 24 May 16 01:28:30 PM PDT 24 73519309 ps
T90 /workspace/coverage/default/6.spi_device_tpm_all.2939430257 May 16 01:26:41 PM PDT 24 May 16 01:27:06 PM PDT 24 1024519520 ps
T206 /workspace/coverage/default/17.spi_device_pass_cmd_filtering.1613325640 May 16 01:27:19 PM PDT 24 May 16 01:27:53 PM PDT 24 3712769139 ps
T203 /workspace/coverage/default/9.spi_device_pass_addr_payload_swap.1947823508 May 16 01:26:45 PM PDT 24 May 16 01:27:04 PM PDT 24 2492189392 ps
T191 /workspace/coverage/default/16.spi_device_cfg_cmd.2197591044 May 16 01:27:16 PM PDT 24 May 16 01:27:47 PM PDT 24 1508540323 ps
T331 /workspace/coverage/default/14.spi_device_pass_cmd_filtering.1711856248 May 16 01:27:05 PM PDT 24 May 16 01:27:30 PM PDT 24 59096029 ps
T201 /workspace/coverage/default/6.spi_device_upload.869404337 May 16 01:26:55 PM PDT 24 May 16 01:27:21 PM PDT 24 2191757621 ps
T64 /workspace/coverage/default/37.spi_device_stress_all.1711696954 May 16 01:28:27 PM PDT 24 May 16 01:28:40 PM PDT 24 89183251 ps
T160 /workspace/coverage/default/32.spi_device_flash_mode.1317855282 May 16 01:28:07 PM PDT 24 May 16 01:28:52 PM PDT 24 1827067947 ps
T271 /workspace/coverage/default/36.spi_device_flash_and_tpm_min_idle.1443561058 May 16 01:28:29 PM PDT 24 May 16 01:31:53 PM PDT 24 102386631298 ps
T332 /workspace/coverage/default/32.spi_device_tpm_sts_read.997048619 May 16 01:28:06 PM PDT 24 May 16 01:28:22 PM PDT 24 72258201 ps
T333 /workspace/coverage/default/17.spi_device_mailbox.4081265346 May 16 01:27:16 PM PDT 24 May 16 01:27:43 PM PDT 24 1010183669 ps
T334 /workspace/coverage/default/46.spi_device_tpm_sts_read.4052451505 May 16 01:29:06 PM PDT 24 May 16 01:29:16 PM PDT 24 167326711 ps
T81 /workspace/coverage/default/26.spi_device_stress_all.3073601731 May 16 01:27:51 PM PDT 24 May 16 01:44:29 PM PDT 24 438449673589 ps
T335 /workspace/coverage/default/46.spi_device_cfg_cmd.4274980534 May 16 01:29:05 PM PDT 24 May 16 01:29:19 PM PDT 24 1196852778 ps
T336 /workspace/coverage/default/3.spi_device_pass_cmd_filtering.2573550066 May 16 01:26:42 PM PDT 24 May 16 01:27:01 PM PDT 24 1476128617 ps
T337 /workspace/coverage/default/30.spi_device_tpm_all.2412303180 May 16 01:28:04 PM PDT 24 May 16 01:28:28 PM PDT 24 2186205951 ps
T338 /workspace/coverage/default/10.spi_device_tpm_sts_read.4024080005 May 16 01:27:02 PM PDT 24 May 16 01:27:25 PM PDT 24 124566689 ps
T161 /workspace/coverage/default/0.spi_device_read_buffer_direct.3467962176 May 16 01:26:21 PM PDT 24 May 16 01:26:55 PM PDT 24 3114236595 ps
T339 /workspace/coverage/default/36.spi_device_tpm_sts_read.2421939484 May 16 01:28:32 PM PDT 24 May 16 01:28:44 PM PDT 24 55063035 ps
T182 /workspace/coverage/default/10.spi_device_pass_cmd_filtering.385466946 May 16 01:27:02 PM PDT 24 May 16 01:27:37 PM PDT 24 8357343253 ps
T96 /workspace/coverage/default/0.spi_device_intercept.991794504 May 16 01:26:24 PM PDT 24 May 16 01:26:46 PM PDT 24 545203737 ps
T205 /workspace/coverage/default/26.spi_device_intercept.4209626438 May 16 01:27:49 PM PDT 24 May 16 01:28:12 PM PDT 24 408664649 ps
T340 /workspace/coverage/default/14.spi_device_tpm_read_hw_reg.383223806 May 16 01:27:05 PM PDT 24 May 16 01:27:28 PM PDT 24 28767852 ps
T301 /workspace/coverage/default/2.spi_device_flash_and_tpm_min_idle.1255919889 May 16 01:26:34 PM PDT 24 May 16 01:27:26 PM PDT 24 7934332059 ps
T341 /workspace/coverage/default/32.spi_device_tpm_rw.2479388669 May 16 01:28:10 PM PDT 24 May 16 01:28:26 PM PDT 24 35336563 ps
T342 /workspace/coverage/default/13.spi_device_tpm_read_hw_reg.412448768 May 16 01:27:01 PM PDT 24 May 16 01:27:24 PM PDT 24 89047018 ps
T204 /workspace/coverage/default/39.spi_device_upload.2870871696 May 16 01:28:39 PM PDT 24 May 16 01:28:58 PM PDT 24 2550367914 ps
T343 /workspace/coverage/default/17.spi_device_tpm_read_hw_reg.2732570043 May 16 01:27:16 PM PDT 24 May 16 01:27:40 PM PDT 24 14033467 ps
T258 /workspace/coverage/default/31.spi_device_pass_cmd_filtering.645781928 May 16 01:28:05 PM PDT 24 May 16 01:28:25 PM PDT 24 6664046847 ps
T344 /workspace/coverage/default/26.spi_device_csb_read.1539280511 May 16 01:27:49 PM PDT 24 May 16 01:28:07 PM PDT 24 17213894 ps
T345 /workspace/coverage/default/11.spi_device_tpm_read_hw_reg.595315351 May 16 01:26:57 PM PDT 24 May 16 01:27:21 PM PDT 24 5998751708 ps
T268 /workspace/coverage/default/20.spi_device_flash_and_tpm.2324303398 May 16 01:27:26 PM PDT 24 May 16 01:29:41 PM PDT 24 8506161182 ps
T346 /workspace/coverage/default/43.spi_device_pass_addr_payload_swap.1769217067 May 16 01:28:48 PM PDT 24 May 16 01:29:03 PM PDT 24 141688669 ps
T290 /workspace/coverage/default/17.spi_device_flash_mode.3788700833 May 16 01:27:17 PM PDT 24 May 16 01:27:49 PM PDT 24 3235732427 ps
T347 /workspace/coverage/default/34.spi_device_tpm_read_hw_reg.1614758991 May 16 01:28:21 PM PDT 24 May 16 01:28:45 PM PDT 24 2955887181 ps
T85 /workspace/coverage/default/27.spi_device_flash_and_tpm_min_idle.1996064181 May 16 01:28:00 PM PDT 24 May 16 01:30:07 PM PDT 24 22964719258 ps
T348 /workspace/coverage/default/37.spi_device_mailbox.9621521 May 16 01:28:30 PM PDT 24 May 16 01:28:45 PM PDT 24 333606619 ps
T349 /workspace/coverage/default/40.spi_device_tpm_all.2734901792 May 16 01:28:46 PM PDT 24 May 16 01:29:00 PM PDT 24 313838236 ps
T180 /workspace/coverage/default/5.spi_device_flash_all.2227111635 May 16 01:26:33 PM PDT 24 May 16 01:27:45 PM PDT 24 12763609364 ps
T82 /workspace/coverage/default/33.spi_device_flash_all.2234243140 May 16 01:28:17 PM PDT 24 May 16 01:32:47 PM PDT 24 72794276093 ps
T83 /workspace/coverage/default/11.spi_device_stress_all.252420952 May 16 01:26:54 PM PDT 24 May 16 01:36:46 PM PDT 24 65630833362 ps
T350 /workspace/coverage/default/38.spi_device_read_buffer_direct.4240551950 May 16 01:28:34 PM PDT 24 May 16 01:28:53 PM PDT 24 1439894443 ps
T146 /workspace/coverage/default/7.spi_device_flash_and_tpm.1016148650 May 16 01:26:49 PM PDT 24 May 16 01:28:15 PM PDT 24 13703053734 ps
T153 /workspace/coverage/default/3.spi_device_stress_all.2206349828 May 16 01:26:26 PM PDT 24 May 16 01:26:44 PM PDT 24 163457212 ps
T172 /workspace/coverage/default/36.spi_device_tpm_rw.1025002166 May 16 01:28:28 PM PDT 24 May 16 01:28:47 PM PDT 24 1227188480 ps
T173 /workspace/coverage/default/19.spi_device_read_buffer_direct.1109414361 May 16 01:27:30 PM PDT 24 May 16 01:27:56 PM PDT 24 2541616096 ps
T66 /workspace/coverage/default/0.spi_device_sec_cm.1014444346 May 16 01:26:20 PM PDT 24 May 16 01:26:37 PM PDT 24 33733414 ps
T71 /workspace/coverage/default/5.spi_device_tpm_sts_read.1040892984 May 16 01:26:32 PM PDT 24 May 16 01:26:48 PM PDT 24 165230332 ps
T72 /workspace/coverage/default/13.spi_device_csb_read.1904554249 May 16 01:27:02 PM PDT 24 May 16 01:27:25 PM PDT 24 38145616 ps
T73 /workspace/coverage/default/19.spi_device_csb_read.3087160584 May 16 01:27:16 PM PDT 24 May 16 01:27:40 PM PDT 24 15599129 ps
T74 /workspace/coverage/default/32.spi_device_csb_read.3755349598 May 16 01:28:06 PM PDT 24 May 16 01:28:23 PM PDT 24 42633649 ps
T75 /workspace/coverage/default/15.spi_device_tpm_sts_read.221600967 May 16 01:27:09 PM PDT 24 May 16 01:27:31 PM PDT 24 35558491 ps
T76 /workspace/coverage/default/9.spi_device_flash_all.3205679349 May 16 01:26:58 PM PDT 24 May 16 01:27:39 PM PDT 24 3010888735 ps
T77 /workspace/coverage/default/22.spi_device_flash_and_tpm.1462064735 May 16 01:27:39 PM PDT 24 May 16 01:29:47 PM PDT 24 72384463828 ps
T78 /workspace/coverage/default/9.spi_device_flash_mode.2930562452 May 16 01:26:48 PM PDT 24 May 16 01:27:09 PM PDT 24 1035901322 ps
T79 /workspace/coverage/default/40.spi_device_cfg_cmd.1008519280 May 16 01:28:45 PM PDT 24 May 16 01:29:10 PM PDT 24 4187970185 ps
T351 /workspace/coverage/default/28.spi_device_mailbox.1651673846 May 16 01:28:00 PM PDT 24 May 16 01:29:31 PM PDT 24 7120424296 ps
T352 /workspace/coverage/default/13.spi_device_mailbox.1995315647 May 16 01:27:03 PM PDT 24 May 16 01:27:27 PM PDT 24 225274431 ps
T353 /workspace/coverage/default/16.spi_device_alert_test.3014600139 May 16 01:27:16 PM PDT 24 May 16 01:27:40 PM PDT 24 56545834 ps
T354 /workspace/coverage/default/9.spi_device_tpm_read_hw_reg.2098488123 May 16 01:26:49 PM PDT 24 May 16 01:27:21 PM PDT 24 73837381845 ps
T355 /workspace/coverage/default/45.spi_device_read_buffer_direct.541841862 May 16 01:29:05 PM PDT 24 May 16 01:29:23 PM PDT 24 1806777604 ps
T273 /workspace/coverage/default/11.spi_device_pass_addr_payload_swap.294701744 May 16 01:26:59 PM PDT 24 May 16 01:27:24 PM PDT 24 1593782733 ps
T356 /workspace/coverage/default/30.spi_device_csb_read.1953979574 May 16 01:28:07 PM PDT 24 May 16 01:28:24 PM PDT 24 42324153 ps
T210 /workspace/coverage/default/21.spi_device_upload.700752625 May 16 01:27:27 PM PDT 24 May 16 01:27:49 PM PDT 24 489689121 ps
T270 /workspace/coverage/default/36.spi_device_mailbox.119151106 May 16 01:28:32 PM PDT 24 May 16 01:29:14 PM PDT 24 27271292096 ps
T185 /workspace/coverage/default/43.spi_device_flash_all.193099973 May 16 01:28:49 PM PDT 24 May 16 01:32:40 PM PDT 24 475379258966 ps
T278 /workspace/coverage/default/45.spi_device_intercept.1222424965 May 16 01:29:05 PM PDT 24 May 16 01:29:18 PM PDT 24 262551186 ps
T357 /workspace/coverage/default/32.spi_device_tpm_read_hw_reg.448126529 May 16 01:28:10 PM PDT 24 May 16 01:28:27 PM PDT 24 409366675 ps
T358 /workspace/coverage/default/10.spi_device_mem_parity.2326007454 May 16 01:27:00 PM PDT 24 May 16 01:27:22 PM PDT 24 16151179 ps
T183 /workspace/coverage/default/22.spi_device_flash_all.2546970514 May 16 01:27:37 PM PDT 24 May 16 01:31:32 PM PDT 24 26510194190 ps
T284 /workspace/coverage/default/46.spi_device_pass_cmd_filtering.953243046 May 16 01:29:08 PM PDT 24 May 16 01:29:22 PM PDT 24 524190297 ps
T274 /workspace/coverage/default/28.spi_device_upload.2993998011 May 16 01:27:58 PM PDT 24 May 16 01:28:27 PM PDT 24 3032002889 ps
T359 /workspace/coverage/default/1.spi_device_upload.1223264220 May 16 01:26:29 PM PDT 24 May 16 01:26:51 PM PDT 24 2816883345 ps
T225 /workspace/coverage/default/41.spi_device_pass_addr_payload_swap.1094910816 May 16 01:28:42 PM PDT 24 May 16 01:29:04 PM PDT 24 12523514828 ps
T360 /workspace/coverage/default/48.spi_device_tpm_sts_read.3402787168 May 16 01:29:08 PM PDT 24 May 16 01:29:18 PM PDT 24 125504131 ps
T361 /workspace/coverage/default/30.spi_device_tpm_rw.2159860737 May 16 01:28:06 PM PDT 24 May 16 01:28:23 PM PDT 24 35380084 ps
T362 /workspace/coverage/default/27.spi_device_flash_mode.2191421892 May 16 01:27:47 PM PDT 24 May 16 01:28:17 PM PDT 24 616737589 ps
T44 /workspace/coverage/default/10.spi_device_stress_all.4076457911 May 16 01:27:01 PM PDT 24 May 16 01:31:45 PM PDT 24 44284711095 ps
T49 /workspace/coverage/default/29.spi_device_read_buffer_direct.35013577 May 16 01:27:56 PM PDT 24 May 16 01:28:26 PM PDT 24 2120379614 ps
T50 /workspace/coverage/default/22.spi_device_cfg_cmd.4112062109 May 16 01:27:40 PM PDT 24 May 16 01:28:01 PM PDT 24 143069726 ps
T51 /workspace/coverage/default/28.spi_device_tpm_rw.1289757128 May 16 01:27:56 PM PDT 24 May 16 01:28:13 PM PDT 24 18656838 ps
T52 /workspace/coverage/default/37.spi_device_tpm_read_hw_reg.1735956349 May 16 01:28:29 PM PDT 24 May 16 01:28:48 PM PDT 24 854086288 ps
T53 /workspace/coverage/default/19.spi_device_flash_mode.2887413818 May 16 01:27:32 PM PDT 24 May 16 01:28:52 PM PDT 24 5109953423 ps
T54 /workspace/coverage/default/27.spi_device_pass_addr_payload_swap.80963220 May 16 01:27:50 PM PDT 24 May 16 01:28:32 PM PDT 24 8876606328 ps
T55 /workspace/coverage/default/41.spi_device_flash_all.1571015786 May 16 01:28:45 PM PDT 24 May 16 01:30:51 PM PDT 24 25426212211 ps
T56 /workspace/coverage/default/21.spi_device_pass_cmd_filtering.1126906964 May 16 01:27:37 PM PDT 24 May 16 01:27:58 PM PDT 24 255113994 ps
T57 /workspace/coverage/default/6.spi_device_flash_and_tpm.128641836 May 16 01:26:51 PM PDT 24 May 16 01:28:31 PM PDT 24 36237397938 ps
T275 /workspace/coverage/default/39.spi_device_flash_and_tpm_min_idle.319288698 May 16 01:28:42 PM PDT 24 May 16 01:30:22 PM PDT 24 32361116058 ps
T363 /workspace/coverage/default/29.spi_device_cfg_cmd.2415018463 May 16 01:27:56 PM PDT 24 May 16 01:28:25 PM PDT 24 18083103178 ps
T364 /workspace/coverage/default/23.spi_device_tpm_read_hw_reg.2521025891 May 16 01:27:39 PM PDT 24 May 16 01:28:12 PM PDT 24 5987102877 ps
T365 /workspace/coverage/default/17.spi_device_tpm_rw.3925627454 May 16 01:27:13 PM PDT 24 May 16 01:27:39 PM PDT 24 159042274 ps
T202 /workspace/coverage/default/48.spi_device_mailbox.3206862060 May 16 01:29:09 PM PDT 24 May 16 01:30:21 PM PDT 24 12906548345 ps
T366 /workspace/coverage/default/31.spi_device_flash_all.3513620554 May 16 01:28:05 PM PDT 24 May 16 01:28:30 PM PDT 24 443600031 ps
T367 /workspace/coverage/default/8.spi_device_tpm_all.395129280 May 16 01:26:49 PM PDT 24 May 16 01:27:32 PM PDT 24 4651485059 ps
T166 /workspace/coverage/default/29.spi_device_stress_all.1461419214 May 16 01:28:04 PM PDT 24 May 16 01:28:46 PM PDT 24 9277975835 ps
T368 /workspace/coverage/default/41.spi_device_read_buffer_direct.192605499 May 16 01:28:42 PM PDT 24 May 16 01:28:58 PM PDT 24 636101283 ps
T369 /workspace/coverage/default/11.spi_device_tpm_rw.1352357510 May 16 01:27:03 PM PDT 24 May 16 01:27:26 PM PDT 24 59452449 ps
T370 /workspace/coverage/default/1.spi_device_tpm_rw.1683395519 May 16 01:26:49 PM PDT 24 May 16 01:27:06 PM PDT 24 398646181 ps
T295 /workspace/coverage/default/33.spi_device_flash_mode.3392697707 May 16 01:28:17 PM PDT 24 May 16 01:28:41 PM PDT 24 338237892 ps
T221 /workspace/coverage/default/6.spi_device_flash_all.1739322152 May 16 01:26:47 PM PDT 24 May 16 01:28:18 PM PDT 24 6418479434 ps
T371 /workspace/coverage/default/17.spi_device_intercept.87044468 May 16 01:27:16 PM PDT 24 May 16 01:27:44 PM PDT 24 263489531 ps
T167 /workspace/coverage/default/27.spi_device_stress_all.2396192756 May 16 01:28:00 PM PDT 24 May 16 01:31:43 PM PDT 24 47444827773 ps
T267 /workspace/coverage/default/6.spi_device_pass_addr_payload_swap.1528897826 May 16 01:26:35 PM PDT 24 May 16 01:26:54 PM PDT 24 186981240 ps
T372 /workspace/coverage/default/3.spi_device_intercept.1223189909 May 16 01:26:33 PM PDT 24 May 16 01:26:52 PM PDT 24 2868097902 ps
T272 /workspace/coverage/default/1.spi_device_mailbox.789959837 May 16 01:26:27 PM PDT 24 May 16 01:27:10 PM PDT 24 6678595327 ps
T373 /workspace/coverage/default/40.spi_device_csb_read.1939212789 May 16 01:28:39 PM PDT 24 May 16 01:28:53 PM PDT 24 16430982 ps
T374 /workspace/coverage/default/45.spi_device_alert_test.1564922360 May 16 01:29:07 PM PDT 24 May 16 01:29:17 PM PDT 24 35848916 ps
T375 /workspace/coverage/default/12.spi_device_pass_addr_payload_swap.1402734002 May 16 01:26:58 PM PDT 24 May 16 01:27:20 PM PDT 24 28872471 ps
T194 /workspace/coverage/default/12.spi_device_upload.3432677754 May 16 01:27:03 PM PDT 24 May 16 01:27:31 PM PDT 24 245929250 ps
T197 /workspace/coverage/default/48.spi_device_flash_and_tpm.1451854546 May 16 01:29:20 PM PDT 24 May 16 01:30:54 PM PDT 24 3905192977 ps
T296 /workspace/coverage/default/42.spi_device_flash_mode.136491087 May 16 01:28:43 PM PDT 24 May 16 01:29:09 PM PDT 24 2085113210 ps
T241 /workspace/coverage/default/34.spi_device_flash_all.3655627214 May 16 01:28:22 PM PDT 24 May 16 01:29:25 PM PDT 24 8290127318 ps
T376 /workspace/coverage/default/12.spi_device_flash_all.1501037591 May 16 01:26:59 PM PDT 24 May 16 01:29:50 PM PDT 24 50371951941 ps
T377 /workspace/coverage/default/8.spi_device_flash_and_tpm_min_idle.4293329299 May 16 01:26:47 PM PDT 24 May 16 01:29:31 PM PDT 24 37839818173 ps
T378 /workspace/coverage/default/30.spi_device_flash_mode.2665682576 May 16 01:28:04 PM PDT 24 May 16 01:28:30 PM PDT 24 532882916 ps
T97 /workspace/coverage/default/48.spi_device_cfg_cmd.1408295306 May 16 01:29:10 PM PDT 24 May 16 01:29:22 PM PDT 24 525466399 ps
T379 /workspace/coverage/default/25.spi_device_csb_read.378532338 May 16 01:27:44 PM PDT 24 May 16 01:28:03 PM PDT 24 29816228 ps
T380 /workspace/coverage/default/38.spi_device_cfg_cmd.1284522624 May 16 01:28:32 PM PDT 24 May 16 01:28:48 PM PDT 24 644970171 ps
T381 /workspace/coverage/default/37.spi_device_pass_addr_payload_swap.4051281679 May 16 01:28:31 PM PDT 24 May 16 01:28:48 PM PDT 24 208462422 ps
T382 /workspace/coverage/default/44.spi_device_upload.2919697872 May 16 01:28:48 PM PDT 24 May 16 01:29:03 PM PDT 24 159488929 ps
T383 /workspace/coverage/default/3.spi_device_tpm_sts_read.4027176569 May 16 01:26:27 PM PDT 24 May 16 01:26:44 PM PDT 24 92001248 ps
T190 /workspace/coverage/default/26.spi_device_flash_all.818669004 May 16 01:27:48 PM PDT 24 May 16 01:31:52 PM PDT 24 220011616503 ps
T384 /workspace/coverage/default/49.spi_device_tpm_all.2616949742 May 16 01:29:17 PM PDT 24 May 16 01:29:35 PM PDT 24 1550022252 ps
T208 /workspace/coverage/default/40.spi_device_flash_and_tpm_min_idle.4059096437 May 16 01:28:39 PM PDT 24 May 16 01:32:12 PM PDT 24 12588272588 ps
T385 /workspace/coverage/default/11.spi_device_mem_parity.2613675759 May 16 01:27:01 PM PDT 24 May 16 01:27:23 PM PDT 24 15365658 ps
T277 /workspace/coverage/default/7.spi_device_flash_and_tpm_min_idle.2647907569 May 16 01:26:55 PM PDT 24 May 16 01:29:33 PM PDT 24 9319516760 ps
T193 /workspace/coverage/default/29.spi_device_flash_and_tpm_min_idle.2566912083 May 16 01:27:56 PM PDT 24 May 16 01:35:37 PM PDT 24 156900736578 ps
T386 /workspace/coverage/default/42.spi_device_flash_and_tpm_min_idle.2223669184 May 16 01:28:43 PM PDT 24 May 16 01:30:28 PM PDT 24 24255266969 ps
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