Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3289 |
0 |
0 |
T80 |
4754 |
3 |
0 |
0 |
T81 |
10915 |
1 |
0 |
0 |
T82 |
11768 |
132 |
0 |
0 |
T83 |
3527 |
7 |
0 |
0 |
T84 |
28958 |
4 |
0 |
0 |
T85 |
29143 |
3 |
0 |
0 |
T87 |
2845 |
157 |
0 |
0 |
T96 |
48384 |
2 |
0 |
0 |
T98 |
10589 |
2 |
0 |
0 |
T99 |
29543 |
2 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
1938 |
0 |
0 |
T99 |
29543 |
30 |
0 |
0 |
T100 |
93396 |
68 |
0 |
0 |
T103 |
36650 |
230 |
0 |
0 |
T105 |
40620 |
265 |
0 |
0 |
T108 |
4538 |
1 |
0 |
0 |
T137 |
21239 |
53 |
0 |
0 |
T138 |
34860 |
29 |
0 |
0 |
T139 |
5235 |
4 |
0 |
0 |
T140 |
4799 |
6 |
0 |
0 |
T141 |
13524 |
41 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
1889 |
0 |
0 |
T99 |
29543 |
19 |
0 |
0 |
T100 |
93396 |
77 |
0 |
0 |
T103 |
36650 |
263 |
0 |
0 |
T105 |
40620 |
241 |
0 |
0 |
T137 |
21239 |
56 |
0 |
0 |
T138 |
34860 |
33 |
0 |
0 |
T139 |
5235 |
15 |
0 |
0 |
T140 |
4799 |
3 |
0 |
0 |
T141 |
13524 |
10 |
0 |
0 |
T142 |
14172 |
41 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
2215 |
0 |
0 |
T99 |
29543 |
39 |
0 |
0 |
T100 |
93396 |
89 |
0 |
0 |
T103 |
36650 |
275 |
0 |
0 |
T105 |
40620 |
258 |
0 |
0 |
T108 |
4538 |
12 |
0 |
0 |
T137 |
21239 |
65 |
0 |
0 |
T138 |
34860 |
96 |
0 |
0 |
T139 |
5235 |
14 |
0 |
0 |
T140 |
4799 |
11 |
0 |
0 |
T141 |
13524 |
41 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
6329 |
0 |
0 |
T99 |
29543 |
385 |
0 |
0 |
T100 |
93396 |
982 |
0 |
0 |
T103 |
36650 |
261 |
0 |
0 |
T105 |
40620 |
239 |
0 |
0 |
T108 |
4538 |
121 |
0 |
0 |
T137 |
21239 |
37 |
0 |
0 |
T138 |
34860 |
738 |
0 |
0 |
T139 |
5235 |
5 |
0 |
0 |
T140 |
4799 |
64 |
0 |
0 |
T141 |
13524 |
35 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
6707 |
0 |
0 |
T99 |
29543 |
244 |
0 |
0 |
T100 |
93396 |
1137 |
0 |
0 |
T103 |
36650 |
197 |
0 |
0 |
T105 |
40620 |
279 |
0 |
0 |
T108 |
4538 |
6 |
0 |
0 |
T137 |
21239 |
65 |
0 |
0 |
T138 |
34860 |
768 |
0 |
0 |
T139 |
5235 |
133 |
0 |
0 |
T140 |
4799 |
67 |
0 |
0 |
T141 |
13524 |
41 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
7394 |
0 |
0 |
T82 |
11768 |
2 |
0 |
0 |
T99 |
29543 |
511 |
0 |
0 |
T100 |
93396 |
962 |
0 |
0 |
T103 |
36650 |
235 |
0 |
0 |
T105 |
40620 |
308 |
0 |
0 |
T137 |
21239 |
73 |
0 |
0 |
T138 |
34860 |
619 |
0 |
0 |
T139 |
5235 |
173 |
0 |
0 |
T140 |
4799 |
12 |
0 |
0 |
T141 |
13524 |
58 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
6545 |
0 |
0 |
T99 |
29543 |
360 |
0 |
0 |
T100 |
93396 |
1079 |
0 |
0 |
T103 |
36650 |
227 |
0 |
0 |
T105 |
40620 |
186 |
0 |
0 |
T108 |
4538 |
100 |
0 |
0 |
T137 |
21239 |
60 |
0 |
0 |
T138 |
34860 |
684 |
0 |
0 |
T139 |
5235 |
1 |
0 |
0 |
T140 |
4799 |
5 |
0 |
0 |
T141 |
13524 |
16 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
6678 |
0 |
0 |
T99 |
29543 |
144 |
0 |
0 |
T100 |
93396 |
1369 |
0 |
0 |
T103 |
36650 |
253 |
0 |
0 |
T105 |
40620 |
209 |
0 |
0 |
T108 |
4538 |
108 |
0 |
0 |
T137 |
21239 |
52 |
0 |
0 |
T138 |
34860 |
656 |
0 |
0 |
T139 |
5235 |
7 |
0 |
0 |
T140 |
4799 |
1 |
0 |
0 |
T141 |
13524 |
35 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
6688 |
0 |
0 |
T99 |
29543 |
334 |
0 |
0 |
T100 |
93396 |
1229 |
0 |
0 |
T103 |
36650 |
251 |
0 |
0 |
T105 |
40620 |
248 |
0 |
0 |
T108 |
4538 |
102 |
0 |
0 |
T137 |
21239 |
82 |
0 |
0 |
T138 |
34860 |
542 |
0 |
0 |
T139 |
5235 |
8 |
0 |
0 |
T141 |
13524 |
35 |
0 |
0 |
T142 |
14172 |
43 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
6662 |
0 |
0 |
T99 |
29543 |
430 |
0 |
0 |
T100 |
93396 |
1031 |
0 |
0 |
T103 |
36650 |
235 |
0 |
0 |
T105 |
40620 |
222 |
0 |
0 |
T108 |
4538 |
112 |
0 |
0 |
T137 |
21239 |
44 |
0 |
0 |
T138 |
34860 |
553 |
0 |
0 |
T139 |
5235 |
2 |
0 |
0 |
T140 |
4799 |
45 |
0 |
0 |
T141 |
13524 |
53 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
6569 |
0 |
0 |
T99 |
29543 |
115 |
0 |
0 |
T100 |
93396 |
1123 |
0 |
0 |
T103 |
36650 |
229 |
0 |
0 |
T105 |
40620 |
278 |
0 |
0 |
T108 |
4538 |
124 |
0 |
0 |
T137 |
21239 |
62 |
0 |
0 |
T138 |
34860 |
637 |
0 |
0 |
T139 |
5235 |
128 |
0 |
0 |
T140 |
4799 |
77 |
0 |
0 |
T141 |
13524 |
28 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3900 |
0 |
0 |
T99 |
29543 |
129 |
0 |
0 |
T100 |
93396 |
542 |
0 |
0 |
T103 |
36650 |
257 |
0 |
0 |
T105 |
40620 |
250 |
0 |
0 |
T108 |
4538 |
30 |
0 |
0 |
T137 |
21239 |
51 |
0 |
0 |
T138 |
34860 |
306 |
0 |
0 |
T139 |
5235 |
43 |
0 |
0 |
T140 |
4799 |
19 |
0 |
0 |
T141 |
13524 |
57 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3633 |
0 |
0 |
T99 |
29543 |
85 |
0 |
0 |
T100 |
93396 |
417 |
0 |
0 |
T103 |
36650 |
230 |
0 |
0 |
T105 |
40620 |
276 |
0 |
0 |
T108 |
4538 |
60 |
0 |
0 |
T137 |
21239 |
17 |
0 |
0 |
T138 |
34860 |
300 |
0 |
0 |
T139 |
5235 |
7 |
0 |
0 |
T140 |
4799 |
1 |
0 |
0 |
T141 |
13524 |
47 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3820 |
0 |
0 |
T99 |
29543 |
137 |
0 |
0 |
T100 |
93396 |
424 |
0 |
0 |
T103 |
36650 |
252 |
0 |
0 |
T105 |
40620 |
260 |
0 |
0 |
T108 |
4538 |
43 |
0 |
0 |
T137 |
21239 |
80 |
0 |
0 |
T138 |
34860 |
267 |
0 |
0 |
T139 |
5235 |
6 |
0 |
0 |
T141 |
13524 |
56 |
0 |
0 |
T142 |
14172 |
16 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3673 |
0 |
0 |
T99 |
29543 |
76 |
0 |
0 |
T100 |
93396 |
579 |
0 |
0 |
T103 |
36650 |
239 |
0 |
0 |
T105 |
40620 |
249 |
0 |
0 |
T108 |
4538 |
38 |
0 |
0 |
T137 |
21239 |
83 |
0 |
0 |
T138 |
34860 |
310 |
0 |
0 |
T139 |
5235 |
57 |
0 |
0 |
T140 |
4799 |
4 |
0 |
0 |
T141 |
13524 |
34 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3620 |
0 |
0 |
T99 |
29543 |
141 |
0 |
0 |
T100 |
93396 |
463 |
0 |
0 |
T103 |
36650 |
237 |
0 |
0 |
T105 |
40620 |
267 |
0 |
0 |
T108 |
4538 |
39 |
0 |
0 |
T137 |
21239 |
36 |
0 |
0 |
T138 |
34860 |
207 |
0 |
0 |
T139 |
5235 |
9 |
0 |
0 |
T141 |
13524 |
31 |
0 |
0 |
T142 |
14172 |
43 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3677 |
0 |
0 |
T99 |
29543 |
138 |
0 |
0 |
T100 |
93396 |
439 |
0 |
0 |
T103 |
36650 |
212 |
0 |
0 |
T105 |
40620 |
291 |
0 |
0 |
T108 |
4538 |
2 |
0 |
0 |
T137 |
21239 |
48 |
0 |
0 |
T138 |
34860 |
315 |
0 |
0 |
T139 |
5235 |
44 |
0 |
0 |
T140 |
4799 |
3 |
0 |
0 |
T141 |
13524 |
56 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3347 |
0 |
0 |
T99 |
29543 |
125 |
0 |
0 |
T100 |
93396 |
371 |
0 |
0 |
T103 |
36650 |
251 |
0 |
0 |
T105 |
40620 |
227 |
0 |
0 |
T108 |
4538 |
8 |
0 |
0 |
T137 |
21239 |
79 |
0 |
0 |
T138 |
34860 |
255 |
0 |
0 |
T139 |
5235 |
6 |
0 |
0 |
T140 |
4799 |
3 |
0 |
0 |
T141 |
13524 |
37 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3652 |
0 |
0 |
T82 |
11768 |
5 |
0 |
0 |
T99 |
29543 |
100 |
0 |
0 |
T100 |
93396 |
324 |
0 |
0 |
T103 |
36650 |
207 |
0 |
0 |
T105 |
40620 |
283 |
0 |
0 |
T108 |
4538 |
35 |
0 |
0 |
T137 |
21239 |
57 |
0 |
0 |
T138 |
34860 |
276 |
0 |
0 |
T139 |
5235 |
6 |
0 |
0 |
T140 |
4799 |
26 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3453 |
0 |
0 |
T99 |
29543 |
134 |
0 |
0 |
T100 |
93396 |
532 |
0 |
0 |
T103 |
36650 |
253 |
0 |
0 |
T105 |
40620 |
266 |
0 |
0 |
T137 |
21239 |
38 |
0 |
0 |
T138 |
34860 |
260 |
0 |
0 |
T139 |
5235 |
2 |
0 |
0 |
T140 |
4799 |
1 |
0 |
0 |
T141 |
13524 |
80 |
0 |
0 |
T142 |
14172 |
56 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3403 |
0 |
0 |
T82 |
11768 |
1 |
0 |
0 |
T99 |
29543 |
130 |
0 |
0 |
T100 |
93396 |
461 |
0 |
0 |
T103 |
36650 |
237 |
0 |
0 |
T105 |
40620 |
237 |
0 |
0 |
T108 |
4538 |
60 |
0 |
0 |
T137 |
21239 |
60 |
0 |
0 |
T138 |
34860 |
229 |
0 |
0 |
T139 |
5235 |
9 |
0 |
0 |
T140 |
4799 |
32 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3562 |
0 |
0 |
T99 |
29543 |
171 |
0 |
0 |
T100 |
93396 |
411 |
0 |
0 |
T103 |
36650 |
236 |
0 |
0 |
T105 |
40620 |
251 |
0 |
0 |
T108 |
4538 |
2 |
0 |
0 |
T137 |
21239 |
52 |
0 |
0 |
T138 |
34860 |
63 |
0 |
0 |
T139 |
5235 |
59 |
0 |
0 |
T140 |
4799 |
3 |
0 |
0 |
T141 |
13524 |
94 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3630 |
0 |
0 |
T99 |
29543 |
133 |
0 |
0 |
T100 |
93396 |
426 |
0 |
0 |
T103 |
36650 |
191 |
0 |
0 |
T105 |
40620 |
301 |
0 |
0 |
T108 |
4538 |
49 |
0 |
0 |
T137 |
21239 |
99 |
0 |
0 |
T138 |
34860 |
248 |
0 |
0 |
T139 |
5235 |
4 |
0 |
0 |
T140 |
4799 |
24 |
0 |
0 |
T141 |
13524 |
63 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3832 |
0 |
0 |
T99 |
29543 |
133 |
0 |
0 |
T100 |
93396 |
486 |
0 |
0 |
T103 |
36650 |
217 |
0 |
0 |
T105 |
40620 |
297 |
0 |
0 |
T108 |
4538 |
24 |
0 |
0 |
T137 |
21239 |
67 |
0 |
0 |
T138 |
34860 |
423 |
0 |
0 |
T139 |
5235 |
3 |
0 |
0 |
T140 |
4799 |
9 |
0 |
0 |
T141 |
13524 |
52 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3406 |
0 |
0 |
T99 |
29543 |
114 |
0 |
0 |
T100 |
93396 |
489 |
0 |
0 |
T103 |
36650 |
194 |
0 |
0 |
T105 |
40620 |
209 |
0 |
0 |
T108 |
4538 |
43 |
0 |
0 |
T137 |
21239 |
62 |
0 |
0 |
T138 |
34860 |
220 |
0 |
0 |
T139 |
5235 |
8 |
0 |
0 |
T141 |
13524 |
26 |
0 |
0 |
T142 |
14172 |
49 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3933 |
0 |
0 |
T99 |
29543 |
185 |
0 |
0 |
T100 |
93396 |
511 |
0 |
0 |
T103 |
36650 |
281 |
0 |
0 |
T105 |
40620 |
213 |
0 |
0 |
T108 |
4538 |
32 |
0 |
0 |
T137 |
21239 |
61 |
0 |
0 |
T138 |
34860 |
321 |
0 |
0 |
T139 |
5235 |
6 |
0 |
0 |
T140 |
4799 |
2 |
0 |
0 |
T141 |
13524 |
56 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3542 |
0 |
0 |
T99 |
29543 |
148 |
0 |
0 |
T100 |
93396 |
417 |
0 |
0 |
T103 |
36650 |
250 |
0 |
0 |
T105 |
40620 |
256 |
0 |
0 |
T108 |
4538 |
6 |
0 |
0 |
T137 |
21239 |
93 |
0 |
0 |
T138 |
34860 |
332 |
0 |
0 |
T139 |
5235 |
49 |
0 |
0 |
T140 |
4799 |
7 |
0 |
0 |
T141 |
13524 |
23 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3306 |
0 |
0 |
T99 |
29543 |
170 |
0 |
0 |
T100 |
93396 |
385 |
0 |
0 |
T103 |
36650 |
244 |
0 |
0 |
T105 |
40620 |
259 |
0 |
0 |
T108 |
4538 |
7 |
0 |
0 |
T137 |
21239 |
28 |
0 |
0 |
T138 |
34860 |
273 |
0 |
0 |
T139 |
5235 |
5 |
0 |
0 |
T141 |
13524 |
47 |
0 |
0 |
T142 |
14172 |
24 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3011 |
0 |
0 |
T99 |
29543 |
69 |
0 |
0 |
T100 |
93396 |
396 |
0 |
0 |
T103 |
36650 |
233 |
0 |
0 |
T105 |
40620 |
198 |
0 |
0 |
T108 |
4538 |
41 |
0 |
0 |
T137 |
21239 |
34 |
0 |
0 |
T138 |
34860 |
224 |
0 |
0 |
T139 |
5235 |
55 |
0 |
0 |
T140 |
4799 |
43 |
0 |
0 |
T141 |
13524 |
67 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3397 |
0 |
0 |
T99 |
29543 |
88 |
0 |
0 |
T100 |
93396 |
497 |
0 |
0 |
T103 |
36650 |
207 |
0 |
0 |
T105 |
40620 |
262 |
0 |
0 |
T108 |
4538 |
6 |
0 |
0 |
T137 |
21239 |
86 |
0 |
0 |
T138 |
34860 |
212 |
0 |
0 |
T139 |
5235 |
15 |
0 |
0 |
T140 |
4799 |
21 |
0 |
0 |
T141 |
13524 |
25 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3686 |
0 |
0 |
T99 |
29543 |
247 |
0 |
0 |
T100 |
93396 |
331 |
0 |
0 |
T103 |
36650 |
232 |
0 |
0 |
T105 |
40620 |
236 |
0 |
0 |
T108 |
4538 |
33 |
0 |
0 |
T137 |
21239 |
41 |
0 |
0 |
T138 |
34860 |
416 |
0 |
0 |
T139 |
5235 |
13 |
0 |
0 |
T141 |
13524 |
91 |
0 |
0 |
T142 |
14172 |
69 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3494 |
0 |
0 |
T99 |
29543 |
164 |
0 |
0 |
T100 |
93396 |
401 |
0 |
0 |
T103 |
36650 |
227 |
0 |
0 |
T105 |
40620 |
226 |
0 |
0 |
T108 |
4538 |
5 |
0 |
0 |
T137 |
21239 |
80 |
0 |
0 |
T138 |
34860 |
276 |
0 |
0 |
T139 |
5235 |
4 |
0 |
0 |
T140 |
4799 |
50 |
0 |
0 |
T141 |
13524 |
55 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3415 |
0 |
0 |
T99 |
29543 |
143 |
0 |
0 |
T100 |
93396 |
563 |
0 |
0 |
T103 |
36650 |
189 |
0 |
0 |
T105 |
40620 |
275 |
0 |
0 |
T108 |
4538 |
50 |
0 |
0 |
T137 |
21239 |
25 |
0 |
0 |
T138 |
34860 |
378 |
0 |
0 |
T139 |
5235 |
9 |
0 |
0 |
T140 |
4799 |
13 |
0 |
0 |
T141 |
13524 |
31 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3696 |
0 |
0 |
T99 |
29543 |
121 |
0 |
0 |
T100 |
93396 |
466 |
0 |
0 |
T103 |
36650 |
277 |
0 |
0 |
T105 |
40620 |
215 |
0 |
0 |
T137 |
21239 |
59 |
0 |
0 |
T138 |
34860 |
444 |
0 |
0 |
T139 |
5235 |
62 |
0 |
0 |
T140 |
4799 |
9 |
0 |
0 |
T141 |
13524 |
12 |
0 |
0 |
T142 |
14172 |
71 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3781 |
0 |
0 |
T99 |
29543 |
154 |
0 |
0 |
T100 |
93396 |
626 |
0 |
0 |
T103 |
36650 |
280 |
0 |
0 |
T105 |
40620 |
252 |
0 |
0 |
T108 |
4538 |
3 |
0 |
0 |
T137 |
21239 |
78 |
0 |
0 |
T138 |
34860 |
187 |
0 |
0 |
T139 |
5235 |
58 |
0 |
0 |
T140 |
4799 |
15 |
0 |
0 |
T141 |
13524 |
74 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
2201 |
0 |
0 |
T99 |
29543 |
28 |
0 |
0 |
T100 |
93396 |
86 |
0 |
0 |
T103 |
36650 |
232 |
0 |
0 |
T105 |
40620 |
272 |
0 |
0 |
T108 |
4538 |
4 |
0 |
0 |
T137 |
21239 |
53 |
0 |
0 |
T138 |
34860 |
78 |
0 |
0 |
T139 |
5235 |
9 |
0 |
0 |
T141 |
13524 |
71 |
0 |
0 |
T142 |
14172 |
71 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
2067 |
0 |
0 |
T99 |
29543 |
32 |
0 |
0 |
T100 |
93396 |
108 |
0 |
0 |
T103 |
36650 |
246 |
0 |
0 |
T105 |
40620 |
246 |
0 |
0 |
T137 |
21239 |
34 |
0 |
0 |
T138 |
34860 |
50 |
0 |
0 |
T139 |
5235 |
7 |
0 |
0 |
T140 |
4799 |
3 |
0 |
0 |
T141 |
13524 |
68 |
0 |
0 |
T142 |
14172 |
18 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
1981 |
0 |
0 |
T99 |
29543 |
52 |
0 |
0 |
T100 |
93396 |
78 |
0 |
0 |
T103 |
36650 |
200 |
0 |
0 |
T105 |
40620 |
255 |
0 |
0 |
T108 |
4538 |
2 |
0 |
0 |
T137 |
21239 |
67 |
0 |
0 |
T138 |
34860 |
69 |
0 |
0 |
T139 |
5235 |
11 |
0 |
0 |
T140 |
4799 |
6 |
0 |
0 |
T141 |
13524 |
27 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
2057 |
0 |
0 |
T99 |
29543 |
9 |
0 |
0 |
T100 |
93396 |
78 |
0 |
0 |
T103 |
36650 |
241 |
0 |
0 |
T105 |
40620 |
253 |
0 |
0 |
T108 |
4538 |
1 |
0 |
0 |
T137 |
21239 |
75 |
0 |
0 |
T138 |
34860 |
74 |
0 |
0 |
T139 |
5235 |
15 |
0 |
0 |
T140 |
4799 |
1 |
0 |
0 |
T141 |
13524 |
25 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
2451 |
0 |
0 |
T99 |
29543 |
59 |
0 |
0 |
T100 |
93396 |
158 |
0 |
0 |
T103 |
36650 |
233 |
0 |
0 |
T105 |
40620 |
239 |
0 |
0 |
T108 |
4538 |
5 |
0 |
0 |
T137 |
21239 |
86 |
0 |
0 |
T138 |
34860 |
105 |
0 |
0 |
T139 |
5235 |
8 |
0 |
0 |
T140 |
4799 |
7 |
0 |
0 |
T141 |
13524 |
5 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
3757 |
0 |
0 |
T14 |
623911 |
27 |
0 |
0 |
T15 |
541596 |
11 |
0 |
0 |
T20 |
0 |
24 |
0 |
0 |
T33 |
359799 |
0 |
0 |
0 |
T56 |
194205 |
48 |
0 |
0 |
T131 |
132465 |
0 |
0 |
0 |
T132 |
124066 |
0 |
0 |
0 |
T143 |
0 |
44 |
0 |
0 |
T144 |
0 |
24 |
0 |
0 |
T145 |
0 |
24 |
0 |
0 |
T146 |
0 |
92 |
0 |
0 |
T147 |
0 |
38 |
0 |
0 |
T148 |
0 |
2 |
0 |
0 |
T149 |
437139 |
0 |
0 |
0 |
T150 |
15819 |
0 |
0 |
0 |
T151 |
131289 |
0 |
0 |
0 |
T152 |
30958 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
2166 |
0 |
0 |
T99 |
29543 |
45 |
0 |
0 |
T100 |
93396 |
108 |
0 |
0 |
T103 |
36650 |
276 |
0 |
0 |
T105 |
40620 |
235 |
0 |
0 |
T108 |
4538 |
11 |
0 |
0 |
T137 |
21239 |
47 |
0 |
0 |
T138 |
34860 |
62 |
0 |
0 |
T139 |
5235 |
9 |
0 |
0 |
T140 |
4799 |
9 |
0 |
0 |
T141 |
13524 |
36 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
2166 |
0 |
0 |
T99 |
29543 |
31 |
0 |
0 |
T100 |
93396 |
128 |
0 |
0 |
T103 |
36650 |
248 |
0 |
0 |
T105 |
40620 |
232 |
0 |
0 |
T108 |
4538 |
2 |
0 |
0 |
T137 |
21239 |
60 |
0 |
0 |
T138 |
34860 |
72 |
0 |
0 |
T139 |
5235 |
15 |
0 |
0 |
T141 |
13524 |
32 |
0 |
0 |
T142 |
14172 |
71 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
1782 |
0 |
0 |
T99 |
29543 |
13 |
0 |
0 |
T100 |
93396 |
69 |
0 |
0 |
T103 |
36650 |
212 |
0 |
0 |
T105 |
40620 |
194 |
0 |
0 |
T108 |
4538 |
1 |
0 |
0 |
T137 |
21239 |
53 |
0 |
0 |
T138 |
34860 |
39 |
0 |
0 |
T139 |
5235 |
6 |
0 |
0 |
T141 |
13524 |
36 |
0 |
0 |
T142 |
14172 |
40 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
1849 |
0 |
0 |
T99 |
29543 |
2 |
0 |
0 |
T100 |
93396 |
83 |
0 |
0 |
T103 |
36650 |
222 |
0 |
0 |
T105 |
40620 |
236 |
0 |
0 |
T137 |
21239 |
81 |
0 |
0 |
T138 |
34860 |
25 |
0 |
0 |
T139 |
5235 |
6 |
0 |
0 |
T140 |
4799 |
1 |
0 |
0 |
T141 |
13524 |
43 |
0 |
0 |
T142 |
14172 |
61 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
1983 |
0 |
0 |
T99 |
29543 |
28 |
0 |
0 |
T100 |
93396 |
58 |
0 |
0 |
T103 |
36650 |
213 |
0 |
0 |
T105 |
40620 |
248 |
0 |
0 |
T137 |
21239 |
116 |
0 |
0 |
T138 |
34860 |
28 |
0 |
0 |
T139 |
5235 |
10 |
0 |
0 |
T141 |
13524 |
25 |
0 |
0 |
T142 |
14172 |
66 |
0 |
0 |
T153 |
4928 |
5 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
1998 |
0 |
0 |
T99 |
29543 |
39 |
0 |
0 |
T100 |
93396 |
68 |
0 |
0 |
T103 |
36650 |
244 |
0 |
0 |
T105 |
40620 |
260 |
0 |
0 |
T108 |
4538 |
7 |
0 |
0 |
T137 |
21239 |
67 |
0 |
0 |
T138 |
34860 |
38 |
0 |
0 |
T139 |
5235 |
3 |
0 |
0 |
T141 |
13524 |
61 |
0 |
0 |
T142 |
14172 |
61 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
2492 |
0 |
0 |
T99 |
29543 |
40 |
0 |
0 |
T100 |
93396 |
225 |
0 |
0 |
T103 |
36650 |
236 |
0 |
0 |
T105 |
40620 |
269 |
0 |
0 |
T137 |
21239 |
64 |
0 |
0 |
T138 |
34860 |
87 |
0 |
0 |
T139 |
5235 |
5 |
0 |
0 |
T141 |
13524 |
65 |
0 |
0 |
T142 |
14172 |
72 |
0 |
0 |
T153 |
4928 |
5 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
1983 |
0 |
0 |
T99 |
29543 |
5 |
0 |
0 |
T100 |
93396 |
79 |
0 |
0 |
T103 |
36650 |
252 |
0 |
0 |
T105 |
40620 |
281 |
0 |
0 |
T108 |
4538 |
3 |
0 |
0 |
T137 |
21239 |
103 |
0 |
0 |
T138 |
34860 |
33 |
0 |
0 |
T139 |
5235 |
3 |
0 |
0 |
T140 |
4799 |
5 |
0 |
0 |
T141 |
13524 |
27 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
2540 |
0 |
0 |
T99 |
29543 |
65 |
0 |
0 |
T100 |
93396 |
165 |
0 |
0 |
T103 |
36650 |
241 |
0 |
0 |
T105 |
40620 |
239 |
0 |
0 |
T108 |
4538 |
18 |
0 |
0 |
T137 |
21239 |
26 |
0 |
0 |
T138 |
34860 |
118 |
0 |
0 |
T139 |
5235 |
28 |
0 |
0 |
T140 |
4799 |
1 |
0 |
0 |
T141 |
13524 |
51 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
2069 |
0 |
0 |
T99 |
29543 |
19 |
0 |
0 |
T100 |
93396 |
95 |
0 |
0 |
T103 |
36650 |
278 |
0 |
0 |
T105 |
40620 |
248 |
0 |
0 |
T108 |
4538 |
12 |
0 |
0 |
T137 |
21239 |
53 |
0 |
0 |
T138 |
34860 |
53 |
0 |
0 |
T139 |
5235 |
5 |
0 |
0 |
T140 |
4799 |
3 |
0 |
0 |
T141 |
13524 |
37 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
1942 |
0 |
0 |
T99 |
29543 |
7 |
0 |
0 |
T100 |
93396 |
52 |
0 |
0 |
T103 |
36650 |
222 |
0 |
0 |
T105 |
40620 |
229 |
0 |
0 |
T108 |
4538 |
1 |
0 |
0 |
T137 |
21239 |
102 |
0 |
0 |
T138 |
34860 |
18 |
0 |
0 |
T139 |
5235 |
11 |
0 |
0 |
T140 |
4799 |
4 |
0 |
0 |
T141 |
13524 |
49 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
2074 |
0 |
0 |
T82 |
11768 |
8 |
0 |
0 |
T99 |
29543 |
26 |
0 |
0 |
T100 |
93396 |
62 |
0 |
0 |
T103 |
36650 |
204 |
0 |
0 |
T105 |
40620 |
281 |
0 |
0 |
T108 |
4538 |
9 |
0 |
0 |
T137 |
21239 |
90 |
0 |
0 |
T138 |
34860 |
21 |
0 |
0 |
T139 |
5235 |
7 |
0 |
0 |
T140 |
4799 |
9 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
1986 |
0 |
0 |
T99 |
29543 |
10 |
0 |
0 |
T100 |
93396 |
96 |
0 |
0 |
T103 |
36650 |
244 |
0 |
0 |
T105 |
40620 |
266 |
0 |
0 |
T108 |
4538 |
9 |
0 |
0 |
T137 |
21239 |
53 |
0 |
0 |
T138 |
34860 |
36 |
0 |
0 |
T139 |
5235 |
8 |
0 |
0 |
T140 |
4799 |
10 |
0 |
0 |
T141 |
13524 |
77 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
1863 |
0 |
0 |
T99 |
29543 |
18 |
0 |
0 |
T100 |
93396 |
64 |
0 |
0 |
T103 |
36650 |
254 |
0 |
0 |
T105 |
40620 |
263 |
0 |
0 |
T108 |
4538 |
3 |
0 |
0 |
T137 |
21239 |
30 |
0 |
0 |
T138 |
34860 |
25 |
0 |
0 |
T139 |
5235 |
3 |
0 |
0 |
T140 |
4799 |
2 |
0 |
0 |
T141 |
13524 |
17 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
1932 |
0 |
0 |
T99 |
29543 |
31 |
0 |
0 |
T100 |
93396 |
86 |
0 |
0 |
T103 |
36650 |
240 |
0 |
0 |
T105 |
40620 |
262 |
0 |
0 |
T108 |
4538 |
4 |
0 |
0 |
T137 |
21239 |
72 |
0 |
0 |
T138 |
34860 |
41 |
0 |
0 |
T139 |
5235 |
5 |
0 |
0 |
T140 |
4799 |
7 |
0 |
0 |
T141 |
13524 |
40 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
409598004 |
1967 |
0 |
0 |
T99 |
29543 |
10 |
0 |
0 |
T100 |
93396 |
61 |
0 |
0 |
T103 |
36650 |
282 |
0 |
0 |
T105 |
40620 |
267 |
0 |
0 |
T108 |
4538 |
3 |
0 |
0 |
T137 |
21239 |
88 |
0 |
0 |
T138 |
34860 |
40 |
0 |
0 |
T139 |
5235 |
11 |
0 |
0 |
T140 |
4799 |
7 |
0 |
0 |
T141 |
13524 |
35 |
0 |
0 |