Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
2911 |
0 |
0 |
T104 |
6526 |
293 |
0 |
0 |
T106 |
3928 |
9 |
0 |
0 |
T107 |
19138 |
177 |
0 |
0 |
T108 |
61887 |
1 |
0 |
0 |
T110 |
5257 |
58 |
0 |
0 |
T112 |
8873 |
9 |
0 |
0 |
T116 |
8224 |
89 |
0 |
0 |
T118 |
8347 |
141 |
0 |
0 |
T122 |
4051 |
15 |
0 |
0 |
T123 |
10670 |
4 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1399 |
0 |
0 |
T108 |
61887 |
56 |
0 |
0 |
T123 |
10670 |
11 |
0 |
0 |
T163 |
12701 |
61 |
0 |
0 |
T164 |
6994 |
4 |
0 |
0 |
T165 |
9946 |
13 |
0 |
0 |
T166 |
4757 |
7 |
0 |
0 |
T167 |
15792 |
14 |
0 |
0 |
T168 |
180268 |
452 |
0 |
0 |
T169 |
14608 |
26 |
0 |
0 |
T170 |
6452 |
29 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1227 |
0 |
0 |
T108 |
61887 |
35 |
0 |
0 |
T123 |
10670 |
15 |
0 |
0 |
T163 |
12701 |
70 |
0 |
0 |
T164 |
6994 |
18 |
0 |
0 |
T165 |
9946 |
7 |
0 |
0 |
T167 |
15792 |
30 |
0 |
0 |
T168 |
180268 |
426 |
0 |
0 |
T169 |
14608 |
24 |
0 |
0 |
T171 |
180313 |
418 |
0 |
0 |
T172 |
33896 |
26 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1584 |
0 |
0 |
T108 |
61887 |
78 |
0 |
0 |
T123 |
10670 |
27 |
0 |
0 |
T163 |
12701 |
51 |
0 |
0 |
T164 |
6994 |
3 |
0 |
0 |
T165 |
9946 |
20 |
0 |
0 |
T167 |
15792 |
31 |
0 |
0 |
T168 |
180268 |
460 |
0 |
0 |
T169 |
14608 |
27 |
0 |
0 |
T170 |
6452 |
16 |
0 |
0 |
T171 |
180313 |
456 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
5078 |
0 |
0 |
T108 |
61887 |
608 |
0 |
0 |
T123 |
10670 |
128 |
0 |
0 |
T163 |
12701 |
27 |
0 |
0 |
T164 |
6994 |
21 |
0 |
0 |
T165 |
9946 |
9 |
0 |
0 |
T166 |
4757 |
5 |
0 |
0 |
T167 |
15792 |
299 |
0 |
0 |
T168 |
180268 |
440 |
0 |
0 |
T169 |
14608 |
258 |
0 |
0 |
T170 |
6452 |
14 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
4204 |
0 |
0 |
T108 |
61887 |
665 |
0 |
0 |
T123 |
10670 |
15 |
0 |
0 |
T163 |
12701 |
53 |
0 |
0 |
T164 |
6994 |
12 |
0 |
0 |
T165 |
9946 |
11 |
0 |
0 |
T166 |
4757 |
136 |
0 |
0 |
T167 |
15792 |
13 |
0 |
0 |
T168 |
180268 |
412 |
0 |
0 |
T169 |
14608 |
108 |
0 |
0 |
T170 |
6452 |
11 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
5608 |
0 |
0 |
T108 |
61887 |
444 |
0 |
0 |
T123 |
10670 |
217 |
0 |
0 |
T163 |
12701 |
31 |
0 |
0 |
T164 |
6994 |
32 |
0 |
0 |
T165 |
9946 |
248 |
0 |
0 |
T166 |
4757 |
6 |
0 |
0 |
T167 |
15792 |
292 |
0 |
0 |
T168 |
180268 |
463 |
0 |
0 |
T169 |
14608 |
132 |
0 |
0 |
T170 |
6452 |
16 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
5715 |
0 |
0 |
T108 |
61887 |
865 |
0 |
0 |
T123 |
10670 |
230 |
0 |
0 |
T163 |
12701 |
49 |
0 |
0 |
T164 |
6994 |
10 |
0 |
0 |
T165 |
9946 |
153 |
0 |
0 |
T166 |
4757 |
148 |
0 |
0 |
T167 |
15792 |
178 |
0 |
0 |
T168 |
180268 |
425 |
0 |
0 |
T169 |
14608 |
129 |
0 |
0 |
T170 |
6452 |
17 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
5698 |
0 |
0 |
T108 |
61887 |
729 |
0 |
0 |
T123 |
10670 |
113 |
0 |
0 |
T163 |
12701 |
39 |
0 |
0 |
T164 |
6994 |
30 |
0 |
0 |
T165 |
9946 |
125 |
0 |
0 |
T166 |
4757 |
113 |
0 |
0 |
T167 |
15792 |
378 |
0 |
0 |
T168 |
180268 |
430 |
0 |
0 |
T169 |
14608 |
170 |
0 |
0 |
T170 |
6452 |
21 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
4807 |
0 |
0 |
T108 |
61887 |
786 |
0 |
0 |
T123 |
10670 |
262 |
0 |
0 |
T163 |
12701 |
29 |
0 |
0 |
T164 |
6994 |
22 |
0 |
0 |
T165 |
9946 |
10 |
0 |
0 |
T166 |
4757 |
2 |
0 |
0 |
T167 |
15792 |
190 |
0 |
0 |
T168 |
180268 |
461 |
0 |
0 |
T169 |
14608 |
236 |
0 |
0 |
T170 |
6452 |
19 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
6553 |
0 |
0 |
T107 |
19138 |
4 |
0 |
0 |
T108 |
61887 |
618 |
0 |
0 |
T123 |
10670 |
108 |
0 |
0 |
T163 |
12701 |
36 |
0 |
0 |
T164 |
6994 |
21 |
0 |
0 |
T165 |
9946 |
131 |
0 |
0 |
T166 |
4757 |
142 |
0 |
0 |
T167 |
15792 |
369 |
0 |
0 |
T168 |
180268 |
485 |
0 |
0 |
T169 |
14608 |
247 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
5472 |
0 |
0 |
T108 |
61887 |
592 |
0 |
0 |
T123 |
10670 |
126 |
0 |
0 |
T163 |
12701 |
34 |
0 |
0 |
T164 |
6994 |
38 |
0 |
0 |
T165 |
9946 |
22 |
0 |
0 |
T166 |
4757 |
1 |
0 |
0 |
T167 |
15792 |
346 |
0 |
0 |
T168 |
180268 |
429 |
0 |
0 |
T169 |
14608 |
139 |
0 |
0 |
T170 |
6452 |
24 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
3035 |
0 |
0 |
T108 |
61887 |
265 |
0 |
0 |
T123 |
10670 |
94 |
0 |
0 |
T163 |
12701 |
32 |
0 |
0 |
T164 |
6994 |
22 |
0 |
0 |
T165 |
9946 |
63 |
0 |
0 |
T166 |
4757 |
71 |
0 |
0 |
T167 |
15792 |
99 |
0 |
0 |
T168 |
180268 |
451 |
0 |
0 |
T169 |
14608 |
142 |
0 |
0 |
T171 |
180313 |
423 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
3088 |
0 |
0 |
T108 |
61887 |
204 |
0 |
0 |
T123 |
10670 |
55 |
0 |
0 |
T163 |
12701 |
18 |
0 |
0 |
T164 |
6994 |
29 |
0 |
0 |
T165 |
9946 |
77 |
0 |
0 |
T166 |
4757 |
59 |
0 |
0 |
T167 |
15792 |
106 |
0 |
0 |
T168 |
180268 |
436 |
0 |
0 |
T169 |
14608 |
31 |
0 |
0 |
T171 |
180313 |
434 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
2819 |
0 |
0 |
T108 |
61887 |
417 |
0 |
0 |
T123 |
10670 |
72 |
0 |
0 |
T163 |
12701 |
34 |
0 |
0 |
T164 |
6994 |
16 |
0 |
0 |
T165 |
9946 |
115 |
0 |
0 |
T166 |
4757 |
4 |
0 |
0 |
T167 |
15792 |
58 |
0 |
0 |
T168 |
180268 |
427 |
0 |
0 |
T169 |
14608 |
49 |
0 |
0 |
T170 |
6452 |
42 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
2969 |
0 |
0 |
T108 |
61887 |
306 |
0 |
0 |
T123 |
10670 |
13 |
0 |
0 |
T163 |
12701 |
47 |
0 |
0 |
T164 |
6994 |
6 |
0 |
0 |
T165 |
9946 |
50 |
0 |
0 |
T166 |
4757 |
46 |
0 |
0 |
T167 |
15792 |
77 |
0 |
0 |
T168 |
180268 |
451 |
0 |
0 |
T169 |
14608 |
49 |
0 |
0 |
T170 |
6452 |
25 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
3143 |
0 |
0 |
T108 |
61887 |
258 |
0 |
0 |
T123 |
10670 |
47 |
0 |
0 |
T163 |
12701 |
30 |
0 |
0 |
T164 |
6994 |
8 |
0 |
0 |
T165 |
9946 |
124 |
0 |
0 |
T166 |
4757 |
65 |
0 |
0 |
T167 |
15792 |
23 |
0 |
0 |
T168 |
180268 |
438 |
0 |
0 |
T169 |
14608 |
65 |
0 |
0 |
T170 |
6452 |
21 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
2978 |
0 |
0 |
T107 |
19138 |
5 |
0 |
0 |
T108 |
61887 |
336 |
0 |
0 |
T123 |
10670 |
73 |
0 |
0 |
T163 |
12701 |
22 |
0 |
0 |
T164 |
6994 |
8 |
0 |
0 |
T165 |
9946 |
69 |
0 |
0 |
T166 |
4757 |
2 |
0 |
0 |
T167 |
15792 |
151 |
0 |
0 |
T168 |
180268 |
451 |
0 |
0 |
T169 |
14608 |
64 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
2931 |
0 |
0 |
T108 |
61887 |
154 |
0 |
0 |
T123 |
10670 |
73 |
0 |
0 |
T163 |
12701 |
14 |
0 |
0 |
T164 |
6994 |
35 |
0 |
0 |
T165 |
9946 |
57 |
0 |
0 |
T166 |
4757 |
67 |
0 |
0 |
T167 |
15792 |
17 |
0 |
0 |
T168 |
180268 |
471 |
0 |
0 |
T169 |
14608 |
178 |
0 |
0 |
T171 |
180313 |
472 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
3002 |
0 |
0 |
T108 |
61887 |
187 |
0 |
0 |
T116 |
8224 |
5 |
0 |
0 |
T123 |
10670 |
44 |
0 |
0 |
T163 |
12701 |
30 |
0 |
0 |
T164 |
6994 |
16 |
0 |
0 |
T165 |
9946 |
68 |
0 |
0 |
T166 |
4757 |
64 |
0 |
0 |
T167 |
15792 |
139 |
0 |
0 |
T168 |
180268 |
427 |
0 |
0 |
T169 |
14608 |
70 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
2825 |
0 |
0 |
T108 |
61887 |
242 |
0 |
0 |
T123 |
10670 |
13 |
0 |
0 |
T163 |
12701 |
17 |
0 |
0 |
T164 |
6994 |
24 |
0 |
0 |
T165 |
9946 |
66 |
0 |
0 |
T166 |
4757 |
42 |
0 |
0 |
T167 |
15792 |
81 |
0 |
0 |
T168 |
180268 |
476 |
0 |
0 |
T169 |
14608 |
108 |
0 |
0 |
T170 |
6452 |
18 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
2916 |
0 |
0 |
T107 |
19138 |
1 |
0 |
0 |
T108 |
61887 |
244 |
0 |
0 |
T123 |
10670 |
41 |
0 |
0 |
T163 |
12701 |
52 |
0 |
0 |
T164 |
6994 |
21 |
0 |
0 |
T165 |
9946 |
53 |
0 |
0 |
T166 |
4757 |
70 |
0 |
0 |
T167 |
15792 |
71 |
0 |
0 |
T168 |
180268 |
470 |
0 |
0 |
T169 |
14608 |
82 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
3016 |
0 |
0 |
T108 |
61887 |
377 |
0 |
0 |
T123 |
10670 |
18 |
0 |
0 |
T163 |
12701 |
36 |
0 |
0 |
T164 |
6994 |
23 |
0 |
0 |
T165 |
9946 |
50 |
0 |
0 |
T166 |
4757 |
6 |
0 |
0 |
T167 |
15792 |
109 |
0 |
0 |
T168 |
180268 |
413 |
0 |
0 |
T169 |
14608 |
102 |
0 |
0 |
T170 |
6452 |
12 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
2771 |
0 |
0 |
T108 |
61887 |
392 |
0 |
0 |
T123 |
10670 |
58 |
0 |
0 |
T163 |
12701 |
27 |
0 |
0 |
T164 |
6994 |
20 |
0 |
0 |
T165 |
9946 |
74 |
0 |
0 |
T166 |
4757 |
9 |
0 |
0 |
T167 |
15792 |
134 |
0 |
0 |
T168 |
180268 |
428 |
0 |
0 |
T169 |
14608 |
146 |
0 |
0 |
T170 |
6452 |
18 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
3172 |
0 |
0 |
T108 |
61887 |
398 |
0 |
0 |
T123 |
10670 |
88 |
0 |
0 |
T163 |
12701 |
69 |
0 |
0 |
T164 |
6994 |
16 |
0 |
0 |
T165 |
9946 |
85 |
0 |
0 |
T166 |
4757 |
7 |
0 |
0 |
T167 |
15792 |
91 |
0 |
0 |
T168 |
180268 |
531 |
0 |
0 |
T169 |
14608 |
122 |
0 |
0 |
T170 |
6452 |
6 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
3052 |
0 |
0 |
T108 |
61887 |
308 |
0 |
0 |
T123 |
10670 |
67 |
0 |
0 |
T163 |
12701 |
42 |
0 |
0 |
T164 |
6994 |
16 |
0 |
0 |
T165 |
9946 |
34 |
0 |
0 |
T166 |
4757 |
47 |
0 |
0 |
T167 |
15792 |
191 |
0 |
0 |
T168 |
180268 |
470 |
0 |
0 |
T169 |
14608 |
85 |
0 |
0 |
T170 |
6452 |
22 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
3116 |
0 |
0 |
T108 |
61887 |
375 |
0 |
0 |
T123 |
10670 |
50 |
0 |
0 |
T163 |
12701 |
39 |
0 |
0 |
T164 |
6994 |
9 |
0 |
0 |
T165 |
9946 |
48 |
0 |
0 |
T166 |
4757 |
4 |
0 |
0 |
T167 |
15792 |
34 |
0 |
0 |
T168 |
180268 |
425 |
0 |
0 |
T169 |
14608 |
92 |
0 |
0 |
T171 |
180313 |
480 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
2820 |
0 |
0 |
T108 |
61887 |
288 |
0 |
0 |
T123 |
10670 |
82 |
0 |
0 |
T163 |
12701 |
70 |
0 |
0 |
T164 |
6994 |
40 |
0 |
0 |
T165 |
9946 |
22 |
0 |
0 |
T166 |
4757 |
62 |
0 |
0 |
T167 |
15792 |
73 |
0 |
0 |
T168 |
180268 |
487 |
0 |
0 |
T169 |
14608 |
81 |
0 |
0 |
T170 |
6452 |
17 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
3160 |
0 |
0 |
T108 |
61887 |
304 |
0 |
0 |
T123 |
10670 |
69 |
0 |
0 |
T163 |
12701 |
52 |
0 |
0 |
T164 |
6994 |
34 |
0 |
0 |
T165 |
9946 |
126 |
0 |
0 |
T166 |
4757 |
4 |
0 |
0 |
T167 |
15792 |
67 |
0 |
0 |
T168 |
180268 |
414 |
0 |
0 |
T169 |
14608 |
100 |
0 |
0 |
T170 |
6452 |
1 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
3394 |
0 |
0 |
T108 |
61887 |
315 |
0 |
0 |
T123 |
10670 |
48 |
0 |
0 |
T163 |
12701 |
46 |
0 |
0 |
T164 |
6994 |
35 |
0 |
0 |
T165 |
9946 |
28 |
0 |
0 |
T166 |
4757 |
9 |
0 |
0 |
T167 |
15792 |
141 |
0 |
0 |
T168 |
180268 |
478 |
0 |
0 |
T169 |
14608 |
124 |
0 |
0 |
T171 |
180313 |
449 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
3051 |
0 |
0 |
T108 |
61887 |
277 |
0 |
0 |
T123 |
10670 |
18 |
0 |
0 |
T163 |
12701 |
46 |
0 |
0 |
T164 |
6994 |
36 |
0 |
0 |
T165 |
9946 |
98 |
0 |
0 |
T166 |
4757 |
6 |
0 |
0 |
T167 |
15792 |
132 |
0 |
0 |
T168 |
180268 |
472 |
0 |
0 |
T169 |
14608 |
72 |
0 |
0 |
T170 |
6452 |
4 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
2835 |
0 |
0 |
T108 |
61887 |
199 |
0 |
0 |
T123 |
10670 |
49 |
0 |
0 |
T163 |
12701 |
75 |
0 |
0 |
T164 |
6994 |
24 |
0 |
0 |
T165 |
9946 |
109 |
0 |
0 |
T166 |
4757 |
68 |
0 |
0 |
T167 |
15792 |
84 |
0 |
0 |
T168 |
180268 |
420 |
0 |
0 |
T169 |
14608 |
71 |
0 |
0 |
T170 |
6452 |
15 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
3198 |
0 |
0 |
T108 |
61887 |
259 |
0 |
0 |
T123 |
10670 |
66 |
0 |
0 |
T163 |
12701 |
26 |
0 |
0 |
T164 |
6994 |
11 |
0 |
0 |
T165 |
9946 |
25 |
0 |
0 |
T166 |
4757 |
66 |
0 |
0 |
T167 |
15792 |
73 |
0 |
0 |
T168 |
180268 |
484 |
0 |
0 |
T169 |
14608 |
103 |
0 |
0 |
T170 |
6452 |
5 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
2927 |
0 |
0 |
T108 |
61887 |
328 |
0 |
0 |
T115 |
7323 |
3 |
0 |
0 |
T123 |
10670 |
54 |
0 |
0 |
T163 |
12701 |
33 |
0 |
0 |
T164 |
6994 |
17 |
0 |
0 |
T165 |
9946 |
61 |
0 |
0 |
T166 |
4757 |
8 |
0 |
0 |
T167 |
15792 |
120 |
0 |
0 |
T168 |
180268 |
369 |
0 |
0 |
T169 |
14608 |
64 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
3051 |
0 |
0 |
T108 |
61887 |
413 |
0 |
0 |
T118 |
8347 |
3 |
0 |
0 |
T123 |
10670 |
116 |
0 |
0 |
T163 |
12701 |
33 |
0 |
0 |
T164 |
6994 |
8 |
0 |
0 |
T165 |
9946 |
37 |
0 |
0 |
T166 |
4757 |
53 |
0 |
0 |
T167 |
15792 |
159 |
0 |
0 |
T168 |
180268 |
457 |
0 |
0 |
T169 |
14608 |
72 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
3046 |
0 |
0 |
T108 |
61887 |
314 |
0 |
0 |
T123 |
10670 |
41 |
0 |
0 |
T163 |
12701 |
24 |
0 |
0 |
T164 |
6994 |
35 |
0 |
0 |
T165 |
9946 |
43 |
0 |
0 |
T166 |
4757 |
53 |
0 |
0 |
T167 |
15792 |
113 |
0 |
0 |
T168 |
180268 |
453 |
0 |
0 |
T169 |
14608 |
187 |
0 |
0 |
T170 |
6452 |
7 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1398 |
0 |
0 |
T108 |
61887 |
60 |
0 |
0 |
T123 |
10670 |
20 |
0 |
0 |
T163 |
12701 |
39 |
0 |
0 |
T164 |
6994 |
4 |
0 |
0 |
T165 |
9946 |
29 |
0 |
0 |
T166 |
4757 |
3 |
0 |
0 |
T167 |
15792 |
19 |
0 |
0 |
T168 |
180268 |
420 |
0 |
0 |
T169 |
14608 |
28 |
0 |
0 |
T170 |
6452 |
31 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1442 |
0 |
0 |
T108 |
61887 |
84 |
0 |
0 |
T123 |
10670 |
4 |
0 |
0 |
T163 |
12701 |
65 |
0 |
0 |
T164 |
6994 |
20 |
0 |
0 |
T165 |
9946 |
27 |
0 |
0 |
T166 |
4757 |
12 |
0 |
0 |
T167 |
15792 |
48 |
0 |
0 |
T168 |
180268 |
399 |
0 |
0 |
T169 |
14608 |
22 |
0 |
0 |
T170 |
6452 |
2 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1609 |
0 |
0 |
T108 |
61887 |
63 |
0 |
0 |
T123 |
10670 |
33 |
0 |
0 |
T163 |
12701 |
76 |
0 |
0 |
T164 |
6994 |
14 |
0 |
0 |
T165 |
9946 |
26 |
0 |
0 |
T166 |
4757 |
8 |
0 |
0 |
T167 |
15792 |
40 |
0 |
0 |
T168 |
180268 |
431 |
0 |
0 |
T169 |
14608 |
19 |
0 |
0 |
T170 |
6452 |
13 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1507 |
0 |
0 |
T108 |
61887 |
79 |
0 |
0 |
T123 |
10670 |
14 |
0 |
0 |
T163 |
12701 |
59 |
0 |
0 |
T164 |
6994 |
9 |
0 |
0 |
T165 |
9946 |
21 |
0 |
0 |
T166 |
4757 |
4 |
0 |
0 |
T167 |
15792 |
46 |
0 |
0 |
T168 |
180268 |
464 |
0 |
0 |
T169 |
14608 |
22 |
0 |
0 |
T170 |
6452 |
17 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1777 |
0 |
0 |
T108 |
61887 |
122 |
0 |
0 |
T123 |
10670 |
35 |
0 |
0 |
T163 |
12701 |
19 |
0 |
0 |
T164 |
6994 |
28 |
0 |
0 |
T165 |
9946 |
39 |
0 |
0 |
T166 |
4757 |
25 |
0 |
0 |
T167 |
15792 |
79 |
0 |
0 |
T168 |
180268 |
393 |
0 |
0 |
T169 |
14608 |
32 |
0 |
0 |
T170 |
6452 |
7 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
2907 |
0 |
0 |
T33 |
6281 |
48 |
0 |
0 |
T34 |
6003 |
0 |
0 |
0 |
T36 |
0 |
36 |
0 |
0 |
T49 |
76243 |
0 |
0 |
0 |
T150 |
0 |
21 |
0 |
0 |
T152 |
0 |
19 |
0 |
0 |
T157 |
87768 |
0 |
0 |
0 |
T173 |
0 |
34 |
0 |
0 |
T174 |
0 |
16 |
0 |
0 |
T175 |
0 |
64 |
0 |
0 |
T176 |
0 |
38 |
0 |
0 |
T177 |
0 |
8 |
0 |
0 |
T178 |
0 |
28 |
0 |
0 |
T179 |
478610 |
0 |
0 |
0 |
T180 |
1272 |
0 |
0 |
0 |
T181 |
1330 |
0 |
0 |
0 |
T182 |
1984 |
0 |
0 |
0 |
T183 |
2971 |
0 |
0 |
0 |
T184 |
11751 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1455 |
0 |
0 |
T108 |
61887 |
61 |
0 |
0 |
T123 |
10670 |
26 |
0 |
0 |
T163 |
12701 |
30 |
0 |
0 |
T164 |
6994 |
11 |
0 |
0 |
T165 |
9946 |
8 |
0 |
0 |
T166 |
4757 |
1 |
0 |
0 |
T167 |
15792 |
24 |
0 |
0 |
T168 |
180268 |
473 |
0 |
0 |
T169 |
14608 |
17 |
0 |
0 |
T170 |
6452 |
12 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1424 |
0 |
0 |
T108 |
61887 |
33 |
0 |
0 |
T123 |
10670 |
15 |
0 |
0 |
T163 |
12701 |
35 |
0 |
0 |
T164 |
6994 |
18 |
0 |
0 |
T165 |
9946 |
12 |
0 |
0 |
T167 |
15792 |
26 |
0 |
0 |
T168 |
180268 |
430 |
0 |
0 |
T169 |
14608 |
29 |
0 |
0 |
T170 |
6452 |
4 |
0 |
0 |
T171 |
180313 |
464 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1350 |
0 |
0 |
T108 |
61887 |
62 |
0 |
0 |
T123 |
10670 |
15 |
0 |
0 |
T163 |
12701 |
39 |
0 |
0 |
T164 |
6994 |
20 |
0 |
0 |
T165 |
9946 |
23 |
0 |
0 |
T166 |
4757 |
5 |
0 |
0 |
T167 |
15792 |
20 |
0 |
0 |
T168 |
180268 |
450 |
0 |
0 |
T169 |
14608 |
33 |
0 |
0 |
T170 |
6452 |
3 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1331 |
0 |
0 |
T108 |
61887 |
33 |
0 |
0 |
T123 |
10670 |
14 |
0 |
0 |
T163 |
12701 |
45 |
0 |
0 |
T164 |
6994 |
12 |
0 |
0 |
T165 |
9946 |
12 |
0 |
0 |
T166 |
4757 |
2 |
0 |
0 |
T167 |
15792 |
15 |
0 |
0 |
T168 |
180268 |
430 |
0 |
0 |
T169 |
14608 |
23 |
0 |
0 |
T170 |
6452 |
32 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1305 |
0 |
0 |
T108 |
61887 |
44 |
0 |
0 |
T123 |
10670 |
15 |
0 |
0 |
T163 |
12701 |
80 |
0 |
0 |
T164 |
6994 |
8 |
0 |
0 |
T165 |
9946 |
16 |
0 |
0 |
T166 |
4757 |
7 |
0 |
0 |
T167 |
15792 |
16 |
0 |
0 |
T168 |
180268 |
404 |
0 |
0 |
T169 |
14608 |
17 |
0 |
0 |
T170 |
6452 |
6 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1466 |
0 |
0 |
T108 |
61887 |
33 |
0 |
0 |
T123 |
10670 |
11 |
0 |
0 |
T163 |
12701 |
75 |
0 |
0 |
T164 |
6994 |
22 |
0 |
0 |
T165 |
9946 |
18 |
0 |
0 |
T166 |
4757 |
5 |
0 |
0 |
T167 |
15792 |
31 |
0 |
0 |
T168 |
180268 |
519 |
0 |
0 |
T169 |
14608 |
17 |
0 |
0 |
T170 |
6452 |
6 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1711 |
0 |
0 |
T108 |
61887 |
132 |
0 |
0 |
T123 |
10670 |
25 |
0 |
0 |
T163 |
12701 |
9 |
0 |
0 |
T164 |
6994 |
29 |
0 |
0 |
T165 |
9946 |
33 |
0 |
0 |
T166 |
4757 |
16 |
0 |
0 |
T167 |
15792 |
41 |
0 |
0 |
T168 |
180268 |
410 |
0 |
0 |
T169 |
14608 |
63 |
0 |
0 |
T170 |
6452 |
6 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1330 |
0 |
0 |
T108 |
61887 |
31 |
0 |
0 |
T123 |
10670 |
22 |
0 |
0 |
T163 |
12701 |
56 |
0 |
0 |
T164 |
6994 |
18 |
0 |
0 |
T165 |
9946 |
13 |
0 |
0 |
T166 |
4757 |
9 |
0 |
0 |
T167 |
15792 |
21 |
0 |
0 |
T168 |
180268 |
457 |
0 |
0 |
T169 |
14608 |
28 |
0 |
0 |
T170 |
6452 |
13 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1860 |
0 |
0 |
T108 |
61887 |
118 |
0 |
0 |
T123 |
10670 |
31 |
0 |
0 |
T163 |
12701 |
37 |
0 |
0 |
T164 |
6994 |
7 |
0 |
0 |
T165 |
9946 |
20 |
0 |
0 |
T166 |
4757 |
19 |
0 |
0 |
T167 |
15792 |
54 |
0 |
0 |
T168 |
180268 |
387 |
0 |
0 |
T169 |
14608 |
48 |
0 |
0 |
T171 |
180313 |
469 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1546 |
0 |
0 |
T108 |
61887 |
66 |
0 |
0 |
T123 |
10670 |
14 |
0 |
0 |
T163 |
12701 |
10 |
0 |
0 |
T164 |
6994 |
10 |
0 |
0 |
T165 |
9946 |
18 |
0 |
0 |
T166 |
4757 |
8 |
0 |
0 |
T167 |
15792 |
32 |
0 |
0 |
T168 |
180268 |
462 |
0 |
0 |
T169 |
14608 |
34 |
0 |
0 |
T170 |
6452 |
9 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1354 |
0 |
0 |
T108 |
61887 |
27 |
0 |
0 |
T123 |
10670 |
4 |
0 |
0 |
T163 |
12701 |
30 |
0 |
0 |
T164 |
6994 |
41 |
0 |
0 |
T165 |
9946 |
3 |
0 |
0 |
T166 |
4757 |
2 |
0 |
0 |
T167 |
15792 |
23 |
0 |
0 |
T168 |
180268 |
456 |
0 |
0 |
T169 |
14608 |
26 |
0 |
0 |
T170 |
6452 |
9 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1390 |
0 |
0 |
T108 |
61887 |
29 |
0 |
0 |
T123 |
10670 |
15 |
0 |
0 |
T163 |
12701 |
18 |
0 |
0 |
T164 |
6994 |
18 |
0 |
0 |
T165 |
9946 |
12 |
0 |
0 |
T166 |
4757 |
4 |
0 |
0 |
T167 |
15792 |
20 |
0 |
0 |
T168 |
180268 |
518 |
0 |
0 |
T169 |
14608 |
12 |
0 |
0 |
T171 |
180313 |
462 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1254 |
0 |
0 |
T108 |
61887 |
26 |
0 |
0 |
T123 |
10670 |
11 |
0 |
0 |
T163 |
12701 |
65 |
0 |
0 |
T164 |
6994 |
20 |
0 |
0 |
T165 |
9946 |
5 |
0 |
0 |
T166 |
4757 |
9 |
0 |
0 |
T167 |
15792 |
27 |
0 |
0 |
T168 |
180268 |
412 |
0 |
0 |
T169 |
14608 |
23 |
0 |
0 |
T171 |
180313 |
461 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1461 |
0 |
0 |
T108 |
61887 |
39 |
0 |
0 |
T123 |
10670 |
24 |
0 |
0 |
T163 |
12701 |
97 |
0 |
0 |
T164 |
6994 |
9 |
0 |
0 |
T165 |
9946 |
9 |
0 |
0 |
T166 |
4757 |
8 |
0 |
0 |
T167 |
15792 |
24 |
0 |
0 |
T168 |
180268 |
432 |
0 |
0 |
T169 |
14608 |
13 |
0 |
0 |
T170 |
6452 |
15 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1348 |
0 |
0 |
T108 |
61887 |
57 |
0 |
0 |
T123 |
10670 |
13 |
0 |
0 |
T163 |
12701 |
21 |
0 |
0 |
T164 |
6994 |
40 |
0 |
0 |
T165 |
9946 |
10 |
0 |
0 |
T166 |
4757 |
8 |
0 |
0 |
T167 |
15792 |
23 |
0 |
0 |
T168 |
180268 |
414 |
0 |
0 |
T169 |
14608 |
32 |
0 |
0 |
T170 |
6452 |
11 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
459754234 |
1444 |
0 |
0 |
T108 |
61887 |
45 |
0 |
0 |
T123 |
10670 |
23 |
0 |
0 |
T163 |
12701 |
57 |
0 |
0 |
T164 |
6994 |
43 |
0 |
0 |
T165 |
9946 |
16 |
0 |
0 |
T166 |
4757 |
6 |
0 |
0 |
T167 |
15792 |
14 |
0 |
0 |
T168 |
180268 |
479 |
0 |
0 |
T169 |
14608 |
22 |
0 |
0 |
T170 |
6452 |
9 |
0 |
0 |