Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_2p-sim-vcs/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
92.52	95.20	84.31	97.00		90.62	95.45	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	455442118	3435	0	0
addr_swap_data_rd_A	455442118	1518	0	0
addr_swap_mask_rd_A	455442118	1466	0	0
cfg_rd_A	455442118	2017	0	0
cmd_filter_0_rd_A	455442118	9111	0	0
cmd_filter_1_rd_A	455442118	10127	0	0
cmd_filter_2_rd_A	455442118	10543	0	0
cmd_filter_3_rd_A	455442118	11068	0	0
cmd_filter_4_rd_A	455442118	10299	0	0
cmd_filter_5_rd_A	455442118	9805	0	0
cmd_filter_6_rd_A	455442118	10157	0	0
cmd_filter_7_rd_A	455442118	9096	0	0
cmd_info_0_rd_A	455442118	4839	0	0
cmd_info_10_rd_A	455442118	4321	0	0
cmd_info_11_rd_A	455442118	5121	0	0
cmd_info_12_rd_A	455442118	4364	0	0
cmd_info_13_rd_A	455442118	5097	0	0
cmd_info_14_rd_A	455442118	4305	0	0
cmd_info_15_rd_A	455442118	4638	0	0
cmd_info_16_rd_A	455442118	4813	0	0
cmd_info_17_rd_A	455442118	5057	0	0
cmd_info_18_rd_A	455442118	5173	0	0
cmd_info_19_rd_A	455442118	4893	0	0
cmd_info_1_rd_A	455442118	4988	0	0
cmd_info_20_rd_A	455442118	4642	0	0
cmd_info_21_rd_A	455442118	4472	0	0
cmd_info_22_rd_A	455442118	4395	0	0
cmd_info_23_rd_A	455442118	4617	0	0
cmd_info_2_rd_A	455442118	5104	0	0
cmd_info_3_rd_A	455442118	4438	0	0
cmd_info_4_rd_A	455442118	4321	0	0
cmd_info_5_rd_A	455442118	4365	0	0
cmd_info_6_rd_A	455442118	4780	0	0
cmd_info_7_rd_A	455442118	4577	0	0
cmd_info_8_rd_A	455442118	4595	0	0
cmd_info_9_rd_A	455442118	4480	0	0
cmd_info_en4b_rd_A	455442118	1715	0	0
cmd_info_ex4b_rd_A	455442118	1707	0	0
cmd_info_wrdi_rd_A	455442118	1691	0	0
cmd_info_wren_rd_A	455442118	1867	0	0
intercept_en_rd_A	455442118	2192	0	0
intr_enable_rd_A	455442118	4341	0	0
jedec_cc_rd_A	455442118	1748	0	0
jedec_id_rd_A	455442118	1702	0	0
mailbox_addr_rd_A	455442118	1523	0	0
payload_swap_data_rd_A	455442118	1356	0	0
payload_swap_mask_rd_A	455442118	1395	0	0
read_threshold_rd_A	455442118	1601	0	0
tpm_access_0_rd_A	455442118	2334	0	0
tpm_access_1_rd_A	455442118	1548	0	0
tpm_cfg_rd_A	455442118	2523	0	0
tpm_did_vid_rd_A	455442118	1665	0	0
tpm_int_enable_rd_A	455442118	1467	0	0
tpm_int_status_rd_A	455442118	1435	0	0
tpm_int_vector_rd_A	455442118	1463	0	0
tpm_intf_capability_rd_A	455442118	1457	0	0
tpm_rid_rd_A	455442118	1475	0	0
tpm_sts_rd_A	455442118	1549	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	3435	0	0
T115	5780	89	0	0
T116	4083	15	0	0
T117	8819	115	0	0
T118	27153	3	0	0
T120	27637	2	0	0
T121	19330	333	0	0
T122	2277	10	0	0
T128	6620	40	0	0
T137	6759	4	0	0
T138	4106	1	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1518	0	0
T137	6759	10	0	0
T141	10709	16	0	0
T143	4792	4	0	0
T145	3165	6	0	0
T151	181637	460	0	0
T152	36143	219	0	0
T172	17962	47	0	0
T173	18661	67	0	0
T174	12478	3	0	0
T175	105931	106	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1466	0	0
T137	6759	7	0	0
T141	10709	8	0	0
T143	4792	2	0	0
T145	3165	5	0	0
T151	181637	443	0	0
T152	36143	221	0	0
T172	17962	27	0	0
T173	18661	70	0	0
T174	12478	4	0	0
T175	105931	106	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	2017	0	0
T128	6620	1	0	0
T137	6759	6	0	0
T141	10709	16	0	0
T143	4792	4	0	0
T145	3165	3	0	0
T151	181637	393	0	0
T152	36143	219	0	0
T172	17962	57	0	0
T173	18661	42	0	0
T174	12478	12	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	9111	0	0
T137	6759	5	0	0
T141	10709	91	0	0
T143	4792	3	0	0
T145	3165	8	0	0
T151	181637	458	0	0
T152	36143	198	0	0
T172	17962	41	0	0
T173	18661	55	0	0
T174	12478	13	0	0
T175	105931	1816	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	10127	0	0
T137	6759	110	0	0
T141	10709	151	0	0
T143	4792	104	0	0
T145	3165	6	0	0
T151	181637	510	0	0
T152	36143	221	0	0
T172	17962	11	0	0
T173	18661	12	0	0
T174	12478	14	0	0
T175	105931	2122	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	10543	0	0
T137	6759	141	0	0
T141	10709	80	0	0
T143	4792	114	0	0
T145	3165	4	0	0
T151	181637	418	0	0
T152	36143	267	0	0
T172	17962	65	0	0
T173	18661	52	0	0
T175	105931	2117	0	0
T176	5786	9	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	11068	0	0
T137	6759	133	0	0
T141	10709	109	0	0
T143	4792	5	0	0
T151	181637	435	0	0
T152	36143	243	0	0
T172	17962	59	0	0
T173	18661	47	0	0
T174	12478	21	0	0
T175	105931	2164	0	0
T176	5786	151	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	10299	0	0
T137	6759	8	0	0
T141	10709	145	0	0
T143	4792	7	0	0
T145	3165	2	0	0
T151	181637	430	0	0
T152	36143	226	0	0
T172	17962	30	0	0
T173	18661	83	0	0
T174	12478	23	0	0
T175	105931	2196	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	9805	0	0
T137	6759	12	0	0
T141	10709	166	0	0
T143	4792	122	0	0
T145	3165	9	0	0
T151	181637	495	0	0
T152	36143	227	0	0
T172	17962	52	0	0
T173	18661	54	0	0
T174	12478	59	0	0
T175	105931	1632	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	10157	0	0
T137	6759	112	0	0
T141	10709	189	0	0
T143	4792	133	0	0
T145	3165	5	0	0
T151	181637	470	0	0
T152	36143	215	0	0
T172	17962	57	0	0
T173	18661	86	0	0
T174	12478	15	0	0
T175	105931	2130	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	9096	0	0
T137	6759	14	0	0
T141	10709	65	0	0
T143	4792	123	0	0
T151	181637	411	0	0
T152	36143	226	0	0
T172	17962	37	0	0
T173	18661	92	0	0
T174	12478	23	0	0
T175	105931	1411	0	0
T176	5786	117	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4839	0	0
T137	6759	46	0	0
T141	10709	31	0	0
T143	4792	38	0	0
T145	3165	12	0	0
T151	181637	465	0	0
T152	36143	250	0	0
T172	17962	39	0	0
T173	18661	69	0	0
T174	12478	25	0	0
T175	105931	691	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4321	0	0
T137	6759	44	0	0
T141	10709	50	0	0
T143	4792	36	0	0
T145	3165	7	0	0
T151	181637	455	0	0
T152	36143	233	0	0
T172	17962	16	0	0
T173	18661	51	0	0
T174	12478	20	0	0
T175	105931	763	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	5121	0	0
T137	6759	65	0	0
T141	10709	6	0	0
T143	4792	56	0	0
T145	3165	3	0	0
T151	181637	487	0	0
T152	36143	251	0	0
T172	17962	43	0	0
T173	18661	66	0	0
T174	12478	30	0	0
T175	105931	871	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4364	0	0
T137	6759	7	0	0
T141	10709	81	0	0
T143	4792	45	0	0
T145	3165	7	0	0
T151	181637	444	0	0
T152	36143	249	0	0
T172	17962	45	0	0
T173	18661	64	0	0
T174	12478	3	0	0
T175	105931	729	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	5097	0	0
T137	6759	52	0	0
T141	10709	51	0	0
T143	4792	42	0	0
T145	3165	15	0	0
T151	181637	474	0	0
T152	36143	220	0	0
T172	17962	53	0	0
T173	18661	87	0	0
T174	12478	20	0	0
T175	105931	692	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4305	0	0
T137	6759	13	0	0
T141	10709	85	0	0
T143	4792	44	0	0
T151	181637	468	0	0
T152	36143	226	0	0
T172	17962	13	0	0
T173	18661	40	0	0
T174	12478	25	0	0
T175	105931	495	0	0
T176	5786	69	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4638	0	0
T137	6759	8	0	0
T141	10709	24	0	0
T143	4792	6	0	0
T151	181637	415	0	0
T152	36143	227	0	0
T172	17962	28	0	0
T173	18661	38	0	0
T174	12478	13	0	0
T175	105931	620	0	0
T176	5786	65	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4813	0	0
T137	6759	67	0	0
T141	10709	22	0	0
T143	4792	4	0	0
T145	3165	7	0	0
T151	181637	447	0	0
T152	36143	293	0	0
T172	17962	44	0	0
T173	18661	56	0	0
T174	12478	55	0	0
T175	105931	870	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	5057	0	0
T137	6759	51	0	0
T141	10709	9	0	0
T143	4792	5	0	0
T151	181637	503	0	0
T152	36143	196	0	0
T172	17962	28	0	0
T173	18661	86	0	0
T174	12478	24	0	0
T175	105931	765	0	0
T176	5786	48	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	5173	0	0
T137	6759	42	0	0
T141	10709	34	0	0
T143	4792	44	0	0
T145	3165	1	0	0
T151	181637	450	0	0
T152	36143	222	0	0
T172	17962	33	0	0
T173	18661	50	0	0
T174	12478	19	0	0
T175	105931	848	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4893	0	0
T137	6759	42	0	0
T141	10709	19	0	0
T143	4792	45	0	0
T145	3165	5	0	0
T151	181637	457	0	0
T152	36143	210	0	0
T172	17962	46	0	0
T173	18661	62	0	0
T174	12478	10	0	0
T175	105931	904	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4988	0	0
T137	6759	17	0	0
T141	10709	69	0	0
T143	4792	53	0	0
T145	3165	3	0	0
T151	181637	446	0	0
T152	36143	246	0	0
T172	17962	44	0	0
T173	18661	44	0	0
T174	12478	27	0	0
T175	105931	902	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4642	0	0
T137	6759	48	0	0
T141	10709	63	0	0
T143	4792	72	0	0
T151	181637	464	0	0
T152	36143	197	0	0
T172	17962	18	0	0
T173	18661	80	0	0
T174	12478	29	0	0
T175	105931	630	0	0
T176	5786	17	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4472	0	0
T137	6759	5	0	0
T141	10709	41	0	0
T143	4792	4	0	0
T145	3165	4	0	0
T151	181637	486	0	0
T152	36143	214	0	0
T172	17962	34	0	0
T173	18661	110	0	0
T174	12478	36	0	0
T175	105931	717	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4395	0	0
T137	6759	10	0	0
T141	10709	76	0	0
T143	4792	41	0	0
T145	3165	9	0	0
T151	181637	391	0	0
T152	36143	197	0	0
T172	17962	10	0	0
T173	18661	85	0	0
T174	12478	9	0	0
T175	105931	636	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4617	0	0
T137	6759	62	0	0
T141	10709	19	0	0
T143	4792	44	0	0
T145	3165	1	0	0
T151	181637	490	0	0
T152	36143	200	0	0
T172	17962	46	0	0
T173	18661	102	0	0
T174	12478	17	0	0
T175	105931	715	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	5104	0	0
T137	6759	54	0	0
T141	10709	28	0	0
T143	4792	1	0	0
T145	3165	1	0	0
T151	181637	457	0	0
T152	36143	224	0	0
T172	17962	29	0	0
T173	18661	40	0	0
T174	12478	15	0	0
T175	105931	904	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4438	0	0
T137	6759	4	0	0
T141	10709	36	0	0
T143	4792	54	0	0
T145	3165	1	0	0
T151	181637	435	0	0
T152	36143	218	0	0
T172	17962	43	0	0
T173	18661	43	0	0
T174	12478	23	0	0
T175	105931	864	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4321	0	0
T137	6759	67	0	0
T141	10709	81	0	0
T143	4792	39	0	0
T151	181637	460	0	0
T152	36143	234	0	0
T172	17962	18	0	0
T173	18661	57	0	0
T174	12478	47	0	0
T175	105931	472	0	0
T176	5786	2	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4365	0	0
T137	6759	41	0	0
T141	10709	54	0	0
T143	4792	45	0	0
T145	3165	2	0	0
T151	181637	462	0	0
T152	36143	189	0	0
T172	17962	28	0	0
T173	18661	74	0	0
T174	12478	16	0	0
T175	105931	549	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4780	0	0
T137	6759	46	0	0
T141	10709	2	0	0
T145	3165	10	0	0
T151	181637	447	0	0
T152	36143	199	0	0
T172	17962	9	0	0
T173	18661	54	0	0
T174	12478	24	0	0
T175	105931	927	0	0
T176	5786	50	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4577	0	0
T137	6759	46	0	0
T141	10709	41	0	0
T143	4792	1	0	0
T145	3165	1	0	0
T151	181637	476	0	0
T152	36143	201	0	0
T172	17962	17	0	0
T173	18661	41	0	0
T174	12478	26	0	0
T175	105931	797	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4595	0	0
T137	6759	39	0	0
T141	10709	17	0	0
T143	4792	47	0	0
T145	3165	2	0	0
T151	181637	408	0	0
T152	36143	199	0	0
T172	17962	34	0	0
T173	18661	31	0	0
T174	12478	35	0	0
T175	105931	1015	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4480	0	0
T137	6759	5	0	0
T141	10709	44	0	0
T143	4792	40	0	0
T145	3165	5	0	0
T151	181637	410	0	0
T152	36143	243	0	0
T172	17962	14	0	0
T173	18661	64	0	0
T174	12478	17	0	0
T175	105931	738	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1715	0	0
T137	6759	2	0	0
T141	10709	2	0	0
T143	4792	5	0	0
T145	3165	6	0	0
T151	181637	431	0	0
T152	36143	222	0	0
T172	17962	24	0	0
T173	18661	78	0	0
T174	12478	52	0	0
T175	105931	120	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1707	0	0
T137	6759	9	0	0
T141	10709	8	0	0
T151	181637	405	0	0
T152	36143	224	0	0
T172	17962	42	0	0
T173	18661	15	0	0
T174	12478	42	0	0
T175	105931	204	0	0
T176	5786	6	0	0
T177	14911	50	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1691	0	0
T137	6759	14	0	0
T141	10709	4	0	0
T143	4792	4	0	0
T151	181637	425	0	0
T152	36143	222	0	0
T172	17962	61	0	0
T173	18661	80	0	0
T174	12478	36	0	0
T175	105931	134	0	0
T176	5786	7	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1867	0	0
T137	6759	3	0	0
T141	10709	7	0	0
T143	4792	13	0	0
T145	3165	9	0	0
T151	181637	423	0	0
T152	36143	244	0	0
T172	17962	53	0	0
T173	18661	117	0	0
T174	12478	30	0	0
T175	105931	183	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	2192	0	0
T137	6759	2	0	0
T141	10709	12	0	0
T143	4792	9	0	0
T145	3165	1	0	0
T151	181637	406	0	0
T152	36143	213	0	0
T172	17962	49	0	0
T173	18661	61	0	0
T174	12478	4	0	0
T175	105931	224	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	4341	0	0
T36	6714	66	0	0
T38	0	5	0	0
T39	0	73	0	0
T43	0	7	0	0
T54	231646	0	0	0
T83	0	23	0	0
T178	0	20	0	0
T179	0	12	0	0
T180	0	61	0	0
T181	0	40	0	0
T182	0	38	0	0
T183	18142	0	0	0
T184	1396	0	0	0
T185	1770	0	0	0
T186	1006	0	0	0
T187	868296	0	0	0
T188	743	0	0	0
T189	852	0	0	0
T190	1458	0	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1748	0	0
T137	6759	9	0	0
T141	10709	11	0	0
T143	4792	13	0	0
T145	3165	8	0	0
T151	181637	446	0	0
T152	36143	218	0	0
T172	17962	25	0	0
T173	18661	37	0	0
T174	12478	17	0	0
T175	105931	160	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1702	0	0
T137	6759	5	0	0
T141	10709	12	0	0
T143	4792	6	0	0
T145	3165	3	0	0
T151	181637	452	0	0
T152	36143	189	0	0
T172	17962	53	0	0
T173	18661	66	0	0
T174	12478	7	0	0
T175	105931	158	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1523	0	0
T137	6759	10	0	0
T141	10709	10	0	0
T143	4792	3	0	0
T145	3165	6	0	0
T151	181637	496	0	0
T152	36143	239	0	0
T172	17962	72	0	0
T173	18661	51	0	0
T174	12478	4	0	0
T175	105931	102	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1356	0	0
T137	6759	4	0	0
T141	10709	9	0	0
T143	4792	6	0	0
T145	3165	2	0	0
T151	181637	418	0	0
T152	36143	230	0	0
T172	17962	18	0	0
T173	18661	78	0	0
T174	12478	21	0	0
T175	105931	97	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1395	0	0
T137	6759	4	0	0
T143	4792	2	0	0
T145	3165	2	0	0
T151	181637	474	0	0
T152	36143	217	0	0
T172	17962	50	0	0
T173	18661	48	0	0
T174	12478	22	0	0
T175	105931	106	0	0
T177	14911	36	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1601	0	0
T137	6759	13	0	0
T141	10709	15	0	0
T143	4792	3	0	0
T151	181637	486	0	0
T152	36143	225	0	0
T172	17962	54	0	0
T173	18661	80	0	0
T174	12478	14	0	0
T175	105931	106	0	0
T176	5786	12	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	2334	0	0
T126	12472	1	0	0
T137	6759	10	0	0
T141	10709	23	0	0
T143	4792	25	0	0
T145	3165	1	0	0
T151	181637	453	0	0
T152	36143	231	0	0
T172	17962	64	0	0
T173	18661	29	0	0
T174	12478	23	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1548	0	0
T137	6759	2	0	0
T141	10709	12	0	0
T143	4792	2	0	0
T145	3165	6	0	0
T151	181637	457	0	0
T152	36143	259	0	0
T172	17962	36	0	0
T173	18661	39	0	0
T174	12478	25	0	0
T175	105931	132	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	2523	0	0
T137	6759	22	0	0
T141	10709	3	0	0
T143	4792	21	0	0
T145	3165	7	0	0
T151	181637	413	0	0
T152	36143	220	0	0
T172	17962	38	0	0
T173	18661	71	0	0
T174	12478	31	0	0
T175	105931	389	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1665	0	0
T137	6759	17	0	0
T141	10709	17	0	0
T143	4792	5	0	0
T145	3165	6	0	0
T151	181637	444	0	0
T152	36143	238	0	0
T172	17962	39	0	0
T173	18661	59	0	0
T174	12478	16	0	0
T175	105931	148	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1467	0	0
T137	6759	6	0	0
T141	10709	15	0	0
T143	4792	1	0	0
T151	181637	456	0	0
T152	36143	250	0	0
T172	17962	23	0	0
T173	18661	69	0	0
T174	12478	10	0	0
T175	105931	129	0	0
T176	5786	11	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1435	0	0
T126	12472	12	0	0
T137	6759	5	0	0
T141	10709	8	0	0
T143	4792	1	0	0
T151	181637	416	0	0
T152	36143	234	0	0
T172	17962	44	0	0
T173	18661	64	0	0
T174	12478	29	0	0
T175	105931	113	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1463	0	0
T137	6759	9	0	0
T141	10709	2	0	0
T143	4792	8	0	0
T151	181637	428	0	0
T152	36143	232	0	0
T172	17962	42	0	0
T173	18661	59	0	0
T174	12478	8	0	0
T175	105931	130	0	0
T176	5786	3	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1457	0	0
T137	6759	8	0	0
T141	10709	8	0	0
T143	4792	3	0	0
T145	3165	8	0	0
T151	181637	428	0	0
T152	36143	242	0	0
T172	17962	18	0	0
T173	18661	111	0	0
T174	12478	9	0	0
T175	105931	114	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1475	0	0
T137	6759	3	0	0
T141	10709	2	0	0
T143	4792	2	0	0
T145	3165	4	0	0
T151	181637	447	0	0
T152	36143	194	0	0
T172	17962	38	0	0
T173	18661	89	0	0
T174	12478	35	0	0
T175	105931	121	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455442118	1549	0	0
T137	6759	9	0	0
T141	10709	7	0	0
T143	4792	2	0	0
T145	3165	5	0	0
T151	181637	491	0	0
T152	36143	238	0	0
T172	17962	59	0	0
T173	18661	93	0	0
T174	12478	19	0	0
T175	105931	98	0	0