Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
3609 |
0 |
0 |
T130 |
6036 |
18 |
0 |
0 |
T131 |
12197 |
197 |
0 |
0 |
T132 |
13077 |
6 |
0 |
0 |
T134 |
5350 |
82 |
0 |
0 |
T135 |
22182 |
246 |
0 |
0 |
T136 |
9903 |
1 |
0 |
0 |
T142 |
18452 |
313 |
0 |
0 |
T148 |
5565 |
8 |
0 |
0 |
T151 |
4912 |
2 |
0 |
0 |
T152 |
3786 |
7 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
2875 |
0 |
0 |
T113 |
4240 |
6 |
0 |
0 |
T187 |
7486 |
17 |
0 |
0 |
T188 |
37195 |
134 |
0 |
0 |
T189 |
17043 |
23 |
0 |
0 |
T190 |
4351 |
7 |
0 |
0 |
T191 |
14241 |
53 |
0 |
0 |
T192 |
11760 |
5 |
0 |
0 |
T193 |
90747 |
243 |
0 |
0 |
T194 |
68081 |
68 |
0 |
0 |
T195 |
77127 |
558 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
3028 |
0 |
0 |
T113 |
4240 |
4 |
0 |
0 |
T187 |
7486 |
7 |
0 |
0 |
T188 |
37195 |
124 |
0 |
0 |
T189 |
17043 |
99 |
0 |
0 |
T190 |
4351 |
4 |
0 |
0 |
T191 |
14241 |
42 |
0 |
0 |
T192 |
11760 |
12 |
0 |
0 |
T193 |
90747 |
234 |
0 |
0 |
T194 |
68081 |
83 |
0 |
0 |
T196 |
2441 |
8 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
3592 |
0 |
0 |
T113 |
4240 |
15 |
0 |
0 |
T135 |
22182 |
3 |
0 |
0 |
T187 |
7486 |
24 |
0 |
0 |
T188 |
37195 |
145 |
0 |
0 |
T189 |
17043 |
10 |
0 |
0 |
T190 |
4351 |
8 |
0 |
0 |
T191 |
14241 |
59 |
0 |
0 |
T192 |
11760 |
23 |
0 |
0 |
T193 |
90747 |
247 |
0 |
0 |
T196 |
2441 |
5 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
13425 |
0 |
0 |
T113 |
4240 |
8 |
0 |
0 |
T187 |
7486 |
17 |
0 |
0 |
T188 |
37195 |
157 |
0 |
0 |
T189 |
17043 |
59 |
0 |
0 |
T190 |
4351 |
105 |
0 |
0 |
T191 |
14241 |
72 |
0 |
0 |
T192 |
11760 |
244 |
0 |
0 |
T193 |
90747 |
228 |
0 |
0 |
T194 |
68081 |
1216 |
0 |
0 |
T197 |
6279 |
5 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
11583 |
0 |
0 |
T113 |
4240 |
5 |
0 |
0 |
T187 |
7486 |
31 |
0 |
0 |
T188 |
37195 |
120 |
0 |
0 |
T189 |
17043 |
57 |
0 |
0 |
T190 |
4351 |
6 |
0 |
0 |
T191 |
14241 |
59 |
0 |
0 |
T192 |
11760 |
381 |
0 |
0 |
T193 |
90747 |
221 |
0 |
0 |
T194 |
68081 |
1234 |
0 |
0 |
T196 |
2441 |
1 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
12507 |
0 |
0 |
T113 |
4240 |
6 |
0 |
0 |
T187 |
7486 |
20 |
0 |
0 |
T188 |
37195 |
151 |
0 |
0 |
T189 |
17043 |
38 |
0 |
0 |
T191 |
14241 |
47 |
0 |
0 |
T192 |
11760 |
367 |
0 |
0 |
T193 |
90747 |
245 |
0 |
0 |
T194 |
68081 |
1080 |
0 |
0 |
T195 |
77127 |
517 |
0 |
0 |
T197 |
6279 |
4 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
12373 |
0 |
0 |
T113 |
4240 |
3 |
0 |
0 |
T187 |
7486 |
15 |
0 |
0 |
T188 |
37195 |
196 |
0 |
0 |
T189 |
17043 |
18 |
0 |
0 |
T190 |
4351 |
159 |
0 |
0 |
T191 |
14241 |
73 |
0 |
0 |
T192 |
11760 |
17 |
0 |
0 |
T193 |
90747 |
223 |
0 |
0 |
T194 |
68081 |
1103 |
0 |
0 |
T197 |
6279 |
12 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
12304 |
0 |
0 |
T113 |
4240 |
1 |
0 |
0 |
T187 |
7486 |
31 |
0 |
0 |
T188 |
37195 |
159 |
0 |
0 |
T189 |
17043 |
61 |
0 |
0 |
T190 |
4351 |
7 |
0 |
0 |
T191 |
14241 |
14 |
0 |
0 |
T192 |
11760 |
391 |
0 |
0 |
T193 |
90747 |
221 |
0 |
0 |
T194 |
68081 |
1146 |
0 |
0 |
T197 |
6279 |
11 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
13313 |
0 |
0 |
T113 |
4240 |
2 |
0 |
0 |
T187 |
7486 |
15 |
0 |
0 |
T188 |
37195 |
89 |
0 |
0 |
T189 |
17043 |
31 |
0 |
0 |
T190 |
4351 |
122 |
0 |
0 |
T191 |
14241 |
48 |
0 |
0 |
T192 |
11760 |
279 |
0 |
0 |
T193 |
90747 |
228 |
0 |
0 |
T194 |
68081 |
1405 |
0 |
0 |
T197 |
6279 |
16 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
13451 |
0 |
0 |
T113 |
4240 |
9 |
0 |
0 |
T187 |
7486 |
5 |
0 |
0 |
T188 |
37195 |
110 |
0 |
0 |
T189 |
17043 |
27 |
0 |
0 |
T190 |
4351 |
124 |
0 |
0 |
T191 |
14241 |
60 |
0 |
0 |
T192 |
11760 |
120 |
0 |
0 |
T193 |
90747 |
228 |
0 |
0 |
T196 |
2441 |
3 |
0 |
0 |
T197 |
6279 |
13 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
12298 |
0 |
0 |
T113 |
4240 |
6 |
0 |
0 |
T187 |
7486 |
29 |
0 |
0 |
T188 |
37195 |
123 |
0 |
0 |
T189 |
17043 |
24 |
0 |
0 |
T190 |
4351 |
134 |
0 |
0 |
T191 |
14241 |
59 |
0 |
0 |
T192 |
11760 |
101 |
0 |
0 |
T193 |
90747 |
253 |
0 |
0 |
T196 |
2441 |
2 |
0 |
0 |
T197 |
6279 |
18 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6199 |
0 |
0 |
T113 |
4240 |
2 |
0 |
0 |
T187 |
7486 |
24 |
0 |
0 |
T188 |
37195 |
183 |
0 |
0 |
T189 |
17043 |
44 |
0 |
0 |
T191 |
14241 |
64 |
0 |
0 |
T192 |
11760 |
95 |
0 |
0 |
T193 |
90747 |
172 |
0 |
0 |
T194 |
68081 |
485 |
0 |
0 |
T195 |
77127 |
581 |
0 |
0 |
T196 |
2441 |
3 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6742 |
0 |
0 |
T113 |
4240 |
6 |
0 |
0 |
T187 |
7486 |
5 |
0 |
0 |
T188 |
37195 |
162 |
0 |
0 |
T189 |
17043 |
36 |
0 |
0 |
T190 |
4351 |
39 |
0 |
0 |
T191 |
14241 |
28 |
0 |
0 |
T192 |
11760 |
100 |
0 |
0 |
T193 |
90747 |
199 |
0 |
0 |
T196 |
2441 |
3 |
0 |
0 |
T197 |
6279 |
10 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6811 |
0 |
0 |
T113 |
4240 |
5 |
0 |
0 |
T187 |
7486 |
2 |
0 |
0 |
T188 |
37195 |
150 |
0 |
0 |
T189 |
17043 |
27 |
0 |
0 |
T190 |
4351 |
4 |
0 |
0 |
T191 |
14241 |
73 |
0 |
0 |
T192 |
11760 |
111 |
0 |
0 |
T193 |
90747 |
217 |
0 |
0 |
T196 |
2441 |
5 |
0 |
0 |
T197 |
6279 |
10 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6805 |
0 |
0 |
T113 |
4240 |
1 |
0 |
0 |
T187 |
7486 |
31 |
0 |
0 |
T188 |
37195 |
128 |
0 |
0 |
T189 |
17043 |
58 |
0 |
0 |
T190 |
4351 |
7 |
0 |
0 |
T191 |
14241 |
16 |
0 |
0 |
T192 |
11760 |
11 |
0 |
0 |
T193 |
90747 |
202 |
0 |
0 |
T196 |
2441 |
9 |
0 |
0 |
T197 |
6279 |
28 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
7130 |
0 |
0 |
T113 |
4240 |
2 |
0 |
0 |
T187 |
7486 |
8 |
0 |
0 |
T188 |
37195 |
115 |
0 |
0 |
T189 |
17043 |
17 |
0 |
0 |
T190 |
4351 |
9 |
0 |
0 |
T191 |
14241 |
74 |
0 |
0 |
T192 |
11760 |
37 |
0 |
0 |
T193 |
90747 |
191 |
0 |
0 |
T194 |
68081 |
687 |
0 |
0 |
T196 |
2441 |
3 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6250 |
0 |
0 |
T113 |
4240 |
12 |
0 |
0 |
T187 |
7486 |
23 |
0 |
0 |
T188 |
37195 |
176 |
0 |
0 |
T189 |
17043 |
33 |
0 |
0 |
T190 |
4351 |
6 |
0 |
0 |
T191 |
14241 |
27 |
0 |
0 |
T192 |
11760 |
65 |
0 |
0 |
T193 |
90747 |
235 |
0 |
0 |
T194 |
68081 |
401 |
0 |
0 |
T197 |
6279 |
12 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6686 |
0 |
0 |
T113 |
4240 |
14 |
0 |
0 |
T187 |
7486 |
7 |
0 |
0 |
T188 |
37195 |
180 |
0 |
0 |
T189 |
17043 |
28 |
0 |
0 |
T190 |
4351 |
4 |
0 |
0 |
T191 |
14241 |
85 |
0 |
0 |
T192 |
11760 |
59 |
0 |
0 |
T193 |
90747 |
184 |
0 |
0 |
T194 |
68081 |
445 |
0 |
0 |
T197 |
6279 |
11 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6170 |
0 |
0 |
T113 |
4240 |
8 |
0 |
0 |
T187 |
7486 |
38 |
0 |
0 |
T188 |
37195 |
142 |
0 |
0 |
T189 |
17043 |
19 |
0 |
0 |
T190 |
4351 |
8 |
0 |
0 |
T191 |
14241 |
48 |
0 |
0 |
T192 |
11760 |
17 |
0 |
0 |
T193 |
90747 |
236 |
0 |
0 |
T194 |
68081 |
322 |
0 |
0 |
T196 |
2441 |
1 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6522 |
0 |
0 |
T113 |
4240 |
4 |
0 |
0 |
T187 |
7486 |
26 |
0 |
0 |
T188 |
37195 |
152 |
0 |
0 |
T189 |
17043 |
54 |
0 |
0 |
T190 |
4351 |
4 |
0 |
0 |
T191 |
14241 |
54 |
0 |
0 |
T192 |
11760 |
48 |
0 |
0 |
T193 |
90747 |
204 |
0 |
0 |
T196 |
2441 |
8 |
0 |
0 |
T197 |
6279 |
2 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6063 |
0 |
0 |
T113 |
4240 |
5 |
0 |
0 |
T187 |
7486 |
36 |
0 |
0 |
T188 |
37195 |
133 |
0 |
0 |
T189 |
17043 |
59 |
0 |
0 |
T190 |
4351 |
6 |
0 |
0 |
T191 |
14241 |
11 |
0 |
0 |
T192 |
11760 |
90 |
0 |
0 |
T193 |
90747 |
190 |
0 |
0 |
T196 |
2441 |
4 |
0 |
0 |
T197 |
6279 |
10 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6383 |
0 |
0 |
T113 |
4240 |
13 |
0 |
0 |
T187 |
7486 |
19 |
0 |
0 |
T188 |
37195 |
108 |
0 |
0 |
T189 |
17043 |
15 |
0 |
0 |
T190 |
4351 |
43 |
0 |
0 |
T191 |
14241 |
61 |
0 |
0 |
T192 |
11760 |
109 |
0 |
0 |
T193 |
90747 |
211 |
0 |
0 |
T196 |
2441 |
2 |
0 |
0 |
T197 |
6279 |
9 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6653 |
0 |
0 |
T113 |
4240 |
5 |
0 |
0 |
T187 |
7486 |
5 |
0 |
0 |
T188 |
37195 |
129 |
0 |
0 |
T189 |
17043 |
22 |
0 |
0 |
T190 |
4351 |
1 |
0 |
0 |
T191 |
14241 |
55 |
0 |
0 |
T192 |
11760 |
63 |
0 |
0 |
T193 |
90747 |
252 |
0 |
0 |
T196 |
2441 |
3 |
0 |
0 |
T197 |
6279 |
32 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6830 |
0 |
0 |
T113 |
4240 |
7 |
0 |
0 |
T187 |
7486 |
7 |
0 |
0 |
T188 |
37195 |
154 |
0 |
0 |
T189 |
17043 |
13 |
0 |
0 |
T190 |
4351 |
5 |
0 |
0 |
T191 |
14241 |
21 |
0 |
0 |
T192 |
11760 |
90 |
0 |
0 |
T193 |
90747 |
215 |
0 |
0 |
T196 |
2441 |
6 |
0 |
0 |
T197 |
6279 |
46 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6513 |
0 |
0 |
T113 |
4240 |
13 |
0 |
0 |
T187 |
7486 |
5 |
0 |
0 |
T188 |
37195 |
141 |
0 |
0 |
T189 |
17043 |
5 |
0 |
0 |
T190 |
4351 |
4 |
0 |
0 |
T191 |
14241 |
49 |
0 |
0 |
T192 |
11760 |
4 |
0 |
0 |
T193 |
90747 |
229 |
0 |
0 |
T194 |
68081 |
660 |
0 |
0 |
T197 |
6279 |
30 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6193 |
0 |
0 |
T113 |
4240 |
12 |
0 |
0 |
T187 |
7486 |
13 |
0 |
0 |
T188 |
37195 |
139 |
0 |
0 |
T189 |
17043 |
26 |
0 |
0 |
T190 |
4351 |
57 |
0 |
0 |
T191 |
14241 |
45 |
0 |
0 |
T192 |
11760 |
46 |
0 |
0 |
T193 |
90747 |
215 |
0 |
0 |
T196 |
2441 |
6 |
0 |
0 |
T197 |
6279 |
5 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6557 |
0 |
0 |
T113 |
4240 |
1 |
0 |
0 |
T187 |
7486 |
44 |
0 |
0 |
T188 |
37195 |
121 |
0 |
0 |
T189 |
17043 |
20 |
0 |
0 |
T190 |
4351 |
71 |
0 |
0 |
T191 |
14241 |
31 |
0 |
0 |
T192 |
11760 |
144 |
0 |
0 |
T193 |
90747 |
245 |
0 |
0 |
T194 |
68081 |
603 |
0 |
0 |
T197 |
6279 |
5 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6682 |
0 |
0 |
T113 |
4240 |
1 |
0 |
0 |
T187 |
7486 |
56 |
0 |
0 |
T188 |
37195 |
113 |
0 |
0 |
T189 |
17043 |
42 |
0 |
0 |
T190 |
4351 |
52 |
0 |
0 |
T191 |
14241 |
42 |
0 |
0 |
T192 |
11760 |
134 |
0 |
0 |
T193 |
90747 |
212 |
0 |
0 |
T194 |
68081 |
614 |
0 |
0 |
T195 |
77127 |
532 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6470 |
0 |
0 |
T113 |
4240 |
11 |
0 |
0 |
T187 |
7486 |
11 |
0 |
0 |
T188 |
37195 |
206 |
0 |
0 |
T189 |
17043 |
24 |
0 |
0 |
T190 |
4351 |
5 |
0 |
0 |
T191 |
14241 |
75 |
0 |
0 |
T192 |
11760 |
49 |
0 |
0 |
T193 |
90747 |
263 |
0 |
0 |
T194 |
68081 |
544 |
0 |
0 |
T197 |
6279 |
13 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6283 |
0 |
0 |
T113 |
4240 |
5 |
0 |
0 |
T187 |
7486 |
39 |
0 |
0 |
T188 |
37195 |
135 |
0 |
0 |
T189 |
17043 |
22 |
0 |
0 |
T190 |
4351 |
54 |
0 |
0 |
T191 |
14241 |
61 |
0 |
0 |
T192 |
11760 |
58 |
0 |
0 |
T193 |
90747 |
260 |
0 |
0 |
T194 |
68081 |
468 |
0 |
0 |
T197 |
6279 |
44 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
5885 |
0 |
0 |
T113 |
4240 |
1 |
0 |
0 |
T142 |
18452 |
4 |
0 |
0 |
T187 |
7486 |
41 |
0 |
0 |
T188 |
37195 |
126 |
0 |
0 |
T189 |
17043 |
27 |
0 |
0 |
T191 |
14241 |
68 |
0 |
0 |
T192 |
11760 |
11 |
0 |
0 |
T193 |
90747 |
210 |
0 |
0 |
T194 |
68081 |
450 |
0 |
0 |
T197 |
6279 |
12 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6389 |
0 |
0 |
T113 |
4240 |
7 |
0 |
0 |
T187 |
7486 |
34 |
0 |
0 |
T188 |
37195 |
142 |
0 |
0 |
T189 |
17043 |
24 |
0 |
0 |
T190 |
4351 |
49 |
0 |
0 |
T191 |
14241 |
80 |
0 |
0 |
T192 |
11760 |
42 |
0 |
0 |
T193 |
90747 |
233 |
0 |
0 |
T196 |
2441 |
4 |
0 |
0 |
T197 |
6279 |
6 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6954 |
0 |
0 |
T187 |
7486 |
27 |
0 |
0 |
T188 |
37195 |
169 |
0 |
0 |
T189 |
17043 |
51 |
0 |
0 |
T190 |
4351 |
35 |
0 |
0 |
T191 |
14241 |
62 |
0 |
0 |
T192 |
11760 |
125 |
0 |
0 |
T193 |
90747 |
202 |
0 |
0 |
T194 |
68081 |
538 |
0 |
0 |
T195 |
77127 |
534 |
0 |
0 |
T197 |
6279 |
8 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6902 |
0 |
0 |
T113 |
4240 |
9 |
0 |
0 |
T187 |
7486 |
31 |
0 |
0 |
T188 |
37195 |
131 |
0 |
0 |
T189 |
17043 |
10 |
0 |
0 |
T190 |
4351 |
59 |
0 |
0 |
T191 |
14241 |
39 |
0 |
0 |
T192 |
11760 |
73 |
0 |
0 |
T193 |
90747 |
217 |
0 |
0 |
T194 |
68081 |
331 |
0 |
0 |
T197 |
6279 |
2 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
6939 |
0 |
0 |
T113 |
4240 |
3 |
0 |
0 |
T187 |
7486 |
23 |
0 |
0 |
T188 |
37195 |
139 |
0 |
0 |
T189 |
17043 |
17 |
0 |
0 |
T190 |
4351 |
49 |
0 |
0 |
T191 |
14241 |
81 |
0 |
0 |
T192 |
11760 |
65 |
0 |
0 |
T193 |
90747 |
225 |
0 |
0 |
T194 |
68081 |
528 |
0 |
0 |
T197 |
6279 |
12 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
3238 |
0 |
0 |
T113 |
4240 |
6 |
0 |
0 |
T187 |
7486 |
43 |
0 |
0 |
T188 |
37195 |
166 |
0 |
0 |
T189 |
17043 |
21 |
0 |
0 |
T190 |
4351 |
1 |
0 |
0 |
T191 |
14241 |
45 |
0 |
0 |
T192 |
11760 |
19 |
0 |
0 |
T193 |
90747 |
236 |
0 |
0 |
T196 |
2441 |
2 |
0 |
0 |
T197 |
6279 |
22 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
3196 |
0 |
0 |
T187 |
7486 |
34 |
0 |
0 |
T188 |
37195 |
121 |
0 |
0 |
T189 |
17043 |
39 |
0 |
0 |
T190 |
4351 |
9 |
0 |
0 |
T191 |
14241 |
34 |
0 |
0 |
T192 |
11760 |
24 |
0 |
0 |
T193 |
90747 |
202 |
0 |
0 |
T194 |
68081 |
112 |
0 |
0 |
T195 |
77127 |
556 |
0 |
0 |
T197 |
6279 |
9 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
3022 |
0 |
0 |
T113 |
4240 |
3 |
0 |
0 |
T135 |
22182 |
9 |
0 |
0 |
T187 |
7486 |
5 |
0 |
0 |
T188 |
37195 |
153 |
0 |
0 |
T189 |
17043 |
40 |
0 |
0 |
T190 |
4351 |
3 |
0 |
0 |
T191 |
14241 |
58 |
0 |
0 |
T192 |
11760 |
33 |
0 |
0 |
T196 |
2441 |
8 |
0 |
0 |
T197 |
6279 |
12 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
3076 |
0 |
0 |
T113 |
4240 |
13 |
0 |
0 |
T142 |
18452 |
5 |
0 |
0 |
T187 |
7486 |
15 |
0 |
0 |
T188 |
37195 |
168 |
0 |
0 |
T189 |
17043 |
58 |
0 |
0 |
T190 |
4351 |
3 |
0 |
0 |
T191 |
14241 |
15 |
0 |
0 |
T192 |
11760 |
19 |
0 |
0 |
T196 |
2441 |
1 |
0 |
0 |
T197 |
6279 |
12 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
3815 |
0 |
0 |
T113 |
4240 |
5 |
0 |
0 |
T187 |
7486 |
20 |
0 |
0 |
T188 |
37195 |
117 |
0 |
0 |
T189 |
17043 |
39 |
0 |
0 |
T190 |
4351 |
3 |
0 |
0 |
T191 |
14241 |
77 |
0 |
0 |
T192 |
11760 |
3 |
0 |
0 |
T193 |
90747 |
239 |
0 |
0 |
T194 |
68081 |
206 |
0 |
0 |
T197 |
6279 |
11 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
5869 |
0 |
0 |
T18 |
5121 |
33 |
0 |
0 |
T19 |
1756 |
0 |
0 |
0 |
T20 |
1663 |
0 |
0 |
0 |
T21 |
20234 |
0 |
0 |
0 |
T27 |
2802 |
0 |
0 |
0 |
T28 |
44123 |
0 |
0 |
0 |
T37 |
0 |
28 |
0 |
0 |
T43 |
0 |
24 |
0 |
0 |
T44 |
3264 |
0 |
0 |
0 |
T50 |
0 |
23 |
0 |
0 |
T103 |
1787 |
0 |
0 |
0 |
T104 |
1262 |
0 |
0 |
0 |
T116 |
1153 |
0 |
0 |
0 |
T198 |
0 |
32 |
0 |
0 |
T199 |
0 |
9 |
0 |
0 |
T200 |
0 |
59 |
0 |
0 |
T201 |
0 |
34 |
0 |
0 |
T202 |
0 |
50 |
0 |
0 |
T203 |
0 |
44 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
3130 |
0 |
0 |
T113 |
4240 |
5 |
0 |
0 |
T187 |
7486 |
23 |
0 |
0 |
T188 |
37195 |
142 |
0 |
0 |
T189 |
17043 |
35 |
0 |
0 |
T190 |
4351 |
16 |
0 |
0 |
T191 |
14241 |
19 |
0 |
0 |
T192 |
11760 |
19 |
0 |
0 |
T193 |
90747 |
206 |
0 |
0 |
T196 |
2441 |
8 |
0 |
0 |
T197 |
6279 |
27 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
3207 |
0 |
0 |
T113 |
4240 |
16 |
0 |
0 |
T187 |
7486 |
27 |
0 |
0 |
T188 |
37195 |
127 |
0 |
0 |
T189 |
17043 |
8 |
0 |
0 |
T190 |
4351 |
2 |
0 |
0 |
T191 |
14241 |
21 |
0 |
0 |
T192 |
11760 |
8 |
0 |
0 |
T193 |
90747 |
234 |
0 |
0 |
T194 |
68081 |
128 |
0 |
0 |
T197 |
6279 |
4 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
2773 |
0 |
0 |
T113 |
4240 |
3 |
0 |
0 |
T187 |
7486 |
30 |
0 |
0 |
T188 |
37195 |
106 |
0 |
0 |
T189 |
17043 |
76 |
0 |
0 |
T190 |
4351 |
4 |
0 |
0 |
T191 |
14241 |
63 |
0 |
0 |
T192 |
11760 |
1 |
0 |
0 |
T193 |
90747 |
236 |
0 |
0 |
T194 |
68081 |
86 |
0 |
0 |
T197 |
6279 |
16 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
2879 |
0 |
0 |
T113 |
4240 |
1 |
0 |
0 |
T187 |
7486 |
25 |
0 |
0 |
T188 |
37195 |
168 |
0 |
0 |
T189 |
17043 |
60 |
0 |
0 |
T190 |
4351 |
6 |
0 |
0 |
T191 |
14241 |
75 |
0 |
0 |
T192 |
11760 |
22 |
0 |
0 |
T193 |
90747 |
220 |
0 |
0 |
T196 |
2441 |
6 |
0 |
0 |
T197 |
6279 |
12 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
2895 |
0 |
0 |
T113 |
4240 |
7 |
0 |
0 |
T142 |
18452 |
5 |
0 |
0 |
T187 |
7486 |
33 |
0 |
0 |
T188 |
37195 |
157 |
0 |
0 |
T189 |
17043 |
33 |
0 |
0 |
T190 |
4351 |
6 |
0 |
0 |
T191 |
14241 |
38 |
0 |
0 |
T192 |
11760 |
12 |
0 |
0 |
T196 |
2441 |
1 |
0 |
0 |
T197 |
6279 |
16 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
2777 |
0 |
0 |
T187 |
7486 |
32 |
0 |
0 |
T188 |
37195 |
148 |
0 |
0 |
T189 |
17043 |
56 |
0 |
0 |
T190 |
4351 |
2 |
0 |
0 |
T191 |
14241 |
64 |
0 |
0 |
T192 |
11760 |
7 |
0 |
0 |
T193 |
90747 |
209 |
0 |
0 |
T194 |
68081 |
80 |
0 |
0 |
T195 |
77127 |
507 |
0 |
0 |
T196 |
2441 |
6 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
3659 |
0 |
0 |
T187 |
7486 |
1 |
0 |
0 |
T188 |
37195 |
112 |
0 |
0 |
T189 |
17043 |
11 |
0 |
0 |
T191 |
14241 |
14 |
0 |
0 |
T192 |
11760 |
14 |
0 |
0 |
T193 |
90747 |
218 |
0 |
0 |
T194 |
68081 |
128 |
0 |
0 |
T195 |
77127 |
517 |
0 |
0 |
T196 |
2441 |
6 |
0 |
0 |
T197 |
6279 |
13 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
2899 |
0 |
0 |
T113 |
4240 |
7 |
0 |
0 |
T187 |
7486 |
6 |
0 |
0 |
T188 |
37195 |
167 |
0 |
0 |
T189 |
17043 |
49 |
0 |
0 |
T190 |
4351 |
4 |
0 |
0 |
T191 |
14241 |
40 |
0 |
0 |
T192 |
11760 |
6 |
0 |
0 |
T193 |
90747 |
194 |
0 |
0 |
T196 |
2441 |
6 |
0 |
0 |
T197 |
6279 |
4 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
4029 |
0 |
0 |
T113 |
4240 |
7 |
0 |
0 |
T187 |
7486 |
9 |
0 |
0 |
T188 |
37195 |
114 |
0 |
0 |
T189 |
17043 |
25 |
0 |
0 |
T190 |
4351 |
9 |
0 |
0 |
T191 |
14241 |
18 |
0 |
0 |
T192 |
11760 |
37 |
0 |
0 |
T193 |
90747 |
243 |
0 |
0 |
T196 |
2441 |
9 |
0 |
0 |
T197 |
6279 |
11 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
3169 |
0 |
0 |
T113 |
4240 |
10 |
0 |
0 |
T187 |
7486 |
15 |
0 |
0 |
T188 |
37195 |
184 |
0 |
0 |
T189 |
17043 |
24 |
0 |
0 |
T190 |
4351 |
9 |
0 |
0 |
T191 |
14241 |
44 |
0 |
0 |
T192 |
11760 |
10 |
0 |
0 |
T193 |
90747 |
261 |
0 |
0 |
T196 |
2441 |
4 |
0 |
0 |
T197 |
6279 |
46 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
2894 |
0 |
0 |
T113 |
4240 |
11 |
0 |
0 |
T187 |
7486 |
57 |
0 |
0 |
T188 |
37195 |
115 |
0 |
0 |
T189 |
17043 |
17 |
0 |
0 |
T190 |
4351 |
5 |
0 |
0 |
T191 |
14241 |
39 |
0 |
0 |
T192 |
11760 |
11 |
0 |
0 |
T193 |
90747 |
232 |
0 |
0 |
T194 |
68081 |
67 |
0 |
0 |
T197 |
6279 |
29 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
2681 |
0 |
0 |
T113 |
4240 |
8 |
0 |
0 |
T188 |
37195 |
132 |
0 |
0 |
T189 |
17043 |
19 |
0 |
0 |
T190 |
4351 |
4 |
0 |
0 |
T191 |
14241 |
24 |
0 |
0 |
T192 |
11760 |
12 |
0 |
0 |
T193 |
90747 |
229 |
0 |
0 |
T194 |
68081 |
77 |
0 |
0 |
T195 |
77127 |
506 |
0 |
0 |
T197 |
6279 |
27 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
2871 |
0 |
0 |
T113 |
4240 |
7 |
0 |
0 |
T187 |
7486 |
48 |
0 |
0 |
T188 |
37195 |
167 |
0 |
0 |
T189 |
17043 |
67 |
0 |
0 |
T190 |
4351 |
4 |
0 |
0 |
T191 |
14241 |
71 |
0 |
0 |
T192 |
11760 |
24 |
0 |
0 |
T193 |
90747 |
196 |
0 |
0 |
T196 |
2441 |
4 |
0 |
0 |
T197 |
6279 |
11 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
2941 |
0 |
0 |
T113 |
4240 |
8 |
0 |
0 |
T187 |
7486 |
27 |
0 |
0 |
T188 |
37195 |
144 |
0 |
0 |
T189 |
17043 |
18 |
0 |
0 |
T190 |
4351 |
8 |
0 |
0 |
T191 |
14241 |
87 |
0 |
0 |
T192 |
11760 |
12 |
0 |
0 |
T193 |
90747 |
242 |
0 |
0 |
T196 |
2441 |
2 |
0 |
0 |
T197 |
6279 |
8 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
2886 |
0 |
0 |
T113 |
4240 |
9 |
0 |
0 |
T187 |
7486 |
20 |
0 |
0 |
T188 |
37195 |
141 |
0 |
0 |
T189 |
17043 |
36 |
0 |
0 |
T190 |
4351 |
1 |
0 |
0 |
T191 |
14241 |
51 |
0 |
0 |
T192 |
11760 |
13 |
0 |
0 |
T193 |
90747 |
227 |
0 |
0 |
T196 |
2441 |
5 |
0 |
0 |
T197 |
6279 |
18 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461956249 |
2797 |
0 |
0 |
T187 |
7486 |
11 |
0 |
0 |
T188 |
37195 |
138 |
0 |
0 |
T189 |
17043 |
8 |
0 |
0 |
T191 |
14241 |
65 |
0 |
0 |
T192 |
11760 |
15 |
0 |
0 |
T193 |
90747 |
184 |
0 |
0 |
T194 |
68081 |
80 |
0 |
0 |
T195 |
77127 |
505 |
0 |
0 |
T196 |
2441 |
3 |
0 |
0 |
T197 |
6279 |
2 |
0 |
0 |