Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	11215006	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

100471358

1

T1

2725

T2

327680

T3

61147

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	54854100	1			T1	688		T2	163840		T3	33642
values[0x0]	27296300	1			T1	993		T2	81836		T3	16318
values[0x1]	29535964	1			T1	1044		T2	82004		T3	17376

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	5712030	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

105974334

1

T1

2725

T2

327680

T3

64226

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	374048	1			T1	13		T2	1341		T3	240
valid_sources[0x01]	360747	1			T1	8		T2	1192		T3	251
valid_sources[0x02]	380756	1			T1	14		T2	1288		T3	294
valid_sources[0x03]	359148	1			T1	14		T2	1246		T3	281
valid_sources[0x04]	395511	1			T1	8		T2	1313		T3	250
valid_sources[0x05]	369978	1			T1	7		T2	1258		T3	239
valid_sources[0x06]	377243	1			T1	9		T2	1344		T3	304
valid_sources[0x07]	365883	1			T1	10		T2	1213		T3	235
valid_sources[0x08]	405579	1			T1	10		T2	1271		T3	263
valid_sources[0x09]	394200	1			T1	7		T2	1232		T3	250
valid_sources[0x0a]	370432	1			T1	15		T2	1311		T3	294
valid_sources[0x0b]	360849	1			T1	8		T2	1325		T3	252
valid_sources[0x0c]	364221	1			T1	8		T2	1272		T3	274
valid_sources[0x0d]	416768	1			T1	10		T2	1265		T3	266
valid_sources[0x0e]	375557	1			T1	6		T2	1239		T3	243
valid_sources[0x0f]	375602	1			T1	10		T2	1184		T3	285
valid_sources[0x10]	375819	1			T1	11		T2	1355		T3	292
valid_sources[0x11]	367209	1			T1	9		T2	1309		T3	270
valid_sources[0x12]	391796	1			T1	11		T2	1326		T3	237
valid_sources[0x13]	402770	1			T1	12		T2	1343		T3	287
valid_sources[0x14]	436964	1			T1	10		T2	1342		T3	264
valid_sources[0x15]	358426	1			T1	10		T2	1318		T3	273
valid_sources[0x16]	359127	1			T1	12		T2	1244		T3	244
valid_sources[0x17]	383260	1			T1	9		T2	1326		T3	265
valid_sources[0x18]	379875	1			T1	14		T2	1310		T3	252
valid_sources[0x19]	384433	1			T1	10		T2	1300		T3	266
valid_sources[0x1a]	370294	1			T1	12		T2	1284		T3	217
valid_sources[0x1b]	359711	1			T1	12		T2	1279		T3	263
valid_sources[0x1c]	411453	1			T1	3		T2	1247		T3	273
valid_sources[0x1d]	362172	1			T1	17		T2	1297		T3	267
valid_sources[0x1e]	389452	1			T1	13		T2	1189		T3	263
valid_sources[0x1f]	413324	1			T1	9		T2	1264		T3	260
valid_sources[0x20]	387112	1			T1	15		T2	1271		T3	263
valid_sources[0x21]	373514	1			T1	8		T2	1243		T3	241
valid_sources[0x22]	364392	1			T1	5		T2	1304		T3	297
valid_sources[0x23]	372085	1			T1	7		T2	1273		T3	270
valid_sources[0x24]	368679	1			T1	12		T2	1261		T3	255
valid_sources[0x25]	376634	1			T1	10		T2	1294		T3	267
valid_sources[0x26]	383412	1			T1	12		T2	1286		T3	281
valid_sources[0x27]	381761	1			T1	18		T2	1183		T3	283
valid_sources[0x28]	362981	1			T1	8		T2	1403		T3	246
valid_sources[0x29]	385336	1			T1	14		T2	1309		T3	286
valid_sources[0x2a]	374652	1			T1	7		T2	1306		T3	257
valid_sources[0x2b]	391660	1			T1	10		T2	1206		T3	256
valid_sources[0x2c]	382881	1			T1	13		T2	1308		T3	246
valid_sources[0x2d]	385501	1			T1	5		T2	1262		T3	251
valid_sources[0x2e]	360384	1			T1	9		T2	1188		T3	268
valid_sources[0x2f]	367300	1			T1	2		T2	1382		T3	238
valid_sources[0x30]	372210	1			T1	11		T2	1298		T3	263
valid_sources[0x31]	361466	1			T1	11		T2	1250		T3	281
valid_sources[0x32]	362879	1			T1	10		T2	1287		T3	261
valid_sources[0x33]	395966	1			T1	10		T2	1301		T3	263
valid_sources[0x34]	391627	1			T1	11		T2	1304		T3	285
valid_sources[0x35]	386526	1			T1	3		T2	1311		T3	269
valid_sources[0x36]	384546	1			T1	4		T2	1207		T3	273
valid_sources[0x37]	408935	1			T1	6		T2	1302		T3	281
valid_sources[0x38]	418724	1			T1	8		T2	1306		T3	309
valid_sources[0x39]	364789	1			T1	17		T2	1254		T3	265
valid_sources[0x3a]	369724	1			T1	17		T2	1213		T3	233
valid_sources[0x3b]	392736	1			T1	19		T2	1337		T3	258
valid_sources[0x3c]	423081	1			T1	8		T2	1304		T3	254
valid_sources[0x3d]	376948	1			T1	13		T2	1240		T3	237
valid_sources[0x3e]	358991	1			T1	17		T2	1312		T3	251
valid_sources[0x3f]	395645	1			T1	13		T2	1269		T3	245
valid_sources[0x40]	484794	1			T1	7		T2	1255		T3	262
valid_sources[0x41]	361466	1			T1	7		T2	1276		T3	270
valid_sources[0x42]	383319	1			T1	6		T2	1232		T3	274
valid_sources[0x43]	410972	1			T1	15		T2	1270		T3	263
valid_sources[0x44]	371739	1			T1	13		T2	1255		T3	263
valid_sources[0x45]	395579	1			T1	10		T2	1352		T3	264
valid_sources[0x46]	414973	1			T1	12		T2	1372		T3	284
valid_sources[0x47]	398096	1			T1	11		T2	1369		T3	253
valid_sources[0x48]	361548	1			T1	15		T2	1279		T3	256
valid_sources[0x49]	371035	1			T1	11		T2	1325		T3	249
valid_sources[0x4a]	393536	1			T1	12		T2	1254		T3	252
valid_sources[0x4b]	365279	1			T1	7		T2	1302		T3	276
valid_sources[0x4c]	407428	1			T1	14		T2	1289		T3	275
valid_sources[0x4d]	387094	1			T1	13		T2	1305		T3	270
valid_sources[0x4e]	401494	1			T1	9		T2	1288		T3	235
valid_sources[0x4f]	373100	1			T1	13		T2	1229		T3	279
valid_sources[0x50]	385310	1			T1	7		T2	1219		T3	282
valid_sources[0x51]	386809	1			T1	8		T2	1290		T3	248
valid_sources[0x52]	359764	1			T1	12		T2	1329		T3	250
valid_sources[0x53]	362424	1			T1	6		T2	1260		T3	286
valid_sources[0x54]	436893	1			T1	13		T2	1270		T3	272
valid_sources[0x55]	389836	1			T1	13		T2	1352		T3	251
valid_sources[0x56]	369674	1			T1	11		T2	1297		T3	254
valid_sources[0x57]	395959	1			T1	4		T2	1281		T3	255
valid_sources[0x58]	379634	1			T1	4		T2	1285		T3	261
valid_sources[0x59]	372821	1			T1	15		T2	1240		T3	264
valid_sources[0x5a]	381155	1			T1	11		T2	1349		T3	243
valid_sources[0x5b]	371024	1			T1	15		T2	1238		T3	266
valid_sources[0x5c]	413348	1			T1	11		T2	1317		T3	233
valid_sources[0x5d]	380604	1			T1	15		T2	1247		T3	265
valid_sources[0x5e]	362409	1			T1	10		T2	1247		T3	307
valid_sources[0x5f]	372149	1			T1	13		T2	1245		T3	296
valid_sources[0x60]	367019	1			T1	14		T2	1228		T3	309
valid_sources[0x61]	366620	1			T1	12		T2	1295		T3	259
valid_sources[0x62]	389871	1			T1	14		T2	1277		T3	245
valid_sources[0x63]	382295	1			T1	9		T2	1335		T3	272
valid_sources[0x64]	389391	1			T1	14		T2	1323		T3	287
valid_sources[0x65]	392143	1			T1	12		T2	1271		T3	240
valid_sources[0x66]	380496	1			T1	15		T2	1279		T3	261
valid_sources[0x67]	360905	1			T1	9		T2	1318		T3	245
valid_sources[0x68]	389356	1			T1	7		T2	1278		T3	255
valid_sources[0x69]	421664	1			T1	8		T2	1298		T3	274
valid_sources[0x6a]	394716	1			T1	18		T2	1365		T3	287
valid_sources[0x6b]	555701	1			T1	9		T2	1321		T3	264
valid_sources[0x6c]	404975	1			T1	12		T2	1257		T3	229
valid_sources[0x6d]	367471	1			T1	12		T2	1257		T3	265
valid_sources[0x6e]	441680	1			T1	15		T2	1308		T3	276
valid_sources[0x6f]	414971	1			T1	12		T2	1268		T3	266
valid_sources[0x70]	487930	1			T1	9		T2	1306		T3	264
valid_sources[0x71]	358798	1			T1	11		T2	1225		T3	272
valid_sources[0x72]	371802	1			T1	15		T2	1265		T3	259
valid_sources[0x73]	414791	1			T1	12		T2	1199		T3	254
valid_sources[0x74]	361351	1			T1	12		T2	1287		T3	272
valid_sources[0x75]	368922	1			T1	7		T2	1276		T3	235
valid_sources[0x76]	395584	1			T1	4		T2	1288		T3	217
valid_sources[0x77]	1020366	1			T1	7		T2	1303		T3	287
valid_sources[0x78]	425347	1			T1	10		T2	1273		T3	247
valid_sources[0x79]	450594	1			T1	9		T2	1240		T3	242
valid_sources[0x7a]	366043	1			T1	5		T2	1261		T3	288
valid_sources[0x7b]	365141	1			T1	5		T2	1331		T3	234
valid_sources[0x7c]	379349	1			T1	7		T2	1265		T3	261
valid_sources[0x7d]	381782	1			T1	13		T2	1349		T3	255
valid_sources[0x7e]	384284	1			T1	11		T2	1303		T3	264
valid_sources[0x7f]	392002	1			T1	9		T2	1242		T3	258
valid_sources[0x80]	393619	1			T1	7		T2	1349		T3	290

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

49214409

1

T1

688

T2

163840

T3

30524

values[0x0]

all_enables

biggest_size

25625419

1

T1

993

T2

81836

T3

15404

values[0x1]

all_enables

biggest_size

25631530

1

T1

1044

T2

82004

T3

15219

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	32687916	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

118352

1

T1

2363

T2

1

T3

3

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	32705240	1			T1	4740		T2	16425		T3	15585
values[0x0]	49054	1			T1	894		T2	2		T3	3
values[0x1]	51974	1			T1	891		T2	3		T3	2

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	21793019	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

11013249

1

T1

3730

T2

5450

T3

5103

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	112467	1			T1	30		T2	54		T3	62
valid_sources[0x01]	102124	1			T1	43		T2	50		T3	62
valid_sources[0x02]	92360	1			T1	29		T2	70		T3	75
valid_sources[0x03]	99408	1			T1	21		T2	66		T3	54
valid_sources[0x04]	90662	1			T1	25		T2	102		T3	59
valid_sources[0x05]	117989	1			T1	21		T2	94		T3	63
valid_sources[0x06]	238561	1			T1	17		T2	65		T3	57
valid_sources[0x07]	91433	1			T1	19		T2	66		T3	57
valid_sources[0x08]	102549	1			T1	19		T2	76		T3	69
valid_sources[0x09]	202143	1			T1	30		T2	51		T3	71
valid_sources[0x0a]	92645	1			T1	26		T2	81		T3	45
valid_sources[0x0b]	214880	1			T1	31		T2	61		T3	60
valid_sources[0x0c]	125420	1			T1	25		T2	39		T3	59
valid_sources[0x0d]	90869	1			T1	34		T2	52		T3	50
valid_sources[0x0e]	340211	1			T1	17		T2	70		T3	49
valid_sources[0x0f]	91863	1			T1	30		T2	35		T3	53
valid_sources[0x10]	131540	1			T1	20		T2	51		T3	69
valid_sources[0x11]	94815	1			T1	27		T2	42		T3	58
valid_sources[0x12]	389704	1			T1	31		T2	79		T3	67
valid_sources[0x13]	223176	1			T1	24		T2	60		T3	53
valid_sources[0x14]	91333	1			T1	18		T2	67		T3	62
valid_sources[0x15]	570714	1			T1	30		T2	63		T3	65
valid_sources[0x16]	94857	1			T1	37		T2	72		T3	52
valid_sources[0x17]	92092	1			T1	25		T2	69		T3	61
valid_sources[0x18]	433690	1			T1	28		T2	75		T3	54
valid_sources[0x19]	91208	1			T1	22		T2	72		T3	61
valid_sources[0x1a]	91683	1			T1	18		T2	63		T3	49
valid_sources[0x1b]	90703	1			T1	27		T2	70		T3	50
valid_sources[0x1c]	113172	1			T1	24		T2	64		T3	55
valid_sources[0x1d]	92027	1			T1	16		T2	61		T3	62
valid_sources[0x1e]	157354	1			T1	28		T2	52		T3	57
valid_sources[0x1f]	91844	1			T1	22		T2	57		T3	66
valid_sources[0x20]	474729	1			T1	20		T2	74		T3	67
valid_sources[0x21]	122809	1			T1	28		T2	60		T3	58
valid_sources[0x22]	93590	1			T1	31		T2	41		T3	47
valid_sources[0x23]	129175	1			T1	33		T2	36		T3	55
valid_sources[0x24]	97235	1			T1	34		T2	88		T3	48
valid_sources[0x25]	112634	1			T1	22		T2	67		T3	71
valid_sources[0x26]	90221	1			T1	28		T2	78		T3	85
valid_sources[0x27]	140215	1			T1	21		T2	51		T3	50
valid_sources[0x28]	118833	1			T1	25		T2	53		T3	56
valid_sources[0x29]	91499	1			T1	22		T2	54		T3	55
valid_sources[0x2a]	91088	1			T1	22		T2	73		T3	67
valid_sources[0x2b]	104816	1			T1	21		T2	75		T3	51
valid_sources[0x2c]	90994	1			T1	27		T2	78		T3	49
valid_sources[0x2d]	107031	1			T1	23		T2	64		T3	52
valid_sources[0x2e]	139795	1			T1	19		T2	32		T3	67
valid_sources[0x2f]	173872	1			T1	24		T2	47		T3	60
valid_sources[0x30]	90762	1			T1	23		T2	50		T3	58
valid_sources[0x31]	94148	1			T1	24		T2	44		T3	60
valid_sources[0x32]	141071	1			T1	21		T2	49		T3	57
valid_sources[0x33]	94315	1			T1	36		T2	35		T3	58
valid_sources[0x34]	94797	1			T1	35		T2	33		T3	64
valid_sources[0x35]	94577	1			T1	28		T2	57		T3	43
valid_sources[0x36]	125371	1			T1	32		T2	63		T3	62
valid_sources[0x37]	287512	1			T1	36		T2	39		T3	60
valid_sources[0x38]	107282	1			T1	32		T2	58		T3	75
valid_sources[0x39]	141323	1			T1	30		T2	85		T3	62
valid_sources[0x3a]	107833	1			T1	28		T2	80		T3	65
valid_sources[0x3b]	91187	1			T1	22		T2	47		T3	75
valid_sources[0x3c]	124192	1			T1	26		T2	53		T3	52
valid_sources[0x3d]	91793	1			T1	22		T2	65		T3	60
valid_sources[0x3e]	90935	1			T1	33		T2	77		T3	56
valid_sources[0x3f]	107705	1			T1	33		T2	74		T3	52
valid_sources[0x40]	138679	1			T1	28		T2	88		T3	60
valid_sources[0x41]	90705	1			T1	23		T2	50		T3	78
valid_sources[0x42]	155619	1			T1	22		T2	68		T3	82
valid_sources[0x43]	109675	1			T1	21		T2	73		T3	63
valid_sources[0x44]	90684	1			T1	34		T2	67		T3	64
valid_sources[0x45]	91631	1			T1	19		T2	80		T3	59
valid_sources[0x46]	96373	1			T1	23		T2	65		T3	60
valid_sources[0x47]	508499	1			T1	28		T2	54		T3	56
valid_sources[0x48]	91136	1			T1	16		T2	60		T3	87
valid_sources[0x49]	93501	1			T1	26		T2	64		T3	48
valid_sources[0x4a]	90458	1			T1	19		T2	59		T3	57
valid_sources[0x4b]	93021	1			T1	17		T2	76		T3	58
valid_sources[0x4c]	106248	1			T1	34		T2	83		T3	65
valid_sources[0x4d]	97416	1			T1	24		T2	45		T3	47
valid_sources[0x4e]	90450	1			T1	40		T2	69		T3	59
valid_sources[0x4f]	94626	1			T1	38		T2	83		T3	64
valid_sources[0x50]	143322	1			T1	19		T2	53		T3	61
valid_sources[0x51]	90547	1			T1	26		T2	48		T3	69
valid_sources[0x52]	142863	1			T1	25		T2	56		T3	59
valid_sources[0x53]	91427	1			T1	25		T2	52		T3	54
valid_sources[0x54]	142719	1			T1	26		T2	46		T3	62
valid_sources[0x55]	91562	1			T1	13		T2	56		T3	70
valid_sources[0x56]	369707	1			T1	21		T2	88		T3	60
valid_sources[0x57]	107974	1			T1	31		T2	82		T3	58
valid_sources[0x58]	91632	1			T1	20		T2	55		T3	66
valid_sources[0x59]	92991	1			T1	18		T2	74		T3	57
valid_sources[0x5a]	91183	1			T1	21		T2	62		T3	59
valid_sources[0x5b]	90197	1			T1	23		T2	57		T3	64
valid_sources[0x5c]	90994	1			T1	28		T2	56		T3	69
valid_sources[0x5d]	91427	1			T1	32		T2	66		T3	62
valid_sources[0x5e]	124234	1			T1	22		T2	61		T3	66
valid_sources[0x5f]	91615	1			T1	29		T2	49		T3	65
valid_sources[0x60]	92583	1			T1	18		T2	98		T3	61
valid_sources[0x61]	139517	1			T1	26		T2	81		T3	63
valid_sources[0x62]	90216	1			T1	27		T2	64		T3	75
valid_sources[0x63]	91184	1			T1	33		T2	75		T3	51
valid_sources[0x64]	91223	1			T1	25		T2	71		T3	42
valid_sources[0x65]	91699	1			T1	28		T2	86		T3	62
valid_sources[0x66]	101756	1			T1	32		T2	74		T3	52
valid_sources[0x67]	139428	1			T1	17		T2	118		T3	57
valid_sources[0x68]	274885	1			T1	20		T2	69		T3	81
valid_sources[0x69]	91533	1			T1	27		T2	59		T3	74
valid_sources[0x6a]	100879	1			T1	29		T2	40		T3	55
valid_sources[0x6b]	91958	1			T1	24		T2	79		T3	79
valid_sources[0x6c]	126864	1			T1	21		T2	75		T3	77
valid_sources[0x6d]	91583	1			T1	19		T2	57		T3	70
valid_sources[0x6e]	93879	1			T1	37		T2	72		T3	54
valid_sources[0x6f]	107862	1			T1	26		T2	60		T3	56
valid_sources[0x70]	92385	1			T1	22		T2	75		T3	67
valid_sources[0x71]	90513	1			T1	38		T2	62		T3	55
valid_sources[0x72]	93539	1			T1	26		T2	49		T3	65
valid_sources[0x73]	91946	1			T1	18		T2	69		T3	49
valid_sources[0x74]	91068	1			T1	22		T2	60		T3	58
valid_sources[0x75]	91357	1			T1	22		T2	61		T3	45
valid_sources[0x76]	91031	1			T1	34		T2	66		T3	70
valid_sources[0x77]	94813	1			T1	26		T2	94		T3	62
valid_sources[0x78]	91933	1			T1	30		T2	47		T3	70
valid_sources[0x79]	90900	1			T1	30		T2	93		T3	50
valid_sources[0x7a]	152869	1			T1	20		T2	62		T3	62
valid_sources[0x7b]	142078	1			T1	28		T2	85		T3	52
valid_sources[0x7c]	90221	1			T1	30		T2	63		T3	46
valid_sources[0x7d]	90998	1			T1	19		T2	55		T3	66
valid_sources[0x7e]	94233	1			T1	37		T2	64		T3	54
valid_sources[0x7f]	92325	1			T1	23		T2	87		T3	59
valid_sources[0x80]	125926	1			T1	20		T2	61		T3	50

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

32322

1

T1

625

T12

15

T14

520

values[0x0]

all_enables

biggest_size

43744

1

T1

890

T2

1

T3

3

values[0x1]

all_enables

biggest_size

42286

1

T1

848

T8

1

T9

2