| Name |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2134159093 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2180394048 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1215601745 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2285206087 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.527944174 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1752175506 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3915703270 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1279035661 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1405335617 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2540097505 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2369879491 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.363768388 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1348961558 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2724967106 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1568497482 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2278071877 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.3659440748 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3387553663 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.624451832 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2917457943 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3834140708 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1877312327 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1541539828 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2873334828 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.728776108 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3621137902 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3961588505 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2426090730 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2620898834 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.4021646251 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1989679239 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.779757796 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.2238338891 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3399276632 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2571605263 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2812501691 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2821011051 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.662094211 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.528734398 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1058073192 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1313727142 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.214320300 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2921840495 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1731445174 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1860856858 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1608987789 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3786630496 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3423942800 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1930920572 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2522470918 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3143872971 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3327980170 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2111309915 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2244582406 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.4021698273 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.569053730 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2138064726 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1813715739 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2173307039 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2481704303 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2053011094 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.79806495 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1534750623 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2837167142 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3504436670 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1613160872 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2863490936 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1057742523 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1864649324 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.47156047 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.21374696 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1428691375 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1978772614 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1645114604 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3660957373 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2886455493 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1548331533 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2530572802 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.673906448 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2449887137 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3468268830 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.4148216509 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2584799996 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2635912251 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3509624487 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2867691355 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1323953831 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.746453391 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.462215133 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1607552082 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1702356700 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.4191056571 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3649932598 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1706022167 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3230671551 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3868057896 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.131708872 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3221114130 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2926943813 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.970632632 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.4011443791 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.1758719302 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3044588593 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1285102378 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3167613384 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2607031918 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2951178524 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1657282895 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1658189373 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2736494686 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.43057865 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1035024154 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1788193680 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2539143698 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2368115315 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2965118057 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3224493369 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2186985637 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3300444758 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1677958842 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3981340458 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.542576689 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.3069906439 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1390710271 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2911313935 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2886050338 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.538314976 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3486339711 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.478437455 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3683135645 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3152148294 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.72279137 |
| /workspace/coverage/default/0.sram_ctrl_executable.352151721 |
| /workspace/coverage/default/0.sram_ctrl_max_throughput.3039153711 |
| /workspace/coverage/default/0.sram_ctrl_mem_partial_access.2762604372 |
| /workspace/coverage/default/0.sram_ctrl_multiple_keys.2827724839 |
| /workspace/coverage/default/0.sram_ctrl_smoke.499766669 |
| /workspace/coverage/default/1.sram_ctrl_access_during_key_req.1269360350 |
| /workspace/coverage/default/1.sram_ctrl_alert_test.3449171103 |
| /workspace/coverage/default/1.sram_ctrl_bijection.1920715083 |
| /workspace/coverage/default/1.sram_ctrl_lc_escalation.1145565133 |
| /workspace/coverage/default/1.sram_ctrl_max_throughput.2517295774 |
| /workspace/coverage/default/1.sram_ctrl_mem_walk.1341614526 |
| /workspace/coverage/default/1.sram_ctrl_partial_access.1777728044 |
| /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2583323704 |
| /workspace/coverage/default/1.sram_ctrl_ram_cfg.2874446239 |
| /workspace/coverage/default/1.sram_ctrl_regwen.3381461562 |
| /workspace/coverage/default/1.sram_ctrl_smoke.3168344376 |
| /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3185563464 |
| /workspace/coverage/default/10.sram_ctrl_lc_escalation.1315926284 |
| /workspace/coverage/default/10.sram_ctrl_max_throughput.1716451620 |
| /workspace/coverage/default/10.sram_ctrl_partial_access.775157183 |
| /workspace/coverage/default/10.sram_ctrl_stress_all.2645178383 |
| /workspace/coverage/default/11.sram_ctrl_access_during_key_req.1527334472 |
| /workspace/coverage/default/11.sram_ctrl_mem_partial_access.2197953848 |
| /workspace/coverage/default/11.sram_ctrl_smoke.4121539118 |
| /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.1809538232 |
| /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.704432149 |
| /workspace/coverage/default/12.sram_ctrl_bijection.1988879671 |
| /workspace/coverage/default/12.sram_ctrl_executable.3799363570 |
| /workspace/coverage/default/12.sram_ctrl_regwen.1956963991 |
| /workspace/coverage/default/13.sram_ctrl_max_throughput.2223661905 |
| /workspace/coverage/default/13.sram_ctrl_mem_walk.2504745046 |
| /workspace/coverage/default/13.sram_ctrl_partial_access.314882602 |
| /workspace/coverage/default/13.sram_ctrl_ram_cfg.2529302427 |
| /workspace/coverage/default/13.sram_ctrl_regwen.2936533718 |
| /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3608042081 |
| /workspace/coverage/default/13.sram_ctrl_stress_pipeline.3410343796 |
| /workspace/coverage/default/14.sram_ctrl_access_during_key_req.1538321779 |
| /workspace/coverage/default/14.sram_ctrl_bijection.2728373801 |
| /workspace/coverage/default/14.sram_ctrl_mem_partial_access.2037819812 |
| /workspace/coverage/default/14.sram_ctrl_mem_walk.3798505578 |
| /workspace/coverage/default/14.sram_ctrl_multiple_keys.2613059256 |
| /workspace/coverage/default/14.sram_ctrl_partial_access.3663339640 |
| /workspace/coverage/default/14.sram_ctrl_regwen.1409293065 |
| /workspace/coverage/default/14.sram_ctrl_smoke.2281748469 |
| /workspace/coverage/default/14.sram_ctrl_stress_all.2054745834 |
| /workspace/coverage/default/14.sram_ctrl_stress_pipeline.2851112799 |
| /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1417344672 |
| /workspace/coverage/default/15.sram_ctrl_max_throughput.3523243850 |
| /workspace/coverage/default/15.sram_ctrl_mem_partial_access.2527983385 |
| /workspace/coverage/default/15.sram_ctrl_mem_walk.3977322126 |
| /workspace/coverage/default/15.sram_ctrl_multiple_keys.2280309833 |
| /workspace/coverage/default/15.sram_ctrl_partial_access.1898670640 |
| /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.2913939228 |
| /workspace/coverage/default/15.sram_ctrl_ram_cfg.984330090 |
| /workspace/coverage/default/15.sram_ctrl_regwen.2166425620 |
| /workspace/coverage/default/15.sram_ctrl_smoke.844700219 |
| /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.554886660 |
| /workspace/coverage/default/16.sram_ctrl_access_during_key_req.254901270 |
| /workspace/coverage/default/16.sram_ctrl_alert_test.1292132325 |
| /workspace/coverage/default/16.sram_ctrl_bijection.1476704617 |
| /workspace/coverage/default/16.sram_ctrl_lc_escalation.1132571983 |
| /workspace/coverage/default/16.sram_ctrl_max_throughput.782278211 |
| /workspace/coverage/default/16.sram_ctrl_mem_partial_access.4197998573 |
| /workspace/coverage/default/16.sram_ctrl_multiple_keys.963633672 |
| /workspace/coverage/default/16.sram_ctrl_ram_cfg.4034133586 |
| /workspace/coverage/default/16.sram_ctrl_regwen.2125256927 |
| /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2595512834 |
| /workspace/coverage/default/17.sram_ctrl_access_during_key_req.1382846815 |
| /workspace/coverage/default/17.sram_ctrl_alert_test.3081966021 |
| /workspace/coverage/default/17.sram_ctrl_executable.612680503 |
| /workspace/coverage/default/17.sram_ctrl_lc_escalation.3185105379 |
| /workspace/coverage/default/17.sram_ctrl_mem_partial_access.3132637296 |
| /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.126810160 |
| /workspace/coverage/default/17.sram_ctrl_regwen.2875443635 |
| /workspace/coverage/default/17.sram_ctrl_smoke.2008340133 |
| /workspace/coverage/default/17.sram_ctrl_stress_pipeline.3962853032 |
| /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.3302221076 |
| /workspace/coverage/default/18.sram_ctrl_alert_test.580751684 |
| /workspace/coverage/default/18.sram_ctrl_bijection.3118055066 |
| /workspace/coverage/default/18.sram_ctrl_lc_escalation.2216791147 |
| /workspace/coverage/default/18.sram_ctrl_mem_walk.3938803437 |
| /workspace/coverage/default/18.sram_ctrl_partial_access.886245989 |
| /workspace/coverage/default/18.sram_ctrl_smoke.1466809103 |
| /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.1097233279 |
| /workspace/coverage/default/19.sram_ctrl_bijection.638659494 |
| /workspace/coverage/default/19.sram_ctrl_executable.3962924621 |
| /workspace/coverage/default/19.sram_ctrl_lc_escalation.3543336122 |
| /workspace/coverage/default/19.sram_ctrl_mem_partial_access.3025487015 |
| /workspace/coverage/default/19.sram_ctrl_multiple_keys.375786827 |
| /workspace/coverage/default/19.sram_ctrl_partial_access.3601146625 |
| /workspace/coverage/default/19.sram_ctrl_regwen.2204748201 |
| /workspace/coverage/default/19.sram_ctrl_smoke.1305915921 |
| /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.4292812797 |
| /workspace/coverage/default/2.sram_ctrl_access_during_key_req.712432604 |
| /workspace/coverage/default/2.sram_ctrl_bijection.557794957 |
| /workspace/coverage/default/2.sram_ctrl_max_throughput.4251146876 |
| /workspace/coverage/default/2.sram_ctrl_multiple_keys.3973541021 |
| /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.2027917042 |
| /workspace/coverage/default/2.sram_ctrl_ram_cfg.867915345 |
| /workspace/coverage/default/2.sram_ctrl_smoke.2518183896 |
| /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.3720470370 |
| /workspace/coverage/default/2.sram_ctrl_stress_pipeline.418803949 |
| /workspace/coverage/default/20.sram_ctrl_executable.3671194052 |
| /workspace/coverage/default/20.sram_ctrl_max_throughput.3369165912 |
| /workspace/coverage/default/20.sram_ctrl_mem_partial_access.1231458566 |
| /workspace/coverage/default/20.sram_ctrl_ram_cfg.692751342 |
| /workspace/coverage/default/20.sram_ctrl_regwen.1722900428 |
| /workspace/coverage/default/20.sram_ctrl_smoke.1633128610 |
| /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2882309041 |
| /workspace/coverage/default/21.sram_ctrl_alert_test.3288810306 |
| /workspace/coverage/default/21.sram_ctrl_bijection.2436419907 |
| /workspace/coverage/default/21.sram_ctrl_executable.933819430 |
| /workspace/coverage/default/21.sram_ctrl_mem_partial_access.391463080 |
| /workspace/coverage/default/21.sram_ctrl_mem_walk.4056554262 |
| /workspace/coverage/default/21.sram_ctrl_regwen.2921578451 |
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| /workspace/coverage/default/38.sram_ctrl_partial_access.3922194976 |
| /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.3619252747 |
| /workspace/coverage/default/38.sram_ctrl_ram_cfg.2356793286 |
| /workspace/coverage/default/38.sram_ctrl_regwen.2216110681 |
| /workspace/coverage/default/38.sram_ctrl_smoke.2493563850 |
| /workspace/coverage/default/38.sram_ctrl_stress_all.1692684830 |
| /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1511583772 |
| /workspace/coverage/default/38.sram_ctrl_stress_pipeline.1731172316 |
| /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.3288657524 |
| /workspace/coverage/default/39.sram_ctrl_access_during_key_req.2513356565 |
| /workspace/coverage/default/39.sram_ctrl_alert_test.3588782775 |
| /workspace/coverage/default/39.sram_ctrl_bijection.647709774 |
| /workspace/coverage/default/39.sram_ctrl_executable.2497466915 |
| /workspace/coverage/default/39.sram_ctrl_lc_escalation.833273623 |
| /workspace/coverage/default/39.sram_ctrl_max_throughput.2935977771 |
| /workspace/coverage/default/39.sram_ctrl_mem_partial_access.1172912172 |
| /workspace/coverage/default/39.sram_ctrl_mem_walk.519243842 |
| /workspace/coverage/default/39.sram_ctrl_multiple_keys.3625322816 |
| /workspace/coverage/default/39.sram_ctrl_partial_access.4194164304 |
| /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.2700303599 |
| /workspace/coverage/default/39.sram_ctrl_ram_cfg.944366606 |
| /workspace/coverage/default/39.sram_ctrl_regwen.1583836641 |
| /workspace/coverage/default/39.sram_ctrl_smoke.2636276411 |
| /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.550386926 |
| /workspace/coverage/default/39.sram_ctrl_stress_pipeline.1310975481 |
| /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.2131260254 |
| /workspace/coverage/default/4.sram_ctrl_bijection.1503133415 |
| /workspace/coverage/default/4.sram_ctrl_lc_escalation.2632911784 |
| /workspace/coverage/default/4.sram_ctrl_max_throughput.3246409856 |
| /workspace/coverage/default/4.sram_ctrl_mem_partial_access.309113326 |
| /workspace/coverage/default/4.sram_ctrl_mem_walk.4027956058 |
| /workspace/coverage/default/4.sram_ctrl_multiple_keys.355262139 |
| /workspace/coverage/default/4.sram_ctrl_partial_access.4220488768 |
| /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.738200788 |
| /workspace/coverage/default/4.sram_ctrl_ram_cfg.18322297 |
| /workspace/coverage/default/4.sram_ctrl_regwen.1652103138 |
| /workspace/coverage/default/4.sram_ctrl_smoke.3579570747 |
| /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.136720169 |
| /workspace/coverage/default/40.sram_ctrl_access_during_key_req.801172199 |
| /workspace/coverage/default/40.sram_ctrl_alert_test.1787705868 |
| /workspace/coverage/default/40.sram_ctrl_bijection.4138149406 |
| /workspace/coverage/default/40.sram_ctrl_lc_escalation.69437142 |
| /workspace/coverage/default/40.sram_ctrl_max_throughput.1018482912 |
| /workspace/coverage/default/40.sram_ctrl_mem_partial_access.2016592777 |
| /workspace/coverage/default/40.sram_ctrl_mem_walk.2897664622 |
| /workspace/coverage/default/40.sram_ctrl_partial_access.620897068 |
| /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.3213033431 |
| /workspace/coverage/default/40.sram_ctrl_ram_cfg.1391052639 |
| /workspace/coverage/default/40.sram_ctrl_regwen.2294368104 |
| /workspace/coverage/default/40.sram_ctrl_smoke.2035079645 |
| /workspace/coverage/default/40.sram_ctrl_stress_all.3166199952 |
| /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.1658485436 |
| /workspace/coverage/default/40.sram_ctrl_stress_pipeline.2706285204 |
| /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.3059900400 |
| /workspace/coverage/default/41.sram_ctrl_access_during_key_req.1029771583 |
| /workspace/coverage/default/41.sram_ctrl_alert_test.399853504 |
| /workspace/coverage/default/41.sram_ctrl_bijection.2377193589 |
| /workspace/coverage/default/41.sram_ctrl_executable.3182572768 |
| /workspace/coverage/default/41.sram_ctrl_lc_escalation.822653883 |
| /workspace/coverage/default/41.sram_ctrl_max_throughput.866257578 |
| /workspace/coverage/default/41.sram_ctrl_mem_partial_access.3769588071 |
| /workspace/coverage/default/41.sram_ctrl_mem_walk.1588663188 |
| /workspace/coverage/default/41.sram_ctrl_multiple_keys.1842166378 |
| /workspace/coverage/default/41.sram_ctrl_partial_access.1694725183 |
| /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.2309461255 |
| /workspace/coverage/default/41.sram_ctrl_ram_cfg.1955708862 |
| /workspace/coverage/default/41.sram_ctrl_regwen.2959010677 |
| /workspace/coverage/default/41.sram_ctrl_smoke.2693820815 |
| /workspace/coverage/default/41.sram_ctrl_stress_all.153953549 |
| /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1029294250 |
| /workspace/coverage/default/41.sram_ctrl_stress_pipeline.3085151646 |
| /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.4234086920 |
| /workspace/coverage/default/42.sram_ctrl_access_during_key_req.1801983026 |
| /workspace/coverage/default/42.sram_ctrl_alert_test.1587050587 |
| /workspace/coverage/default/42.sram_ctrl_bijection.3322793685 |
| /workspace/coverage/default/42.sram_ctrl_max_throughput.2329938663 |
| /workspace/coverage/default/42.sram_ctrl_mem_partial_access.1986726402 |
| /workspace/coverage/default/42.sram_ctrl_mem_walk.1003113761 |
| /workspace/coverage/default/42.sram_ctrl_multiple_keys.4066384283 |
| /workspace/coverage/default/42.sram_ctrl_partial_access.3879620190 |
| /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.107676708 |
| /workspace/coverage/default/42.sram_ctrl_ram_cfg.2789030535 |
| /workspace/coverage/default/42.sram_ctrl_regwen.2068586736 |
| /workspace/coverage/default/42.sram_ctrl_smoke.969530794 |
| /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1859193637 |
| /workspace/coverage/default/42.sram_ctrl_stress_pipeline.3332587055 |
| /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3704755729 |
| /workspace/coverage/default/43.sram_ctrl_access_during_key_req.1702112186 |
| /workspace/coverage/default/43.sram_ctrl_alert_test.4059278862 |
| /workspace/coverage/default/43.sram_ctrl_bijection.277792947 |
| /workspace/coverage/default/43.sram_ctrl_lc_escalation.1413280956 |
| /workspace/coverage/default/43.sram_ctrl_max_throughput.3099003284 |
| /workspace/coverage/default/43.sram_ctrl_mem_partial_access.689084227 |
| /workspace/coverage/default/43.sram_ctrl_mem_walk.3125185366 |
| /workspace/coverage/default/43.sram_ctrl_multiple_keys.3492119858 |
| /workspace/coverage/default/43.sram_ctrl_partial_access.314199228 |
| /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.2234305815 |
| /workspace/coverage/default/43.sram_ctrl_ram_cfg.3928084175 |
| /workspace/coverage/default/43.sram_ctrl_regwen.4122594631 |
| /workspace/coverage/default/43.sram_ctrl_smoke.179142617 |
| /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1868371707 |
| /workspace/coverage/default/43.sram_ctrl_stress_pipeline.3830162793 |
| /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.4226187052 |
| /workspace/coverage/default/44.sram_ctrl_access_during_key_req.1631914653 |
| /workspace/coverage/default/44.sram_ctrl_alert_test.3478361630 |
| /workspace/coverage/default/44.sram_ctrl_bijection.4154238109 |
| /workspace/coverage/default/44.sram_ctrl_lc_escalation.1218168610 |
| /workspace/coverage/default/44.sram_ctrl_max_throughput.2364093999 |
| /workspace/coverage/default/44.sram_ctrl_mem_partial_access.3667534636 |
| /workspace/coverage/default/44.sram_ctrl_mem_walk.3537098162 |
| /workspace/coverage/default/44.sram_ctrl_multiple_keys.3439519130 |
| /workspace/coverage/default/44.sram_ctrl_partial_access.2007581419 |
| /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2318061272 |
| /workspace/coverage/default/44.sram_ctrl_ram_cfg.252479842 |
| /workspace/coverage/default/44.sram_ctrl_smoke.639423571 |
| /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3824957817 |
| /workspace/coverage/default/44.sram_ctrl_stress_pipeline.2607290082 |
| /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3442456257 |
| /workspace/coverage/default/45.sram_ctrl_access_during_key_req.3766478112 |
| /workspace/coverage/default/45.sram_ctrl_alert_test.813724720 |
| /workspace/coverage/default/45.sram_ctrl_bijection.2621085392 |
| /workspace/coverage/default/45.sram_ctrl_lc_escalation.1521943416 |
| /workspace/coverage/default/45.sram_ctrl_max_throughput.2538218115 |
| /workspace/coverage/default/45.sram_ctrl_mem_partial_access.3638282074 |
| /workspace/coverage/default/45.sram_ctrl_mem_walk.2890226439 |
| /workspace/coverage/default/45.sram_ctrl_multiple_keys.3919223437 |
| /workspace/coverage/default/45.sram_ctrl_partial_access.2496201036 |
| /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.665542459 |
| /workspace/coverage/default/45.sram_ctrl_ram_cfg.1504320718 |
| /workspace/coverage/default/45.sram_ctrl_regwen.3630073888 |
| /workspace/coverage/default/45.sram_ctrl_smoke.3186999497 |
| /workspace/coverage/default/45.sram_ctrl_stress_all.1419343672 |
| /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1765045680 |
| /workspace/coverage/default/45.sram_ctrl_stress_pipeline.4190576459 |
| /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3625881990 |
| /workspace/coverage/default/46.sram_ctrl_access_during_key_req.438884516 |
| /workspace/coverage/default/46.sram_ctrl_alert_test.583917842 |
| /workspace/coverage/default/46.sram_ctrl_bijection.2040561931 |
| /workspace/coverage/default/46.sram_ctrl_lc_escalation.2950462397 |
| /workspace/coverage/default/46.sram_ctrl_max_throughput.2779111452 |
| /workspace/coverage/default/46.sram_ctrl_mem_partial_access.2821334960 |
| /workspace/coverage/default/46.sram_ctrl_mem_walk.2330660003 |
| /workspace/coverage/default/46.sram_ctrl_multiple_keys.3290196221 |
| /workspace/coverage/default/46.sram_ctrl_partial_access.2093520781 |
| /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3774724650 |
| /workspace/coverage/default/46.sram_ctrl_ram_cfg.3019820242 |
| /workspace/coverage/default/46.sram_ctrl_regwen.2428435909 |
| /workspace/coverage/default/46.sram_ctrl_smoke.2843102168 |
| /workspace/coverage/default/46.sram_ctrl_stress_all.1410725494 |
| /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2825315239 |
| /workspace/coverage/default/46.sram_ctrl_stress_pipeline.2239150481 |
| /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1150898298 |
| /workspace/coverage/default/47.sram_ctrl_access_during_key_req.3317076093 |
| /workspace/coverage/default/47.sram_ctrl_alert_test.3043691188 |
| /workspace/coverage/default/47.sram_ctrl_bijection.939749356 |
| /workspace/coverage/default/47.sram_ctrl_executable.3320607802 |
| /workspace/coverage/default/47.sram_ctrl_lc_escalation.2595203020 |
| /workspace/coverage/default/47.sram_ctrl_max_throughput.2359492812 |
| /workspace/coverage/default/47.sram_ctrl_mem_partial_access.936461024 |
| /workspace/coverage/default/47.sram_ctrl_mem_walk.1471588117 |
| /workspace/coverage/default/47.sram_ctrl_multiple_keys.2110697615 |
| /workspace/coverage/default/47.sram_ctrl_partial_access.695268442 |
| /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.717274140 |
| /workspace/coverage/default/47.sram_ctrl_ram_cfg.1357949478 |
| /workspace/coverage/default/47.sram_ctrl_regwen.3621413036 |
| /workspace/coverage/default/47.sram_ctrl_smoke.1165565208 |
| /workspace/coverage/default/47.sram_ctrl_stress_all.3351195397 |
| /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1347219579 |
| /workspace/coverage/default/47.sram_ctrl_stress_pipeline.703657202 |
| /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4277988009 |
| /workspace/coverage/default/48.sram_ctrl_access_during_key_req.3132288381 |
| /workspace/coverage/default/48.sram_ctrl_alert_test.2238591908 |
| /workspace/coverage/default/48.sram_ctrl_bijection.2755902322 |
| /workspace/coverage/default/48.sram_ctrl_executable.1237294207 |
| /workspace/coverage/default/48.sram_ctrl_lc_escalation.2054841916 |
| /workspace/coverage/default/48.sram_ctrl_max_throughput.2528729912 |
| /workspace/coverage/default/48.sram_ctrl_mem_partial_access.2806570634 |
| /workspace/coverage/default/48.sram_ctrl_mem_walk.2503081943 |
| /workspace/coverage/default/48.sram_ctrl_multiple_keys.2068052901 |
| /workspace/coverage/default/48.sram_ctrl_partial_access.24121921 |
| /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.4149504421 |
| /workspace/coverage/default/48.sram_ctrl_ram_cfg.3359123706 |
| /workspace/coverage/default/48.sram_ctrl_regwen.1163773474 |
| /workspace/coverage/default/48.sram_ctrl_smoke.2074268134 |
| /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.776015617 |
| /workspace/coverage/default/48.sram_ctrl_stress_pipeline.3646136576 |
| /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3052629327 |
| /workspace/coverage/default/49.sram_ctrl_access_during_key_req.847615981 |
| /workspace/coverage/default/49.sram_ctrl_alert_test.1874199647 |
| /workspace/coverage/default/49.sram_ctrl_bijection.4293334615 |
| /workspace/coverage/default/49.sram_ctrl_executable.3209188556 |
| /workspace/coverage/default/49.sram_ctrl_lc_escalation.1719374709 |
| /workspace/coverage/default/49.sram_ctrl_max_throughput.4046280218 |
| /workspace/coverage/default/49.sram_ctrl_mem_partial_access.4108420783 |
| /workspace/coverage/default/49.sram_ctrl_mem_walk.2546102446 |
| /workspace/coverage/default/49.sram_ctrl_multiple_keys.2899291077 |
| /workspace/coverage/default/49.sram_ctrl_partial_access.644000023 |
| /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.203174728 |
| /workspace/coverage/default/49.sram_ctrl_ram_cfg.517245761 |
| /workspace/coverage/default/49.sram_ctrl_regwen.2564233221 |
| /workspace/coverage/default/49.sram_ctrl_smoke.3459540633 |
| /workspace/coverage/default/49.sram_ctrl_stress_all.2944995715 |
| /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1603395017 |
| /workspace/coverage/default/49.sram_ctrl_stress_pipeline.1243367929 |
| /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3963326890 |
| /workspace/coverage/default/5.sram_ctrl_lc_escalation.2174994477 |
| /workspace/coverage/default/5.sram_ctrl_mem_partial_access.651881937 |
| /workspace/coverage/default/5.sram_ctrl_partial_access.1901288288 |
| /workspace/coverage/default/5.sram_ctrl_ram_cfg.116894294 |
| /workspace/coverage/default/5.sram_ctrl_smoke.676543254 |
| /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1248588309 |
| /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2296111277 |
| /workspace/coverage/default/6.sram_ctrl_multiple_keys.335369681 |
| /workspace/coverage/default/6.sram_ctrl_ram_cfg.2001378111 |
| /workspace/coverage/default/6.sram_ctrl_regwen.706832076 |
| /workspace/coverage/default/6.sram_ctrl_stress_all.41820021 |
| /workspace/coverage/default/7.sram_ctrl_max_throughput.1250356235 |
| /workspace/coverage/default/7.sram_ctrl_mem_partial_access.3584583850 |
| /workspace/coverage/default/7.sram_ctrl_mem_walk.4250546815 |
| /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.889055871 |
| /workspace/coverage/default/7.sram_ctrl_stress_pipeline.3766130335 |
| /workspace/coverage/default/8.sram_ctrl_access_during_key_req.1354850668 |
| /workspace/coverage/default/8.sram_ctrl_bijection.3770560690 |
| /workspace/coverage/default/8.sram_ctrl_lc_escalation.1603251965 |
| /workspace/coverage/default/8.sram_ctrl_max_throughput.4154333700 |
| /workspace/coverage/default/8.sram_ctrl_multiple_keys.1930939603 |
| /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1312196455 |
| /workspace/coverage/default/8.sram_ctrl_smoke.2739083189 |
| /workspace/coverage/default/8.sram_ctrl_stress_pipeline.3376354920 |
| /workspace/coverage/default/9.sram_ctrl_bijection.3894478651 |
| /workspace/coverage/default/9.sram_ctrl_max_throughput.2726241195 |
| /workspace/coverage/default/9.sram_ctrl_partial_access.3029319067 |
| /workspace/coverage/default/9.sram_ctrl_regwen.1340276783 |
| /workspace/coverage/default/9.sram_ctrl_smoke.310914436 |
| /workspace/coverage/default/9.sram_ctrl_stress_pipeline.2821167443 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.389286357 |
|
|
Jan 07 01:00:54 PM PST 24 |
Jan 07 01:55:05 PM PST 24 |
7535111054 ps |
| T2 |
/workspace/coverage/default/1.sram_ctrl_bijection.1920715083 |
|
|
Jan 07 12:59:09 PM PST 24 |
Jan 07 01:09:31 PM PST 24 |
13786000199 ps |
| T3 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.2500320363 |
|
|
Jan 07 01:00:30 PM PST 24 |
Jan 07 01:07:49 PM PST 24 |
12394723393 ps |
| T4 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.1734559067 |
|
|
Jan 07 01:00:11 PM PST 24 |
Jan 07 01:10:14 PM PST 24 |
21516795515 ps |
| T8 |
/workspace/coverage/default/31.sram_ctrl_alert_test.3914807247 |
|
|
Jan 07 01:00:15 PM PST 24 |
Jan 07 01:01:46 PM PST 24 |
12232140 ps |
| T9 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.1415040768 |
|
|
Jan 07 12:59:47 PM PST 24 |
Jan 07 01:07:53 PM PST 24 |
13999861764 ps |
| T10 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.1382846815 |
|
|
Jan 07 12:59:41 PM PST 24 |
Jan 07 01:11:59 PM PST 24 |
11776830551 ps |
| T11 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.3672696483 |
|
|
Jan 07 01:00:52 PM PST 24 |
Jan 07 01:01:51 PM PST 24 |
363260342 ps |
| T12 |
/workspace/coverage/default/49.sram_ctrl_regwen.2564233221 |
|
|
Jan 07 01:01:09 PM PST 24 |
Jan 07 01:19:34 PM PST 24 |
78257831927 ps |
| T13 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.834136582 |
|
|
Jan 07 12:59:50 PM PST 24 |
Jan 07 01:08:36 PM PST 24 |
13032859995 ps |
| T27 |
/workspace/coverage/default/41.sram_ctrl_partial_access.1694725183 |
|
|
Jan 07 01:00:27 PM PST 24 |
Jan 07 01:02:15 PM PST 24 |
1886618110 ps |
| T28 |
/workspace/coverage/default/25.sram_ctrl_partial_access.268367869 |
|
|
Jan 07 01:00:20 PM PST 24 |
Jan 07 01:02:06 PM PST 24 |
1751959419 ps |
| T30 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.354974029 |
|
|
Jan 07 01:00:00 PM PST 24 |
Jan 07 01:08:08 PM PST 24 |
5115964516 ps |
| T29 |
/workspace/coverage/default/9.sram_ctrl_smoke.310914436 |
|
|
Jan 07 12:59:05 PM PST 24 |
Jan 07 01:02:46 PM PST 24 |
4667437365 ps |
| T43 |
/workspace/coverage/default/24.sram_ctrl_smoke.3716108033 |
|
|
Jan 07 01:00:03 PM PST 24 |
Jan 07 01:02:24 PM PST 24 |
2329177852 ps |
| T89 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.2851112799 |
|
|
Jan 07 12:59:52 PM PST 24 |
Jan 07 01:06:22 PM PST 24 |
74550095073 ps |
| T14 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3367190919 |
|
|
Jan 07 01:00:13 PM PST 24 |
Jan 07 01:07:56 PM PST 24 |
3123730939 ps |
| T25 |
/workspace/coverage/default/4.sram_ctrl_ram_cfg.18322297 |
|
|
Jan 07 12:59:00 PM PST 24 |
Jan 07 01:01:44 PM PST 24 |
362435498 ps |
| T90 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.2779111452 |
|
|
Jan 07 01:01:08 PM PST 24 |
Jan 07 01:02:35 PM PST 24 |
1570354495 ps |
| T95 |
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3830162793 |
|
|
Jan 07 01:00:54 PM PST 24 |
Jan 07 01:08:46 PM PST 24 |
11622021665 ps |
| T5 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.462201132 |
|
|
Jan 07 01:00:21 PM PST 24 |
Jan 07 01:03:26 PM PST 24 |
58115031465 ps |
| T15 |
/workspace/coverage/default/25.sram_ctrl_alert_test.502651337 |
|
|
Jan 07 01:00:19 PM PST 24 |
Jan 07 01:01:49 PM PST 24 |
23684285 ps |
| T24 |
/workspace/coverage/default/20.sram_ctrl_executable.3671194052 |
|
|
Jan 07 12:59:44 PM PST 24 |
Jan 07 01:08:23 PM PST 24 |
9845195657 ps |
| T96 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.3085151646 |
|
|
Jan 07 01:00:54 PM PST 24 |
Jan 07 01:05:31 PM PST 24 |
3264926078 ps |
| T6 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.3543336122 |
|
|
Jan 07 12:59:31 PM PST 24 |
Jan 07 01:02:47 PM PST 24 |
22107768119 ps |
| T120 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.2641668477 |
|
|
Jan 07 12:59:45 PM PST 24 |
Jan 07 01:02:07 PM PST 24 |
715518868 ps |
| T121 |
/workspace/coverage/default/19.sram_ctrl_bijection.638659494 |
|
|
Jan 07 12:59:49 PM PST 24 |
Jan 07 01:34:25 PM PST 24 |
29503709973 ps |
| T54 |
/workspace/coverage/default/22.sram_ctrl_partial_access.2909430404 |
|
|
Jan 07 01:00:14 PM PST 24 |
Jan 07 01:03:20 PM PST 24 |
5515561734 ps |
| T122 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.139366244 |
|
|
Jan 07 01:00:47 PM PST 24 |
Jan 07 01:02:22 PM PST 24 |
715326672 ps |
| T17 |
/workspace/coverage/default/37.sram_ctrl_regwen.633459612 |
|
|
Jan 07 01:00:20 PM PST 24 |
Jan 07 01:04:55 PM PST 24 |
1473290617 ps |
| T55 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2572393643 |
|
|
Jan 07 12:59:10 PM PST 24 |
Jan 07 01:07:28 PM PST 24 |
203711033557 ps |
| T56 |
/workspace/coverage/default/47.sram_ctrl_smoke.1165565208 |
|
|
Jan 07 01:01:09 PM PST 24 |
Jan 07 01:02:10 PM PST 24 |
1424255807 ps |
| T23 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.1979516094 |
|
|
Jan 07 12:59:56 PM PST 24 |
Jan 07 01:37:50 PM PST 24 |
800953160 ps |
| T123 |
/workspace/coverage/default/29.sram_ctrl_partial_access.2600177286 |
|
|
Jan 07 01:00:34 PM PST 24 |
Jan 07 01:03:14 PM PST 24 |
1425885993 ps |
| T32 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1603395017 |
|
|
Jan 07 01:00:55 PM PST 24 |
Jan 07 02:17:12 PM PST 24 |
9452744325 ps |
| T33 |
/workspace/coverage/default/37.sram_ctrl_executable.3754182782 |
|
|
Jan 07 01:01:05 PM PST 24 |
Jan 07 01:31:38 PM PST 24 |
21514640493 ps |
| T7 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1719374709 |
|
|
Jan 07 01:01:21 PM PST 24 |
Jan 07 01:02:47 PM PST 24 |
6360067723 ps |
| T57 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.3132637296 |
|
|
Jan 07 01:00:18 PM PST 24 |
Jan 07 01:04:29 PM PST 24 |
4576889137 ps |
| T26 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.3231783269 |
|
|
Jan 07 01:00:18 PM PST 24 |
Jan 07 01:02:12 PM PST 24 |
705959773 ps |
| T124 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.704432149 |
|
|
Jan 07 12:59:09 PM PST 24 |
Jan 07 01:02:21 PM PST 24 |
767365493 ps |
| T97 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.3543715942 |
|
|
Jan 07 01:00:52 PM PST 24 |
Jan 07 01:09:09 PM PST 24 |
65042741106 ps |
| T37 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.550386926 |
|
|
Jan 07 01:00:17 PM PST 24 |
Jan 07 02:52:38 PM PST 24 |
333621420 ps |
| T98 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.38407139 |
|
|
Jan 07 01:00:53 PM PST 24 |
Jan 07 01:05:21 PM PST 24 |
12597074002 ps |
| T99 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.738200788 |
|
|
Jan 07 12:58:50 PM PST 24 |
Jan 07 01:03:50 PM PST 24 |
8985234681 ps |
| T18 |
/workspace/coverage/default/30.sram_ctrl_regwen.2453826404 |
|
|
Jan 07 01:00:16 PM PST 24 |
Jan 07 01:08:21 PM PST 24 |
3515109414 ps |
| T100 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.2737893140 |
|
|
Jan 07 12:59:56 PM PST 24 |
Jan 07 01:10:22 PM PST 24 |
8496002688 ps |
| T62 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2197953848 |
|
|
Jan 07 12:59:01 PM PST 24 |
Jan 07 01:04:06 PM PST 24 |
21249278162 ps |
| T20 |
/workspace/coverage/default/28.sram_ctrl_regwen.2594647782 |
|
|
Jan 07 01:00:04 PM PST 24 |
Jan 07 01:10:07 PM PST 24 |
10049136121 ps |
| T31 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.438884516 |
|
|
Jan 07 01:01:14 PM PST 24 |
Jan 07 01:11:40 PM PST 24 |
24595325009 ps |
| T118 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.1638403913 |
|
|
Jan 07 01:00:02 PM PST 24 |
Jan 07 01:08:04 PM PST 24 |
31876085791 ps |
| T63 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.3877553418 |
|
|
Jan 07 01:00:36 PM PST 24 |
Jan 07 01:04:09 PM PST 24 |
3099571160 ps |
| T125 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.3125185366 |
|
|
Jan 07 01:01:10 PM PST 24 |
Jan 07 01:04:37 PM PST 24 |
206846821069 ps |
| T64 |
/workspace/coverage/default/37.sram_ctrl_access_during_key_req.957730623 |
|
|
Jan 07 01:00:27 PM PST 24 |
Jan 07 01:20:27 PM PST 24 |
27022806445 ps |
| T65 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.200806323 |
|
|
Jan 07 12:59:58 PM PST 24 |
Jan 07 01:03:20 PM PST 24 |
4492822151 ps |
| T126 |
/workspace/coverage/default/9.sram_ctrl_bijection.3894478651 |
|
|
Jan 07 12:59:56 PM PST 24 |
Jan 07 01:53:35 PM PST 24 |
919547948560 ps |
| T127 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.3077814877 |
|
|
Jan 07 01:00:55 PM PST 24 |
Jan 07 01:08:22 PM PST 24 |
11093369087 ps |
| T128 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.23565924 |
|
|
Jan 07 01:00:18 PM PST 24 |
Jan 07 01:02:02 PM PST 24 |
2822223890 ps |
| T19 |
/workspace/coverage/default/35.sram_ctrl_stress_all.249200758 |
|
|
Jan 07 01:00:10 PM PST 24 |
Jan 07 02:17:58 PM PST 24 |
207805028447 ps |
| T129 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2239150481 |
|
|
Jan 07 01:01:19 PM PST 24 |
Jan 07 01:05:55 PM PST 24 |
13723642404 ps |
| T16 |
/workspace/coverage/default/43.sram_ctrl_alert_test.4059278862 |
|
|
Jan 07 01:01:15 PM PST 24 |
Jan 07 01:01:49 PM PST 24 |
13516427 ps |
| T130 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2296111277 |
|
|
Jan 07 12:58:57 PM PST 24 |
Jan 07 01:02:29 PM PST 24 |
771931061 ps |
| T131 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.80668119 |
|
|
Jan 07 01:00:49 PM PST 24 |
Jan 07 01:06:03 PM PST 24 |
3946492353 ps |
| T132 |
/workspace/coverage/default/46.sram_ctrl_smoke.2843102168 |
|
|
Jan 07 01:01:17 PM PST 24 |
Jan 07 01:02:18 PM PST 24 |
4287727901 ps |
| T38 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2825315239 |
|
|
Jan 07 01:01:14 PM PST 24 |
Jan 07 02:14:14 PM PST 24 |
4765974222 ps |
| T133 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.2705847029 |
|
|
Jan 07 01:00:44 PM PST 24 |
Jan 07 01:08:55 PM PST 24 |
17333992068 ps |
| T134 |
/workspace/coverage/default/19.sram_ctrl_alert_test.1972928190 |
|
|
Jan 07 12:59:49 PM PST 24 |
Jan 07 01:01:54 PM PST 24 |
192653170 ps |
| T39 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.889055871 |
|
|
Jan 07 12:58:51 PM PST 24 |
Jan 07 01:42:06 PM PST 24 |
255839066 ps |
| T135 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.3287968729 |
|
|
Jan 07 12:59:59 PM PST 24 |
Jan 07 01:04:04 PM PST 24 |
13233062867 ps |
| T136 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.3966667804 |
|
|
Jan 07 12:59:48 PM PST 24 |
Jan 07 01:02:56 PM PST 24 |
25886046984 ps |
| T137 |
/workspace/coverage/default/48.sram_ctrl_partial_access.24121921 |
|
|
Jan 07 01:01:13 PM PST 24 |
Jan 07 01:02:20 PM PST 24 |
1317819372 ps |
| T116 |
/workspace/coverage/default/22.sram_ctrl_executable.628706346 |
|
|
Jan 07 01:00:00 PM PST 24 |
Jan 07 01:11:46 PM PST 24 |
40874946294 ps |
| T66 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1527334472 |
|
|
Jan 07 12:59:02 PM PST 24 |
Jan 07 01:20:49 PM PST 24 |
6511678967 ps |
| T138 |
/workspace/coverage/default/38.sram_ctrl_alert_test.4160415822 |
|
|
Jan 07 01:00:33 PM PST 24 |
Jan 07 01:01:54 PM PST 24 |
22322016 ps |
| T139 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.3213033431 |
|
|
Jan 07 01:00:51 PM PST 24 |
Jan 07 01:10:44 PM PST 24 |
89657671976 ps |
| T140 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.3784236570 |
|
|
Jan 07 01:00:41 PM PST 24 |
Jan 07 01:32:31 PM PST 24 |
12877137248 ps |
| T141 |
/workspace/coverage/default/39.sram_ctrl_alert_test.3588782775 |
|
|
Jan 07 01:00:53 PM PST 24 |
Jan 07 01:02:00 PM PST 24 |
32153349 ps |
| T142 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.805592097 |
|
|
Jan 07 01:00:20 PM PST 24 |
Jan 07 01:07:35 PM PST 24 |
13959081764 ps |
| T67 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.988436599 |
|
|
Jan 07 01:00:42 PM PST 24 |
Jan 07 01:03:48 PM PST 24 |
815957879 ps |
| T143 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.1402444158 |
|
|
Jan 07 01:00:24 PM PST 24 |
Jan 07 01:15:21 PM PST 24 |
26976162035 ps |
| T144 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.4157809731 |
|
|
Jan 07 01:00:07 PM PST 24 |
Jan 07 01:21:00 PM PST 24 |
90194925797 ps |
| T145 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.2386607283 |
|
|
Jan 07 12:59:47 PM PST 24 |
Jan 07 01:02:14 PM PST 24 |
1468326389 ps |
| T146 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.1003113761 |
|
|
Jan 07 01:00:53 PM PST 24 |
Jan 07 01:06:01 PM PST 24 |
3985919746 ps |
| T147 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.935163816 |
|
|
Jan 07 01:00:38 PM PST 24 |
Jan 07 01:10:28 PM PST 24 |
15846334140 ps |
| T148 |
/workspace/coverage/default/35.sram_ctrl_access_during_key_req.4054383134 |
|
|
Jan 07 01:00:48 PM PST 24 |
Jan 07 01:11:34 PM PST 24 |
7356035273 ps |
| T149 |
/workspace/coverage/default/32.sram_ctrl_smoke.2352438419 |
|
|
Jan 07 01:00:41 PM PST 24 |
Jan 07 01:03:58 PM PST 24 |
462715595 ps |
| T150 |
/workspace/coverage/default/30.sram_ctrl_mem_walk.2681024033 |
|
|
Jan 07 01:00:45 PM PST 24 |
Jan 07 01:03:47 PM PST 24 |
39503662332 ps |
| T151 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.2311727246 |
|
|
Jan 07 01:00:02 PM PST 24 |
Jan 07 01:02:21 PM PST 24 |
1405378673 ps |
| T152 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.1522691998 |
|
|
Jan 07 01:00:07 PM PST 24 |
Jan 07 01:02:25 PM PST 24 |
716783269 ps |
| T153 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.2110227927 |
|
|
Jan 07 01:00:34 PM PST 24 |
Jan 07 01:02:39 PM PST 24 |
737599939 ps |
| T154 |
/workspace/coverage/default/32.sram_ctrl_alert_test.2623046461 |
|
|
Jan 07 12:59:59 PM PST 24 |
Jan 07 01:02:06 PM PST 24 |
68367255 ps |
| T40 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.1809538232 |
|
|
Jan 07 12:59:06 PM PST 24 |
Jan 07 01:33:04 PM PST 24 |
13007690671 ps |
| T155 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3317076093 |
|
|
Jan 07 01:00:50 PM PST 24 |
Jan 07 01:04:19 PM PST 24 |
8148537546 ps |
| T156 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.4027956058 |
|
|
Jan 07 12:58:53 PM PST 24 |
Jan 07 01:06:46 PM PST 24 |
51105690708 ps |
| T157 |
/workspace/coverage/default/40.sram_ctrl_alert_test.1787705868 |
|
|
Jan 07 01:00:57 PM PST 24 |
Jan 07 01:01:46 PM PST 24 |
42969747 ps |
| T113 |
/workspace/coverage/default/24.sram_ctrl_stress_all.638977257 |
|
|
Jan 07 01:00:00 PM PST 24 |
Jan 07 02:21:50 PM PST 24 |
137937612000 ps |
| T158 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.3537098162 |
|
|
Jan 07 01:01:11 PM PST 24 |
Jan 07 01:04:20 PM PST 24 |
10435968926 ps |
| T41 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.554886660 |
|
|
Jan 07 12:59:45 PM PST 24 |
Jan 07 02:23:55 PM PST 24 |
12273872019 ps |
| T159 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.3786491724 |
|
|
Jan 07 01:00:35 PM PST 24 |
Jan 07 01:04:12 PM PST 24 |
4411861911 ps |
| T160 |
/workspace/coverage/default/31.sram_ctrl_ram_cfg.1398671768 |
|
|
Jan 07 01:00:48 PM PST 24 |
Jan 07 01:02:01 PM PST 24 |
369964061 ps |
| T161 |
/workspace/coverage/default/19.sram_ctrl_partial_access.3601146625 |
|
|
Jan 07 12:59:42 PM PST 24 |
Jan 07 01:02:25 PM PST 24 |
1732426171 ps |
| T114 |
/workspace/coverage/default/13.sram_ctrl_regwen.2936533718 |
|
|
Jan 07 12:59:53 PM PST 24 |
Jan 07 01:22:44 PM PST 24 |
82948530939 ps |
| T21 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.822653883 |
|
|
Jan 07 01:00:56 PM PST 24 |
Jan 07 01:04:02 PM PST 24 |
12533446188 ps |
| T162 |
/workspace/coverage/default/47.sram_ctrl_partial_access.695268442 |
|
|
Jan 07 01:01:12 PM PST 24 |
Jan 07 01:02:14 PM PST 24 |
832934825 ps |
| T163 |
/workspace/coverage/default/21.sram_ctrl_smoke.4033019928 |
|
|
Jan 07 12:59:50 PM PST 24 |
Jan 07 01:02:24 PM PST 24 |
1682898572 ps |
| T164 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.651881937 |
|
|
Jan 07 12:59:01 PM PST 24 |
Jan 07 01:03:17 PM PST 24 |
2750896176 ps |
| T165 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2882309041 |
|
|
Jan 07 12:59:44 PM PST 24 |
Jan 07 01:04:18 PM PST 24 |
806567771 ps |
| T117 |
/workspace/coverage/default/16.sram_ctrl_regwen.2125256927 |
|
|
Jan 07 01:00:16 PM PST 24 |
Jan 07 01:06:11 PM PST 24 |
4498644453 ps |
| T166 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.355262139 |
|
|
Jan 07 12:58:28 PM PST 24 |
Jan 07 01:15:42 PM PST 24 |
11884948600 ps |
| T167 |
/workspace/coverage/default/44.sram_ctrl_smoke.639423571 |
|
|
Jan 07 01:01:10 PM PST 24 |
Jan 07 01:03:04 PM PST 24 |
12063680677 ps |
| T168 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.2935977771 |
|
|
Jan 07 01:00:54 PM PST 24 |
Jan 07 01:04:34 PM PST 24 |
3075252341 ps |
| T169 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.3039153711 |
|
|
Jan 07 12:59:00 PM PST 24 |
Jan 07 01:02:27 PM PST 24 |
2679401760 ps |
| T170 |
/workspace/coverage/default/18.sram_ctrl_smoke.1466809103 |
|
|
Jan 07 12:59:45 PM PST 24 |
Jan 07 01:02:13 PM PST 24 |
392077597 ps |
| T171 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.224928551 |
|
|
Jan 07 01:00:43 PM PST 24 |
Jan 07 01:03:23 PM PST 24 |
757048392 ps |
| T172 |
/workspace/coverage/default/18.sram_ctrl_partial_access.886245989 |
|
|
Jan 07 12:59:54 PM PST 24 |
Jan 07 01:02:24 PM PST 24 |
1235418562 ps |
| T173 |
/workspace/coverage/default/5.sram_ctrl_smoke.676543254 |
|
|
Jan 07 12:58:54 PM PST 24 |
Jan 07 01:01:53 PM PST 24 |
1266967137 ps |
| T174 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.665542459 |
|
|
Jan 07 01:01:12 PM PST 24 |
Jan 07 01:10:40 PM PST 24 |
114476876413 ps |
| T175 |
/workspace/coverage/default/25.sram_ctrl_bijection.3949188087 |
|
|
Jan 07 01:00:26 PM PST 24 |
Jan 07 01:26:31 PM PST 24 |
64727433402 ps |
| T176 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2318061272 |
|
|
Jan 07 01:01:13 PM PST 24 |
Jan 07 01:07:58 PM PST 24 |
15245447102 ps |
| T177 |
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.4234086920 |
|
|
Jan 07 01:00:53 PM PST 24 |
Jan 07 01:02:29 PM PST 24 |
723088518 ps |
| T178 |
/workspace/coverage/default/43.sram_ctrl_smoke.179142617 |
|
|
Jan 07 01:00:55 PM PST 24 |
Jan 07 01:02:13 PM PST 24 |
621455535 ps |
| T179 |
/workspace/coverage/default/1.sram_ctrl_smoke.3168344376 |
|
|
Jan 07 12:59:04 PM PST 24 |
Jan 07 01:01:52 PM PST 24 |
381445532 ps |
| T180 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.3674723265 |
|
|
Jan 07 01:00:37 PM PST 24 |
Jan 07 01:28:47 PM PST 24 |
11583869105 ps |
| T181 |
/workspace/coverage/default/42.sram_ctrl_alert_test.1587050587 |
|
|
Jan 07 01:00:48 PM PST 24 |
Jan 07 01:01:57 PM PST 24 |
43408200 ps |
| T182 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.3868285527 |
|
|
Jan 07 01:00:46 PM PST 24 |
Jan 07 01:02:15 PM PST 24 |
358087422 ps |
| T183 |
/workspace/coverage/default/38.sram_ctrl_partial_access.3922194976 |
|
|
Jan 07 01:00:19 PM PST 24 |
Jan 07 01:02:10 PM PST 24 |
1387018103 ps |
| T119 |
/workspace/coverage/default/32.sram_ctrl_stress_all.663846370 |
|
|
Jan 07 01:00:32 PM PST 24 |
Jan 07 02:12:07 PM PST 24 |
3528143328864 ps |
| T184 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.682550946 |
|
|
Jan 07 12:59:58 PM PST 24 |
Jan 07 01:03:11 PM PST 24 |
3182499502 ps |
| T185 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.2527983385 |
|
|
Jan 07 12:59:38 PM PST 24 |
Jan 07 01:03:11 PM PST 24 |
2734086657 ps |
| T186 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2762604372 |
|
|
Jan 07 12:59:06 PM PST 24 |
Jan 07 01:04:05 PM PST 24 |
20733778158 ps |
| T104 |
/workspace/coverage/default/44.sram_ctrl_stress_all.3275470539 |
|
|
Jan 07 01:01:10 PM PST 24 |
Jan 07 02:20:00 PM PST 24 |
68481588414 ps |
| T187 |
/workspace/coverage/default/45.sram_ctrl_smoke.3186999497 |
|
|
Jan 07 01:01:03 PM PST 24 |
Jan 07 01:02:07 PM PST 24 |
8963937915 ps |
| T188 |
/workspace/coverage/default/40.sram_ctrl_regwen.2294368104 |
|
|
Jan 07 01:01:02 PM PST 24 |
Jan 07 01:05:06 PM PST 24 |
4710501919 ps |
| T189 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.313318978 |
|
|
Jan 07 01:00:18 PM PST 24 |
Jan 07 01:03:19 PM PST 24 |
801284556 ps |
| T190 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.1986726402 |
|
|
Jan 07 01:00:46 PM PST 24 |
Jan 07 01:03:08 PM PST 24 |
3961684425 ps |
| T191 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2899291077 |
|
|
Jan 07 01:01:17 PM PST 24 |
Jan 07 01:24:27 PM PST 24 |
83610891982 ps |
| T115 |
/workspace/coverage/default/24.sram_ctrl_executable.172456066 |
|
|
Jan 07 01:00:07 PM PST 24 |
Jan 07 01:25:07 PM PST 24 |
88695403115 ps |
| T192 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2821334960 |
|
|
Jan 07 01:01:08 PM PST 24 |
Jan 07 01:03:12 PM PST 24 |
4714986856 ps |
| T22 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.2158783611 |
|
|
Jan 07 01:00:00 PM PST 24 |
Jan 07 01:05:00 PM PST 24 |
7141378194 ps |
| T193 |
/workspace/coverage/default/27.sram_ctrl_partial_access.436603898 |
|
|
Jan 07 01:00:34 PM PST 24 |
Jan 07 01:02:28 PM PST 24 |
5634761648 ps |
| T194 |
/workspace/coverage/default/23.sram_ctrl_regwen.1574944289 |
|
|
Jan 07 01:00:36 PM PST 24 |
Jan 07 01:16:48 PM PST 24 |
55446305444 ps |
| T195 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.641267892 |
|
|
Jan 07 12:59:52 PM PST 24 |
Jan 07 01:04:24 PM PST 24 |
22314723605 ps |
| T196 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.2359492812 |
|
|
Jan 07 01:01:05 PM PST 24 |
Jan 07 01:02:47 PM PST 24 |
1488806314 ps |
| T197 |
/workspace/coverage/default/29.sram_ctrl_bijection.2524489537 |
|
|
Jan 07 01:00:12 PM PST 24 |
Jan 07 01:17:19 PM PST 24 |
41685760063 ps |
| T198 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.2123456204 |
|
|
Jan 07 01:00:11 PM PST 24 |
Jan 07 01:07:56 PM PST 24 |
4706414024 ps |
| T199 |
/workspace/coverage/default/3.sram_ctrl_alert_test.4294321828 |
|
|
Jan 07 12:58:27 PM PST 24 |
Jan 07 12:59:52 PM PST 24 |
59488228 ps |
| T200 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3646136576 |
|
|
Jan 07 01:01:18 PM PST 24 |
Jan 07 01:07:58 PM PST 24 |
11091429804 ps |
| T201 |
/workspace/coverage/default/38.sram_ctrl_regwen.2216110681 |
|
|
Jan 07 01:00:42 PM PST 24 |
Jan 07 01:14:18 PM PST 24 |
17931297737 ps |
| T202 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3584583850 |
|
|
Jan 07 12:58:51 PM PST 24 |
Jan 07 01:04:06 PM PST 24 |
5901312401 ps |
| T203 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.639806139 |
|
|
Jan 07 01:00:51 PM PST 24 |
Jan 07 01:14:58 PM PST 24 |
8038092857 ps |
| T42 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3608042081 |
|
|
Jan 07 12:59:59 PM PST 24 |
Jan 07 02:36:51 PM PST 24 |
2740546707 ps |
| T204 |
/workspace/coverage/default/49.sram_ctrl_partial_access.644000023 |
|
|
Jan 07 01:01:16 PM PST 24 |
Jan 07 01:02:22 PM PST 24 |
644869754 ps |
| T205 |
/workspace/coverage/default/47.sram_ctrl_alert_test.3043691188 |
|
|
Jan 07 01:01:16 PM PST 24 |
Jan 07 01:01:50 PM PST 24 |
19735547 ps |
| T206 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.1251524687 |
|
|
Jan 07 01:00:50 PM PST 24 |
Jan 07 01:09:34 PM PST 24 |
76455567151 ps |
| T207 |
/workspace/coverage/default/30.sram_ctrl_stress_all.913924959 |
|
|
Jan 07 01:00:50 PM PST 24 |
Jan 07 01:34:20 PM PST 24 |
107357718899 ps |
| T208 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.1231458566 |
|
|
Jan 07 12:59:34 PM PST 24 |
Jan 07 01:03:03 PM PST 24 |
988947722 ps |
| T209 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.1951207447 |
|
|
Jan 07 01:00:00 PM PST 24 |
Jan 07 01:03:17 PM PST 24 |
774021511 ps |
| T210 |
/workspace/coverage/default/18.sram_ctrl_alert_test.580751684 |
|
|
Jan 07 12:59:46 PM PST 24 |
Jan 07 01:01:37 PM PST 24 |
62458809 ps |
| T211 |
/workspace/coverage/default/33.sram_ctrl_partial_access.3533801255 |
|
|
Jan 07 12:59:57 PM PST 24 |
Jan 07 01:02:21 PM PST 24 |
1074149179 ps |
| T212 |
/workspace/coverage/default/21.sram_ctrl_regwen.2921578451 |
|
|
Jan 07 12:59:42 PM PST 24 |
Jan 07 01:12:48 PM PST 24 |
9056085715 ps |
| T213 |
/workspace/coverage/default/44.sram_ctrl_partial_access.2007581419 |
|
|
Jan 07 01:00:35 PM PST 24 |
Jan 07 01:02:13 PM PST 24 |
12365986384 ps |
| T214 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.1588663188 |
|
|
Jan 07 01:00:27 PM PST 24 |
Jan 07 01:04:02 PM PST 24 |
2104051749 ps |
| T215 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2807733047 |
|
|
Jan 07 01:00:03 PM PST 24 |
Jan 07 02:12:42 PM PST 24 |
5080488581 ps |
| T216 |
/workspace/coverage/default/41.sram_ctrl_smoke.2693820815 |
|
|
Jan 07 01:00:27 PM PST 24 |
Jan 07 01:03:09 PM PST 24 |
438541864 ps |
| T217 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1357949478 |
|
|
Jan 07 01:01:00 PM PST 24 |
Jan 07 01:01:55 PM PST 24 |
358473371 ps |
| T218 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.2000981814 |
|
|
Jan 07 01:00:01 PM PST 24 |
Jan 07 01:06:47 PM PST 24 |
7754030752 ps |
| T219 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.866257578 |
|
|
Jan 07 01:00:55 PM PST 24 |
Jan 07 01:02:10 PM PST 24 |
675238505 ps |
| T220 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.1506410705 |
|
|
Jan 07 01:00:55 PM PST 24 |
Jan 07 01:02:00 PM PST 24 |
999091302 ps |
| T221 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.117793292 |
|
|
Jan 07 01:00:15 PM PST 24 |
Jan 07 01:26:36 PM PST 24 |
51717006598 ps |
| T222 |
/workspace/coverage/default/45.sram_ctrl_bijection.2621085392 |
|
|
Jan 07 01:01:07 PM PST 24 |
Jan 07 01:35:20 PM PST 24 |
60803072835 ps |
| T223 |
/workspace/coverage/default/35.sram_ctrl_bijection.2044253177 |
|
|
Jan 07 01:00:11 PM PST 24 |
Jan 07 01:35:59 PM PST 24 |
224234093216 ps |
| T224 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.680525761 |
|
|
Jan 07 01:00:56 PM PST 24 |
Jan 07 01:04:02 PM PST 24 |
799757285 ps |
| T225 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3052629327 |
|
|
Jan 07 01:01:14 PM PST 24 |
Jan 07 01:02:44 PM PST 24 |
3052754033 ps |
| T101 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1804403779 |
|
|
Jan 07 01:00:47 PM PST 24 |
Jan 07 01:05:30 PM PST 24 |
349919215 ps |
| T226 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.2356793286 |
|
|
Jan 07 01:00:44 PM PST 24 |
Jan 07 01:01:53 PM PST 24 |
1355854809 ps |
| T227 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.833273623 |
|
|
Jan 07 01:01:01 PM PST 24 |
Jan 07 01:02:51 PM PST 24 |
21048471467 ps |
| T228 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.2504125248 |
|
|
Jan 07 01:00:44 PM PST 24 |
Jan 07 01:23:50 PM PST 24 |
15688129514 ps |
| T229 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.1637143344 |
|
|
Jan 07 12:59:01 PM PST 24 |
Jan 07 01:19:47 PM PST 24 |
21724792969 ps |
| T230 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.1029771583 |
|
|
Jan 07 01:01:06 PM PST 24 |
Jan 07 01:14:33 PM PST 24 |
13642278075 ps |
| T231 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.1879325628 |
|
|
Jan 07 01:00:12 PM PST 24 |
Jan 07 01:04:28 PM PST 24 |
35573207748 ps |
| T232 |
/workspace/coverage/default/28.sram_ctrl_partial_access.1122993453 |
|
|
Jan 07 12:59:55 PM PST 24 |
Jan 07 01:03:47 PM PST 24 |
1260275968 ps |
| T233 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.2364093999 |
|
|
Jan 07 01:01:02 PM PST 24 |
Jan 07 01:02:30 PM PST 24 |
7837714126 ps |
| T234 |
/workspace/coverage/default/19.sram_ctrl_smoke.1305915921 |
|
|
Jan 07 01:00:03 PM PST 24 |
Jan 07 01:04:00 PM PST 24 |
5228221043 ps |
| T235 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.31418403 |
|
|
Jan 07 01:00:17 PM PST 24 |
Jan 07 01:21:39 PM PST 24 |
15332704074 ps |
| T236 |
/workspace/coverage/default/27.sram_ctrl_regwen.1338700148 |
|
|
Jan 07 01:00:18 PM PST 24 |
Jan 07 01:26:00 PM PST 24 |
4579660646 ps |
| T237 |
/workspace/coverage/default/31.sram_ctrl_executable.3543424200 |
|
|
Jan 07 01:00:28 PM PST 24 |
Jan 07 01:23:27 PM PST 24 |
18973145412 ps |
| T238 |
/workspace/coverage/default/15.sram_ctrl_smoke.844700219 |
|
|
Jan 07 12:59:55 PM PST 24 |
Jan 07 01:02:15 PM PST 24 |
1035668445 ps |
| T239 |
/workspace/coverage/default/43.sram_ctrl_ram_cfg.3928084175 |
|
|
Jan 07 01:01:06 PM PST 24 |
Jan 07 01:02:13 PM PST 24 |
693687929 ps |
| T102 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.1388773759 |
|
|
Jan 07 12:59:55 PM PST 24 |
Jan 07 02:11:59 PM PST 24 |
1520503664 ps |
| T240 |
/workspace/coverage/default/45.sram_ctrl_alert_test.813724720 |
|
|
Jan 07 01:01:12 PM PST 24 |
Jan 07 01:01:49 PM PST 24 |
14292783 ps |
| T241 |
/workspace/coverage/default/40.sram_ctrl_stress_all.3166199952 |
|
|
Jan 07 01:00:38 PM PST 24 |
Jan 07 02:27:40 PM PST 24 |
308598631218 ps |
| T242 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.4046280218 |
|
|
Jan 07 01:01:15 PM PST 24 |
Jan 07 01:02:29 PM PST 24 |
2869389839 ps |
| T243 |
/workspace/coverage/default/48.sram_ctrl_executable.1237294207 |
|
|
Jan 07 01:01:21 PM PST 24 |
Jan 07 01:13:20 PM PST 24 |
7927854538 ps |
| T244 |
/workspace/coverage/default/41.sram_ctrl_bijection.2377193589 |
|
|
Jan 07 01:00:15 PM PST 24 |
Jan 07 01:21:49 PM PST 24 |
277019119834 ps |
| T245 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.953581446 |
|
|
Jan 07 01:00:50 PM PST 24 |
Jan 07 01:04:21 PM PST 24 |
14367029827 ps |
| T246 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1417344672 |
|
|
Jan 07 01:00:11 PM PST 24 |
Jan 07 01:04:18 PM PST 24 |
3909564056 ps |
| T247 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.3503936093 |
|
|
Jan 07 01:00:14 PM PST 24 |
Jan 07 01:03:45 PM PST 24 |
9711960355 ps |
| T248 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.567748475 |
|
|
Jan 07 01:00:50 PM PST 24 |
Jan 07 01:19:05 PM PST 24 |
5574879852 ps |
| T249 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1150898298 |
|
|
Jan 07 01:00:59 PM PST 24 |
Jan 07 01:02:34 PM PST 24 |
8033566538 ps |
| T250 |
/workspace/coverage/default/15.sram_ctrl_partial_access.1898670640 |
|
|
Jan 07 01:00:18 PM PST 24 |
Jan 07 01:02:08 PM PST 24 |
3043217889 ps |
| T251 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.2772723061 |
|
|
Jan 07 01:00:17 PM PST 24 |
Jan 07 01:08:52 PM PST 24 |
74667619317 ps |
| T252 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.1743718314 |
|
|
Jan 07 01:00:14 PM PST 24 |
Jan 07 01:08:11 PM PST 24 |
18037631820 ps |
| T253 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.507227713 |
|
|
Jan 07 01:00:02 PM PST 24 |
Jan 07 01:54:04 PM PST 24 |
760202651 ps |
| T254 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2827724839 |
|
|
Jan 07 12:58:55 PM PST 24 |
Jan 07 01:34:36 PM PST 24 |
30404608927 ps |
| T255 |
/workspace/coverage/default/27.sram_ctrl_stress_all.3214482301 |
|
|
Jan 07 01:00:03 PM PST 24 |
Jan 07 02:01:32 PM PST 24 |
368047958831 ps |
| T256 |
/workspace/coverage/default/9.sram_ctrl_partial_access.3029319067 |
|
|
Jan 07 01:00:00 PM PST 24 |
Jan 07 01:04:08 PM PST 24 |
536750095 ps |
| T257 |
/workspace/coverage/default/26.sram_ctrl_smoke.276423470 |
|
|
Jan 07 12:59:57 PM PST 24 |
Jan 07 01:02:44 PM PST 24 |
7492952030 ps |
| T258 |
/workspace/coverage/default/29.sram_ctrl_alert_test.3343817147 |
|
|
Jan 07 01:00:57 PM PST 24 |
Jan 07 01:01:46 PM PST 24 |
24581407 ps |
| T259 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.3878883063 |
|
|
Jan 07 01:00:43 PM PST 24 |
Jan 07 01:03:12 PM PST 24 |
11826622571 ps |
| T260 |
/workspace/coverage/default/14.sram_ctrl_regwen.1409293065 |
|
|
Jan 07 12:59:42 PM PST 24 |
Jan 07 01:16:28 PM PST 24 |
21765509575 ps |
| T261 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.936461024 |
|
|
Jan 07 01:01:16 PM PST 24 |
Jan 07 01:04:15 PM PST 24 |
3122652656 ps |
| T262 |
/workspace/coverage/default/31.sram_ctrl_regwen.1714827108 |
|
|
Jan 07 01:00:38 PM PST 24 |
Jan 07 01:05:46 PM PST 24 |
1213922856 ps |
| T263 |
/workspace/coverage/default/36.sram_ctrl_alert_test.3228630918 |
|
|
Jan 07 01:00:46 PM PST 24 |
Jan 07 01:01:56 PM PST 24 |
13849809 ps |
| T264 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.3302221076 |
|
|
Jan 07 01:00:20 PM PST 24 |
Jan 07 01:02:59 PM PST 24 |
1548455409 ps |
| T265 |
/workspace/coverage/default/23.sram_ctrl_executable.2232400108 |
|
|
Jan 07 01:00:00 PM PST 24 |
Jan 07 01:04:22 PM PST 24 |
7672879463 ps |
| T266 |
/workspace/coverage/default/26.sram_ctrl_alert_test.2132903098 |
|
|
Jan 07 01:00:31 PM PST 24 |
Jan 07 01:01:49 PM PST 24 |
34209996 ps |
| T267 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.1310975481 |
|
|
Jan 07 01:00:20 PM PST 24 |
Jan 07 01:06:34 PM PST 24 |
4416206653 ps |
| T268 |
/workspace/coverage/default/42.sram_ctrl_smoke.969530794 |
|
|
Jan 07 01:00:44 PM PST 24 |
Jan 07 01:02:02 PM PST 24 |
356805476 ps |
| T269 |
/workspace/coverage/default/28.sram_ctrl_smoke.1880995040 |
|
|
Jan 07 01:00:19 PM PST 24 |
Jan 07 01:02:43 PM PST 24 |
731757660 ps |
| T270 |
/workspace/coverage/default/0.sram_ctrl_smoke.499766669 |
|
|
Jan 07 12:58:54 PM PST 24 |
Jan 07 01:02:41 PM PST 24 |
1142351192 ps |
| T271 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.3492119858 |
|
|
Jan 07 01:00:57 PM PST 24 |
Jan 07 01:23:37 PM PST 24 |
169969287031 ps |
| T272 |
/workspace/coverage/default/46.sram_ctrl_stress_all.1410725494 |
|
|
Jan 07 01:01:16 PM PST 24 |
Jan 07 01:49:13 PM PST 24 |
72224685793 ps |
| T273 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.2703907897 |
|
|
Jan 07 01:00:31 PM PST 24 |
Jan 07 01:07:10 PM PST 24 |
17893708773 ps |
| T274 |
/workspace/coverage/default/39.sram_ctrl_regwen.1583836641 |
|
|
Jan 07 01:00:49 PM PST 24 |
Jan 07 01:10:19 PM PST 24 |
10059149417 ps |
| T275 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.413035455 |
|
|
Jan 07 12:59:54 PM PST 24 |
Jan 07 01:07:03 PM PST 24 |
54971547903 ps |
| T276 |
/workspace/coverage/default/31.sram_ctrl_smoke.653276390 |
|
|
Jan 07 01:00:46 PM PST 24 |
Jan 07 01:03:26 PM PST 24 |
1147007866 ps |
| T277 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.136720169 |
|
|
Jan 07 12:58:57 PM PST 24 |
Jan 07 02:02:27 PM PST 24 |
608240731 ps |
| T278 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.927427197 |
|
|
Jan 07 01:00:23 PM PST 24 |
Jan 07 01:02:21 PM PST 24 |
3408148788 ps |
| T279 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1269360350 |
|
|
Jan 07 12:58:27 PM PST 24 |
Jan 07 01:18:44 PM PST 24 |
53777549052 ps |
| T280 |
/workspace/coverage/default/21.sram_ctrl_bijection.2436419907 |
|
|
Jan 07 12:59:38 PM PST 24 |
Jan 07 01:11:11 PM PST 24 |
10656207057 ps |
| T281 |
/workspace/coverage/default/42.sram_ctrl_stress_all.513910401 |
|
|
Jan 07 01:00:43 PM PST 24 |
Jan 07 03:36:23 PM PST 24 |
542757851537 ps |
| T282 |
/workspace/coverage/default/26.sram_ctrl_regwen.3599720697 |
|
|
Jan 07 01:00:39 PM PST 24 |
Jan 07 01:09:20 PM PST 24 |
15444962148 ps |
| T283 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.3211493038 |
|
|
Jan 07 01:00:41 PM PST 24 |
Jan 07 01:01:59 PM PST 24 |
1086611116 ps |
| T284 |
/workspace/coverage/default/8.sram_ctrl_smoke.2739083189 |
|
|
Jan 07 12:59:00 PM PST 24 |
Jan 07 01:01:44 PM PST 24 |
1669481919 ps |
| T285 |
/workspace/coverage/default/21.sram_ctrl_mem_walk.4056554262 |
|
|
Jan 07 01:00:16 PM PST 24 |
Jan 07 01:04:16 PM PST 24 |
7041312047 ps |
| T286 |
/workspace/coverage/default/29.sram_ctrl_regwen.3892401071 |
|
|
Jan 07 01:00:21 PM PST 24 |
Jan 07 01:14:17 PM PST 24 |
53690686459 ps |
| T91 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1534750623 |
|
|
Jan 07 01:42:46 PM PST 24 |
Jan 07 01:43:07 PM PST 24 |
26353901 ps |
| T44 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2584799996 |
|
|
Jan 07 01:41:21 PM PST 24 |
Jan 07 01:43:48 PM PST 24 |
8250951575 ps |
| T103 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3915703270 |
|
|
Jan 07 01:42:37 PM PST 24 |
Jan 07 01:42:59 PM PST 24 |
374111656 ps |
| T34 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2111309915 |
|
|
Jan 07 01:42:20 PM PST 24 |
Jan 07 01:42:38 PM PST 24 |
460259128 ps |
| T45 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2134159093 |
|
|
Jan 07 01:42:17 PM PST 24 |
Jan 07 01:42:34 PM PST 24 |
34254899 ps |
| T287 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2426090730 |
|
|
Jan 07 01:41:39 PM PST 24 |
Jan 07 01:41:56 PM PST 24 |
888568426 ps |
| T92 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3649932598 |
|
|
Jan 07 01:42:04 PM PST 24 |
Jan 07 01:42:15 PM PST 24 |
24725310 ps |
| T93 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2539143698 |
|
|
Jan 07 01:42:30 PM PST 24 |
Jan 07 01:42:51 PM PST 24 |
432359937 ps |
| T94 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.214320300 |
|
|
Jan 07 01:42:14 PM PST 24 |
Jan 07 01:42:29 PM PST 24 |
4868541466 ps |
| T46 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1405335617 |
|
|
Jan 07 01:43:13 PM PST 24 |
Jan 07 01:43:27 PM PST 24 |
16170129 ps |
| T47 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3230671551 |
|
|
Jan 07 01:42:32 PM PST 24 |
Jan 07 01:42:48 PM PST 24 |
56555037 ps |
| T48 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1752175506 |
|
|
Jan 07 01:43:07 PM PST 24 |
Jan 07 01:43:19 PM PST 24 |
16922641 ps |
| T49 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3468268830 |
|
|
Jan 07 01:41:35 PM PST 24 |
Jan 07 01:41:48 PM PST 24 |
363134370 ps |
| T50 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3683135645 |
|
|
Jan 07 01:41:30 PM PST 24 |
Jan 07 01:41:36 PM PST 24 |
55564731 ps |
| T51 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.4191056571 |
|
|
Jan 07 01:41:39 PM PST 24 |
Jan 07 01:44:05 PM PST 24 |
50292272915 ps |