Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	14591187	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

125124906

1

T1

2894

T2

72481

T4

2207

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	68490982	1			T1	1582		T2	39686		T4	1199
values[0x0]	34164733	1			T1	758		T2	19394		T4	535
values[0x1]	37060378	1			T1	799		T2	20649		T4	712

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7438142	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

132277951

1

T1

3024

T2

76135

T4

2337

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	450135	1			T1	21		T2	275		T9	485
valid_sources[0x01]	456515	1			T1	18		T2	293		T9	506
valid_sources[0x02]	474561	1			T1	10		T2	324		T9	511
valid_sources[0x03]	488093	1			T1	5		T2	329		T9	431
valid_sources[0x04]	469279	1			T1	7		T2	345		T9	465
valid_sources[0x05]	509099	1			T1	4		T2	337		T9	473
valid_sources[0x06]	465822	1			T1	14		T2	312		T9	464
valid_sources[0x07]	457891	1			T1	22		T2	330		T4	18
valid_sources[0x08]	504666	1			T1	16		T2	281		T9	482
valid_sources[0x09]	470457	1			T1	6		T2	282		T9	482
valid_sources[0x0a]	466131	1			T1	21		T2	329		T5	1263
valid_sources[0x0b]	462106	1			T1	10		T2	302		T9	507
valid_sources[0x0c]	495319	1			T1	12		T2	332		T4	1
valid_sources[0x0d]	560931	1			T1	7		T2	305		T9	478
valid_sources[0x0e]	453047	1			T1	16		T2	307		T4	24
valid_sources[0x0f]	447378	1			T1	7		T2	289		T9	479
valid_sources[0x10]	474508	1			T1	8		T2	343		T4	2
valid_sources[0x11]	504639	1			T1	6		T2	326		T5	19399
valid_sources[0x12]	537681	1			T1	14		T2	289		T9	459
valid_sources[0x13]	479802	1			T1	13		T2	276		T4	2
valid_sources[0x14]	467966	1			T1	12		T2	299		T9	473
valid_sources[0x15]	512801	1			T1	8		T2	340		T9	511
valid_sources[0x16]	486357	1			T1	3		T2	349		T4	5
valid_sources[0x17]	448117	1			T1	9		T2	340		T9	447
valid_sources[0x18]	449838	1			T1	3		T2	288		T9	469
valid_sources[0x19]	535621	1			T1	5		T2	342		T4	20
valid_sources[0x1a]	463840	1			T1	11		T2	312		T4	54
valid_sources[0x1b]	522926	1			T1	13		T2	330		T9	487
valid_sources[0x1c]	518689	1			T1	22		T2	319		T9	444
valid_sources[0x1d]	454041	1			T1	8		T2	293		T9	465
valid_sources[0x1e]	480866	1			T1	8		T2	322		T9	468
valid_sources[0x1f]	518027	1			T1	4		T2	285		T9	447
valid_sources[0x20]	448118	1			T1	6		T2	327		T9	490
valid_sources[0x21]	653669	1			T1	24		T2	340		T9	505
valid_sources[0x22]	464237	1			T1	10		T2	328		T9	458
valid_sources[0x23]	471807	1			T1	17		T2	287		T4	19
valid_sources[0x24]	463970	1			T1	19		T2	314		T9	442
valid_sources[0x25]	484566	1			T1	18		T2	307		T9	461
valid_sources[0x26]	469154	1			T1	15		T2	301		T9	525
valid_sources[0x27]	480122	1			T1	18		T2	320		T9	424
valid_sources[0x28]	1963378	1			T1	12		T2	303		T9	498
valid_sources[0x29]	465383	1			T1	21		T2	297		T4	19
valid_sources[0x2a]	461543	1			T1	9		T2	335		T9	463
valid_sources[0x2b]	453730	1			T1	12		T2	280		T9	505
valid_sources[0x2c]	648796	1			T1	12		T2	278		T9	466
valid_sources[0x2d]	846450	1			T1	9		T2	328		T9	512
valid_sources[0x2e]	448426	1			T1	17		T2	304		T9	495
valid_sources[0x2f]	544816	1			T1	10		T2	308		T9	457
valid_sources[0x30]	994226	1			T1	9		T2	311		T9	474
valid_sources[0x31]	475721	1			T1	17		T2	299		T9	480
valid_sources[0x32]	456248	1			T1	12		T2	293		T9	452
valid_sources[0x33]	459164	1			T1	5		T2	352		T9	484
valid_sources[0x34]	467351	1			T1	15		T2	332		T9	437
valid_sources[0x35]	457383	1			T1	20		T2	309		T4	2
valid_sources[0x36]	931772	1			T1	11		T2	329		T9	420
valid_sources[0x37]	466485	1			T1	11		T2	291		T9	458
valid_sources[0x38]	463159	1			T1	16		T2	320		T9	471
valid_sources[0x39]	498058	1			T1	17		T2	307		T9	478
valid_sources[0x3a]	2193251	1			T1	9		T2	306		T9	445
valid_sources[0x3b]	487921	1			T1	10		T2	295		T9	437
valid_sources[0x3c]	462211	1			T1	9		T2	314		T9	476
valid_sources[0x3d]	457143	1			T1	5		T2	343		T4	49
valid_sources[0x3e]	461151	1			T1	14		T2	323		T9	456
valid_sources[0x3f]	492504	1			T1	18		T2	328		T9	466
valid_sources[0x40]	505022	1			T1	12		T2	286		T4	113
valid_sources[0x41]	477863	1			T1	11		T2	308		T9	439
valid_sources[0x42]	486304	1			T1	25		T2	296		T9	490
valid_sources[0x43]	482439	1			T1	9		T2	316		T9	462
valid_sources[0x44]	461678	1			T1	14		T2	290		T4	34
valid_sources[0x45]	463440	1			T1	8		T2	313		T9	488
valid_sources[0x46]	479003	1			T1	16		T2	293		T9	494
valid_sources[0x47]	463340	1			T1	5		T2	319		T9	495
valid_sources[0x48]	522151	1			T1	13		T2	332		T9	463
valid_sources[0x49]	500753	1			T1	6		T2	279		T4	89
valid_sources[0x4a]	485151	1			T1	16		T2	307		T4	108
valid_sources[0x4b]	459737	1			T1	7		T2	329		T4	2
valid_sources[0x4c]	470086	1			T1	10		T2	369		T9	487
valid_sources[0x4d]	1628937	1			T1	17		T2	316		T9	427
valid_sources[0x4e]	473332	1			T1	21		T2	276		T9	484
valid_sources[0x4f]	485865	1			T1	11		T2	320		T4	102
valid_sources[0x50]	467160	1			T1	18		T2	297		T4	1
valid_sources[0x51]	448316	1			T1	17		T2	277		T9	449
valid_sources[0x52]	542592	1			T1	8		T2	265		T9	485
valid_sources[0x53]	473595	1			T1	7		T2	293		T9	453
valid_sources[0x54]	461198	1			T1	11		T2	320		T9	461
valid_sources[0x55]	458931	1			T1	7		T2	320		T9	494
valid_sources[0x56]	485492	1			T1	12		T2	318		T9	467
valid_sources[0x57]	453131	1			T1	10		T2	299		T9	467
valid_sources[0x58]	982434	1			T1	12		T2	333		T9	468
valid_sources[0x59]	521009	1			T1	11		T2	319		T5	27040
valid_sources[0x5a]	846892	1			T1	14		T2	309		T9	506
valid_sources[0x5b]	466505	1			T1	11		T2	324		T9	479
valid_sources[0x5c]	462796	1			T1	31		T2	305		T9	456
valid_sources[0x5d]	447147	1			T1	15		T2	290		T9	463
valid_sources[0x5e]	485627	1			T1	3		T2	333		T9	458
valid_sources[0x5f]	449655	1			T1	11		T2	313		T9	484
valid_sources[0x60]	460419	1			T1	20		T2	323		T9	481
valid_sources[0x61]	493095	1			T1	12		T2	342		T9	448
valid_sources[0x62]	462917	1			T1	6		T2	328		T9	491
valid_sources[0x63]	2023836	1			T1	13		T2	349		T9	451
valid_sources[0x64]	466829	1			T1	20		T2	306		T9	483
valid_sources[0x65]	1380028	1			T1	13		T2	341		T9	457
valid_sources[0x66]	1350602	1			T1	2		T2	306		T9	461
valid_sources[0x67]	444389	1			T1	10		T2	289		T9	441
valid_sources[0x68]	490927	1			T1	20		T2	315		T9	512
valid_sources[0x69]	496052	1			T1	18		T2	315		T9	449
valid_sources[0x6a]	533140	1			T1	7		T2	305		T9	475
valid_sources[0x6b]	659216	1			T1	7		T2	299		T4	99
valid_sources[0x6c]	475544	1			T1	15		T2	279		T9	479
valid_sources[0x6d]	456265	1			T1	19		T2	307		T4	31
valid_sources[0x6e]	460295	1			T1	7		T2	311		T4	43
valid_sources[0x6f]	451453	1			T1	3		T2	298		T9	461
valid_sources[0x70]	463647	1			T1	11		T2	310		T9	466
valid_sources[0x71]	468121	1			T1	10		T2	294		T9	453
valid_sources[0x72]	465465	1			T1	21		T2	305		T9	469
valid_sources[0x73]	503325	1			T1	4		T2	299		T9	445
valid_sources[0x74]	459879	1			T1	9		T2	320		T9	470
valid_sources[0x75]	484934	1			T1	12		T2	338		T9	468
valid_sources[0x76]	462777	1			T1	16		T2	346		T9	533
valid_sources[0x77]	486740	1			T1	13		T2	300		T9	496
valid_sources[0x78]	476164	1			T1	14		T2	267		T4	54
valid_sources[0x79]	460644	1			T1	13		T2	321		T9	484
valid_sources[0x7a]	457524	1			T1	2		T2	346		T9	503
valid_sources[0x7b]	448667	1			T1	12		T2	299		T9	511
valid_sources[0x7c]	474989	1			T1	18		T2	301		T4	153
valid_sources[0x7d]	487518	1			T1	8		T2	287		T4	1
valid_sources[0x7e]	476814	1			T1	10		T2	320		T9	501
valid_sources[0x7f]	480972	1			T1	10		T2	310		T9	444
valid_sources[0x80]	485684	1			T1	13		T2	296		T4	5

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

61152434

1

T1

1471

T2

36028

T4

1081

values[0x0]

all_enables

biggest_size

31988337

1

T1

722

T2

18311

T4

506

values[0x1]

all_enables

biggest_size

31984135

1

T1

701

T2

18142

T4

620

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	42159934	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

144601

1

T2

8

T3

1

T4

16

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	42182361	1			T1	32808		T2	147695		T4	43124
values[0x0]	59063	1			T2	12		T4	18		T5	16
values[0x1]	63111	1			T1	2		T2	5		T3	2

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	28108463	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

14196072

1

T1

10938

T2

48922

T3

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	125827	1			T1	77		T2	605		T4	178
valid_sources[0x01]	433019	1			T1	130		T2	581		T4	158
valid_sources[0x02]	283977	1			T1	206		T2	643		T4	174
valid_sources[0x03]	400387	1			T1	185		T2	563		T4	178
valid_sources[0x04]	120799	1			T1	68		T2	616		T4	180
valid_sources[0x05]	125463	1			T1	172		T2	510		T4	164
valid_sources[0x06]	189491	1			T1	138		T2	571		T4	173
valid_sources[0x07]	154387	1			T1	153		T2	589		T4	155
valid_sources[0x08]	121958	1			T1	144		T2	520		T4	155
valid_sources[0x09]	168864	1			T1	180		T2	561		T4	173
valid_sources[0x0a]	152288	1			T1	104		T2	633		T4	160
valid_sources[0x0b]	123652	1			T1	150		T2	547		T4	166
valid_sources[0x0c]	118694	1			T1	152		T2	587		T4	192
valid_sources[0x0d]	139528	1			T1	107		T2	593		T4	153
valid_sources[0x0e]	120244	1			T1	122		T2	580		T4	164
valid_sources[0x0f]	120932	1			T1	133		T2	636		T4	159
valid_sources[0x10]	630690	1			T1	158		T2	588		T4	171
valid_sources[0x11]	186221	1			T1	156		T2	589		T4	163
valid_sources[0x12]	151536	1			T1	113		T2	604		T4	170
valid_sources[0x13]	120300	1			T1	156		T2	561		T4	142
valid_sources[0x14]	219021	1			T1	102		T2	586		T4	180
valid_sources[0x15]	435268	1			T1	214		T2	584		T4	152
valid_sources[0x16]	119962	1			T1	173		T2	529		T4	140
valid_sources[0x17]	121299	1			T1	137		T2	587		T4	170
valid_sources[0x18]	140272	1			T1	62		T2	557		T4	155
valid_sources[0x19]	121335	1			T1	80		T2	572		T4	166
valid_sources[0x1a]	154182	1			T1	69		T2	562		T4	180
valid_sources[0x1b]	119345	1			T1	180		T2	597		T4	181
valid_sources[0x1c]	191204	1			T1	64		T2	591		T4	150
valid_sources[0x1d]	152681	1			T1	94		T2	522		T4	182
valid_sources[0x1e]	120418	1			T1	198		T2	551		T4	164
valid_sources[0x1f]	162258	1			T1	100		T2	537		T4	191
valid_sources[0x20]	120706	1			T1	130		T2	603		T4	158
valid_sources[0x21]	348983	1			T1	146		T2	603		T4	167
valid_sources[0x22]	119903	1			T1	126		T2	567		T4	167
valid_sources[0x23]	275205	1			T1	82		T2	573		T4	169
valid_sources[0x24]	264700	1			T1	127		T2	578		T4	155
valid_sources[0x25]	187741	1			T1	111		T2	554		T4	175
valid_sources[0x26]	152137	1			T1	106		T2	571		T4	179
valid_sources[0x27]	127031	1			T1	69		T2	614		T4	170
valid_sources[0x28]	252358	1			T1	204		T2	631		T4	195
valid_sources[0x29]	120574	1			T1	111		T2	576		T4	177
valid_sources[0x2a]	155462	1			T1	152		T2	610		T4	164
valid_sources[0x2b]	120465	1			T1	116		T2	585		T4	173
valid_sources[0x2c]	144985	1			T1	61		T2	603		T4	162
valid_sources[0x2d]	118606	1			T1	230		T2	567		T4	163
valid_sources[0x2e]	200836	1			T1	197		T2	601		T4	164
valid_sources[0x2f]	124619	1			T1	107		T2	563		T4	183
valid_sources[0x30]	152968	1			T1	153		T2	608		T4	181
valid_sources[0x31]	120091	1			T1	134		T2	595		T4	160
valid_sources[0x32]	120488	1			T1	90		T2	575		T4	185
valid_sources[0x33]	233135	1			T1	93		T2	576		T4	166
valid_sources[0x34]	121428	1			T1	90		T2	549		T4	166
valid_sources[0x35]	129336	1			T1	160		T2	578		T4	155
valid_sources[0x36]	120107	1			T1	225		T2	573		T4	181
valid_sources[0x37]	217015	1			T1	82		T2	595		T4	161
valid_sources[0x38]	503445	1			T1	105		T2	571		T4	152
valid_sources[0x39]	119379	1			T1	79		T2	584		T4	183
valid_sources[0x3a]	300558	1			T1	189		T2	577		T4	179
valid_sources[0x3b]	180804	1			T1	125		T2	568		T4	165
valid_sources[0x3c]	151722	1			T1	102		T2	557		T4	171
valid_sources[0x3d]	121043	1			T1	149		T2	592		T4	183
valid_sources[0x3e]	121371	1			T1	169		T2	554		T4	153
valid_sources[0x3f]	122940	1			T1	139		T2	544		T4	184
valid_sources[0x40]	120321	1			T1	194		T2	600		T4	185
valid_sources[0x41]	121420	1			T1	93		T2	564		T4	171
valid_sources[0x42]	152635	1			T1	129		T2	598		T4	140
valid_sources[0x43]	174388	1			T1	153		T2	551		T4	184
valid_sources[0x44]	153586	1			T1	75		T2	640		T4	165
valid_sources[0x45]	154217	1			T1	107		T2	580		T4	142
valid_sources[0x46]	191906	1			T1	93		T2	619		T4	167
valid_sources[0x47]	239389	1			T1	142		T2	553		T4	154
valid_sources[0x48]	119192	1			T1	126		T2	638		T4	175
valid_sources[0x49]	154831	1			T1	139		T2	583		T4	160
valid_sources[0x4a]	121488	1			T1	86		T2	596		T4	177
valid_sources[0x4b]	136605	1			T1	124		T2	563		T4	151
valid_sources[0x4c]	120638	1			T1	170		T2	589		T4	167
valid_sources[0x4d]	120925	1			T1	124		T2	570		T4	184
valid_sources[0x4e]	118489	1			T1	233		T2	621		T4	157
valid_sources[0x4f]	219427	1			T1	154		T2	616		T4	191
valid_sources[0x50]	126068	1			T1	132		T2	592		T4	168
valid_sources[0x51]	122316	1			T1	25		T2	610		T4	164
valid_sources[0x52]	122476	1			T1	124		T2	539		T4	175
valid_sources[0x53]	119672	1			T1	151		T2	621		T4	187
valid_sources[0x54]	132137	1			T1	144		T2	551		T4	166
valid_sources[0x55]	122585	1			T1	138		T2	650		T4	166
valid_sources[0x56]	123567	1			T1	158		T2	600		T4	168
valid_sources[0x57]	126474	1			T1	94		T2	596		T4	181
valid_sources[0x58]	118980	1			T1	133		T2	567		T4	156
valid_sources[0x59]	215316	1			T1	120		T2	581		T4	202
valid_sources[0x5a]	243709	1			T1	110		T2	635		T4	177
valid_sources[0x5b]	119958	1			T1	204		T2	519		T4	175
valid_sources[0x5c]	125967	1			T1	141		T2	609		T4	162
valid_sources[0x5d]	119453	1			T1	137		T2	568		T4	172
valid_sources[0x5e]	119880	1			T1	130		T2	574		T4	173
valid_sources[0x5f]	120151	1			T1	217		T2	576		T4	173
valid_sources[0x60]	152958	1			T1	149		T2	575		T4	172
valid_sources[0x61]	120139	1			T1	132		T2	588		T4	184
valid_sources[0x62]	120273	1			T1	160		T2	581		T4	179
valid_sources[0x63]	120785	1			T1	89		T2	597		T4	159
valid_sources[0x64]	153008	1			T1	167		T2	611		T4	154
valid_sources[0x65]	151758	1			T1	138		T2	494		T4	182
valid_sources[0x66]	156454	1			T1	160		T2	615		T4	156
valid_sources[0x67]	201671	1			T1	133		T2	604		T4	171
valid_sources[0x68]	120006	1			T1	124		T2	591		T4	170
valid_sources[0x69]	140108	1			T1	121		T2	583		T4	160
valid_sources[0x6a]	335170	1			T1	126		T2	573		T4	167
valid_sources[0x6b]	124849	1			T1	100		T2	546		T4	151
valid_sources[0x6c]	483282	1			T1	125		T2	658		T4	180
valid_sources[0x6d]	152951	1			T1	120		T2	572		T4	165
valid_sources[0x6e]	128425	1			T1	79		T2	532		T4	201
valid_sources[0x6f]	129041	1			T1	99		T2	605		T4	165
valid_sources[0x70]	120950	1			T1	152		T2	534		T4	177
valid_sources[0x71]	387410	1			T1	103		T2	651		T4	166
valid_sources[0x72]	137430	1			T1	119		T2	599		T4	152
valid_sources[0x73]	202411	1			T1	245		T2	541		T4	181
valid_sources[0x74]	303149	1			T1	200		T2	564		T4	161
valid_sources[0x75]	156401	1			T1	92		T2	550		T4	171
valid_sources[0x76]	119142	1			T1	87		T2	538		T4	158
valid_sources[0x77]	119109	1			T1	119		T2	555		T4	146
valid_sources[0x78]	120298	1			T1	178		T2	583		T4	162
valid_sources[0x79]	120017	1			T1	159		T2	615		T4	189
valid_sources[0x7a]	120646	1			T1	143		T2	560		T4	175
valid_sources[0x7b]	120244	1			T1	208		T2	615		T4	179
valid_sources[0x7c]	249154	1			T1	92		T2	609		T4	165
valid_sources[0x7d]	120933	1			T1	104		T2	586		T4	157
valid_sources[0x7e]	133967	1			T1	62		T2	614		T4	161
valid_sources[0x7f]	120643	1			T1	97		T2	551		T4	174
valid_sources[0x80]	122456	1			T1	161		T2	590		T4	153

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

39296

1

T4

10

T14

4

T18

8

values[0x0]

all_enables

biggest_size

53218

1

T2

6

T4

5

T5

8

values[0x1]

all_enables

biggest_size

52087

1

T2

2

T3

1

T4

1