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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.52 100.00 98.32 100.00 100.00 99.72 99.70 98.89


Total test records in report: 964
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T256 /workspace/coverage/default/42.sram_ctrl_max_throughput.3540958759 Jan 21 12:47:32 PM PST 24 Jan 21 12:48:01 PM PST 24 2795030095 ps
T257 /workspace/coverage/default/4.sram_ctrl_partial_access.4138308830 Jan 21 12:32:21 PM PST 24 Jan 21 12:32:41 PM PST 24 711644822 ps
T258 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.2569562567 Jan 21 12:39:49 PM PST 24 Jan 21 12:43:41 PM PST 24 20187006469 ps
T259 /workspace/coverage/default/2.sram_ctrl_mem_walk.35047689 Jan 21 12:32:04 PM PST 24 Jan 21 12:34:49 PM PST 24 24591477120 ps
T260 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.4135210334 Jan 21 12:31:56 PM PST 24 Jan 21 01:31:17 PM PST 24 714944877 ps
T261 /workspace/coverage/default/47.sram_ctrl_alert_test.700059642 Jan 21 01:21:13 PM PST 24 Jan 21 01:21:15 PM PST 24 44006563 ps
T262 /workspace/coverage/default/10.sram_ctrl_regwen.3372465545 Jan 21 12:33:38 PM PST 24 Jan 21 12:36:59 PM PST 24 2689919781 ps
T263 /workspace/coverage/default/6.sram_ctrl_mem_partial_access.1667763567 Jan 21 12:32:40 PM PST 24 Jan 21 12:33:52 PM PST 24 7283107873 ps
T264 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.284221319 Jan 21 12:36:24 PM PST 24 Jan 21 01:45:45 PM PST 24 940888162 ps
T265 /workspace/coverage/default/28.sram_ctrl_stress_all.1081177302 Jan 21 12:40:32 PM PST 24 Jan 21 01:44:15 PM PST 24 841627356431 ps
T266 /workspace/coverage/default/0.sram_ctrl_lc_escalation.1107291212 Jan 21 12:31:58 PM PST 24 Jan 21 12:34:13 PM PST 24 9250900656 ps
T267 /workspace/coverage/default/48.sram_ctrl_lc_escalation.2798771673 Jan 21 12:50:04 PM PST 24 Jan 21 12:52:17 PM PST 24 57796002144 ps
T268 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.2615476367 Jan 21 12:33:28 PM PST 24 Jan 21 12:38:49 PM PST 24 9169293826 ps
T269 /workspace/coverage/default/23.sram_ctrl_smoke.3109724899 Jan 21 01:30:43 PM PST 24 Jan 21 01:31:20 PM PST 24 393388506 ps
T270 /workspace/coverage/default/34.sram_ctrl_alert_test.1925052531 Jan 21 12:43:05 PM PST 24 Jan 21 12:43:07 PM PST 24 11532398 ps
T271 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.564922824 Jan 21 12:40:25 PM PST 24 Jan 21 12:59:22 PM PST 24 25478096123 ps
T272 /workspace/coverage/default/30.sram_ctrl_stress_all.3895830375 Jan 21 12:41:19 PM PST 24 Jan 21 01:50:30 PM PST 24 233310444574 ps
T273 /workspace/coverage/default/23.sram_ctrl_bijection.3377787004 Jan 21 12:38:14 PM PST 24 Jan 21 12:53:15 PM PST 24 104391824804 ps
T274 /workspace/coverage/default/14.sram_ctrl_smoke.1614617994 Jan 21 12:34:51 PM PST 24 Jan 21 12:36:48 PM PST 24 456277734 ps
T275 /workspace/coverage/default/45.sram_ctrl_multiple_keys.1599192577 Jan 21 12:48:53 PM PST 24 Jan 21 12:56:56 PM PST 24 29058497821 ps
T276 /workspace/coverage/default/10.sram_ctrl_partial_access.3721963639 Jan 21 12:33:40 PM PST 24 Jan 21 12:34:59 PM PST 24 1090471841 ps
T277 /workspace/coverage/default/4.sram_ctrl_mem_walk.1719779962 Jan 21 12:32:19 PM PST 24 Jan 21 12:36:47 PM PST 24 14057184075 ps
T278 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.1866051424 Jan 21 12:35:45 PM PST 24 Jan 21 12:37:10 PM PST 24 15563967556 ps
T279 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.2622507742 Jan 21 12:37:53 PM PST 24 Jan 21 12:43:04 PM PST 24 22181060211 ps
T280 /workspace/coverage/default/39.sram_ctrl_stress_pipeline.284468432 Jan 21 12:46:42 PM PST 24 Jan 21 12:54:10 PM PST 24 41208411940 ps
T281 /workspace/coverage/default/22.sram_ctrl_lc_escalation.3062495120 Jan 21 01:53:23 PM PST 24 Jan 21 01:54:11 PM PST 24 11332226452 ps
T282 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.1599299458 Jan 21 12:42:36 PM PST 24 Jan 21 12:43:49 PM PST 24 1904361918 ps
T283 /workspace/coverage/default/8.sram_ctrl_ram_cfg.2079030451 Jan 21 12:33:20 PM PST 24 Jan 21 12:33:26 PM PST 24 676559104 ps
T284 /workspace/coverage/default/3.sram_ctrl_bijection.432195947 Jan 21 12:32:04 PM PST 24 Jan 21 01:12:35 PM PST 24 421962326799 ps
T285 /workspace/coverage/default/7.sram_ctrl_ram_cfg.3355568521 Jan 21 12:33:07 PM PST 24 Jan 21 12:33:22 PM PST 24 3341947547 ps
T286 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.1917725371 Jan 21 12:32:09 PM PST 24 Jan 21 12:49:02 PM PST 24 10243810018 ps
T287 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1909095204 Jan 21 12:48:58 PM PST 24 Jan 21 01:37:44 PM PST 24 355629179 ps
T288 /workspace/coverage/default/40.sram_ctrl_mem_partial_access.3434048335 Jan 21 12:46:44 PM PST 24 Jan 21 12:47:56 PM PST 24 3235732372 ps
T289 /workspace/coverage/default/36.sram_ctrl_mem_walk.2176682275 Jan 21 12:44:18 PM PST 24 Jan 21 12:46:37 PM PST 24 27547389930 ps
T290 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.2482133145 Jan 21 12:32:06 PM PST 24 Jan 21 12:35:14 PM PST 24 3755856353 ps
T291 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.3549243683 Jan 21 12:39:27 PM PST 24 Jan 21 02:17:28 PM PST 24 1706351310 ps
T292 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.1306592079 Jan 21 12:49:47 PM PST 24 Jan 21 01:03:26 PM PST 24 4297009632 ps
T293 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1526296375 Jan 21 12:33:16 PM PST 24 Jan 21 02:19:42 PM PST 24 38120334436 ps
T294 /workspace/coverage/default/17.sram_ctrl_lc_escalation.29462244 Jan 21 12:36:12 PM PST 24 Jan 21 12:37:45 PM PST 24 35438016393 ps
T295 /workspace/coverage/default/46.sram_ctrl_mem_walk.576255723 Jan 21 12:49:24 PM PST 24 Jan 21 12:53:21 PM PST 24 8046585413 ps
T296 /workspace/coverage/default/30.sram_ctrl_partial_access.3749920300 Jan 21 12:41:03 PM PST 24 Jan 21 12:43:32 PM PST 24 1021377313 ps
T297 /workspace/coverage/default/26.sram_ctrl_regwen.2846036931 Jan 21 12:39:40 PM PST 24 Jan 21 01:00:30 PM PST 24 8447024827 ps
T298 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.1222180073 Jan 21 12:46:19 PM PST 24 Jan 21 12:51:22 PM PST 24 24844607778 ps
T299 /workspace/coverage/default/12.sram_ctrl_max_throughput.1727284726 Jan 21 12:34:13 PM PST 24 Jan 21 12:34:45 PM PST 24 5256639552 ps
T300 /workspace/coverage/default/12.sram_ctrl_smoke.225380465 Jan 21 12:34:04 PM PST 24 Jan 21 12:34:15 PM PST 24 5372112251 ps
T301 /workspace/coverage/default/20.sram_ctrl_alert_test.441735333 Jan 21 12:37:37 PM PST 24 Jan 21 12:37:38 PM PST 24 41121647 ps
T302 /workspace/coverage/default/6.sram_ctrl_partial_access.975036058 Jan 21 12:32:35 PM PST 24 Jan 21 12:34:46 PM PST 24 5298219198 ps
T303 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.2493829913 Jan 21 12:46:13 PM PST 24 Jan 21 12:51:56 PM PST 24 23803906203 ps
T304 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.3220632549 Jan 21 12:32:35 PM PST 24 Jan 21 12:39:05 PM PST 24 22381249893 ps
T305 /workspace/coverage/default/41.sram_ctrl_ram_cfg.369658640 Jan 21 01:11:54 PM PST 24 Jan 21 01:12:01 PM PST 24 683651895 ps
T306 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3551370586 Jan 21 12:38:31 PM PST 24 Jan 21 12:57:56 PM PST 24 3130224245 ps
T307 /workspace/coverage/default/4.sram_ctrl_lc_escalation.418291280 Jan 21 12:32:18 PM PST 24 Jan 21 12:33:50 PM PST 24 25617289551 ps
T308 /workspace/coverage/default/4.sram_ctrl_ram_cfg.4219690493 Jan 21 12:32:16 PM PST 24 Jan 21 12:32:41 PM PST 24 362945119 ps
T309 /workspace/coverage/default/6.sram_ctrl_regwen.3048947036 Jan 21 12:32:40 PM PST 24 Jan 21 12:42:09 PM PST 24 7636499630 ps
T310 /workspace/coverage/default/37.sram_ctrl_ram_cfg.3010408144 Jan 21 12:46:18 PM PST 24 Jan 21 12:46:33 PM PST 24 356058657 ps
T311 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.2159166532 Jan 21 12:48:49 PM PST 24 Jan 21 12:54:02 PM PST 24 8874337996 ps
T312 /workspace/coverage/default/36.sram_ctrl_max_throughput.2363524026 Jan 21 12:43:58 PM PST 24 Jan 21 12:45:07 PM PST 24 3038114518 ps
T313 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.1107508728 Jan 21 12:31:59 PM PST 24 Jan 21 12:33:36 PM PST 24 3459849852 ps
T314 /workspace/coverage/default/20.sram_ctrl_mem_walk.1162555296 Jan 21 12:37:29 PM PST 24 Jan 21 12:40:12 PM PST 24 112070091714 ps
T315 /workspace/coverage/default/31.sram_ctrl_mem_walk.1984953504 Jan 21 12:41:44 PM PST 24 Jan 21 12:46:45 PM PST 24 21496873391 ps
T316 /workspace/coverage/default/1.sram_ctrl_max_throughput.2757415361 Jan 21 12:32:03 PM PST 24 Jan 21 12:33:51 PM PST 24 2999298480 ps
T317 /workspace/coverage/default/33.sram_ctrl_max_throughput.1872261045 Jan 21 01:19:05 PM PST 24 Jan 21 01:20:00 PM PST 24 14138634330 ps
T318 /workspace/coverage/default/14.sram_ctrl_partial_access.1100509362 Jan 21 12:34:50 PM PST 24 Jan 21 12:36:16 PM PST 24 19729419972 ps
T319 /workspace/coverage/default/14.sram_ctrl_multiple_keys.3102645705 Jan 21 01:02:14 PM PST 24 Jan 21 01:17:32 PM PST 24 12795834058 ps
T320 /workspace/coverage/default/38.sram_ctrl_max_throughput.1032969371 Jan 21 12:45:25 PM PST 24 Jan 21 12:46:20 PM PST 24 11811549604 ps
T321 /workspace/coverage/default/22.sram_ctrl_ram_cfg.3478793966 Jan 21 01:41:20 PM PST 24 Jan 21 01:41:27 PM PST 24 363300049 ps
T322 /workspace/coverage/default/30.sram_ctrl_alert_test.4098879581 Jan 21 12:41:21 PM PST 24 Jan 21 12:41:22 PM PST 24 16199158 ps
T323 /workspace/coverage/default/26.sram_ctrl_ram_cfg.387057875 Jan 21 12:39:45 PM PST 24 Jan 21 12:39:50 PM PST 24 446747361 ps
T324 /workspace/coverage/default/10.sram_ctrl_alert_test.3257950253 Jan 21 12:33:52 PM PST 24 Jan 21 12:33:54 PM PST 24 17801494 ps
T325 /workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.3108286332 Jan 21 12:44:45 PM PST 24 Jan 21 12:45:31 PM PST 24 3108823128 ps
T326 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.1422153127 Jan 21 12:47:28 PM PST 24 Jan 21 12:51:58 PM PST 24 15630935784 ps
T327 /workspace/coverage/default/20.sram_ctrl_max_throughput.3885284820 Jan 21 12:37:20 PM PST 24 Jan 21 12:37:58 PM PST 24 11580285986 ps
T328 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.96628690 Jan 21 12:48:47 PM PST 24 Jan 21 01:00:31 PM PST 24 6097033027 ps
T329 /workspace/coverage/default/43.sram_ctrl_ram_cfg.765132475 Jan 21 12:47:54 PM PST 24 Jan 21 12:48:02 PM PST 24 345644167 ps
T330 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.331355117 Jan 21 12:45:54 PM PST 24 Jan 21 12:48:06 PM PST 24 3233107109 ps
T331 /workspace/coverage/default/45.sram_ctrl_regwen.1911483933 Jan 21 12:48:48 PM PST 24 Jan 21 12:54:12 PM PST 24 22212631303 ps
T332 /workspace/coverage/default/36.sram_ctrl_lc_escalation.2912981328 Jan 21 12:43:58 PM PST 24 Jan 21 12:47:04 PM PST 24 9589183329 ps
T333 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.3669380168 Jan 21 12:32:05 PM PST 24 Jan 21 12:38:28 PM PST 24 63874476837 ps
T334 /workspace/coverage/default/41.sram_ctrl_max_throughput.2946323832 Jan 21 12:48:07 PM PST 24 Jan 21 12:48:59 PM PST 24 4456833765 ps
T335 /workspace/coverage/default/8.sram_ctrl_max_throughput.2331085205 Jan 21 12:33:09 PM PST 24 Jan 21 12:36:22 PM PST 24 3518203320 ps
T336 /workspace/coverage/default/19.sram_ctrl_multiple_keys.1513279321 Jan 21 12:36:50 PM PST 24 Jan 21 12:59:53 PM PST 24 38399559119 ps
T337 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.3777257112 Jan 21 12:39:38 PM PST 24 Jan 21 12:56:37 PM PST 24 24809391520 ps
T338 /workspace/coverage/default/27.sram_ctrl_mem_walk.2234121383 Jan 21 12:40:09 PM PST 24 Jan 21 12:45:46 PM PST 24 172297439959 ps
T339 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.630005739 Jan 21 12:47:28 PM PST 24 Jan 21 01:11:10 PM PST 24 40085081528 ps
T340 /workspace/coverage/default/24.sram_ctrl_bijection.99011416 Jan 21 12:38:52 PM PST 24 Jan 21 12:51:12 PM PST 24 11066708343 ps
T341 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.982698424 Jan 21 12:34:44 PM PST 24 Jan 21 02:03:19 PM PST 24 3196967511 ps
T342 /workspace/coverage/default/44.sram_ctrl_alert_test.3909591938 Jan 21 12:48:48 PM PST 24 Jan 21 12:48:50 PM PST 24 111054265 ps
T343 /workspace/coverage/default/27.sram_ctrl_max_throughput.3057618848 Jan 21 12:39:51 PM PST 24 Jan 21 12:40:21 PM PST 24 2954543747 ps
T344 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.2095211555 Jan 21 12:32:00 PM PST 24 Jan 21 12:40:14 PM PST 24 13044361773 ps
T345 /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.2563451887 Jan 21 12:36:40 PM PST 24 Jan 21 01:25:24 PM PST 24 732540117 ps
T346 /workspace/coverage/default/49.sram_ctrl_bijection.390910643 Jan 21 12:50:20 PM PST 24 Jan 21 12:59:45 PM PST 24 34166972695 ps
T347 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3231723892 Jan 21 12:34:21 PM PST 24 Jan 21 02:07:29 PM PST 24 2362680624 ps
T348 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.1012594208 Jan 21 12:34:13 PM PST 24 Jan 21 12:46:49 PM PST 24 21796712455 ps
T349 /workspace/coverage/default/39.sram_ctrl_alert_test.294578495 Jan 21 12:46:15 PM PST 24 Jan 21 12:46:16 PM PST 24 30142748 ps
T350 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3250545157 Jan 21 12:41:05 PM PST 24 Jan 21 12:45:49 PM PST 24 9389899008 ps
T351 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.516589803 Jan 21 12:48:49 PM PST 24 Jan 21 12:56:10 PM PST 24 127324774157 ps
T352 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.2212566199 Jan 21 12:39:51 PM PST 24 Jan 21 12:46:10 PM PST 24 30434938106 ps
T353 /workspace/coverage/default/10.sram_ctrl_smoke.1833768610 Jan 21 12:33:30 PM PST 24 Jan 21 12:34:19 PM PST 24 1919604194 ps
T354 /workspace/coverage/default/10.sram_ctrl_mem_walk.2649049744 Jan 21 12:33:46 PM PST 24 Jan 21 12:35:46 PM PST 24 1978630121 ps
T355 /workspace/coverage/default/16.sram_ctrl_smoke.3034452709 Jan 21 12:35:26 PM PST 24 Jan 21 12:38:03 PM PST 24 2969983341 ps
T356 /workspace/coverage/default/48.sram_ctrl_regwen.3597411328 Jan 21 12:50:04 PM PST 24 Jan 21 12:53:20 PM PST 24 25433532015 ps
T357 /workspace/coverage/default/30.sram_ctrl_ram_cfg.3052756261 Jan 21 12:41:18 PM PST 24 Jan 21 12:41:32 PM PST 24 377197608 ps
T358 /workspace/coverage/default/18.sram_ctrl_mem_walk.3156644216 Jan 21 12:36:38 PM PST 24 Jan 21 12:41:46 PM PST 24 114660626931 ps
T359 /workspace/coverage/default/19.sram_ctrl_stress_pipeline.4290856900 Jan 21 12:36:48 PM PST 24 Jan 21 12:44:29 PM PST 24 5839601234 ps
T360 /workspace/coverage/default/32.sram_ctrl_executable.708248767 Jan 21 12:42:04 PM PST 24 Jan 21 12:50:51 PM PST 24 10158749346 ps
T361 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.3840483542 Jan 21 12:45:31 PM PST 24 Jan 21 01:42:15 PM PST 24 1864124966 ps
T362 /workspace/coverage/default/43.sram_ctrl_smoke.1837746187 Jan 21 12:47:38 PM PST 24 Jan 21 12:48:08 PM PST 24 5573010428 ps
T363 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.2528167474 Jan 21 12:40:07 PM PST 24 Jan 21 12:42:11 PM PST 24 5580407369 ps
T364 /workspace/coverage/default/19.sram_ctrl_mem_walk.6300118 Jan 21 01:28:32 PM PST 24 Jan 21 01:30:56 PM PST 24 28699345988 ps
T365 /workspace/coverage/default/42.sram_ctrl_mem_walk.269607812 Jan 21 12:47:32 PM PST 24 Jan 21 12:50:07 PM PST 24 38255961480 ps
T366 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.2639225211 Jan 21 12:36:48 PM PST 24 Jan 21 12:38:16 PM PST 24 3586608325 ps
T367 /workspace/coverage/default/27.sram_ctrl_smoke.2193176583 Jan 21 12:39:49 PM PST 24 Jan 21 12:41:40 PM PST 24 787489051 ps
T368 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3927493489 Jan 21 12:47:38 PM PST 24 Jan 21 02:19:53 PM PST 24 23132008427 ps
T369 /workspace/coverage/default/14.sram_ctrl_lc_escalation.1199240293 Jan 21 12:35:01 PM PST 24 Jan 21 12:37:06 PM PST 24 20880888581 ps
T370 /workspace/coverage/default/28.sram_ctrl_smoke.1532006381 Jan 21 12:40:15 PM PST 24 Jan 21 12:40:37 PM PST 24 4009824494 ps
T371 /workspace/coverage/default/31.sram_ctrl_stress_all.1973013184 Jan 21 12:41:51 PM PST 24 Jan 21 01:23:52 PM PST 24 252709683194 ps
T372 /workspace/coverage/default/10.sram_ctrl_stress_all.2072861077 Jan 21 12:33:43 PM PST 24 Jan 21 12:51:18 PM PST 24 33839338854 ps
T373 /workspace/coverage/default/7.sram_ctrl_stress_all.2208636640 Jan 21 12:33:07 PM PST 24 Jan 21 02:33:28 PM PST 24 96331369334 ps
T374 /workspace/coverage/default/44.sram_ctrl_partial_access.148907571 Jan 21 12:48:03 PM PST 24 Jan 21 12:48:15 PM PST 24 670618631 ps
T375 /workspace/coverage/default/49.sram_ctrl_ram_cfg.1333187040 Jan 21 01:05:41 PM PST 24 Jan 21 01:05:56 PM PST 24 1356169431 ps
T376 /workspace/coverage/default/34.sram_ctrl_lc_escalation.3866502692 Jan 21 12:42:57 PM PST 24 Jan 21 12:46:09 PM PST 24 15164676303 ps
T377 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.845929753 Jan 21 12:47:28 PM PST 24 Jan 21 12:47:56 PM PST 24 2786506689 ps
T378 /workspace/coverage/default/3.sram_ctrl_mem_walk.2711566779 Jan 21 12:31:58 PM PST 24 Jan 21 12:38:02 PM PST 24 228758906605 ps
T379 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3341047772 Jan 21 12:49:39 PM PST 24 Jan 21 12:50:06 PM PST 24 2692069113 ps
T380 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.1658768869 Jan 21 12:33:15 PM PST 24 Jan 21 01:12:53 PM PST 24 101267561167 ps
T381 /workspace/coverage/default/31.sram_ctrl_executable.3551950259 Jan 21 12:55:15 PM PST 24 Jan 21 01:14:26 PM PST 24 30616145065 ps
T382 /workspace/coverage/default/34.sram_ctrl_bijection.2849053224 Jan 21 12:42:43 PM PST 24 Jan 21 12:55:21 PM PST 24 170883395207 ps
T383 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.2920550247 Jan 21 12:39:33 PM PST 24 Jan 21 12:41:59 PM PST 24 5590045194 ps
T384 /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.4205944732 Jan 21 12:41:21 PM PST 24 Jan 21 02:30:27 PM PST 24 5927001645 ps
T385 /workspace/coverage/default/45.sram_ctrl_ram_cfg.3476540042 Jan 21 12:48:59 PM PST 24 Jan 21 12:49:05 PM PST 24 695742647 ps
T386 /workspace/coverage/default/21.sram_ctrl_max_throughput.2018294905 Jan 21 12:37:45 PM PST 24 Jan 21 12:39:30 PM PST 24 2842666158 ps
T387 /workspace/coverage/default/15.sram_ctrl_mem_walk.1818947329 Jan 21 12:35:26 PM PST 24 Jan 21 12:39:48 PM PST 24 8212803821 ps
T388 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.903985487 Jan 21 01:09:55 PM PST 24 Jan 21 01:10:25 PM PST 24 3160634670 ps
T389 /workspace/coverage/default/6.sram_ctrl_max_throughput.1665173589 Jan 21 12:32:35 PM PST 24 Jan 21 12:33:53 PM PST 24 754578015 ps
T390 /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.3094792300 Jan 21 12:46:42 PM PST 24 Jan 21 12:47:47 PM PST 24 853690935 ps
T391 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3458846012 Jan 21 12:50:11 PM PST 24 Jan 21 02:32:57 PM PST 24 2104407340 ps
T392 /workspace/coverage/default/3.sram_ctrl_stress_all.2851007681 Jan 21 12:32:04 PM PST 24 Jan 21 01:28:45 PM PST 24 107804230769 ps
T393 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3204251436 Jan 21 12:49:58 PM PST 24 Jan 21 12:50:34 PM PST 24 5314427646 ps
T394 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3432047394 Jan 21 01:03:31 PM PST 24 Jan 21 01:03:59 PM PST 24 5164622945 ps
T395 /workspace/coverage/default/4.sram_ctrl_executable.1975948714 Jan 21 12:32:19 PM PST 24 Jan 21 12:37:31 PM PST 24 31760971583 ps
T396 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.3419167001 Jan 21 12:39:11 PM PST 24 Jan 21 12:39:48 PM PST 24 1432408408 ps
T397 /workspace/coverage/default/8.sram_ctrl_smoke.934933003 Jan 21 12:33:09 PM PST 24 Jan 21 12:33:21 PM PST 24 1370852423 ps
T398 /workspace/coverage/default/25.sram_ctrl_ram_cfg.3355769110 Jan 21 12:39:19 PM PST 24 Jan 21 12:39:33 PM PST 24 680330087 ps
T399 /workspace/coverage/default/34.sram_ctrl_ram_cfg.651482714 Jan 21 01:26:27 PM PST 24 Jan 21 01:26:33 PM PST 24 358690127 ps
T400 /workspace/coverage/default/23.sram_ctrl_alert_test.4096893185 Jan 21 12:38:40 PM PST 24 Jan 21 12:38:41 PM PST 24 118493261 ps
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T496 /workspace/coverage/default/23.sram_ctrl_stress_all.1513463688 Jan 21 12:38:38 PM PST 24 Jan 21 01:49:23 PM PST 24 49911555231 ps
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T498 /workspace/coverage/default/35.sram_ctrl_ram_cfg.188132754 Jan 21 12:43:40 PM PST 24 Jan 21 12:43:55 PM PST 24 348094317 ps
T499 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.293496782 Jan 21 12:32:00 PM PST 24 Jan 21 12:37:23 PM PST 24 15356291446 ps
T500 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.1586540107 Jan 21 12:45:32 PM PST 24 Jan 21 12:47:56 PM PST 24 8010630524 ps
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T503 /workspace/coverage/default/27.sram_ctrl_regwen.2410514933 Jan 21 12:39:58 PM PST 24 Jan 21 12:47:44 PM PST 24 10464689993 ps
T504 /workspace/coverage/default/33.sram_ctrl_ram_cfg.3796483118 Jan 21 12:42:35 PM PST 24 Jan 21 12:42:50 PM PST 24 401785579 ps
T505 /workspace/coverage/default/40.sram_ctrl_partial_access.3556610516 Jan 21 12:46:20 PM PST 24 Jan 21 12:46:53 PM PST 24 22630089416 ps
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