T503 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.4212941308 |
|
|
Feb 07 02:09:01 PM PST 24 |
Feb 07 02:11:29 PM PST 24 |
72769238458 ps |
T504 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2800150822 |
|
|
Feb 07 02:09:07 PM PST 24 |
Feb 07 02:10:27 PM PST 24 |
13568848591 ps |
T505 |
/workspace/coverage/default/28.sram_ctrl_alert_test.2120786075 |
|
|
Feb 07 02:03:54 PM PST 24 |
Feb 07 02:03:56 PM PST 24 |
88923498 ps |
T506 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.718099036 |
|
|
Feb 07 02:00:54 PM PST 24 |
Feb 07 02:08:35 PM PST 24 |
46868444480 ps |
T507 |
/workspace/coverage/default/17.sram_ctrl_bijection.2572208634 |
|
|
Feb 07 02:01:37 PM PST 24 |
Feb 07 02:29:39 PM PST 24 |
77905328226 ps |
T508 |
/workspace/coverage/default/5.sram_ctrl_regwen.1785368720 |
|
|
Feb 07 02:00:58 PM PST 24 |
Feb 07 02:05:26 PM PST 24 |
24760613089 ps |
T509 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.3610869937 |
|
|
Feb 07 02:02:45 PM PST 24 |
Feb 07 02:04:42 PM PST 24 |
40991741230 ps |
T510 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.4046395749 |
|
|
Feb 07 02:08:20 PM PST 24 |
Feb 07 04:04:13 PM PST 24 |
2123308459 ps |
T511 |
/workspace/coverage/default/5.sram_ctrl_bijection.3783250090 |
|
|
Feb 07 02:00:58 PM PST 24 |
Feb 07 02:21:47 PM PST 24 |
180191140001 ps |
T512 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3970295870 |
|
|
Feb 07 02:01:08 PM PST 24 |
Feb 07 02:01:14 PM PST 24 |
358845253 ps |
T513 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.2684887865 |
|
|
Feb 07 02:07:57 PM PST 24 |
Feb 07 02:29:04 PM PST 24 |
8162241153 ps |
T514 |
/workspace/coverage/default/26.sram_ctrl_smoke.498647993 |
|
|
Feb 07 02:03:18 PM PST 24 |
Feb 07 02:03:50 PM PST 24 |
2688242805 ps |
T515 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.2996093919 |
|
|
Feb 07 02:01:35 PM PST 24 |
Feb 07 02:03:38 PM PST 24 |
7889228161 ps |
T516 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2244120902 |
|
|
Feb 07 02:01:45 PM PST 24 |
Feb 07 02:47:45 PM PST 24 |
474329822 ps |
T517 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.488994516 |
|
|
Feb 07 02:03:37 PM PST 24 |
Feb 07 02:09:11 PM PST 24 |
17516175223 ps |
T518 |
/workspace/coverage/default/9.sram_ctrl_executable.633281544 |
|
|
Feb 07 02:01:16 PM PST 24 |
Feb 07 02:15:48 PM PST 24 |
51320112704 ps |
T519 |
/workspace/coverage/default/29.sram_ctrl_smoke.3342498911 |
|
|
Feb 07 02:03:50 PM PST 24 |
Feb 07 02:04:10 PM PST 24 |
1006484714 ps |
T520 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2210165501 |
|
|
Feb 07 02:09:12 PM PST 24 |
Feb 07 02:15:22 PM PST 24 |
18377765051 ps |
T521 |
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.398134044 |
|
|
Feb 07 02:08:14 PM PST 24 |
Feb 07 02:09:26 PM PST 24 |
12210823992 ps |
T522 |
/workspace/coverage/default/8.sram_ctrl_executable.2481472053 |
|
|
Feb 07 02:01:07 PM PST 24 |
Feb 07 02:24:47 PM PST 24 |
48056161434 ps |
T523 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.318548642 |
|
|
Feb 07 02:00:52 PM PST 24 |
Feb 07 02:01:47 PM PST 24 |
10179909520 ps |
T524 |
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.2080614142 |
|
|
Feb 07 02:08:16 PM PST 24 |
Feb 07 02:09:36 PM PST 24 |
2749553085 ps |
T525 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3926540629 |
|
|
Feb 07 02:08:27 PM PST 24 |
Feb 07 02:11:59 PM PST 24 |
12403402900 ps |
T526 |
/workspace/coverage/default/49.sram_ctrl_executable.2883939588 |
|
|
Feb 07 02:09:46 PM PST 24 |
Feb 07 02:31:29 PM PST 24 |
75336242744 ps |
T527 |
/workspace/coverage/default/16.sram_ctrl_alert_test.3208981633 |
|
|
Feb 07 02:01:43 PM PST 24 |
Feb 07 02:01:44 PM PST 24 |
98638419 ps |
T528 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.1989182735 |
|
|
Feb 07 02:01:19 PM PST 24 |
Feb 07 03:45:01 PM PST 24 |
7612778063 ps |
T529 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.2534267603 |
|
|
Feb 07 02:01:04 PM PST 24 |
Feb 07 02:03:14 PM PST 24 |
794057521 ps |
T530 |
/workspace/coverage/default/33.sram_ctrl_smoke.1903494060 |
|
|
Feb 07 02:07:57 PM PST 24 |
Feb 07 02:10:40 PM PST 24 |
916817973 ps |
T531 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2126957251 |
|
|
Feb 07 02:03:25 PM PST 24 |
Feb 07 03:59:58 PM PST 24 |
1393821898 ps |
T532 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.4204319614 |
|
|
Feb 07 02:07:59 PM PST 24 |
Feb 07 03:52:02 PM PST 24 |
1968067234 ps |
T533 |
/workspace/coverage/default/38.sram_ctrl_stress_all.1548404879 |
|
|
Feb 07 02:08:14 PM PST 24 |
Feb 07 03:17:31 PM PST 24 |
174055017347 ps |
T534 |
/workspace/coverage/default/11.sram_ctrl_smoke.4221065299 |
|
|
Feb 07 02:01:21 PM PST 24 |
Feb 07 02:01:34 PM PST 24 |
1205429941 ps |
T535 |
/workspace/coverage/default/29.sram_ctrl_bijection.128959883 |
|
|
Feb 07 02:03:55 PM PST 24 |
Feb 07 02:37:29 PM PST 24 |
30742420180 ps |
T536 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.3102412355 |
|
|
Feb 07 02:02:12 PM PST 24 |
Feb 07 02:03:22 PM PST 24 |
763537177 ps |
T537 |
/workspace/coverage/default/23.sram_ctrl_multiple_keys.479558813 |
|
|
Feb 07 02:02:45 PM PST 24 |
Feb 07 02:11:23 PM PST 24 |
8245071128 ps |
T538 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3569365279 |
|
|
Feb 07 02:08:48 PM PST 24 |
Feb 07 02:09:32 PM PST 24 |
735093520 ps |
T539 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.411764679 |
|
|
Feb 07 02:01:32 PM PST 24 |
Feb 07 02:06:03 PM PST 24 |
15456957542 ps |
T540 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.2003424485 |
|
|
Feb 07 02:01:04 PM PST 24 |
Feb 07 02:03:38 PM PST 24 |
28680516950 ps |
T541 |
/workspace/coverage/default/18.sram_ctrl_smoke.663313659 |
|
|
Feb 07 02:01:43 PM PST 24 |
Feb 07 02:02:20 PM PST 24 |
1513258014 ps |
T542 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.4128760344 |
|
|
Feb 07 02:01:16 PM PST 24 |
Feb 07 02:02:41 PM PST 24 |
745586323 ps |
T543 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.2061592586 |
|
|
Feb 07 02:07:57 PM PST 24 |
Feb 07 02:10:03 PM PST 24 |
8581288400 ps |
T544 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.1892015329 |
|
|
Feb 07 02:08:39 PM PST 24 |
Feb 07 02:13:32 PM PST 24 |
55122443854 ps |
T545 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.464824561 |
|
|
Feb 07 02:00:33 PM PST 24 |
Feb 07 02:05:58 PM PST 24 |
40068408187 ps |
T546 |
/workspace/coverage/default/20.sram_ctrl_alert_test.1889074503 |
|
|
Feb 07 02:02:21 PM PST 24 |
Feb 07 02:02:32 PM PST 24 |
102818673 ps |
T89 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.1626280187 |
|
|
Feb 07 02:08:23 PM PST 24 |
Feb 07 02:09:35 PM PST 24 |
988837488 ps |
T547 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3612016264 |
|
|
Feb 07 02:01:05 PM PST 24 |
Feb 07 02:04:25 PM PST 24 |
10880027716 ps |
T548 |
/workspace/coverage/default/49.sram_ctrl_alert_test.3056968148 |
|
|
Feb 07 02:09:56 PM PST 24 |
Feb 07 02:09:58 PM PST 24 |
13902996 ps |
T549 |
/workspace/coverage/default/33.sram_ctrl_alert_test.1628920595 |
|
|
Feb 07 02:08:03 PM PST 24 |
Feb 07 02:08:06 PM PST 24 |
16240796 ps |
T550 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.3228625676 |
|
|
Feb 07 02:08:21 PM PST 24 |
Feb 07 02:11:59 PM PST 24 |
1772762425 ps |
T551 |
/workspace/coverage/default/38.sram_ctrl_executable.189781266 |
|
|
Feb 07 02:08:10 PM PST 24 |
Feb 07 02:26:49 PM PST 24 |
17888951696 ps |
T552 |
/workspace/coverage/default/18.sram_ctrl_regwen.1655450676 |
|
|
Feb 07 02:01:56 PM PST 24 |
Feb 07 02:17:53 PM PST 24 |
17296974459 ps |
T553 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.567976526 |
|
|
Feb 07 02:01:56 PM PST 24 |
Feb 07 02:02:24 PM PST 24 |
3736217449 ps |
T554 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.4020467709 |
|
|
Feb 07 02:09:14 PM PST 24 |
Feb 07 02:51:40 PM PST 24 |
789366173 ps |
T555 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3436341867 |
|
|
Feb 07 02:08:48 PM PST 24 |
Feb 07 02:11:16 PM PST 24 |
6728876900 ps |
T556 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1773490770 |
|
|
Feb 07 02:01:30 PM PST 24 |
Feb 07 02:03:29 PM PST 24 |
824880236 ps |
T557 |
/workspace/coverage/default/42.sram_ctrl_regwen.3564713453 |
|
|
Feb 07 02:08:19 PM PST 24 |
Feb 07 02:24:46 PM PST 24 |
14246556920 ps |
T558 |
/workspace/coverage/default/3.sram_ctrl_partial_access.3793439245 |
|
|
Feb 07 02:01:05 PM PST 24 |
Feb 07 02:01:24 PM PST 24 |
3152253199 ps |
T559 |
/workspace/coverage/default/30.sram_ctrl_smoke.1813456596 |
|
|
Feb 07 02:04:05 PM PST 24 |
Feb 07 02:04:42 PM PST 24 |
9704601837 ps |
T560 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.1079521504 |
|
|
Feb 07 02:08:02 PM PST 24 |
Feb 07 02:08:37 PM PST 24 |
2887133245 ps |
T561 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.354986248 |
|
|
Feb 07 02:03:21 PM PST 24 |
Feb 07 02:04:36 PM PST 24 |
4284215922 ps |
T562 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.4070396415 |
|
|
Feb 07 02:09:29 PM PST 24 |
Feb 07 02:21:58 PM PST 24 |
7775637353 ps |
T563 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.958243919 |
|
|
Feb 07 02:08:00 PM PST 24 |
Feb 07 02:17:20 PM PST 24 |
36679890642 ps |
T564 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.2906499637 |
|
|
Feb 07 02:04:03 PM PST 24 |
Feb 07 02:30:18 PM PST 24 |
11211007718 ps |
T565 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.1666616075 |
|
|
Feb 07 02:02:39 PM PST 24 |
Feb 07 02:05:08 PM PST 24 |
4559903343 ps |
T566 |
/workspace/coverage/default/12.sram_ctrl_bijection.717536911 |
|
|
Feb 07 02:01:19 PM PST 24 |
Feb 07 02:41:32 PM PST 24 |
110492546251 ps |
T567 |
/workspace/coverage/default/23.sram_ctrl_alert_test.3604771958 |
|
|
Feb 07 02:02:37 PM PST 24 |
Feb 07 02:02:42 PM PST 24 |
44235896 ps |
T568 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3519037946 |
|
|
Feb 07 02:00:38 PM PST 24 |
Feb 07 02:12:11 PM PST 24 |
54543367491 ps |
T569 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.711923428 |
|
|
Feb 07 02:09:23 PM PST 24 |
Feb 07 02:09:30 PM PST 24 |
1540942910 ps |
T570 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.442691307 |
|
|
Feb 07 02:03:36 PM PST 24 |
Feb 07 02:04:51 PM PST 24 |
1024063550 ps |
T571 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.2230467764 |
|
|
Feb 07 02:01:38 PM PST 24 |
Feb 07 02:02:09 PM PST 24 |
718444858 ps |
T572 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.1583075546 |
|
|
Feb 07 02:01:55 PM PST 24 |
Feb 07 02:10:28 PM PST 24 |
43809279854 ps |
T573 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1888575747 |
|
|
Feb 07 02:02:20 PM PST 24 |
Feb 07 02:48:00 PM PST 24 |
442194055 ps |
T574 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2138569128 |
|
|
Feb 07 02:09:02 PM PST 24 |
Feb 07 02:14:06 PM PST 24 |
8485360637 ps |
T575 |
/workspace/coverage/default/43.sram_ctrl_smoke.388439668 |
|
|
Feb 07 02:08:18 PM PST 24 |
Feb 07 02:08:34 PM PST 24 |
372205731 ps |
T576 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.2544803069 |
|
|
Feb 07 02:03:55 PM PST 24 |
Feb 07 02:04:27 PM PST 24 |
1374733348 ps |
T577 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3832341014 |
|
|
Feb 07 02:01:04 PM PST 24 |
Feb 07 02:25:30 PM PST 24 |
3577104327 ps |
T578 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3931877448 |
|
|
Feb 07 02:09:47 PM PST 24 |
Feb 07 02:23:05 PM PST 24 |
23568116448 ps |
T579 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.1855322956 |
|
|
Feb 07 02:07:59 PM PST 24 |
Feb 07 02:25:12 PM PST 24 |
7495857675 ps |
T580 |
/workspace/coverage/default/25.sram_ctrl_regwen.2237735101 |
|
|
Feb 07 02:03:18 PM PST 24 |
Feb 07 02:23:06 PM PST 24 |
8943881962 ps |
T581 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.206301703 |
|
|
Feb 07 02:08:11 PM PST 24 |
Feb 07 02:09:21 PM PST 24 |
8040938930 ps |
T582 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.3410842919 |
|
|
Feb 07 02:00:54 PM PST 24 |
Feb 07 02:01:10 PM PST 24 |
1343639968 ps |
T583 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.3963863051 |
|
|
Feb 07 02:01:56 PM PST 24 |
Feb 07 02:02:50 PM PST 24 |
1423501335 ps |
T584 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3277586834 |
|
|
Feb 07 02:07:57 PM PST 24 |
Feb 07 02:08:40 PM PST 24 |
2957086694 ps |
T585 |
/workspace/coverage/default/9.sram_ctrl_smoke.1379119182 |
|
|
Feb 07 02:01:05 PM PST 24 |
Feb 07 02:01:45 PM PST 24 |
1126353148 ps |
T586 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.331744286 |
|
|
Feb 07 02:00:33 PM PST 24 |
Feb 07 02:08:35 PM PST 24 |
79040975512 ps |
T587 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.4247123507 |
|
|
Feb 07 02:01:05 PM PST 24 |
Feb 07 02:02:26 PM PST 24 |
11842635283 ps |
T588 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.2970566770 |
|
|
Feb 07 02:04:04 PM PST 24 |
Feb 07 02:04:33 PM PST 24 |
701687410 ps |
T589 |
/workspace/coverage/default/34.sram_ctrl_alert_test.659931339 |
|
|
Feb 07 02:08:05 PM PST 24 |
Feb 07 02:08:08 PM PST 24 |
25364437 ps |
T590 |
/workspace/coverage/default/25.sram_ctrl_bijection.1540411874 |
|
|
Feb 07 02:03:19 PM PST 24 |
Feb 07 02:48:47 PM PST 24 |
167193947744 ps |
T591 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.2894899899 |
|
|
Feb 07 02:07:57 PM PST 24 |
Feb 07 02:10:10 PM PST 24 |
9544122880 ps |
T90 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.1208529451 |
|
|
Feb 07 02:07:57 PM PST 24 |
Feb 07 02:10:26 PM PST 24 |
23670771232 ps |
T592 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1572492367 |
|
|
Feb 07 02:01:14 PM PST 24 |
Feb 07 02:01:16 PM PST 24 |
19207510 ps |
T593 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.655253931 |
|
|
Feb 07 02:02:22 PM PST 24 |
Feb 07 02:08:31 PM PST 24 |
4793501581 ps |
T594 |
/workspace/coverage/default/16.sram_ctrl_partial_access.3932607074 |
|
|
Feb 07 02:01:37 PM PST 24 |
Feb 07 02:04:09 PM PST 24 |
3328282950 ps |
T595 |
/workspace/coverage/default/2.sram_ctrl_partial_access.4238314359 |
|
|
Feb 07 02:00:40 PM PST 24 |
Feb 07 02:01:01 PM PST 24 |
2154367650 ps |
T596 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1735371305 |
|
|
Feb 07 02:01:16 PM PST 24 |
Feb 07 02:57:46 PM PST 24 |
2830750000 ps |
T597 |
/workspace/coverage/default/0.sram_ctrl_partial_access.2535386003 |
|
|
Feb 07 02:00:51 PM PST 24 |
Feb 07 02:01:17 PM PST 24 |
547816966 ps |
T598 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.2912059922 |
|
|
Feb 07 02:04:07 PM PST 24 |
Feb 07 02:05:26 PM PST 24 |
2982616013 ps |
T599 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.2547430842 |
|
|
Feb 07 02:01:43 PM PST 24 |
Feb 07 02:06:38 PM PST 24 |
49233936657 ps |
T600 |
/workspace/coverage/default/43.sram_ctrl_executable.2268791501 |
|
|
Feb 07 02:08:29 PM PST 24 |
Feb 07 02:27:13 PM PST 24 |
21347866272 ps |
T601 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.702866135 |
|
|
Feb 07 02:01:31 PM PST 24 |
Feb 07 02:03:43 PM PST 24 |
14990131352 ps |
T602 |
/workspace/coverage/default/46.sram_ctrl_bijection.1079882570 |
|
|
Feb 07 02:08:59 PM PST 24 |
Feb 07 02:40:12 PM PST 24 |
117333908163 ps |
T603 |
/workspace/coverage/default/18.sram_ctrl_alert_test.3356372562 |
|
|
Feb 07 02:01:50 PM PST 24 |
Feb 07 02:01:51 PM PST 24 |
57127346 ps |
T604 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.372362568 |
|
|
Feb 07 02:08:27 PM PST 24 |
Feb 07 02:12:02 PM PST 24 |
20746299274 ps |
T605 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.1658311336 |
|
|
Feb 07 02:04:05 PM PST 24 |
Feb 07 02:10:01 PM PST 24 |
229647467923 ps |
T606 |
/workspace/coverage/default/31.sram_ctrl_executable.1869554305 |
|
|
Feb 07 02:08:02 PM PST 24 |
Feb 07 02:24:49 PM PST 24 |
58300307139 ps |
T607 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.3128296253 |
|
|
Feb 07 02:03:56 PM PST 24 |
Feb 07 02:15:43 PM PST 24 |
31731818193 ps |
T608 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.2245844050 |
|
|
Feb 07 02:01:36 PM PST 24 |
Feb 07 02:03:28 PM PST 24 |
20003386391 ps |
T609 |
/workspace/coverage/default/22.sram_ctrl_smoke.1449314086 |
|
|
Feb 07 02:02:24 PM PST 24 |
Feb 07 02:03:56 PM PST 24 |
3752040869 ps |
T610 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.756376834 |
|
|
Feb 07 02:03:38 PM PST 24 |
Feb 07 02:11:26 PM PST 24 |
14003206888 ps |
T611 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2337647156 |
|
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Feb 07 02:01:19 PM PST 24 |
Feb 07 03:07:35 PM PST 24 |
4552061253 ps |
T612 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.3169807367 |
|
|
Feb 07 02:07:59 PM PST 24 |
Feb 07 02:08:39 PM PST 24 |
706256814 ps |
T613 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.1806891433 |
|
|
Feb 07 02:02:15 PM PST 24 |
Feb 07 02:02:59 PM PST 24 |
685487777 ps |
T614 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.155381266 |
|
|
Feb 07 02:00:59 PM PST 24 |
Feb 07 02:07:06 PM PST 24 |
18153381645 ps |
T615 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.93350266 |
|
|
Feb 07 02:01:08 PM PST 24 |
Feb 07 02:21:07 PM PST 24 |
9642797674 ps |
T616 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.3973977702 |
|
|
Feb 07 02:01:47 PM PST 24 |
Feb 07 02:20:03 PM PST 24 |
9965627767 ps |
T617 |
/workspace/coverage/default/4.sram_ctrl_executable.3184750939 |
|
|
Feb 07 02:00:58 PM PST 24 |
Feb 07 02:13:44 PM PST 24 |
11581071987 ps |
T618 |
/workspace/coverage/default/40.sram_ctrl_partial_access.2302867489 |
|
|
Feb 07 02:08:18 PM PST 24 |
Feb 07 02:09:01 PM PST 24 |
956645496 ps |
T619 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.1046724359 |
|
|
Feb 07 02:08:23 PM PST 24 |
Feb 07 02:11:53 PM PST 24 |
32080339279 ps |
T620 |
/workspace/coverage/default/16.sram_ctrl_regwen.3243129450 |
|
|
Feb 07 02:01:40 PM PST 24 |
Feb 07 02:14:51 PM PST 24 |
26074495174 ps |
T621 |
/workspace/coverage/default/26.sram_ctrl_stress_all.2298860072 |
|
|
Feb 07 02:03:19 PM PST 24 |
Feb 07 02:59:14 PM PST 24 |
85872922559 ps |
T622 |
/workspace/coverage/default/11.sram_ctrl_regwen.3357624690 |
|
|
Feb 07 02:01:14 PM PST 24 |
Feb 07 02:20:57 PM PST 24 |
100833657339 ps |
T623 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.469177901 |
|
|
Feb 07 02:01:48 PM PST 24 |
Feb 07 02:09:20 PM PST 24 |
7724677510 ps |
T624 |
/workspace/coverage/default/47.sram_ctrl_bijection.3578298379 |
|
|
Feb 07 02:09:12 PM PST 24 |
Feb 07 02:21:06 PM PST 24 |
33800113472 ps |
T625 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.707510093 |
|
|
Feb 07 02:03:20 PM PST 24 |
Feb 07 02:05:26 PM PST 24 |
2700004742 ps |
T626 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.3126605932 |
|
|
Feb 07 02:08:36 PM PST 24 |
Feb 07 02:09:45 PM PST 24 |
1606670764 ps |
T627 |
/workspace/coverage/default/36.sram_ctrl_executable.2366530523 |
|
|
Feb 07 02:07:57 PM PST 24 |
Feb 07 02:19:25 PM PST 24 |
49008866247 ps |
T628 |
/workspace/coverage/default/31.sram_ctrl_alert_test.3024348784 |
|
|
Feb 07 02:07:58 PM PST 24 |
Feb 07 02:07:59 PM PST 24 |
42338144 ps |
T629 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.4071258815 |
|
|
Feb 07 02:02:47 PM PST 24 |
Feb 07 02:04:46 PM PST 24 |
4116217929 ps |
T630 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.209125885 |
|
|
Feb 07 02:01:25 PM PST 24 |
Feb 07 02:02:06 PM PST 24 |
3336362628 ps |
T631 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.177600622 |
|
|
Feb 07 02:09:28 PM PST 24 |
Feb 07 02:11:15 PM PST 24 |
1586214306 ps |
T632 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.2739182090 |
|
|
Feb 07 02:01:21 PM PST 24 |
Feb 07 02:04:19 PM PST 24 |
137733116939 ps |
T633 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2653697168 |
|
|
Feb 07 02:01:26 PM PST 24 |
Feb 07 02:05:48 PM PST 24 |
38058213539 ps |
T634 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.1763742518 |
|
|
Feb 07 02:03:56 PM PST 24 |
Feb 07 02:05:19 PM PST 24 |
43740938491 ps |
T635 |
/workspace/coverage/default/25.sram_ctrl_partial_access.2067494499 |
|
|
Feb 07 02:03:19 PM PST 24 |
Feb 07 02:03:46 PM PST 24 |
5060252336 ps |
T636 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2317006914 |
|
|
Feb 07 02:00:41 PM PST 24 |
Feb 07 02:34:52 PM PST 24 |
12346351724 ps |
T637 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3274657648 |
|
|
Feb 07 02:01:04 PM PST 24 |
Feb 07 02:18:03 PM PST 24 |
22983900013 ps |
T638 |
/workspace/coverage/default/38.sram_ctrl_alert_test.1650628899 |
|
|
Feb 07 02:08:11 PM PST 24 |
Feb 07 02:08:12 PM PST 24 |
15944966 ps |
T639 |
/workspace/coverage/default/11.sram_ctrl_executable.2592323043 |
|
|
Feb 07 02:01:21 PM PST 24 |
Feb 07 02:18:58 PM PST 24 |
37757448643 ps |
T640 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.2751630949 |
|
|
Feb 07 02:01:45 PM PST 24 |
Feb 07 02:03:13 PM PST 24 |
5590620325 ps |
T641 |
/workspace/coverage/default/0.sram_ctrl_smoke.2472286490 |
|
|
Feb 07 02:00:45 PM PST 24 |
Feb 07 02:01:08 PM PST 24 |
1016620046 ps |
T642 |
/workspace/coverage/default/6.sram_ctrl_executable.3459186082 |
|
|
Feb 07 02:01:05 PM PST 24 |
Feb 07 02:22:21 PM PST 24 |
119775859890 ps |
T643 |
/workspace/coverage/default/37.sram_ctrl_smoke.639646831 |
|
|
Feb 07 02:08:13 PM PST 24 |
Feb 07 02:10:35 PM PST 24 |
3715186990 ps |
T644 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.1389509945 |
|
|
Feb 07 02:02:21 PM PST 24 |
Feb 07 02:06:36 PM PST 24 |
7468898628 ps |
T645 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.3480211228 |
|
|
Feb 07 02:07:59 PM PST 24 |
Feb 07 03:28:16 PM PST 24 |
538825213 ps |
T646 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.615232361 |
|
|
Feb 07 02:01:03 PM PST 24 |
Feb 07 02:02:10 PM PST 24 |
763414470 ps |
T647 |
/workspace/coverage/default/26.sram_ctrl_alert_test.3408482236 |
|
|
Feb 07 02:03:19 PM PST 24 |
Feb 07 02:03:22 PM PST 24 |
45089630 ps |
T648 |
/workspace/coverage/default/5.sram_ctrl_smoke.2623485010 |
|
|
Feb 07 02:01:01 PM PST 24 |
Feb 07 02:01:30 PM PST 24 |
9607033660 ps |
T649 |
/workspace/coverage/default/9.sram_ctrl_stress_all.3119022598 |
|
|
Feb 07 02:01:20 PM PST 24 |
Feb 07 02:42:40 PM PST 24 |
327746882258 ps |
T650 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.1553183691 |
|
|
Feb 07 02:09:28 PM PST 24 |
Feb 07 02:13:35 PM PST 24 |
15761567173 ps |
T651 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.2454654612 |
|
|
Feb 07 02:01:38 PM PST 24 |
Feb 07 02:14:27 PM PST 24 |
10463754379 ps |
T652 |
/workspace/coverage/default/26.sram_ctrl_executable.799015905 |
|
|
Feb 07 02:03:19 PM PST 24 |
Feb 07 02:30:25 PM PST 24 |
43303699100 ps |
T653 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.3743359075 |
|
|
Feb 07 02:03:19 PM PST 24 |
Feb 07 03:23:20 PM PST 24 |
2547110552 ps |
T654 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1791252519 |
|
|
Feb 07 02:09:06 PM PST 24 |
Feb 07 02:09:39 PM PST 24 |
2756190086 ps |
T655 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.3254584717 |
|
|
Feb 07 02:01:30 PM PST 24 |
Feb 07 02:02:00 PM PST 24 |
689449920 ps |
T656 |
/workspace/coverage/default/15.sram_ctrl_partial_access.1857600230 |
|
|
Feb 07 02:01:39 PM PST 24 |
Feb 07 02:01:53 PM PST 24 |
2004774181 ps |
T657 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.1139876041 |
|
|
Feb 07 02:08:02 PM PST 24 |
Feb 07 02:10:28 PM PST 24 |
1550810225 ps |
T658 |
/workspace/coverage/default/36.sram_ctrl_partial_access.3597674748 |
|
|
Feb 07 02:07:57 PM PST 24 |
Feb 07 02:10:15 PM PST 24 |
1337073060 ps |
T659 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.771225281 |
|
|
Feb 07 02:08:01 PM PST 24 |
Feb 07 02:13:05 PM PST 24 |
14900862015 ps |
T660 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.2662420210 |
|
|
Feb 07 02:01:30 PM PST 24 |
Feb 07 02:05:12 PM PST 24 |
4269166471 ps |
T661 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2827309110 |
|
|
Feb 07 02:01:11 PM PST 24 |
Feb 07 02:03:20 PM PST 24 |
1648246592 ps |
T662 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.525170940 |
|
|
Feb 07 02:08:40 PM PST 24 |
Feb 07 02:08:47 PM PST 24 |
360279591 ps |
T663 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.88806109 |
|
|
Feb 07 02:07:59 PM PST 24 |
Feb 07 02:42:51 PM PST 24 |
1121664098 ps |
T664 |
/workspace/coverage/default/49.sram_ctrl_bijection.3373416794 |
|
|
Feb 07 02:09:37 PM PST 24 |
Feb 07 02:54:05 PM PST 24 |
424866902665 ps |
T665 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.3141386333 |
|
|
Feb 07 02:08:18 PM PST 24 |
Feb 07 02:10:38 PM PST 24 |
22955352749 ps |
T666 |
/workspace/coverage/default/11.sram_ctrl_bijection.569639969 |
|
|
Feb 07 02:01:21 PM PST 24 |
Feb 07 02:18:17 PM PST 24 |
56285674052 ps |
T667 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3292421791 |
|
|
Feb 07 02:01:02 PM PST 24 |
Feb 07 02:05:56 PM PST 24 |
8852534899 ps |
T668 |
/workspace/coverage/default/13.sram_ctrl_bijection.1713109042 |
|
|
Feb 07 02:01:35 PM PST 24 |
Feb 07 02:41:32 PM PST 24 |
158050846953 ps |
T669 |
/workspace/coverage/default/30.sram_ctrl_mem_walk.3109705830 |
|
|
Feb 07 02:07:57 PM PST 24 |
Feb 07 02:12:50 PM PST 24 |
28663670916 ps |
T670 |
/workspace/coverage/default/31.sram_ctrl_bijection.2061416786 |
|
|
Feb 07 02:08:01 PM PST 24 |
Feb 07 02:40:59 PM PST 24 |
364864160890 ps |
T671 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1536274938 |
|
|
Feb 07 02:09:01 PM PST 24 |
Feb 07 02:39:37 PM PST 24 |
27872366717 ps |
T672 |
/workspace/coverage/default/25.sram_ctrl_alert_test.2255185498 |
|
|
Feb 07 02:03:20 PM PST 24 |
Feb 07 02:03:23 PM PST 24 |
15861334 ps |
T673 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.2310222773 |
|
|
Feb 07 02:01:31 PM PST 24 |
Feb 07 02:03:18 PM PST 24 |
18919766758 ps |
T674 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.3422695084 |
|
|
Feb 07 02:08:14 PM PST 24 |
Feb 07 02:30:24 PM PST 24 |
6925269799 ps |
T675 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.3046630822 |
|
|
Feb 07 02:07:59 PM PST 24 |
Feb 07 02:11:42 PM PST 24 |
9852010674 ps |
T676 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.1248983097 |
|
|
Feb 07 02:08:18 PM PST 24 |
Feb 07 02:34:23 PM PST 24 |
16925539630 ps |
T677 |
/workspace/coverage/default/46.sram_ctrl_smoke.2683415154 |
|
|
Feb 07 02:09:00 PM PST 24 |
Feb 07 02:09:23 PM PST 24 |
7080158291 ps |
T678 |
/workspace/coverage/default/48.sram_ctrl_regwen.336267733 |
|
|
Feb 07 02:09:34 PM PST 24 |
Feb 07 02:19:49 PM PST 24 |
43713787747 ps |
T679 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.366793273 |
|
|
Feb 07 02:01:56 PM PST 24 |
Feb 07 02:03:08 PM PST 24 |
1889844124 ps |
T680 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.401647202 |
|
|
Feb 07 02:04:05 PM PST 24 |
Feb 07 02:05:40 PM PST 24 |
60650980989 ps |
T681 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.1662188828 |
|
|
Feb 07 02:02:48 PM PST 24 |
Feb 07 02:02:54 PM PST 24 |
689467732 ps |
T682 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1146854068 |
|
|
Feb 07 02:01:19 PM PST 24 |
Feb 07 02:01:33 PM PST 24 |
774979313 ps |
T683 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.52351469 |
|
|
Feb 07 02:01:07 PM PST 24 |
Feb 07 02:03:18 PM PST 24 |
1917830129 ps |
T684 |
/workspace/coverage/default/49.sram_ctrl_smoke.2103440854 |
|
|
Feb 07 02:09:40 PM PST 24 |
Feb 07 02:10:35 PM PST 24 |
1050094156 ps |
T685 |
/workspace/coverage/default/32.sram_ctrl_partial_access.346369658 |
|
|
Feb 07 02:08:03 PM PST 24 |
Feb 07 02:08:20 PM PST 24 |
727260424 ps |
T686 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2555721752 |
|
|
Feb 07 02:00:47 PM PST 24 |
Feb 07 02:01:08 PM PST 24 |
1409717538 ps |
T687 |
/workspace/coverage/default/42.sram_ctrl_multiple_keys.930823022 |
|
|
Feb 07 02:08:16 PM PST 24 |
Feb 07 02:23:45 PM PST 24 |
12288376861 ps |
T688 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.881964541 |
|
|
Feb 07 02:03:56 PM PST 24 |
Feb 07 02:08:23 PM PST 24 |
28113458499 ps |
T689 |
/workspace/coverage/default/4.sram_ctrl_smoke.2306259605 |
|
|
Feb 07 02:00:55 PM PST 24 |
Feb 07 02:01:33 PM PST 24 |
3397774309 ps |
T690 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.228758554 |
|
|
Feb 07 02:08:12 PM PST 24 |
Feb 07 02:09:56 PM PST 24 |
3045737650 ps |
T691 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2045408493 |
|
|
Feb 07 02:01:19 PM PST 24 |
Feb 07 02:05:19 PM PST 24 |
39991976534 ps |
T692 |
/workspace/coverage/default/48.sram_ctrl_bijection.1079461050 |
|
|
Feb 07 02:09:29 PM PST 24 |
Feb 07 02:23:26 PM PST 24 |
12181089683 ps |
T693 |
/workspace/coverage/default/12.sram_ctrl_partial_access.1098184986 |
|
|
Feb 07 02:01:22 PM PST 24 |
Feb 07 02:02:18 PM PST 24 |
8089230409 ps |
T694 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.1904869849 |
|
|
Feb 07 02:04:04 PM PST 24 |
Feb 07 02:54:59 PM PST 24 |
12490315818 ps |
T695 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.681000031 |
|
|
Feb 07 02:07:59 PM PST 24 |
Feb 07 02:08:05 PM PST 24 |
349640002 ps |
T696 |
/workspace/coverage/default/35.sram_ctrl_regwen.2716633657 |
|
|
Feb 07 02:08:01 PM PST 24 |
Feb 07 02:20:37 PM PST 24 |
15972137629 ps |
T697 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.194290117 |
|
|
Feb 07 02:08:49 PM PST 24 |
Feb 07 02:10:29 PM PST 24 |
10303116850 ps |
T698 |
/workspace/coverage/default/16.sram_ctrl_executable.1950040513 |
|
|
Feb 07 02:01:40 PM PST 24 |
Feb 07 02:02:46 PM PST 24 |
3069988551 ps |
T699 |
/workspace/coverage/default/33.sram_ctrl_partial_access.1939198308 |
|
|
Feb 07 02:07:57 PM PST 24 |
Feb 07 02:09:51 PM PST 24 |
3845376263 ps |
T700 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.3186084821 |
|
|
Feb 07 02:08:21 PM PST 24 |
Feb 07 02:10:54 PM PST 24 |
2097730917 ps |
T701 |
/workspace/coverage/default/21.sram_ctrl_smoke.2667062518 |
|
|
Feb 07 02:02:22 PM PST 24 |
Feb 07 02:02:57 PM PST 24 |
2694517808 ps |
T702 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.585500218 |
|
|
Feb 07 02:02:12 PM PST 24 |
Feb 07 02:07:39 PM PST 24 |
42111838464 ps |
T703 |
/workspace/coverage/default/37.sram_ctrl_access_during_key_req.306694930 |
|
|
Feb 07 02:08:12 PM PST 24 |
Feb 07 02:40:31 PM PST 24 |
53724257665 ps |
T704 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.3660536558 |
|
|
Feb 07 02:00:41 PM PST 24 |
Feb 07 02:01:26 PM PST 24 |
1499329688 ps |
T705 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3836305445 |
|
|
Feb 07 02:01:15 PM PST 24 |
Feb 07 02:08:20 PM PST 24 |
16212840023 ps |
T706 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.1900578617 |
|
|
Feb 07 02:08:13 PM PST 24 |
Feb 07 02:10:17 PM PST 24 |
2060956631 ps |
T707 |
/workspace/coverage/default/38.sram_ctrl_partial_access.1163177152 |
|
|
Feb 07 02:08:11 PM PST 24 |
Feb 07 02:08:26 PM PST 24 |
464153381 ps |
T708 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.4094654094 |
|
|
Feb 07 02:01:46 PM PST 24 |
Feb 07 02:01:59 PM PST 24 |
349072922 ps |
T709 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.1825574219 |
|
|
Feb 07 02:01:41 PM PST 24 |
Feb 07 02:06:27 PM PST 24 |
8941249231 ps |
T710 |
/workspace/coverage/default/11.sram_ctrl_stress_all.2952031163 |
|
|
Feb 07 02:01:19 PM PST 24 |
Feb 07 02:42:50 PM PST 24 |
90126934301 ps |
T711 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.2632373651 |
|
|
Feb 07 02:01:21 PM PST 24 |
Feb 07 02:04:10 PM PST 24 |
1421292421 ps |
T712 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.897744186 |
|
|
Feb 07 02:07:57 PM PST 24 |
Feb 07 02:32:53 PM PST 24 |
8358935311 ps |
T713 |
/workspace/coverage/default/2.sram_ctrl_smoke.265688951 |
|
|
Feb 07 02:00:45 PM PST 24 |
Feb 07 02:01:00 PM PST 24 |
716900754 ps |
T714 |
/workspace/coverage/default/10.sram_ctrl_smoke.3476475730 |
|
|
Feb 07 02:01:22 PM PST 24 |
Feb 07 02:01:39 PM PST 24 |
3594187275 ps |
T715 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.807556312 |
|
|
Feb 07 02:02:22 PM PST 24 |
Feb 07 02:16:49 PM PST 24 |
15733348921 ps |
T716 |
/workspace/coverage/default/32.sram_ctrl_alert_test.4005276350 |
|
|
Feb 07 02:07:57 PM PST 24 |
Feb 07 02:07:59 PM PST 24 |
16159064 ps |
T717 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.1954928322 |
|
|
Feb 07 02:08:21 PM PST 24 |
Feb 07 02:23:24 PM PST 24 |
14663575674 ps |
T718 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.4179312941 |
|
|
Feb 07 02:01:04 PM PST 24 |
Feb 07 02:03:32 PM PST 24 |
14068487569 ps |
T719 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2064519299 |
|
|
Feb 07 02:00:37 PM PST 24 |
Feb 07 02:06:04 PM PST 24 |
18803654151 ps |
T720 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.3937828635 |
|
|
Feb 07 02:08:17 PM PST 24 |
Feb 07 02:08:32 PM PST 24 |
347180892 ps |
T721 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.3228356886 |
|
|
Feb 07 02:01:22 PM PST 24 |
Feb 07 02:03:09 PM PST 24 |
1517975869 ps |
T722 |
/workspace/coverage/default/40.sram_ctrl_smoke.1922154470 |
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Feb 07 02:08:19 PM PST 24 |
Feb 07 02:08:27 PM PST 24 |
404758654 ps |
T723 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.720629979 |
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Feb 07 02:00:56 PM PST 24 |
Feb 07 02:03:30 PM PST 24 |
21916420273 ps |
T724 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2649665628 |
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Feb 07 02:08:01 PM PST 24 |
Feb 07 02:09:44 PM PST 24 |
3434190973 ps |
T725 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1211550298 |
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|
Feb 07 02:01:05 PM PST 24 |
Feb 07 02:01:12 PM PST 24 |
353494980 ps |
T726 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.1159801471 |
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|
Feb 07 02:02:41 PM PST 24 |
Feb 07 02:03:15 PM PST 24 |
11312290008 ps |
T727 |
/workspace/coverage/default/43.sram_ctrl_regwen.3816558175 |
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Feb 07 02:08:27 PM PST 24 |
Feb 07 02:23:36 PM PST 24 |
14025132232 ps |
T728 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2830771208 |
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Feb 07 02:09:01 PM PST 24 |
Feb 07 03:47:10 PM PST 24 |
6461179201 ps |
T729 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.40347114 |
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|
Feb 07 02:01:31 PM PST 24 |
Feb 07 02:01:37 PM PST 24 |
365201099 ps |
T730 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1298706504 |
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Feb 07 02:01:10 PM PST 24 |
Feb 07 02:01:17 PM PST 24 |
726904020 ps |
T731 |
/workspace/coverage/default/48.sram_ctrl_alert_test.3098697736 |
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Feb 07 02:09:30 PM PST 24 |
Feb 07 02:09:36 PM PST 24 |
47405047 ps |
T732 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.1872942893 |
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Feb 07 02:08:25 PM PST 24 |
Feb 07 02:09:35 PM PST 24 |
1657716656 ps |
T733 |
/workspace/coverage/default/47.sram_ctrl_stress_all.2932807420 |
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|
Feb 07 02:09:23 PM PST 24 |
Feb 07 02:27:45 PM PST 24 |
105082005734 ps |
T734 |
/workspace/coverage/default/30.sram_ctrl_regwen.332570312 |
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|
Feb 07 02:07:59 PM PST 24 |
Feb 07 02:27:11 PM PST 24 |
51256672673 ps |
T735 |
/workspace/coverage/default/8.sram_ctrl_regwen.2533799827 |
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|
Feb 07 02:01:14 PM PST 24 |
Feb 07 02:09:22 PM PST 24 |
11763147815 ps |
T736 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.72982529 |
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|
Feb 07 02:01:00 PM PST 24 |
Feb 07 02:03:38 PM PST 24 |
8661091817 ps |
T737 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.2149411416 |
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|
Feb 07 02:01:02 PM PST 24 |
Feb 07 02:05:11 PM PST 24 |
9614366236 ps |
T738 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.3439823033 |
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Feb 07 02:01:35 PM PST 24 |
Feb 07 02:34:14 PM PST 24 |
36995978705 ps |
T739 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.3048044393 |
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Feb 07 02:04:05 PM PST 24 |
Feb 07 02:04:11 PM PST 24 |
4783993809 ps |
T740 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.4015230712 |
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Feb 07 02:03:19 PM PST 24 |
Feb 07 02:04:47 PM PST 24 |
17791702381 ps |
T741 |
/workspace/coverage/default/13.sram_ctrl_smoke.3312355091 |
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Feb 07 02:01:38 PM PST 24 |
Feb 07 02:01:55 PM PST 24 |
3293691120 ps |
T742 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3715199585 |
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Feb 07 02:00:40 PM PST 24 |
Feb 07 02:02:06 PM PST 24 |
29409917262 ps |
T743 |
/workspace/coverage/default/3.sram_ctrl_regwen.1617277499 |
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|
Feb 07 02:00:56 PM PST 24 |
Feb 07 02:03:14 PM PST 24 |
3200631256 ps |
T744 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.2453975097 |
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|
Feb 07 02:02:40 PM PST 24 |
Feb 07 02:07:40 PM PST 24 |
11549186680 ps |
T745 |
/workspace/coverage/default/34.sram_ctrl_executable.2926320669 |
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Feb 07 02:07:59 PM PST 24 |
Feb 07 02:10:01 PM PST 24 |
7210362979 ps |
T746 |
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.3473220347 |
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Feb 07 02:07:58 PM PST 24 |
Feb 07 02:09:24 PM PST 24 |
21269551047 ps |
T747 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.4211981118 |
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|
Feb 07 02:01:04 PM PST 24 |
Feb 07 02:03:32 PM PST 24 |
18276968147 ps |
T748 |
/workspace/coverage/default/2.sram_ctrl_alert_test.423915752 |
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Feb 07 02:00:44 PM PST 24 |
Feb 07 02:00:47 PM PST 24 |
18047998 ps |
T749 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.479800688 |
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Feb 07 02:00:50 PM PST 24 |
Feb 07 02:03:34 PM PST 24 |
4465938725 ps |
T750 |
/workspace/coverage/default/15.sram_ctrl_bijection.4267475866 |
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Feb 07 02:01:30 PM PST 24 |
Feb 07 02:17:25 PM PST 24 |
14032680524 ps |