Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.52 100.00 98.32 100.00 100.00 99.72 99.70 98.89


Total tests in report: 961
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
84.24 84.24 96.92 96.92 80.11 80.11 90.09 90.09 71.43 71.43 90.14 90.14 95.10 95.10 65.86 65.86 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.1815915232
90.92 6.69 98.23 1.31 84.59 4.48 90.52 0.43 100.00 28.57 93.80 3.66 95.10 0.00 74.21 8.35 /workspace/coverage/default/37.sram_ctrl_stress_all.1979444356
95.18 4.26 99.25 1.03 90.76 6.16 96.45 5.93 100.00 0.00 95.77 1.97 96.43 1.34 87.57 13.36 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.853269534
97.15 1.97 99.72 0.47 94.68 3.92 97.09 0.64 100.00 0.00 98.59 2.82 96.43 0.00 93.51 5.94 /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3031637968
97.79 0.65 99.91 0.19 96.78 2.10 97.51 0.43 100.00 0.00 99.44 0.85 97.03 0.59 93.88 0.37 /workspace/coverage/default/3.sram_ctrl_sec_cm.265424876
98.30 0.51 99.91 0.00 96.92 0.14 99.22 1.70 100.00 0.00 99.44 0.00 97.47 0.45 95.18 1.30 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2974564589
98.61 0.31 99.91 0.00 97.06 0.14 99.22 0.00 100.00 0.00 99.44 0.00 98.37 0.89 96.29 1.11 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.456857315
98.78 0.17 99.91 0.00 97.06 0.00 99.22 0.00 100.00 0.00 99.44 0.00 99.55 1.19 96.29 0.00 /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1675017177
98.94 0.16 100.00 0.09 97.06 0.00 99.93 0.71 100.00 0.00 99.72 0.28 99.55 0.00 96.29 0.00 /workspace/coverage/default/25.sram_ctrl_ram_cfg.3036908170
99.04 0.11 100.00 0.00 97.06 0.00 99.93 0.00 100.00 0.00 99.72 0.00 99.55 0.00 97.03 0.74 /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2774710718
99.15 0.11 100.00 0.00 97.06 0.00 99.93 0.00 100.00 0.00 99.72 0.00 99.55 0.00 97.77 0.74 /workspace/coverage/default/40.sram_ctrl_stress_all.320972141
99.23 0.08 100.00 0.00 97.62 0.56 99.93 0.00 100.00 0.00 99.72 0.00 99.55 0.00 97.77 0.00 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.3135719721
99.28 0.06 100.00 0.00 97.76 0.14 100.00 0.07 100.00 0.00 99.72 0.00 99.55 0.00 97.96 0.19 /workspace/coverage/default/15.sram_ctrl_regwen.1018770960
99.34 0.05 100.00 0.00 97.76 0.00 100.00 0.00 100.00 0.00 99.72 0.00 99.55 0.00 98.33 0.37 /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1381621300
99.38 0.04 100.00 0.00 98.04 0.28 100.00 0.00 100.00 0.00 99.72 0.00 99.55 0.00 98.33 0.00 /workspace/coverage/default/13.sram_ctrl_alert_test.3499730548
99.40 0.03 100.00 0.00 98.04 0.00 100.00 0.00 100.00 0.00 99.72 0.00 99.55 0.00 98.52 0.19 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1145957817
99.43 0.03 100.00 0.00 98.04 0.00 100.00 0.00 100.00 0.00 99.72 0.00 99.55 0.00 98.70 0.19 /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3140202190
99.46 0.03 100.00 0.00 98.04 0.00 100.00 0.00 100.00 0.00 99.72 0.00 99.55 0.00 98.89 0.19 /workspace/coverage/default/0.sram_ctrl_lc_escalation.1509042683
99.48 0.02 100.00 0.00 98.04 0.00 100.00 0.00 100.00 0.00 99.72 0.00 99.70 0.15 98.89 0.00 /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3201074304

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1815372032
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1319359797
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.4072525501
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.736885611
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.734174206
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3991412925
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2199770152
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.891347683
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.575328401
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1662206242
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2527447794
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3474782344
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.30366576
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.130803134
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1935949240
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3727871497
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1969749622
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3533438936
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.916896454
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2112534699
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2827846902
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2597578914
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1355966131
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3261605560
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.270024946
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3929425871
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.2911579267
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3390942403
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2484238330
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.776165677
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1701098540
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.293563665
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1833735362
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1536524276
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1975362846
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.520776706
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2291073093
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3079543896
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.4242730376
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.4243945690
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3271651471
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.4144134613
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3128137776
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3815728519
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1198164150
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.338490801
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2469597783
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1040656189
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1011353769
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1895022655
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2771348263
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2214038289
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3506841849
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2544121979
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2204202615
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1252434918
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.856140662
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.4204350515
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1985860148
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.4183249596
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.945161490
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1152050919
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3329648959
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3816398962
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2146585816
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1759092131
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.701000700
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3003652239
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3504421496
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3840605029
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1394059070
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3767520957
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.482657251
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3210238329
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3916994936
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1706165984
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1929907635
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3485632937
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2052586781
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.4224139057
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3256018995
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2423545795
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3577783068
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3530499544
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2292155819
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2543852641
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3327011268
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1872656069
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.903747379
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.155024316
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3506262069
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.536260281
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.616996605
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1380827970
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.3618009579
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1571583048
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3958442105
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3109017819
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.830582611
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.4246355919
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2334826012
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.301718146
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.538078480
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3063797838
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1132168657
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2856476016
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.664036958
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3705675217
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3519037946
/workspace/coverage/default/0.sram_ctrl_alert_test.2666340099
/workspace/coverage/default/0.sram_ctrl_bijection.1110699467
/workspace/coverage/default/0.sram_ctrl_max_throughput.987335068
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3715199585
/workspace/coverage/default/0.sram_ctrl_mem_walk.3385390938
/workspace/coverage/default/0.sram_ctrl_multiple_keys.6630777
/workspace/coverage/default/0.sram_ctrl_partial_access.2535386003
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.464824561
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2555721752
/workspace/coverage/default/0.sram_ctrl_regwen.3217182580
/workspace/coverage/default/0.sram_ctrl_sec_cm.2885270189
/workspace/coverage/default/0.sram_ctrl_smoke.2472286490
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.4174944535
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3489553071
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4149713126
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2317006914
/workspace/coverage/default/1.sram_ctrl_alert_test.773877011
/workspace/coverage/default/1.sram_ctrl_bijection.2101995778
/workspace/coverage/default/1.sram_ctrl_lc_escalation.435277362
/workspace/coverage/default/1.sram_ctrl_max_throughput.3660536558
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2518030422
/workspace/coverage/default/1.sram_ctrl_mem_walk.78854118
/workspace/coverage/default/1.sram_ctrl_multiple_keys.2185735620
/workspace/coverage/default/1.sram_ctrl_partial_access.3692563544
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.331744286
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1854823574
/workspace/coverage/default/1.sram_ctrl_regwen.3043533149
/workspace/coverage/default/1.sram_ctrl_sec_cm.1209546101
/workspace/coverage/default/1.sram_ctrl_smoke.1538517432
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2533323009
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2064519299
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1887069167
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.92039458
/workspace/coverage/default/10.sram_ctrl_alert_test.3036856844
/workspace/coverage/default/10.sram_ctrl_bijection.561229712
/workspace/coverage/default/10.sram_ctrl_executable.1354653592
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1342471182
/workspace/coverage/default/10.sram_ctrl_max_throughput.1751672599
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1611276121
/workspace/coverage/default/10.sram_ctrl_mem_walk.3386390620
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2901583980
/workspace/coverage/default/10.sram_ctrl_partial_access.2440341538
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2045408493
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1146854068
/workspace/coverage/default/10.sram_ctrl_regwen.1654325955
/workspace/coverage/default/10.sram_ctrl_smoke.3476475730
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2337647156
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1922796503
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3559606007
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3328551767
/workspace/coverage/default/11.sram_ctrl_alert_test.3681741118
/workspace/coverage/default/11.sram_ctrl_bijection.569639969
/workspace/coverage/default/11.sram_ctrl_executable.2592323043
/workspace/coverage/default/11.sram_ctrl_lc_escalation.392785011
/workspace/coverage/default/11.sram_ctrl_max_throughput.1621819343
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3305653893
/workspace/coverage/default/11.sram_ctrl_mem_walk.2458641436
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3699248135
/workspace/coverage/default/11.sram_ctrl_partial_access.1607612823
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2653697168
/workspace/coverage/default/11.sram_ctrl_ram_cfg.879238139
/workspace/coverage/default/11.sram_ctrl_regwen.3357624690
/workspace/coverage/default/11.sram_ctrl_smoke.4221065299
/workspace/coverage/default/11.sram_ctrl_stress_all.2952031163
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.1989182735
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.3730092987
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3365456147
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1842711741
/workspace/coverage/default/12.sram_ctrl_alert_test.3051945657
/workspace/coverage/default/12.sram_ctrl_bijection.717536911
/workspace/coverage/default/12.sram_ctrl_lc_escalation.209125885
/workspace/coverage/default/12.sram_ctrl_max_throughput.3228356886
/workspace/coverage/default/12.sram_ctrl_mem_walk.3722984868
/workspace/coverage/default/12.sram_ctrl_multiple_keys.316657512
/workspace/coverage/default/12.sram_ctrl_partial_access.1098184986
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3902777583
/workspace/coverage/default/12.sram_ctrl_ram_cfg.3522647697
/workspace/coverage/default/12.sram_ctrl_regwen.513002377
/workspace/coverage/default/12.sram_ctrl_smoke.2085050342
/workspace/coverage/default/12.sram_ctrl_stress_all.2456011580
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2580245403
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3836305445
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.648710
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.993946078
/workspace/coverage/default/13.sram_ctrl_bijection.1713109042
/workspace/coverage/default/13.sram_ctrl_lc_escalation.3844332471
/workspace/coverage/default/13.sram_ctrl_max_throughput.2230467764
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.1265197573
/workspace/coverage/default/13.sram_ctrl_mem_walk.1510395335
/workspace/coverage/default/13.sram_ctrl_multiple_keys.3960348505
/workspace/coverage/default/13.sram_ctrl_partial_access.2611602977
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3041734599
/workspace/coverage/default/13.sram_ctrl_ram_cfg.1601420968
/workspace/coverage/default/13.sram_ctrl_regwen.1870842658
/workspace/coverage/default/13.sram_ctrl_smoke.3312355091
/workspace/coverage/default/13.sram_ctrl_stress_all.2500777161
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.2218539076
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.2662681397
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.3254584717
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.3439823033
/workspace/coverage/default/14.sram_ctrl_alert_test.581154999
/workspace/coverage/default/14.sram_ctrl_bijection.2338716413
/workspace/coverage/default/14.sram_ctrl_executable.1717055511
/workspace/coverage/default/14.sram_ctrl_max_throughput.702866135
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2141647843
/workspace/coverage/default/14.sram_ctrl_mem_walk.2996093919
/workspace/coverage/default/14.sram_ctrl_multiple_keys.2662420210
/workspace/coverage/default/14.sram_ctrl_partial_access.3745978353
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.4033452160
/workspace/coverage/default/14.sram_ctrl_ram_cfg.40347114
/workspace/coverage/default/14.sram_ctrl_regwen.26321946
/workspace/coverage/default/14.sram_ctrl_smoke.1020367260
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.1898260778
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.2116577323
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1773490770
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.2964727144
/workspace/coverage/default/15.sram_ctrl_alert_test.3219345108
/workspace/coverage/default/15.sram_ctrl_bijection.4267475866
/workspace/coverage/default/15.sram_ctrl_lc_escalation.2310222773
/workspace/coverage/default/15.sram_ctrl_max_throughput.2328932174
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.2248500249
/workspace/coverage/default/15.sram_ctrl_mem_walk.394359357
/workspace/coverage/default/15.sram_ctrl_multiple_keys.2454654612
/workspace/coverage/default/15.sram_ctrl_partial_access.1857600230
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.809100085
/workspace/coverage/default/15.sram_ctrl_ram_cfg.3760416681
/workspace/coverage/default/15.sram_ctrl_smoke.3826316753
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3354119266
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.411764679
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.4066587784
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.1360882352
/workspace/coverage/default/16.sram_ctrl_alert_test.3208981633
/workspace/coverage/default/16.sram_ctrl_bijection.1729791184
/workspace/coverage/default/16.sram_ctrl_executable.1950040513
/workspace/coverage/default/16.sram_ctrl_lc_escalation.2245844050
/workspace/coverage/default/16.sram_ctrl_max_throughput.1574510796
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.1140986247
/workspace/coverage/default/16.sram_ctrl_mem_walk.2547430842
/workspace/coverage/default/16.sram_ctrl_multiple_keys.3363309151
/workspace/coverage/default/16.sram_ctrl_partial_access.3932607074
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2508104480
/workspace/coverage/default/16.sram_ctrl_ram_cfg.3542443816
/workspace/coverage/default/16.sram_ctrl_regwen.3243129450
/workspace/coverage/default/16.sram_ctrl_smoke.2073666513
/workspace/coverage/default/16.sram_ctrl_stress_all.4174148937
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2244120902
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.1825574219
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.671366043
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.1408958796
/workspace/coverage/default/17.sram_ctrl_alert_test.810163208
/workspace/coverage/default/17.sram_ctrl_bijection.2572208634
/workspace/coverage/default/17.sram_ctrl_lc_escalation.3075047984
/workspace/coverage/default/17.sram_ctrl_max_throughput.82158172
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.938363905
/workspace/coverage/default/17.sram_ctrl_mem_walk.3231428222
/workspace/coverage/default/17.sram_ctrl_multiple_keys.4035155525
/workspace/coverage/default/17.sram_ctrl_partial_access.1602522523
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.2131544702
/workspace/coverage/default/17.sram_ctrl_ram_cfg.4094654094
/workspace/coverage/default/17.sram_ctrl_regwen.2735862167
/workspace/coverage/default/17.sram_ctrl_smoke.1261279414
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.4008514566
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.2529742244
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1290735348
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.1768731477
/workspace/coverage/default/18.sram_ctrl_alert_test.3356372562
/workspace/coverage/default/18.sram_ctrl_bijection.4122337861
/workspace/coverage/default/18.sram_ctrl_executable.398212692
/workspace/coverage/default/18.sram_ctrl_lc_escalation.2751630949
/workspace/coverage/default/18.sram_ctrl_max_throughput.3875014151
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.1991100244
/workspace/coverage/default/18.sram_ctrl_mem_walk.3847215579
/workspace/coverage/default/18.sram_ctrl_multiple_keys.2658013356
/workspace/coverage/default/18.sram_ctrl_partial_access.2969526293
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.622007710
/workspace/coverage/default/18.sram_ctrl_ram_cfg.4249309638
/workspace/coverage/default/18.sram_ctrl_regwen.1655450676
/workspace/coverage/default/18.sram_ctrl_smoke.663313659
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.469177901
/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.2069315127
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.3435477443
/workspace/coverage/default/19.sram_ctrl_alert_test.3069853886
/workspace/coverage/default/19.sram_ctrl_bijection.3868301206
/workspace/coverage/default/19.sram_ctrl_max_throughput.3963863051
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.366793273
/workspace/coverage/default/19.sram_ctrl_mem_walk.183106782
/workspace/coverage/default/19.sram_ctrl_multiple_keys.3973977702
/workspace/coverage/default/19.sram_ctrl_partial_access.413403380
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.1583075546
/workspace/coverage/default/19.sram_ctrl_ram_cfg.1682468749
/workspace/coverage/default/19.sram_ctrl_regwen.2509557298
/workspace/coverage/default/19.sram_ctrl_smoke.537191069
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.3979943333
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.1245876639
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.567976526
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.2321552766
/workspace/coverage/default/2.sram_ctrl_alert_test.423915752
/workspace/coverage/default/2.sram_ctrl_bijection.2136782193
/workspace/coverage/default/2.sram_ctrl_lc_escalation.1008209479
/workspace/coverage/default/2.sram_ctrl_max_throughput.1352899418
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.1247414094
/workspace/coverage/default/2.sram_ctrl_mem_walk.665804781
/workspace/coverage/default/2.sram_ctrl_multiple_keys.1717955028
/workspace/coverage/default/2.sram_ctrl_partial_access.4238314359
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.37698747
/workspace/coverage/default/2.sram_ctrl_ram_cfg.2488144606
/workspace/coverage/default/2.sram_ctrl_regwen.3230811353
/workspace/coverage/default/2.sram_ctrl_sec_cm.1414155860
/workspace/coverage/default/2.sram_ctrl_smoke.265688951
/workspace/coverage/default/2.sram_ctrl_stress_all.4243389453
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.1522520714
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.479800688
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.509337402
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.2676957795
/workspace/coverage/default/20.sram_ctrl_alert_test.1889074503
/workspace/coverage/default/20.sram_ctrl_bijection.1566848211
/workspace/coverage/default/20.sram_ctrl_lc_escalation.3421760595
/workspace/coverage/default/20.sram_ctrl_max_throughput.1806891433
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.1638955763
/workspace/coverage/default/20.sram_ctrl_mem_walk.585500218
/workspace/coverage/default/20.sram_ctrl_multiple_keys.3255572684
/workspace/coverage/default/20.sram_ctrl_partial_access.1305879824
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.1756783659
/workspace/coverage/default/20.sram_ctrl_ram_cfg.4248599585
/workspace/coverage/default/20.sram_ctrl_regwen.2671478621
/workspace/coverage/default/20.sram_ctrl_smoke.4048838099
/workspace/coverage/default/20.sram_ctrl_stress_all.367842914
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1888575747
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.1123617298
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.3102412355
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.4120966477
/workspace/coverage/default/21.sram_ctrl_alert_test.578234337
/workspace/coverage/default/21.sram_ctrl_bijection.1120800019
/workspace/coverage/default/21.sram_ctrl_executable.1936752246
/workspace/coverage/default/21.sram_ctrl_lc_escalation.116953665
/workspace/coverage/default/21.sram_ctrl_max_throughput.783841253
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.3585710344
/workspace/coverage/default/21.sram_ctrl_mem_walk.1391227093
/workspace/coverage/default/21.sram_ctrl_multiple_keys.2516746637
/workspace/coverage/default/21.sram_ctrl_partial_access.2340104663
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.1389509945
/workspace/coverage/default/21.sram_ctrl_ram_cfg.2118117388
/workspace/coverage/default/21.sram_ctrl_regwen.466493385
/workspace/coverage/default/21.sram_ctrl_smoke.2667062518
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.4161299522
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.4192983782
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.1109541936
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.3209830488
/workspace/coverage/default/22.sram_ctrl_alert_test.3057830811
/workspace/coverage/default/22.sram_ctrl_bijection.2176831314
/workspace/coverage/default/22.sram_ctrl_lc_escalation.782246491
/workspace/coverage/default/22.sram_ctrl_max_throughput.1123900933
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.1750395197
/workspace/coverage/default/22.sram_ctrl_mem_walk.2924670912
/workspace/coverage/default/22.sram_ctrl_multiple_keys.807556312
/workspace/coverage/default/22.sram_ctrl_partial_access.3090705099
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.3965998728
/workspace/coverage/default/22.sram_ctrl_ram_cfg.1469467606
/workspace/coverage/default/22.sram_ctrl_regwen.3717024099
/workspace/coverage/default/22.sram_ctrl_smoke.1449314086
/workspace/coverage/default/22.sram_ctrl_stress_all.1466548439
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3272975295
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.655253931
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.1232702628
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.2464074794
/workspace/coverage/default/23.sram_ctrl_alert_test.3604771958
/workspace/coverage/default/23.sram_ctrl_bijection.3246246446
/workspace/coverage/default/23.sram_ctrl_max_throughput.1159801471
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.1666616075
/workspace/coverage/default/23.sram_ctrl_mem_walk.721605218
/workspace/coverage/default/23.sram_ctrl_multiple_keys.479558813
/workspace/coverage/default/23.sram_ctrl_partial_access.3656415098
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.1419537760
/workspace/coverage/default/23.sram_ctrl_ram_cfg.3222213028
/workspace/coverage/default/23.sram_ctrl_regwen.2828241728
/workspace/coverage/default/23.sram_ctrl_smoke.283983113
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.2199464938
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.2453975097
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.2887637539
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.367165149
/workspace/coverage/default/24.sram_ctrl_alert_test.820142748
/workspace/coverage/default/24.sram_ctrl_bijection.4199316163
/workspace/coverage/default/24.sram_ctrl_executable.2481546019
/workspace/coverage/default/24.sram_ctrl_lc_escalation.3610869937
/workspace/coverage/default/24.sram_ctrl_max_throughput.3301536472
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.2616714735
/workspace/coverage/default/24.sram_ctrl_mem_walk.4071258815
/workspace/coverage/default/24.sram_ctrl_multiple_keys.1527821060
/workspace/coverage/default/24.sram_ctrl_partial_access.3517581998
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.3806444889
/workspace/coverage/default/24.sram_ctrl_ram_cfg.1662188828
/workspace/coverage/default/24.sram_ctrl_regwen.175049414
/workspace/coverage/default/24.sram_ctrl_smoke.942043977
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.244663114
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.1256546577
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.3858065358
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.2693288728
/workspace/coverage/default/25.sram_ctrl_alert_test.2255185498
/workspace/coverage/default/25.sram_ctrl_bijection.1540411874
/workspace/coverage/default/25.sram_ctrl_max_throughput.1858994686
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.354986248
/workspace/coverage/default/25.sram_ctrl_mem_walk.555447193
/workspace/coverage/default/25.sram_ctrl_multiple_keys.2376888327
/workspace/coverage/default/25.sram_ctrl_partial_access.2067494499
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.1557620454
/workspace/coverage/default/25.sram_ctrl_regwen.2237735101
/workspace/coverage/default/25.sram_ctrl_smoke.3109906680
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.3743359075
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.3769305498
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.1460037040
/workspace/coverage/default/26.sram_ctrl_access_during_key_req.789077232
/workspace/coverage/default/26.sram_ctrl_alert_test.3408482236
/workspace/coverage/default/26.sram_ctrl_bijection.664817725
/workspace/coverage/default/26.sram_ctrl_executable.799015905
/workspace/coverage/default/26.sram_ctrl_lc_escalation.4015230712
/workspace/coverage/default/26.sram_ctrl_max_throughput.3322786226
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.1169788823
/workspace/coverage/default/26.sram_ctrl_mem_walk.1900612002
/workspace/coverage/default/26.sram_ctrl_multiple_keys.1886081315
/workspace/coverage/default/26.sram_ctrl_partial_access.3009762260
/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.2215485350
/workspace/coverage/default/26.sram_ctrl_ram_cfg.2128932164
/workspace/coverage/default/26.sram_ctrl_regwen.1649693302
/workspace/coverage/default/26.sram_ctrl_smoke.498647993
/workspace/coverage/default/26.sram_ctrl_stress_all.2298860072
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2126957251
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.267520550
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.707510093
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.4256425803
/workspace/coverage/default/27.sram_ctrl_alert_test.3828124066
/workspace/coverage/default/27.sram_ctrl_bijection.41250389
/workspace/coverage/default/27.sram_ctrl_executable.1726021073
/workspace/coverage/default/27.sram_ctrl_lc_escalation.49100786
/workspace/coverage/default/27.sram_ctrl_max_throughput.1228811790
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.442691307
/workspace/coverage/default/27.sram_ctrl_mem_walk.580927335
/workspace/coverage/default/27.sram_ctrl_multiple_keys.365886371
/workspace/coverage/default/27.sram_ctrl_partial_access.1004102482
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.369258697
/workspace/coverage/default/27.sram_ctrl_ram_cfg.2222913689
/workspace/coverage/default/27.sram_ctrl_regwen.3981113589
/workspace/coverage/default/27.sram_ctrl_smoke.388604184
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.3737624782
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.2200981816
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3865317192
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.3128296253
/workspace/coverage/default/28.sram_ctrl_alert_test.2120786075
/workspace/coverage/default/28.sram_ctrl_bijection.2060332309
/workspace/coverage/default/28.sram_ctrl_executable.705827549
/workspace/coverage/default/28.sram_ctrl_lc_escalation.1763742518
/workspace/coverage/default/28.sram_ctrl_max_throughput.2544803069
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.2564423436
/workspace/coverage/default/28.sram_ctrl_mem_walk.881964541
/workspace/coverage/default/28.sram_ctrl_multiple_keys.3229785613
/workspace/coverage/default/28.sram_ctrl_partial_access.73851362
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.756376834
/workspace/coverage/default/28.sram_ctrl_ram_cfg.1614664019
/workspace/coverage/default/28.sram_ctrl_regwen.1840787847
/workspace/coverage/default/28.sram_ctrl_smoke.3098955849
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3339399371
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.488994516
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.1995267805
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.2906499637
/workspace/coverage/default/29.sram_ctrl_alert_test.79630341
/workspace/coverage/default/29.sram_ctrl_bijection.128959883
/workspace/coverage/default/29.sram_ctrl_executable.789322187
/workspace/coverage/default/29.sram_ctrl_max_throughput.3759017298
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.2912059922
/workspace/coverage/default/29.sram_ctrl_mem_walk.1658311336
/workspace/coverage/default/29.sram_ctrl_multiple_keys.3947007631
/workspace/coverage/default/29.sram_ctrl_partial_access.103730764
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.4114051573
/workspace/coverage/default/29.sram_ctrl_ram_cfg.3048044393
/workspace/coverage/default/29.sram_ctrl_regwen.2010901100
/workspace/coverage/default/29.sram_ctrl_smoke.3342498911
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.1904869849
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.2981249881
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.4021591692
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.2260381189
/workspace/coverage/default/3.sram_ctrl_alert_test.1583655563
/workspace/coverage/default/3.sram_ctrl_bijection.4132762323
/workspace/coverage/default/3.sram_ctrl_executable.4151194117
/workspace/coverage/default/3.sram_ctrl_lc_escalation.4281503650
/workspace/coverage/default/3.sram_ctrl_max_throughput.3181000383
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.4288877963
/workspace/coverage/default/3.sram_ctrl_mem_walk.4211981118
/workspace/coverage/default/3.sram_ctrl_multiple_keys.3082910699
/workspace/coverage/default/3.sram_ctrl_partial_access.3793439245
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.718099036
/workspace/coverage/default/3.sram_ctrl_ram_cfg.3410842919
/workspace/coverage/default/3.sram_ctrl_regwen.1617277499
/workspace/coverage/default/3.sram_ctrl_smoke.2907043009
/workspace/coverage/default/3.sram_ctrl_stress_all.1496863494
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.718776184
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.4105191755
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.3417495987
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.1855322956
/workspace/coverage/default/30.sram_ctrl_alert_test.1651743164
/workspace/coverage/default/30.sram_ctrl_bijection.1844626413
/workspace/coverage/default/30.sram_ctrl_executable.4116635949
/workspace/coverage/default/30.sram_ctrl_lc_escalation.401647202
/workspace/coverage/default/30.sram_ctrl_max_throughput.2970566770
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.1208529451
/workspace/coverage/default/30.sram_ctrl_mem_walk.3109705830
/workspace/coverage/default/30.sram_ctrl_multiple_keys.3191058858
/workspace/coverage/default/30.sram_ctrl_partial_access.4248491243
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.4243346293
/workspace/coverage/default/30.sram_ctrl_ram_cfg.2885728207
/workspace/coverage/default/30.sram_ctrl_regwen.332570312
/workspace/coverage/default/30.sram_ctrl_smoke.1813456596
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.4204319614
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.1777595922
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.1866081260
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.2644171208
/workspace/coverage/default/31.sram_ctrl_alert_test.3024348784
/workspace/coverage/default/31.sram_ctrl_bijection.2061416786
/workspace/coverage/default/31.sram_ctrl_executable.1869554305
/workspace/coverage/default/31.sram_ctrl_lc_escalation.2978236431
/workspace/coverage/default/31.sram_ctrl_max_throughput.4212801782
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.3473220347
/workspace/coverage/default/31.sram_ctrl_mem_walk.3858994552
/workspace/coverage/default/31.sram_ctrl_multiple_keys.1139876041
/workspace/coverage/default/31.sram_ctrl_partial_access.3618728065
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.3046630822
/workspace/coverage/default/31.sram_ctrl_ram_cfg.1898521533
/workspace/coverage/default/31.sram_ctrl_regwen.2729927426
/workspace/coverage/default/31.sram_ctrl_smoke.717497926
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.3352615753
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.2819523386
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.3156739393
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.2684887865
/workspace/coverage/default/32.sram_ctrl_alert_test.4005276350
/workspace/coverage/default/32.sram_ctrl_bijection.552221455
/workspace/coverage/default/32.sram_ctrl_executable.3748065564
/workspace/coverage/default/32.sram_ctrl_lc_escalation.3613267822
/workspace/coverage/default/32.sram_ctrl_max_throughput.3169807367
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.754205326
/workspace/coverage/default/32.sram_ctrl_mem_walk.2061592586
/workspace/coverage/default/32.sram_ctrl_multiple_keys.2340956290
/workspace/coverage/default/32.sram_ctrl_partial_access.346369658
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.2837864894
/workspace/coverage/default/32.sram_ctrl_ram_cfg.4122934431
/workspace/coverage/default/32.sram_ctrl_regwen.688763833
/workspace/coverage/default/32.sram_ctrl_smoke.1488782288
/workspace/coverage/default/32.sram_ctrl_stress_all.204171074
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.3480211228
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.1779738624
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3277586834
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.3192715295
/workspace/coverage/default/33.sram_ctrl_alert_test.1628920595
/workspace/coverage/default/33.sram_ctrl_bijection.1149975795
/workspace/coverage/default/33.sram_ctrl_executable.3094137404
/workspace/coverage/default/33.sram_ctrl_lc_escalation.1601519853
/workspace/coverage/default/33.sram_ctrl_max_throughput.598792926
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.1330002451
/workspace/coverage/default/33.sram_ctrl_mem_walk.1155120538
/workspace/coverage/default/33.sram_ctrl_multiple_keys.3401888109
/workspace/coverage/default/33.sram_ctrl_partial_access.1939198308
/workspace/coverage/default/33.sram_ctrl_ram_cfg.3740971375
/workspace/coverage/default/33.sram_ctrl_regwen.1313833574
/workspace/coverage/default/33.sram_ctrl_smoke.1903494060
/workspace/coverage/default/33.sram_ctrl_stress_all.626676356
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.852120122
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.3379888966
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.64407676
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.2217935580
/workspace/coverage/default/34.sram_ctrl_alert_test.659931339
/workspace/coverage/default/34.sram_ctrl_bijection.1619616659
/workspace/coverage/default/34.sram_ctrl_executable.2926320669
/workspace/coverage/default/34.sram_ctrl_max_throughput.35281937
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.1603638590
/workspace/coverage/default/34.sram_ctrl_mem_walk.460375098
/workspace/coverage/default/34.sram_ctrl_multiple_keys.2894899899
/workspace/coverage/default/34.sram_ctrl_partial_access.3954756120
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.669602009
/workspace/coverage/default/34.sram_ctrl_ram_cfg.3489619951
/workspace/coverage/default/34.sram_ctrl_regwen.3646849110
/workspace/coverage/default/34.sram_ctrl_smoke.2724799479
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.88806109
/workspace/coverage/default/34.sram_ctrl_stress_pipeline.2212833167
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3167435516
/workspace/coverage/default/35.sram_ctrl_access_during_key_req.2283707812
/workspace/coverage/default/35.sram_ctrl_alert_test.4272621454
/workspace/coverage/default/35.sram_ctrl_bijection.2934142404
/workspace/coverage/default/35.sram_ctrl_executable.3860144928
/workspace/coverage/default/35.sram_ctrl_lc_escalation.2409832317
/workspace/coverage/default/35.sram_ctrl_max_throughput.1901884032
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.637347031
/workspace/coverage/default/35.sram_ctrl_mem_walk.3546878593
/workspace/coverage/default/35.sram_ctrl_multiple_keys.312820189
/workspace/coverage/default/35.sram_ctrl_partial_access.4094935944
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.958243919
/workspace/coverage/default/35.sram_ctrl_ram_cfg.2743123871
/workspace/coverage/default/35.sram_ctrl_regwen.2716633657
/workspace/coverage/default/35.sram_ctrl_smoke.1540018921
/workspace/coverage/default/35.sram_ctrl_stress_all.4117788891
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.3436840983
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.2590262473
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.1079521504
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.897744186
/workspace/coverage/default/36.sram_ctrl_alert_test.3879820760
/workspace/coverage/default/36.sram_ctrl_bijection.3701123916
/workspace/coverage/default/36.sram_ctrl_executable.2366530523
/workspace/coverage/default/36.sram_ctrl_lc_escalation.3899563353
/workspace/coverage/default/36.sram_ctrl_max_throughput.642537166
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.2598482909
/workspace/coverage/default/36.sram_ctrl_mem_walk.3711633386
/workspace/coverage/default/36.sram_ctrl_multiple_keys.438823737
/workspace/coverage/default/36.sram_ctrl_partial_access.3597674748
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.771225281
/workspace/coverage/default/36.sram_ctrl_ram_cfg.681000031
/workspace/coverage/default/36.sram_ctrl_smoke.2594350047
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.3550406201
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2649665628
/workspace/coverage/default/37.sram_ctrl_access_during_key_req.306694930
/workspace/coverage/default/37.sram_ctrl_alert_test.2397076534
/workspace/coverage/default/37.sram_ctrl_bijection.4025008569
/workspace/coverage/default/37.sram_ctrl_executable.1074919414
/workspace/coverage/default/37.sram_ctrl_lc_escalation.2184667258
/workspace/coverage/default/37.sram_ctrl_max_throughput.4229854122
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.449349049
/workspace/coverage/default/37.sram_ctrl_mem_walk.981961533
/workspace/coverage/default/37.sram_ctrl_multiple_keys.897991308
/workspace/coverage/default/37.sram_ctrl_partial_access.292099022
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.650354276
/workspace/coverage/default/37.sram_ctrl_ram_cfg.525170940
/workspace/coverage/default/37.sram_ctrl_regwen.2826771759
/workspace/coverage/default/37.sram_ctrl_smoke.639646831
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.3331934906
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.1685497973
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.2845605406
/workspace/coverage/default/38.sram_ctrl_alert_test.1650628899
/workspace/coverage/default/38.sram_ctrl_bijection.2843155350
/workspace/coverage/default/38.sram_ctrl_executable.189781266
/workspace/coverage/default/38.sram_ctrl_lc_escalation.2818139273
/workspace/coverage/default/38.sram_ctrl_max_throughput.2786426966
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.1158984023
/workspace/coverage/default/38.sram_ctrl_mem_walk.1900578617
/workspace/coverage/default/38.sram_ctrl_multiple_keys.807816255
/workspace/coverage/default/38.sram_ctrl_partial_access.1163177152
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.3561091828
/workspace/coverage/default/38.sram_ctrl_ram_cfg.449382951
/workspace/coverage/default/38.sram_ctrl_regwen.443318599
/workspace/coverage/default/38.sram_ctrl_smoke.3758102121
/workspace/coverage/default/38.sram_ctrl_stress_all.1548404879
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.3883895602
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.2980356802
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.398134044
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.1954928322
/workspace/coverage/default/39.sram_ctrl_alert_test.2886376213
/workspace/coverage/default/39.sram_ctrl_bijection.3096549972
/workspace/coverage/default/39.sram_ctrl_lc_escalation.1027072649
/workspace/coverage/default/39.sram_ctrl_max_throughput.206301703
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.2080614142
/workspace/coverage/default/39.sram_ctrl_mem_walk.444322242
/workspace/coverage/default/39.sram_ctrl_multiple_keys.3422695084
/workspace/coverage/default/39.sram_ctrl_partial_access.2504945983
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.2239659982
/workspace/coverage/default/39.sram_ctrl_ram_cfg.543157583
/workspace/coverage/default/39.sram_ctrl_regwen.1690608408
/workspace/coverage/default/39.sram_ctrl_smoke.4193265664
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.2507968395
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.228758554
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.1041207880
/workspace/coverage/default/4.sram_ctrl_alert_test.1514975474
/workspace/coverage/default/4.sram_ctrl_bijection.2561459098
/workspace/coverage/default/4.sram_ctrl_executable.3184750939
/workspace/coverage/default/4.sram_ctrl_lc_escalation.3110641346
/workspace/coverage/default/4.sram_ctrl_max_throughput.318548642
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.2491802955
/workspace/coverage/default/4.sram_ctrl_mem_walk.720629979
/workspace/coverage/default/4.sram_ctrl_multiple_keys.3740542776
/workspace/coverage/default/4.sram_ctrl_partial_access.4238136246
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.2785807288
/workspace/coverage/default/4.sram_ctrl_ram_cfg.428616921
/workspace/coverage/default/4.sram_ctrl_regwen.4050390180
/workspace/coverage/default/4.sram_ctrl_sec_cm.3820788437
/workspace/coverage/default/4.sram_ctrl_smoke.2306259605
/workspace/coverage/default/4.sram_ctrl_stress_all.2821074513
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.298311010
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.3652095252
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.692380699
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.3228625676
/workspace/coverage/default/40.sram_ctrl_alert_test.2698482017
/workspace/coverage/default/40.sram_ctrl_bijection.2010568778
/workspace/coverage/default/40.sram_ctrl_lc_escalation.871661546
/workspace/coverage/default/40.sram_ctrl_max_throughput.119947091
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.2403066646
/workspace/coverage/default/40.sram_ctrl_mem_walk.751841733
/workspace/coverage/default/40.sram_ctrl_multiple_keys.3584528637
/workspace/coverage/default/40.sram_ctrl_partial_access.2302867489
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.1046724359
/workspace/coverage/default/40.sram_ctrl_ram_cfg.512381561
/workspace/coverage/default/40.sram_ctrl_regwen.1584928258
/workspace/coverage/default/40.sram_ctrl_smoke.1922154470
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.1256534117
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.3953664340
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.3186084821
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.3949779633
/workspace/coverage/default/41.sram_ctrl_alert_test.1746472228
/workspace/coverage/default/41.sram_ctrl_bijection.3679859191
/workspace/coverage/default/41.sram_ctrl_lc_escalation.3571829753
/workspace/coverage/default/41.sram_ctrl_max_throughput.1872942893
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.1626280187
/workspace/coverage/default/41.sram_ctrl_mem_walk.3345644288
/workspace/coverage/default/41.sram_ctrl_multiple_keys.1212733669
/workspace/coverage/default/41.sram_ctrl_partial_access.2530112948
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.1976624446
/workspace/coverage/default/41.sram_ctrl_ram_cfg.2165394280
/workspace/coverage/default/41.sram_ctrl_regwen.2763872034
/workspace/coverage/default/41.sram_ctrl_smoke.2302270766
/workspace/coverage/default/41.sram_ctrl_stress_all.3148918500
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1599509334
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.372362568
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.1710080927
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.1248983097
/workspace/coverage/default/42.sram_ctrl_alert_test.985390787
/workspace/coverage/default/42.sram_ctrl_bijection.2150171428
/workspace/coverage/default/42.sram_ctrl_executable.1928411165
/workspace/coverage/default/42.sram_ctrl_lc_escalation.1722846853
/workspace/coverage/default/42.sram_ctrl_max_throughput.3649988933
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.3141386333
/workspace/coverage/default/42.sram_ctrl_mem_walk.2967803836
/workspace/coverage/default/42.sram_ctrl_multiple_keys.930823022
/workspace/coverage/default/42.sram_ctrl_partial_access.938993331
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.1617388637
/workspace/coverage/default/42.sram_ctrl_ram_cfg.3937828635
/workspace/coverage/default/42.sram_ctrl_regwen.3564713453
/workspace/coverage/default/42.sram_ctrl_smoke.3611589179
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.4046395749
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.985395195
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2233300256
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.2358052552
/workspace/coverage/default/43.sram_ctrl_alert_test.820374432
/workspace/coverage/default/43.sram_ctrl_bijection.3354532428
/workspace/coverage/default/43.sram_ctrl_executable.2268791501
/workspace/coverage/default/43.sram_ctrl_lc_escalation.2494555519
/workspace/coverage/default/43.sram_ctrl_max_throughput.994229597
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.3755096823
/workspace/coverage/default/43.sram_ctrl_mem_walk.3327080336
/workspace/coverage/default/43.sram_ctrl_multiple_keys.452101398
/workspace/coverage/default/43.sram_ctrl_partial_access.4044815368
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.284899439
/workspace/coverage/default/43.sram_ctrl_ram_cfg.275669259
/workspace/coverage/default/43.sram_ctrl_regwen.3816558175
/workspace/coverage/default/43.sram_ctrl_smoke.388439668
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.495703108
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1602736184
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3078456511
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1361219884
/workspace/coverage/default/44.sram_ctrl_alert_test.2857058386
/workspace/coverage/default/44.sram_ctrl_bijection.3615090340
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3918230698
/workspace/coverage/default/44.sram_ctrl_max_throughput.3126605932
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3436341867
/workspace/coverage/default/44.sram_ctrl_mem_walk.1892015329
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1530967305
/workspace/coverage/default/44.sram_ctrl_partial_access.3866113368
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3393389264
/workspace/coverage/default/44.sram_ctrl_ram_cfg.373676546
/workspace/coverage/default/44.sram_ctrl_regwen.3652143009
/workspace/coverage/default/44.sram_ctrl_smoke.2792294217
/workspace/coverage/default/44.sram_ctrl_stress_all.3177255903
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3926540629
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1349392757
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1536274938
/workspace/coverage/default/45.sram_ctrl_alert_test.2136617766
/workspace/coverage/default/45.sram_ctrl_bijection.2021227475
/workspace/coverage/default/45.sram_ctrl_lc_escalation.194290117
/workspace/coverage/default/45.sram_ctrl_max_throughput.3147983710
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.4212941308
/workspace/coverage/default/45.sram_ctrl_mem_walk.3916346242
/workspace/coverage/default/45.sram_ctrl_multiple_keys.289917345
/workspace/coverage/default/45.sram_ctrl_partial_access.4291202178
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3531183864
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2255365368
/workspace/coverage/default/45.sram_ctrl_regwen.3152105482
/workspace/coverage/default/45.sram_ctrl_smoke.994851181
/workspace/coverage/default/45.sram_ctrl_stress_all.428645844
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2830771208
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2397853079
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3569365279
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3637417158
/workspace/coverage/default/46.sram_ctrl_alert_test.1522873872
/workspace/coverage/default/46.sram_ctrl_bijection.1079882570
/workspace/coverage/default/46.sram_ctrl_lc_escalation.464797125
/workspace/coverage/default/46.sram_ctrl_max_throughput.3466639188
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2800150822
/workspace/coverage/default/46.sram_ctrl_mem_walk.235926978
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2855319357
/workspace/coverage/default/46.sram_ctrl_partial_access.4136584348
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1602363931
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1083122428
/workspace/coverage/default/46.sram_ctrl_regwen.662298893
/workspace/coverage/default/46.sram_ctrl_smoke.2683415154
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.4020467709
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2138569128
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1791252519
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1070930931
/workspace/coverage/default/47.sram_ctrl_alert_test.3953593192
/workspace/coverage/default/47.sram_ctrl_bijection.3578298379
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2124511569
/workspace/coverage/default/47.sram_ctrl_max_throughput.339942759
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.4077477848
/workspace/coverage/default/47.sram_ctrl_mem_walk.1553183691
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3932075612
/workspace/coverage/default/47.sram_ctrl_partial_access.2010117693
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2857589247
/workspace/coverage/default/47.sram_ctrl_ram_cfg.711923428
/workspace/coverage/default/47.sram_ctrl_regwen.532491471
/workspace/coverage/default/47.sram_ctrl_smoke.3613210017
/workspace/coverage/default/47.sram_ctrl_stress_all.2932807420
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2113889254
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2210165501
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.335343999
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.4070396415
/workspace/coverage/default/48.sram_ctrl_alert_test.3098697736
/workspace/coverage/default/48.sram_ctrl_bijection.1079461050
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3867874678
/workspace/coverage/default/48.sram_ctrl_max_throughput.177600622
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3528177596
/workspace/coverage/default/48.sram_ctrl_mem_walk.704549184
/workspace/coverage/default/48.sram_ctrl_multiple_keys.680556028
/workspace/coverage/default/48.sram_ctrl_partial_access.805377812
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1089764674
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3293570612
/workspace/coverage/default/48.sram_ctrl_regwen.336267733
/workspace/coverage/default/48.sram_ctrl_smoke.3107165023
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1985033809
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.952733972
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1609701457
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3931877448
/workspace/coverage/default/49.sram_ctrl_alert_test.3056968148
/workspace/coverage/default/49.sram_ctrl_bijection.3373416794
/workspace/coverage/default/49.sram_ctrl_executable.2883939588
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3621882585
/workspace/coverage/default/49.sram_ctrl_max_throughput.3000012569
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2966720473
/workspace/coverage/default/49.sram_ctrl_mem_walk.1613958895
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1005274133
/workspace/coverage/default/49.sram_ctrl_partial_access.3752784476
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.4041428886
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2439166491
/workspace/coverage/default/49.sram_ctrl_regwen.1904410263
/workspace/coverage/default/49.sram_ctrl_smoke.2103440854
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3942784170
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2628584320
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2815534375
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.849820657
/workspace/coverage/default/5.sram_ctrl_alert_test.2803601766
/workspace/coverage/default/5.sram_ctrl_bijection.3783250090
/workspace/coverage/default/5.sram_ctrl_executable.122994760
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3360792842
/workspace/coverage/default/5.sram_ctrl_max_throughput.2534267603
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3816797551
/workspace/coverage/default/5.sram_ctrl_mem_walk.4179312941
/workspace/coverage/default/5.sram_ctrl_multiple_keys.72982529
/workspace/coverage/default/5.sram_ctrl_partial_access.2284237517
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1492873297
/workspace/coverage/default/5.sram_ctrl_ram_cfg.200159035
/workspace/coverage/default/5.sram_ctrl_regwen.1785368720
/workspace/coverage/default/5.sram_ctrl_smoke.2623485010
/workspace/coverage/default/5.sram_ctrl_stress_all.2051506518
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1687180715
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3292421791
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.466601184
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2068867540
/workspace/coverage/default/6.sram_ctrl_alert_test.3979496730
/workspace/coverage/default/6.sram_ctrl_bijection.3735790273
/workspace/coverage/default/6.sram_ctrl_executable.3459186082
/workspace/coverage/default/6.sram_ctrl_max_throughput.2445698347
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.4247123507
/workspace/coverage/default/6.sram_ctrl_mem_walk.2635435725
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2807572194
/workspace/coverage/default/6.sram_ctrl_partial_access.3231239168
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.155381266
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1298706504
/workspace/coverage/default/6.sram_ctrl_regwen.3952019394
/workspace/coverage/default/6.sram_ctrl_smoke.1835954039
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.888427874
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.4061643873
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1960217617
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.953738977
/workspace/coverage/default/7.sram_ctrl_alert_test.3854018224
/workspace/coverage/default/7.sram_ctrl_bijection.2860362261
/workspace/coverage/default/7.sram_ctrl_max_throughput.615232361
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2827309110
/workspace/coverage/default/7.sram_ctrl_mem_walk.2003424485
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3274657648
/workspace/coverage/default/7.sram_ctrl_partial_access.3313655650
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1914641695
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1211550298
/workspace/coverage/default/7.sram_ctrl_regwen.2926683897
/workspace/coverage/default/7.sram_ctrl_smoke.50045077
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3832341014
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3612016264
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1342055617
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.93350266
/workspace/coverage/default/8.sram_ctrl_alert_test.2589717781
/workspace/coverage/default/8.sram_ctrl_bijection.2084384802
/workspace/coverage/default/8.sram_ctrl_executable.2481472053
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1474155230
/workspace/coverage/default/8.sram_ctrl_max_throughput.2357858911
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.719076550
/workspace/coverage/default/8.sram_ctrl_mem_walk.2149411416
/workspace/coverage/default/8.sram_ctrl_multiple_keys.809977681
/workspace/coverage/default/8.sram_ctrl_partial_access.2462326071
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1699393088
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3970295870
/workspace/coverage/default/8.sram_ctrl_regwen.2533799827
/workspace/coverage/default/8.sram_ctrl_smoke.1793721238
/workspace/coverage/default/8.sram_ctrl_stress_all.2342035702
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.623848255
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2757702503
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.52351469
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3444741060
/workspace/coverage/default/9.sram_ctrl_alert_test.1572492367
/workspace/coverage/default/9.sram_ctrl_bijection.4157753546
/workspace/coverage/default/9.sram_ctrl_executable.633281544
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2081458295
/workspace/coverage/default/9.sram_ctrl_max_throughput.2632373651
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2755075632
/workspace/coverage/default/9.sram_ctrl_mem_walk.2739182090
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1807205752
/workspace/coverage/default/9.sram_ctrl_partial_access.787192027
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2942023101
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1445139522
/workspace/coverage/default/9.sram_ctrl_regwen.3650108693
/workspace/coverage/default/9.sram_ctrl_smoke.1379119182
/workspace/coverage/default/9.sram_ctrl_stress_all.3119022598
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1735371305
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3897229927
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.4128760344



Total test records in report: 961
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.456857315 Feb 07 02:01:23 PM PST 24 Feb 07 02:03:38 PM PST 24 1565301488 ps
T2 /workspace/coverage/default/27.sram_ctrl_regwen.3981113589 Feb 07 02:03:37 PM PST 24 Feb 07 02:05:18 PM PST 24 1062697772 ps
T3 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.1922796503 Feb 07 02:01:19 PM PST 24 Feb 07 02:09:01 PM PST 24 34781871140 ps
T10 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1290735348 Feb 07 02:01:45 PM PST 24 Feb 07 02:03:36 PM PST 24 1566066494 ps
T4 /workspace/coverage/default/45.sram_ctrl_smoke.994851181 Feb 07 02:08:48 PM PST 24 Feb 07 02:09:26 PM PST 24 3026239865 ps
T5 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.1815915232 Feb 07 02:08:05 PM PST 24 Feb 07 02:14:02 PM PST 24 32604298971 ps
T6 /workspace/coverage/default/47.sram_ctrl_multiple_keys.3932075612 Feb 07 02:09:13 PM PST 24 Feb 07 02:12:45 PM PST 24 4610823231 ps
T11 /workspace/coverage/default/8.sram_ctrl_bijection.2084384802 Feb 07 02:01:06 PM PST 24 Feb 07 02:15:00 PM PST 24 148312824251 ps
T12 /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.3331934906 Feb 07 02:08:23 PM PST 24 Feb 07 03:15:34 PM PST 24 574808471 ps
T13 /workspace/coverage/default/29.sram_ctrl_executable.789322187 Feb 07 02:04:03 PM PST 24 Feb 07 02:21:58 PM PST 24 19126642479 ps
T38 /workspace/coverage/default/49.sram_ctrl_ram_cfg.2439166491 Feb 07 02:09:46 PM PST 24 Feb 07 02:10:01 PM PST 24 356182138 ps
T15 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3167435516 Feb 07 02:07:58 PM PST 24 Feb 07 02:08:33 PM PST 24 906469886 ps
T16 /workspace/coverage/default/18.sram_ctrl_partial_access.2969526293 Feb 07 02:01:47 PM PST 24 Feb 07 02:02:46 PM PST 24 499536663 ps
T23 /workspace/coverage/default/14.sram_ctrl_executable.1717055511 Feb 07 02:01:34 PM PST 24 Feb 07 02:04:23 PM PST 24 8113903674 ps
T33 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.853269534 Feb 07 02:08:49 PM PST 24 Feb 07 04:41:51 PM PST 24 1547503005 ps
T14 /workspace/coverage/default/27.sram_ctrl_partial_access.1004102482 Feb 07 02:03:27 PM PST 24 Feb 07 02:04:25 PM PST 24 756753084 ps
T59 /workspace/coverage/default/36.sram_ctrl_stress_pipeline.3550406201 Feb 07 02:08:02 PM PST 24 Feb 07 02:13:33 PM PST 24 62977969467 ps
T60 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.2200981816 Feb 07 02:03:25 PM PST 24 Feb 07 02:08:23 PM PST 24 14425524012 ps
T39 /workspace/coverage/default/35.sram_ctrl_ram_cfg.2743123871 Feb 07 02:08:01 PM PST 24 Feb 07 02:08:10 PM PST 24 708740309 ps
T137 /workspace/coverage/default/23.sram_ctrl_mem_walk.721605218 Feb 07 02:02:44 PM PST 24 Feb 07 02:05:33 PM PST 24 44948097465 ps
T110 /workspace/coverage/default/48.sram_ctrl_smoke.3107165023 Feb 07 02:09:31 PM PST 24 Feb 07 02:10:09 PM PST 24 26745485395 ps
T7 /workspace/coverage/default/41.sram_ctrl_lc_escalation.3571829753 Feb 07 02:08:10 PM PST 24 Feb 07 02:08:51 PM PST 24 13529706549 ps
T74 /workspace/coverage/default/17.sram_ctrl_smoke.1261279414 Feb 07 02:01:46 PM PST 24 Feb 07 02:02:16 PM PST 24 1721822053 ps
T17 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.3135719721 Feb 07 02:08:12 PM PST 24 Feb 07 02:19:06 PM PST 24 3814412586 ps
T40 /workspace/coverage/default/27.sram_ctrl_ram_cfg.2222913689 Feb 07 02:03:39 PM PST 24 Feb 07 02:03:46 PM PST 24 684199061 ps
T8 /workspace/coverage/default/49.sram_ctrl_lc_escalation.3621882585 Feb 07 02:09:46 PM PST 24 Feb 07 02:16:12 PM PST 24 66843963103 ps
T34 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2113889254 Feb 07 02:09:28 PM PST 24 Feb 07 02:55:29 PM PST 24 3323123982 ps
T138 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.4021591692 Feb 07 02:04:04 PM PST 24 Feb 07 02:04:37 PM PST 24 1984312719 ps
T100 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.3897229927 Feb 07 02:01:19 PM PST 24 Feb 07 02:06:11 PM PST 24 8458564247 ps
T139 /workspace/coverage/default/43.sram_ctrl_mem_walk.3327080336 Feb 07 02:08:34 PM PST 24 Feb 07 02:10:59 PM PST 24 28703359251 ps
T24 /workspace/coverage/default/31.sram_ctrl_regwen.2729927426 Feb 07 02:07:59 PM PST 24 Feb 07 02:17:55 PM PST 24 39567273580 ps
T101 /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.1419537760 Feb 07 02:02:41 PM PST 24 Feb 07 02:09:39 PM PST 24 71167024080 ps
T140 /workspace/coverage/default/36.sram_ctrl_max_throughput.642537166 Feb 07 02:08:01 PM PST 24 Feb 07 02:09:32 PM PST 24 2951005360 ps
T134 /workspace/coverage/default/33.sram_ctrl_multiple_keys.3401888109 Feb 07 02:07:59 PM PST 24 Feb 07 02:37:39 PM PST 24 35727795419 ps
T126 /workspace/coverage/default/5.sram_ctrl_executable.122994760 Feb 07 02:00:59 PM PST 24 Feb 07 02:03:25 PM PST 24 14117718706 ps
T141 /workspace/coverage/default/45.sram_ctrl_partial_access.4291202178 Feb 07 02:08:50 PM PST 24 Feb 07 02:09:10 PM PST 24 1026932548 ps
T142 /workspace/coverage/default/22.sram_ctrl_partial_access.3090705099 Feb 07 02:02:27 PM PST 24 Feb 07 02:02:56 PM PST 24 6924722589 ps
T143 /workspace/coverage/default/25.sram_ctrl_ram_cfg.3036908170 Feb 07 02:03:19 PM PST 24 Feb 07 02:03:27 PM PST 24 349206944 ps
T144 /workspace/coverage/default/30.sram_ctrl_partial_access.4248491243 Feb 07 02:04:06 PM PST 24 Feb 07 02:04:33 PM PST 24 1417668088 ps
T25 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2974564589 Feb 07 02:08:17 PM PST 24 Feb 07 03:30:47 PM PST 24 44769542266 ps
T9 /workspace/coverage/default/48.sram_ctrl_lc_escalation.3867874678 Feb 07 02:09:34 PM PST 24 Feb 07 02:10:08 PM PST 24 11224639157 ps
T111 /workspace/coverage/default/39.sram_ctrl_regwen.1690608408 Feb 07 02:08:15 PM PST 24 Feb 07 02:22:18 PM PST 24 45811741142 ps
T81 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.4077477848 Feb 07 02:09:18 PM PST 24 Feb 07 02:10:38 PM PST 24 9443463119 ps
T145 /workspace/coverage/default/36.sram_ctrl_smoke.2594350047 Feb 07 02:07:57 PM PST 24 Feb 07 02:09:41 PM PST 24 9724122923 ps
T31 /workspace/coverage/default/21.sram_ctrl_lc_escalation.116953665 Feb 07 02:02:43 PM PST 24 Feb 07 02:06:56 PM PST 24 48605255488 ps
T146 /workspace/coverage/default/34.sram_ctrl_partial_access.3954756120 Feb 07 02:07:59 PM PST 24 Feb 07 02:08:16 PM PST 24 3021057794 ps
T35 /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2291073093 Feb 07 01:57:16 PM PST 24 Feb 07 01:57:18 PM PST 24 14503721 ps
T36 /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3031637968 Feb 07 01:57:01 PM PST 24 Feb 07 01:57:06 PM PST 24 819060240 ps
T37 /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3815728519 Feb 07 01:57:14 PM PST 24 Feb 07 01:57:17 PM PST 24 186233940 ps
T52 /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1929907635 Feb 07 01:56:51 PM PST 24 Feb 07 01:56:58 PM PST 24 175735802 ps
T108 /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.575328401 Feb 07 01:56:51 PM PST 24 Feb 07 01:56:58 PM PST 24 93901457 ps
T64 /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3577783068 Feb 07 01:56:49 PM PST 24 Feb 07 01:56:53 PM PST 24 18975680 ps
T63 /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1536524276 Feb 07 01:57:14 PM PST 24 Feb 07 01:57:18 PM PST 24 187624244 ps
T109 /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.520776706 Feb 07 01:57:14 PM PST 24 Feb 07 01:57:17 PM PST 24 37202532 ps
T53 /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.155024316 Feb 07 01:57:01 PM PST 24 Feb 07 01:57:09 PM PST 24 349062061 ps
T54 /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1975362846 Feb 07 01:57:13 PM PST 24 Feb 07 01:57:20 PM PST 24 725647214 ps
T65 /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1675017177 Feb 07 01:57:15 PM PST 24 Feb 07 01:57:18 PM PST 24 34391928 ps
T66 /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.4144134613 Feb 07 01:57:15 PM PST 24 Feb 07 01:57:18 PM PST 24 165196395 ps
T55 /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.856140662 Feb 07 01:57:15 PM PST 24 Feb 07 01:57:20 PM PST 24 25977019 ps
T147 /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2052586781 Feb 07 01:57:03 PM PST 24 Feb 07 01:57:05 PM PST 24 63914367 ps
T61 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3261605560 Feb 07 01:57:14 PM PST 24 Feb 07 01:57:17 PM PST 24 611332873 ps
T56 /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.664036958 Feb 07 01:57:01 PM PST 24 Feb 07 01:57:06 PM PST 24 602525156 ps
T57 /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.736885611 Feb 07 01:56:43 PM PST 24 Feb 07 01:56:53 PM PST 24 1345423877 ps
T58 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1355966131 Feb 07 01:57:16 PM PST 24 Feb 07 01:57:19 PM PST 24 38621898 ps
T62 /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1040656189 Feb 07 01:57:12 PM PST 24 Feb 07 01:57:18 PM PST 24 140567882 ps
T112 /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.903747379 Feb 07 01:56:50 PM PST 24 Feb 07 01:56:58 PM PST 24 136697094 ps
T113 /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.776165677 Feb 07 01:57:17 PM PST 24 Feb 07 01:57:33 PM PST 24 353153634 ps
T67 /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1252434918 Feb 07 01:57:14 PM PST 24 Feb 07 01:57:16 PM PST 24 27483108 ps
T68 /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.4072525501 Feb 07 01:56:46 PM PST 24 Feb 07 01:56:49 PM PST 24 13330776 ps
T69 /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.4224139057 Feb 07 01:56:50 PM PST 24 Feb 07 01:56:57 PM PST 24 16101463 ps
T70 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2199770152 Feb 07 01:56:44 PM PST 24 Feb 07 01:56:49 PM PST 24 35168795 ps
T71 /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3504421496 Feb 07 01:56:56 PM PST 24 Feb 07 01:57:03 PM PST 24 1375139944 ps
T72 /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1833735362 Feb 07 01:57:16 PM PST 24 Feb 07 01:57:22 PM PST 24 134690617 ps
T73 /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1895022655 Feb 07 01:57:16 PM PST 24 Feb 07 01:57:19 PM PST 24 36299859 ps
T75 /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3929425871 Feb 07 01:57:14 PM PST 24 Feb 07 01:57:16 PM PST 24 24966604 ps
T76 /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1985860148 Feb 07 01:57:17 PM PST 24 Feb 07 01:57:19 PM PST 24 32445304 ps
T79 /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3390942403 Feb 07 01:57:16 PM PST 24 Feb 07 01:57:20 PM PST 24 77685923 ps
T80 /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2146585816 Feb 07 01:56:50 PM PST 24 Feb 07 01:56:57 PM PST 24 45965044 ps
T77 /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3506262069 Feb 07 01:56:59 PM PST 24 Feb 07 01:57:02 PM PST 24 12663277 ps
T91 /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1380827970 Feb 07 01:57:00 PM PST 24 Feb 07 01:57:05 PM PST 24 580741499 ps
T78 /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3485632937 Feb 07 01:56:52 PM PST 24 Feb 07 01:56:58 PM PST 24 21084662 ps
T148 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1935949240 Feb 07 01:57:01 PM PST 24 Feb 07 01:57:06 PM PST 24 288773553 ps
T149 /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3329648959 Feb 07 01:57:04 PM PST 24 Feb 07 01:57:06 PM PST 24 59873362 ps
T150 /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.301718146 Feb 07 01:56:59 PM PST 24 Feb 07 01:57:05 PM PST 24 109120318 ps
T151 /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.916896454 Feb 07 01:56:58 PM PST 24 Feb 07 01:57:05 PM PST 24 37937745 ps
T152 /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3705675217 Feb 07 01:57:01 PM PST 24 Feb 07 01:57:04 PM PST 24 309680126 ps
T102 /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2543852641 Feb 07 01:56:51 PM PST 24 Feb 07 01:56:57 PM PST 24 24619959 ps
T115 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1145957817 Feb 07 01:56:44 PM PST 24 Feb 07 01:56:50 PM PST 24 442591559 ps
T153 /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1198164150 Feb 07 01:57:14 PM PST 24 Feb 07 01:57:20 PM PST 24 4913801861 ps
T103 /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3003652239 Feb 07 01:56:52 PM PST 24 Feb 07 01:56:59 PM PST 24 88624240 ps
T154 /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1319359797 Feb 07 01:56:44 PM PST 24 Feb 07 01:56:49 PM PST 24 191843609 ps
T155 /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1571583048 Feb 07 01:56:57 PM PST 24 Feb 07 01:57:00 PM PST 24 12052704 ps
T118 /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3140202190 Feb 07 01:57:14 PM PST 24 Feb 07 01:57:17 PM PST 24 369776494 ps
T104 /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3991412925 Feb 07 01:56:44 PM PST 24 Feb 07 01:56:48 PM PST 24 67708803 ps
T82 /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.734174206 Feb 07 01:56:46 PM PST 24 Feb 07 01:56:49 PM PST 24 22692148 ps
T92 /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.2911579267 Feb 07 01:57:16 PM PST 24 Feb 07 01:57:19 PM PST 24 89714697 ps
T156 /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3816398962 Feb 07 01:56:50 PM PST 24 Feb 07 01:56:57 PM PST 24 374604374 ps
T157 /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.616996605 Feb 07 01:57:00 PM PST 24 Feb 07 01:57:06 PM PST 24 36332583 ps
T120 /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.4242730376 Feb 07 01:57:15 PM PST 24 Feb 07 01:57:19 PM PST 24 165324840 ps
T158 /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2527447794 Feb 07 01:56:52 PM PST 24 Feb 07 01:57:11 PM PST 24 729891433 ps
T159 /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.701000700 Feb 07 01:56:50 PM PST 24 Feb 07 01:56:57 PM PST 24 33018066 ps
T160 /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.30366576 Feb 07 01:56:50 PM PST 24 Feb 07 01:56:57 PM PST 24 20657977 ps
T161 /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3271651471 Feb 07 01:57:14 PM PST 24 Feb 07 01:57:17 PM PST 24 17617975 ps
T162 /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1132168657 Feb 07 01:57:00 PM PST 24 Feb 07 01:57:03 PM PST 24 13542985 ps
T163 /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1011353769 Feb 07 01:57:17 PM PST 24 Feb 07 01:57:25 PM PST 24 429443005 ps
T164 /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3063797838 Feb 07 01:57:00 PM PST 24 Feb 07 01:57:09 PM PST 24 713407766 ps
T165 /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2544121979 Feb 07 01:57:16 PM PST 24 Feb 07 01:57:31 PM PST 24 715084668 ps
T166 /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1969749622 Feb 07 01:57:01 PM PST 24 Feb 07 01:57:04 PM PST 24 16517594 ps
T167 /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3530499544 Feb 07 01:57:04 PM PST 24 Feb 07 01:57:08 PM PST 24 404438706 ps
T168 /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3916994936 Feb 07 01:56:56 PM PST 24 Feb 07 01:56:59 PM PST 24 50438118 ps
T169 /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2204202615 Feb 07 01:57:15 PM PST 24 Feb 07 01:57:17 PM PST 24 22401822 ps
T170 /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.4243945690 Feb 07 01:57:14 PM PST 24 Feb 07 01:57:21 PM PST 24 2873043444 ps
T83 /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3201074304 Feb 07 01:56:51 PM PST 24 Feb 07 01:56:57 PM PST 24 53668291 ps
T93 /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2423545795 Feb 07 01:56:53 PM PST 24 Feb 07 01:56:59 PM PST 24 108545156 ps
T94 /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1394059070 Feb 07 01:56:50 PM PST 24 Feb 07 01:56:58 PM PST 24 246256673 ps
T95 /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1872656069 Feb 07 01:56:52 PM PST 24 Feb 07 01:56:59 PM PST 24 355872252 ps
T96 /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.4183249596 Feb 07 01:57:27 PM PST 24 Feb 07 01:57:29 PM PST 24 53337328 ps
T97 /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2334826012 Feb 07 01:56:58 PM PST 24 Feb 07 01:57:02 PM PST 24 47015198 ps
T98 /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1706165984 Feb 07 01:56:50 PM PST 24 Feb 07 01:56:58 PM PST 24 191258929 ps
T99 /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3128137776 Feb 07 01:57:12 PM PST 24 Feb 07 01:57:17 PM PST 24 90096089 ps
T171 /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2214038289 Feb 07 01:57:13 PM PST 24 Feb 07 01:57:16 PM PST 24 49600754 ps
T172 /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.270024946 Feb 07 01:57:13 PM PST 24 Feb 07 01:57:19 PM PST 24 2250460697 ps
T173 /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.4204350515 Feb 07 01:57:31 PM PST 24 Feb 07 01:57:39 PM PST 24 5902376896 ps
T174 /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1759092131 Feb 07 01:57:06 PM PST 24 Feb 07 01:57:11 PM PST 24 357556224 ps
T175 /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3256018995 Feb 07 01:56:50 PM PST 24 Feb 07 01:57:05 PM PST 24 6816221665 ps
T176 /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.536260281 Feb 07 01:57:12 PM PST 24 Feb 07 01:57:13 PM PST 24 22877841 ps
T177 /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2771348263 Feb 07 01:57:17 PM PST 24 Feb 07 01:57:19 PM PST 24 40571950 ps
T178 /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.3618009579 Feb 07 01:57:03 PM PST 24 Feb 07 01:57:09 PM PST 24 1199379364 ps
T179 /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3109017819 Feb 07 01:57:00 PM PST 24 Feb 07 01:57:04 PM PST 24 31637148 ps
T180 /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.4246355919 Feb 07 01:56:58 PM PST 24 Feb 07 01:57:01 PM PST 24 15444946 ps
T181 /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2597578914 Feb 07 01:57:14 PM PST 24 Feb 07 01:57:15 PM PST 24 68937685 ps
T182 /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3727871497 Feb 07 01:57:15 PM PST 24 Feb 07 01:57:23 PM PST 24 1301217728 ps
T116 /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.538078480 Feb 07 01:57:01 PM PST 24 Feb 07 01:57:05 PM PST 24 74893045 ps
T183 /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1815372032 Feb 07 01:56:44 PM PST 24 Feb 07 01:56:48 PM PST 24 41736003 ps
T184 /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.891347683 Feb 07 01:56:49 PM PST 24 Feb 07 01:56:53 PM PST 24 112406388 ps
T185 /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3327011268 Feb 07 01:57:00 PM PST 24 Feb 07 01:57:03 PM PST 24 17938963 ps
T186 /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2856476016 Feb 07 01:57:03 PM PST 24 Feb 07 01:57:05 PM PST 24 16074990 ps
T187 /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.830582611 Feb 07 01:57:12 PM PST 24 Feb 07 01:57:26 PM PST 24 360266011 ps
T188 /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3767520957 Feb 07 01:56:50 PM PST 24 Feb 07 01:56:57 PM PST 24 32060562 ps
T189 /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2292155819 Feb 07 01:57:02 PM PST 24 Feb 07 01:57:10 PM PST 24 349400624 ps
T190 /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1701098540 Feb 07 01:57:13 PM PST 24 Feb 07 01:57:15 PM PST 24 45231925 ps
T191 /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1152050919 Feb 07 01:57:17 PM PST 24 Feb 07 01:57:20 PM PST 24 537337852 ps
T117 /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3506841849 Feb 07 01:57:15 PM PST 24 Feb 07 01:57:19 PM PST 24 991729844 ps
T192 /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1662206242 Feb 07 01:56:43 PM PST 24 Feb 07 01:56:48 PM PST 24 43991547 ps
T121 /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2774710718 Feb 07 01:56:51 PM PST 24 Feb 07 01:56:59 PM PST 24 521430272 ps
T193 /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.338490801 Feb 07 01:57:12 PM PST 24 Feb 07 01:57:13 PM PST 24 45846847 ps
T194 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.130803134 Feb 07 01:56:52 PM PST 24 Feb 07 01:57:00 PM PST 24 206325930 ps
T195 /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.482657251 Feb 07 01:56:50 PM PST 24 Feb 07 01:57:01 PM PST 24 1430743193 ps
T119 /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1381621300 Feb 07 01:57:16 PM PST 24 Feb 07 01:57:20 PM PST 24 68033984 ps
T196 /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3210238329 Feb 07 01:56:53 PM PST 24 Feb 07 01:56:59 PM PST 24 41283146 ps
T197 /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3079543896 Feb 07 01:57:14 PM PST 24 Feb 07 01:57:17 PM PST 24 168976537 ps
T122 /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2112534699 Feb 07 01:57:05 PM PST 24 Feb 07 01:57:08 PM PST 24 715706163 ps
T198 /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3474782344 Feb 07 01:56:49 PM PST 24 Feb 07 01:56:56 PM PST 24 22116908 ps
T199 /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2484238330 Feb 07 01:57:13 PM PST 24 Feb 07 01:57:16 PM PST 24 322821666 ps
T200 /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2469597783 Feb 07 01:57:16 PM PST 24 Feb 07 01:57:19 PM PST 24 80576061 ps
T201 /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3958442105 Feb 07 01:57:12 PM PST 24 Feb 07 01:57:13 PM PST 24 17435360 ps
T123 /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3840605029 Feb 07 01:56:57 PM PST 24 Feb 07 01:57:02 PM PST 24 573235244 ps
T202 /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3533438936 Feb 07 01:57:14 PM PST 24 Feb 07 01:57:16 PM PST 24 65246012 ps
T203 /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.293563665 Feb 07 01:57:14 PM PST 24 Feb 07 01:57:15 PM PST 24 44900115 ps
T204 /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.945161490 Feb 07 01:57:15 PM PST 24 Feb 07 01:57:19 PM PST 24 157584504 ps
T205 /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2827846902 Feb 07 01:57:14 PM PST 24 Feb 07 01:57:21 PM PST 24 1387654759 ps
T105 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.1617388637 Feb 07 02:08:19 PM PST 24 Feb 07 02:14:21 PM PST 24 28652765761 ps
T206 /workspace/coverage/default/2.sram_ctrl_mem_walk.665804781 Feb 07 02:00:44 PM PST 24 Feb 07 02:02:49 PM PST 24 2409639013 ps
T207 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1349392757 Feb 07 02:08:30 PM PST 24 Feb 07 02:09:11 PM PST 24 752745551 ps
T106 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.1256546577 Feb 07 02:02:38 PM PST 24 Feb 07 02:07:53 PM PST 24 3829294883 ps
T27 /workspace/coverage/default/27.sram_ctrl_alert_test.3828124066 Feb 07 02:03:37 PM PST 24 Feb 07 02:03:39 PM PST 24 36417728 ps
T208 /workspace/coverage/default/18.sram_ctrl_max_throughput.3875014151 Feb 07 02:01:46 PM PST 24 Feb 07 02:02:19 PM PST 24 2724069086 ps
T209 /workspace/coverage/default/19.sram_ctrl_bijection.3868301206 Feb 07 02:01:49 PM PST 24 Feb 07 02:16:39 PM PST 24 50067446414 ps
T210 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1887069167 Feb 07 02:00:49 PM PST 24 Feb 07 02:01:49 PM PST 24 3793653352 ps
T211 /workspace/coverage/default/16.sram_ctrl_bijection.1729791184 Feb 07 02:01:33 PM PST 24 Feb 07 02:32:03 PM PST 24 86425441671 ps
T107 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.3953664340 Feb 07 02:08:17 PM PST 24 Feb 07 02:14:23 PM PST 24 5698513110 ps
T212 /workspace/coverage/default/15.sram_ctrl_smoke.3826316753 Feb 07 02:01:33 PM PST 24 Feb 07 02:02:17 PM PST 24 669032695 ps
T30 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.3883895602 Feb 07 02:08:11 PM PST 24 Feb 07 03:12:39 PM PST 24 2456740336 ps
T213 /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.244663114 Feb 07 02:02:46 PM PST 24 Feb 07 03:01:54 PM PST 24 5075058215 ps
T214 /workspace/coverage/default/0.sram_ctrl_bijection.1110699467 Feb 07 02:00:35 PM PST 24 Feb 07 02:30:34 PM PST 24 26565770018 ps
T215 /workspace/coverage/default/48.sram_ctrl_ram_cfg.3293570612 Feb 07 02:09:34 PM PST 24 Feb 07 02:09:42 PM PST 24 1435733193 ps
T216 /workspace/coverage/default/1.sram_ctrl_smoke.1538517432 Feb 07 02:00:47 PM PST 24 Feb 07 02:03:05 PM PST 24 3221228926 ps
T84 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.3528177596 Feb 07 02:09:34 PM PST 24 Feb 07 02:10:47 PM PST 24 2707420075 ps
T217 /workspace/coverage/default/32.sram_ctrl_multiple_keys.2340956290 Feb 07 02:07:59 PM PST 24 Feb 07 02:08:48 PM PST 24 7561367555 ps
T218 /workspace/coverage/default/49.sram_ctrl_multiple_keys.1005274133 Feb 07 02:09:40 PM PST 24 Feb 07 02:31:23 PM PST 24 101844546335 ps
T28 /workspace/coverage/default/15.sram_ctrl_alert_test.3219345108 Feb 07 02:01:36 PM PST 24 Feb 07 02:01:38 PM PST 24 15368279 ps
T219 /workspace/coverage/default/23.sram_ctrl_partial_access.3656415098 Feb 07 02:02:39 PM PST 24 Feb 07 02:04:25 PM PST 24 809452041 ps
T32 /workspace/coverage/default/35.sram_ctrl_stress_all.4117788891 Feb 07 02:07:57 PM PST 24 Feb 07 03:07:35 PM PST 24 572558312475 ps
T220 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.2069315127 Feb 07 02:01:44 PM PST 24 Feb 07 02:02:23 PM PST 24 2945185668 ps
T18 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.2217935580 Feb 07 02:07:58 PM PST 24 Feb 07 02:15:51 PM PST 24 10006265505 ps
T114 /workspace/coverage/default/10.sram_ctrl_lc_escalation.1342471182 Feb 07 02:01:16 PM PST 24 Feb 07 02:02:45 PM PST 24 28538567651 ps
T221 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1985033809 Feb 07 02:09:33 PM PST 24 Feb 07 02:49:42 PM PST 24 1761259815 ps
T85 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.2598482909 Feb 07 02:08:14 PM PST 24 Feb 07 02:10:47 PM PST 24 19753802974 ps
T222 /workspace/coverage/default/34.sram_ctrl_max_throughput.35281937 Feb 07 02:07:58 PM PST 24 Feb 07 02:10:15 PM PST 24 791272693 ps
T223 /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.2837864894 Feb 07 02:07:59 PM PST 24 Feb 07 02:12:20 PM PST 24 10545398232 ps
T224 /workspace/coverage/default/1.sram_ctrl_bijection.2101995778 Feb 07 02:00:50 PM PST 24 Feb 07 02:31:22 PM PST 24 195320997739 ps
T133 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.4041428886 Feb 07 02:09:38 PM PST 24 Feb 07 02:17:15 PM PST 24 82423616596 ps
T225 /workspace/coverage/default/7.sram_ctrl_smoke.50045077 Feb 07 02:01:05 PM PST 24 Feb 07 02:01:26 PM PST 24 931198021 ps
T19 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.3637417158 Feb 07 02:09:13 PM PST 24 Feb 07 02:24:41 PM PST 24 11452331344 ps
T226 /workspace/coverage/default/47.sram_ctrl_smoke.3613210017 Feb 07 02:09:11 PM PST 24 Feb 07 02:09:37 PM PST 24 1031683699 ps
T26 /workspace/coverage/default/15.sram_ctrl_regwen.1018770960 Feb 07 02:01:29 PM PST 24 Feb 07 02:06:30 PM PST 24 14603558789 ps
T227 /workspace/coverage/default/20.sram_ctrl_partial_access.1305879824 Feb 07 02:02:13 PM PST 24 Feb 07 02:02:46 PM PST 24 855120895 ps
T228 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.1460037040 Feb 07 02:03:20 PM PST 24 Feb 07 02:03:50 PM PST 24 2586065168 ps
T229 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.718776184 Feb 07 02:00:53 PM PST 24 Feb 07 03:12:32 PM PST 24 4231135831 ps
T230 /workspace/coverage/default/8.sram_ctrl_multiple_keys.809977681 Feb 07 02:01:06 PM PST 24 Feb 07 02:27:50 PM PST 24 22335562665 ps
T231 /workspace/coverage/default/7.sram_ctrl_bijection.2860362261 Feb 07 02:01:05 PM PST 24 Feb 07 02:51:58 PM PST 24 358968416115 ps
T232 /workspace/coverage/default/44.sram_ctrl_smoke.2792294217 Feb 07 02:08:34 PM PST 24 Feb 07 02:11:04 PM PST 24 971239501 ps
T233 /workspace/coverage/default/28.sram_ctrl_bijection.2060332309 Feb 07 02:03:38 PM PST 24 Feb 07 02:33:20 PM PST 24 225198331825 ps
T234 /workspace/coverage/default/12.sram_ctrl_mem_walk.3722984868 Feb 07 02:01:20 PM PST 24 Feb 07 02:06:15 PM PST 24 21079273438 ps
T235 /workspace/coverage/default/26.sram_ctrl_multiple_keys.1886081315 Feb 07 02:03:19 PM PST 24 Feb 07 02:14:50 PM PST 24 13111337622 ps
T236 /workspace/coverage/default/3.sram_ctrl_smoke.2907043009 Feb 07 02:00:41 PM PST 24 Feb 07 02:01:56 PM PST 24 1631038565 ps
T237 /workspace/coverage/default/45.sram_ctrl_mem_walk.3916346242 Feb 07 02:09:02 PM PST 24 Feb 07 02:11:27 PM PST 24 13780312816 ps
T238 /workspace/coverage/default/34.sram_ctrl_bijection.1619616659 Feb 07 02:08:04 PM PST 24 Feb 07 02:16:46 PM PST 24 23268972045 ps
T239 /workspace/coverage/default/33.sram_ctrl_bijection.1149975795 Feb 07 02:08:03 PM PST 24 Feb 07 02:54:22 PM PST 24 119855425091 ps
T240 /workspace/coverage/default/35.sram_ctrl_mem_walk.3546878593 Feb 07 02:08:01 PM PST 24 Feb 07 02:12:04 PM PST 24 8045980845 ps
T241 /workspace/coverage/default/37.sram_ctrl_lc_escalation.2184667258 Feb 07 02:08:14 PM PST 24 Feb 07 02:08:43 PM PST 24 5215898998 ps
T242 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.4192983782 Feb 07 02:02:18 PM PST 24 Feb 07 02:08:30 PM PST 24 40950267035 ps
T243 /workspace/coverage/default/24.sram_ctrl_partial_access.3517581998 Feb 07 02:02:46 PM PST 24 Feb 07 02:03:25 PM PST 24 1455430755 ps
T136 /workspace/coverage/default/20.sram_ctrl_lc_escalation.3421760595 Feb 07 02:02:12 PM PST 24 Feb 07 02:07:25 PM PST 24 55281559954 ps
T244 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.4008514566 Feb 07 02:01:38 PM PST 24 Feb 07 04:47:21 PM PST 24 1981999709 ps
T245 /workspace/coverage/default/10.sram_ctrl_mem_walk.3386390620 Feb 07 02:01:14 PM PST 24 Feb 07 02:05:24 PM PST 24 3943919277 ps
T246 /workspace/coverage/default/27.sram_ctrl_multiple_keys.365886371 Feb 07 02:03:20 PM PST 24 Feb 07 02:13:30 PM PST 24 14052104599 ps
T124 /workspace/coverage/default/7.sram_ctrl_regwen.2926683897 Feb 07 02:01:09 PM PST 24 Feb 07 02:22:02 PM PST 24 16079107601 ps
T125 /workspace/coverage/default/37.sram_ctrl_stress_all.1979444356 Feb 07 02:08:14 PM PST 24 Feb 07 03:43:54 PM PST 24 431822514996 ps
T247 /workspace/coverage/default/1.sram_ctrl_mem_walk.78854118 Feb 07 02:00:46 PM PST 24 Feb 07 02:03:16 PM PST 24 9548640159 ps
T248 /workspace/coverage/default/19.sram_ctrl_partial_access.413403380 Feb 07 02:01:58 PM PST 24 Feb 07 02:02:31 PM PST 24 6968149601 ps
T249 /workspace/coverage/default/25.sram_ctrl_smoke.3109906680 Feb 07 02:02:58 PM PST 24 Feb 07 02:03:31 PM PST 24 1490727293 ps
T132 /workspace/coverage/default/3.sram_ctrl_executable.4151194117 Feb 07 02:01:04 PM PST 24 Feb 07 02:01:57 PM PST 24 10848980280 ps
T127 /workspace/coverage/default/40.sram_ctrl_stress_all.320972141 Feb 07 02:08:23 PM PST 24 Feb 07 04:04:33 PM PST 24 258942184900 ps
T29 /workspace/coverage/default/39.sram_ctrl_alert_test.2886376213 Feb 07 02:08:18 PM PST 24 Feb 07 02:08:19 PM PST 24 25538717 ps
T250 /workspace/coverage/default/3.sram_ctrl_alert_test.1583655563 Feb 07 02:01:04 PM PST 24 Feb 07 02:01:06 PM PST 24 56235756 ps
T251 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.650354276 Feb 07 02:08:11 PM PST 24 Feb 07 02:13:05 PM PST 24 36963563494 ps
T252 /workspace/coverage/default/43.sram_ctrl_partial_access.4044815368 Feb 07 02:08:20 PM PST 24 Feb 07 02:08:40 PM PST 24 4054021761 ps
T253 /workspace/coverage/default/13.sram_ctrl_alert_test.3499730548 Feb 07 02:01:34 PM PST 24 Feb 07 02:01:35 PM PST 24 19946896 ps
T129 /workspace/coverage/default/20.sram_ctrl_stress_all.367842914 Feb 07 02:02:22 PM PST 24 Feb 07 02:48:23 PM PST 24 77537880264 ps
T254 /workspace/coverage/default/40.sram_ctrl_regwen.1584928258 Feb 07 02:08:28 PM PST 24 Feb 07 02:14:37 PM PST 24 1573745071 ps
T255 /workspace/coverage/default/0.sram_ctrl_max_throughput.987335068 Feb 07 02:00:33 PM PST 24 Feb 07 02:01:35 PM PST 24 757156858 ps
T256 /workspace/coverage/default/45.sram_ctrl_alert_test.2136617766 Feb 07 02:09:02 PM PST 24 Feb 07 02:09:03 PM PST 24 25017613 ps
T257 /workspace/coverage/default/14.sram_ctrl_partial_access.3745978353 Feb 07 02:01:32 PM PST 24 Feb 07 02:02:02 PM PST 24 1405345362 ps
T258 /workspace/coverage/default/9.sram_ctrl_bijection.4157753546 Feb 07 02:01:14 PM PST 24 Feb 07 02:35:01 PM PST 24 121568565964 ps
T259 /workspace/coverage/default/11.sram_ctrl_ram_cfg.879238139 Feb 07 02:01:21 PM PST 24 Feb 07 02:01:28 PM PST 24 358829080 ps
T260 /workspace/coverage/default/19.sram_ctrl_smoke.537191069 Feb 07 02:01:54 PM PST 24 Feb 07 02:02:23 PM PST 24 547169926 ps
T86 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.2693288728 Feb 07 02:03:20 PM PST 24 Feb 07 02:05:17 PM PST 24 7135719959 ps
T261 /workspace/coverage/default/41.sram_ctrl_ram_cfg.2165394280 Feb 07 02:08:23 PM PST 24 Feb 07 02:08:29 PM PST 24 1401479290 ps
T87 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.3444741060 Feb 07 02:01:17 PM PST 24 Feb 07 02:04:02 PM PST 24 5113783111 ps
T88 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.2564423436 Feb 07 02:03:57 PM PST 24 Feb 07 02:05:13 PM PST 24 2452009086 ps
T262 /workspace/coverage/default/23.sram_ctrl_bijection.3246246446 Feb 07 02:02:44 PM PST 24 Feb 07 02:38:41 PM PST 24 33480207004 ps
T263 /workspace/coverage/default/42.sram_ctrl_bijection.2150171428 Feb 07 02:08:15 PM PST 24 Feb 07 02:23:11 PM PST 24 18943059609 ps
T264 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.671366043 Feb 07 02:01:46 PM PST 24 Feb 07 02:03:05 PM PST 24 2959834825 ps
T265 /workspace/coverage/default/6.sram_ctrl_smoke.1835954039 Feb 07 02:01:05 PM PST 24 Feb 07 02:01:21 PM PST 24 358596993 ps
T266 /workspace/coverage/default/44.sram_ctrl_stress_all.3177255903 Feb 07 02:08:49 PM PST 24 Feb 07 02:45:00 PM PST 24 62187650876 ps
T130 /workspace/coverage/default/22.sram_ctrl_regwen.3717024099 Feb 07 02:02:37 PM PST 24 Feb 07 02:05:38 PM PST 24 6724158704 ps
T267 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3559606007 Feb 07 02:01:20 PM PST 24 Feb 07 02:04:25 PM PST 24 3133670758 ps
T268 /workspace/coverage/default/3.sram_ctrl_multiple_keys.3082910699 Feb 07 02:00:41 PM PST 24 Feb 07 02:13:49 PM PST 24 13273386473 ps
T269 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.64407676 Feb 07 02:08:03 PM PST 24 Feb 07 02:08:36 PM PST 24 682266312 ps
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