Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	15221829	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

128250796

1

T1

29855

T2

3026

T4

3152

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	70515856	1			T1	82573		T2	30974		T4	1724
values[0x0]	34967920	1			T1	27577		T2	9722		T4	836
values[0x1]	37988849	1			T1	54773		T2	21309		T4	928

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7766996	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

135705629

1

T1

97861

T2

28178

T4

3327

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	574827	1			T1	588		T2	231		T8	403
valid_sources[0x01]	502161	1			T1	443		T2	265		T4	30
valid_sources[0x02]	508435	1			T1	636		T2	243		T8	367
valid_sources[0x03]	476539	1			T1	544		T2	229		T8	385
valid_sources[0x04]	694525	1			T1	622		T2	238		T8	394
valid_sources[0x05]	505541	1			T1	686		T2	261		T8	423
valid_sources[0x06]	494068	1			T1	697		T2	226		T4	37
valid_sources[0x07]	522652	1			T1	644		T2	227		T8	384
valid_sources[0x08]	482723	1			T1	633		T2	244		T8	388
valid_sources[0x09]	510776	1			T1	757		T2	244		T4	89
valid_sources[0x0a]	486657	1			T1	424		T2	226		T4	42
valid_sources[0x0b]	515690	1			T1	639		T2	246		T8	398
valid_sources[0x0c]	491238	1			T1	611		T2	227		T8	381
valid_sources[0x0d]	531848	1			T1	648		T2	285		T8	336
valid_sources[0x0e]	524309	1			T1	732		T2	240		T8	431
valid_sources[0x0f]	509130	1			T1	549		T2	251		T8	390
valid_sources[0x10]	519323	1			T1	415		T2	260		T4	312
valid_sources[0x11]	479282	1			T1	941		T2	249		T4	11
valid_sources[0x12]	506590	1			T1	589		T2	248		T8	384
valid_sources[0x13]	1344235	1			T1	724		T2	259		T8	325
valid_sources[0x14]	494422	1			T1	532		T2	227		T8	355
valid_sources[0x15]	485547	1			T1	593		T2	256		T8	366
valid_sources[0x16]	494120	1			T1	826		T2	256		T8	363
valid_sources[0x17]	481844	1			T1	760		T2	220		T4	82
valid_sources[0x18]	478183	1			T1	579		T2	233		T8	395
valid_sources[0x19]	489477	1			T1	513		T2	217		T8	378
valid_sources[0x1a]	1138092	1			T1	544		T2	261		T8	343
valid_sources[0x1b]	514184	1			T1	839		T2	252		T4	8
valid_sources[0x1c]	477639	1			T1	641		T2	237		T4	43
valid_sources[0x1d]	481907	1			T1	816		T2	243		T4	84
valid_sources[0x1e]	545612	1			T1	628		T2	268		T8	375
valid_sources[0x1f]	525723	1			T1	717		T2	255		T8	433
valid_sources[0x20]	493926	1			T1	656		T2	222		T8	415
valid_sources[0x21]	487514	1			T1	602		T2	252		T8	389
valid_sources[0x22]	503039	1			T1	598		T2	241		T4	72
valid_sources[0x23]	534629	1			T1	479		T2	224		T8	341
valid_sources[0x24]	488129	1			T1	568		T2	256		T8	366
valid_sources[0x25]	501869	1			T1	708		T2	225		T8	453
valid_sources[0x26]	1400506	1			T1	692		T2	255		T4	32
valid_sources[0x27]	495420	1			T1	732		T2	200		T8	351
valid_sources[0x28]	500204	1			T1	639		T2	246		T8	429
valid_sources[0x29]	483959	1			T1	591		T2	252		T8	385
valid_sources[0x2a]	487712	1			T1	669		T2	242		T8	380
valid_sources[0x2b]	488013	1			T1	866		T2	229		T4	74
valid_sources[0x2c]	495260	1			T1	740		T2	241		T8	372
valid_sources[0x2d]	519965	1			T1	671		T2	241		T8	387
valid_sources[0x2e]	492526	1			T1	596		T2	228		T8	365
valid_sources[0x2f]	494251	1			T1	638		T2	230		T8	392
valid_sources[0x30]	498683	1			T1	594		T2	262		T8	388
valid_sources[0x31]	495734	1			T1	796		T2	249		T4	15
valid_sources[0x32]	502835	1			T1	575		T2	243		T8	387
valid_sources[0x33]	494419	1			T1	704		T2	238		T8	368
valid_sources[0x34]	527717	1			T1	726		T2	246		T8	358
valid_sources[0x35]	530524	1			T1	617		T2	259		T8	385
valid_sources[0x36]	490883	1			T1	519		T2	216		T8	428
valid_sources[0x37]	481195	1			T1	554		T2	240		T4	56
valid_sources[0x38]	520083	1			T1	484		T2	260		T8	347
valid_sources[0x39]	494128	1			T1	715		T2	268		T8	415
valid_sources[0x3a]	551614	1			T1	579		T2	237		T4	13
valid_sources[0x3b]	521715	1			T1	615		T2	232		T8	398
valid_sources[0x3c]	683337	1			T1	669		T2	244		T8	392
valid_sources[0x3d]	498051	1			T1	543		T2	244		T8	387
valid_sources[0x3e]	488634	1			T1	929		T2	246		T8	412
valid_sources[0x3f]	492597	1			T1	604		T2	229		T8	347
valid_sources[0x40]	490031	1			T1	822		T2	242		T8	371
valid_sources[0x41]	519596	1			T1	471		T2	232		T8	412
valid_sources[0x42]	499141	1			T1	599		T2	229		T8	371
valid_sources[0x43]	482008	1			T1	605		T2	259		T4	91
valid_sources[0x44]	506293	1			T1	580		T2	227		T8	383
valid_sources[0x45]	494295	1			T1	739		T2	267		T8	397
valid_sources[0x46]	483116	1			T1	487		T2	250		T8	426
valid_sources[0x47]	510717	1			T1	830		T2	242		T8	395
valid_sources[0x48]	477186	1			T1	589		T2	221		T4	30
valid_sources[0x49]	498242	1			T1	635		T2	218		T8	374
valid_sources[0x4a]	523501	1			T1	831		T2	234		T4	98
valid_sources[0x4b]	495153	1			T1	538		T2	250		T8	306
valid_sources[0x4c]	494980	1			T1	587		T2	221		T4	16
valid_sources[0x4d]	563399	1			T1	537		T2	258		T8	353
valid_sources[0x4e]	550262	1			T1	604		T2	235		T8	365
valid_sources[0x4f]	484392	1			T1	741		T2	245		T8	457
valid_sources[0x50]	510790	1			T1	632		T2	242		T4	73
valid_sources[0x51]	496242	1			T1	710		T2	210		T8	413
valid_sources[0x52]	514775	1			T1	652		T2	216		T4	91
valid_sources[0x53]	540561	1			T1	569		T2	249		T8	408
valid_sources[0x54]	503359	1			T1	664		T2	246		T8	420
valid_sources[0x55]	1453022	1			T1	434		T2	231		T8	351
valid_sources[0x56]	495781	1			T1	754		T2	231		T8	370
valid_sources[0x57]	510486	1			T1	723		T2	231		T8	429
valid_sources[0x58]	755324	1			T1	592		T2	224		T8	356
valid_sources[0x59]	485151	1			T1	615		T2	250		T8	411
valid_sources[0x5a]	477243	1			T1	807		T2	283		T8	459
valid_sources[0x5b]	518014	1			T1	588		T2	208		T8	410
valid_sources[0x5c]	489087	1			T1	695		T2	246		T8	369
valid_sources[0x5d]	584488	1			T1	585		T2	238		T8	396
valid_sources[0x5e]	488896	1			T1	690		T2	236		T8	461
valid_sources[0x5f]	518893	1			T1	567		T2	245		T8	418
valid_sources[0x60]	474547	1			T1	422		T2	245		T8	402
valid_sources[0x61]	489448	1			T1	638		T2	232		T4	135
valid_sources[0x62]	539920	1			T1	534		T2	244		T8	392
valid_sources[0x63]	535328	1			T1	798		T2	243		T8	372
valid_sources[0x64]	500205	1			T1	642		T2	256		T8	431
valid_sources[0x65]	489457	1			T1	595		T2	225		T8	394
valid_sources[0x66]	490452	1			T1	406		T2	241		T8	348
valid_sources[0x67]	488776	1			T1	392		T2	238		T8	369
valid_sources[0x68]	480045	1			T1	542		T2	225		T8	375
valid_sources[0x69]	512819	1			T1	519		T2	235		T8	387
valid_sources[0x6a]	526619	1			T1	777		T2	258		T8	416
valid_sources[0x6b]	484948	1			T1	588		T2	241		T8	450
valid_sources[0x6c]	552357	1			T1	641		T2	259		T8	372
valid_sources[0x6d]	502068	1			T1	631		T2	261		T8	395
valid_sources[0x6e]	531533	1			T1	559		T2	242		T8	341
valid_sources[0x6f]	485491	1			T1	664		T2	237		T4	81
valid_sources[0x70]	503808	1			T1	807		T2	248		T8	393
valid_sources[0x71]	494388	1			T1	737		T2	237		T4	65
valid_sources[0x72]	581454	1			T1	812		T2	253		T8	339
valid_sources[0x73]	1404524	1			T1	646		T2	272		T8	391
valid_sources[0x74]	486211	1			T1	827		T2	239		T4	49
valid_sources[0x75]	482754	1			T1	779		T2	223		T8	349
valid_sources[0x76]	559132	1			T1	485		T2	267		T8	378
valid_sources[0x77]	516945	1			T1	380		T2	234		T8	422
valid_sources[0x78]	514762	1			T1	689		T2	232		T4	46
valid_sources[0x79]	493016	1			T1	760		T2	238		T8	396
valid_sources[0x7a]	521475	1			T1	571		T2	262		T8	434
valid_sources[0x7b]	486845	1			T1	677		T2	246		T8	404
valid_sources[0x7c]	502170	1			T1	468		T2	255		T8	349
valid_sources[0x7d]	499261	1			T1	1115		T2	236		T8	406
valid_sources[0x7e]	715237	1			T1	575		T2	209		T8	416
valid_sources[0x7f]	556333	1			T1	766		T2	280		T8	402
valid_sources[0x80]	499807	1			T1	692		T2	238		T4	22

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

62860202

1

T1

14898

T2

252

T4

1540

values[0x0]

all_enables

biggest_size

32699683

1

T1

7416

T2

1380

T4

792

values[0x1]

all_enables

biggest_size

32690911

1

T1

7541

T2

1394

T4

820

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	41026374	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

17452

1

T1

2

T4

19

T8

4

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	41019920	1			T1	23372		T2	4665		T3	16543
values[0x0]	11857	1			T1	2		T4	15		T8	7
values[0x1]	12049	1			T1	3		T2	1		T3	1

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	27354404	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

13689422

1

T1

7762

T2

1496

T3

5510

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	118850	1			T1	93		T2	19		T3	66
valid_sources[0x01]	151777	1			T1	76		T2	18		T3	70
valid_sources[0x02]	151909	1			T1	163		T2	15		T3	62
valid_sources[0x03]	310996	1			T1	86		T2	13		T3	72
valid_sources[0x04]	152636	1			T1	81		T2	20		T3	57
valid_sources[0x05]	120133	1			T1	51		T2	26		T3	54
valid_sources[0x06]	234570	1			T1	60		T2	16		T3	60
valid_sources[0x07]	116924	1			T1	111		T2	12		T3	69
valid_sources[0x08]	199601	1			T1	112		T2	22		T3	59
valid_sources[0x09]	145131	1			T1	105		T2	15		T3	63
valid_sources[0x0a]	120511	1			T1	65		T2	21		T3	62
valid_sources[0x0b]	121472	1			T1	100		T2	10		T3	66
valid_sources[0x0c]	202118	1			T1	122		T2	16		T3	66
valid_sources[0x0d]	119053	1			T1	113		T2	22		T3	61
valid_sources[0x0e]	241141	1			T1	122		T2	15		T3	66
valid_sources[0x0f]	119544	1			T1	63		T2	19		T3	74
valid_sources[0x10]	189268	1			T1	90		T2	19		T3	57
valid_sources[0x11]	151871	1			T1	53		T2	21		T3	64
valid_sources[0x12]	171015	1			T1	102		T2	14		T3	64
valid_sources[0x13]	146779	1			T1	167		T2	19		T3	64
valid_sources[0x14]	120251	1			T1	66		T2	27		T3	70
valid_sources[0x15]	119520	1			T1	90		T2	17		T3	83
valid_sources[0x16]	169301	1			T1	141		T2	11		T3	67
valid_sources[0x17]	357938	1			T1	89		T2	19		T3	55
valid_sources[0x18]	120102	1			T1	116		T2	17		T3	56
valid_sources[0x19]	121300	1			T1	151		T2	14		T3	58
valid_sources[0x1a]	117974	1			T1	128		T2	16		T3	56
valid_sources[0x1b]	199639	1			T1	71		T2	10		T3	65
valid_sources[0x1c]	201271	1			T1	72		T2	13		T3	73
valid_sources[0x1d]	121010	1			T1	141		T2	31		T3	62
valid_sources[0x1e]	125271	1			T1	71		T2	23		T3	85
valid_sources[0x1f]	336027	1			T1	131		T2	39		T3	59
valid_sources[0x20]	119606	1			T1	62		T2	21		T3	71
valid_sources[0x21]	152482	1			T1	109		T2	25		T3	69
valid_sources[0x22]	144790	1			T1	115		T2	21		T3	60
valid_sources[0x23]	128470	1			T1	80		T2	18		T3	74
valid_sources[0x24]	402194	1			T1	63		T2	14		T3	63
valid_sources[0x25]	119939	1			T1	143		T2	13		T3	59
valid_sources[0x26]	128606	1			T1	75		T2	13		T3	69
valid_sources[0x27]	118339	1			T1	56		T2	22		T3	62
valid_sources[0x28]	117555	1			T1	63		T2	36		T3	60
valid_sources[0x29]	119302	1			T1	84		T2	12		T3	79
valid_sources[0x2a]	119402	1			T1	92		T2	9		T3	69
valid_sources[0x2b]	119232	1			T1	101		T2	25		T3	66
valid_sources[0x2c]	151694	1			T1	76		T2	11		T3	55
valid_sources[0x2d]	120631	1			T1	55		T2	17		T3	60
valid_sources[0x2e]	118199	1			T1	114		T2	10		T3	62
valid_sources[0x2f]	119123	1			T1	58		T2	17		T3	71
valid_sources[0x30]	118443	1			T1	93		T2	27		T3	84
valid_sources[0x31]	118999	1			T1	101		T2	21		T3	63
valid_sources[0x32]	118596	1			T1	82		T2	15		T3	71
valid_sources[0x33]	203891	1			T1	94		T2	16		T3	61
valid_sources[0x34]	119787	1			T1	87		T2	19		T3	67
valid_sources[0x35]	151483	1			T1	75		T2	18		T3	64
valid_sources[0x36]	118355	1			T1	114		T2	13		T3	80
valid_sources[0x37]	345942	1			T1	162		T2	30		T3	74
valid_sources[0x38]	118704	1			T1	76		T2	10		T3	59
valid_sources[0x39]	136876	1			T1	70		T2	21		T3	57
valid_sources[0x3a]	137327	1			T1	67		T2	12		T3	75
valid_sources[0x3b]	205652	1			T1	45		T2	18		T3	56
valid_sources[0x3c]	118606	1			T1	70		T2	15		T3	64
valid_sources[0x3d]	119110	1			T1	74		T2	28		T3	50
valid_sources[0x3e]	153308	1			T1	169		T2	16		T3	68
valid_sources[0x3f]	119240	1			T1	138		T2	37		T3	64
valid_sources[0x40]	150626	1			T1	105		T2	18		T3	70
valid_sources[0x41]	241896	1			T1	76		T2	21		T3	58
valid_sources[0x42]	137209	1			T1	154		T2	17		T3	57
valid_sources[0x43]	187562	1			T1	98		T2	12		T3	59
valid_sources[0x44]	153099	1			T1	162		T2	28		T3	76
valid_sources[0x45]	157372	1			T1	58		T2	22		T3	58
valid_sources[0x46]	234157	1			T1	139		T2	9		T3	78
valid_sources[0x47]	121204	1			T1	54		T2	21		T3	70
valid_sources[0x48]	118962	1			T1	103		T2	16		T3	56
valid_sources[0x49]	152124	1			T1	88		T2	22		T3	63
valid_sources[0x4a]	120762	1			T1	70		T2	14		T3	66
valid_sources[0x4b]	120431	1			T1	83		T2	16		T3	53
valid_sources[0x4c]	137491	1			T1	159		T2	15		T3	72
valid_sources[0x4d]	139933	1			T1	67		T2	22		T3	64
valid_sources[0x4e]	120734	1			T1	126		T2	19		T3	69
valid_sources[0x4f]	202116	1			T1	74		T2	18		T3	69
valid_sources[0x50]	150508	1			T1	93		T2	19		T3	65
valid_sources[0x51]	117833	1			T1	102		T2	16		T3	61
valid_sources[0x52]	118076	1			T1	120		T2	25		T3	52
valid_sources[0x53]	132016	1			T1	55		T2	18		T3	73
valid_sources[0x54]	119465	1			T1	129		T2	18		T3	70
valid_sources[0x55]	118207	1			T1	51		T2	14		T3	63
valid_sources[0x56]	119047	1			T1	81		T2	23		T3	58
valid_sources[0x57]	120335	1			T1	103		T2	17		T3	69
valid_sources[0x58]	125139	1			T1	102		T2	21		T3	75
valid_sources[0x59]	126852	1			T1	38		T2	16		T3	84
valid_sources[0x5a]	429828	1			T1	126		T2	23		T3	68
valid_sources[0x5b]	185125	1			T1	83		T2	19		T3	62
valid_sources[0x5c]	140359	1			T1	60		T2	14		T3	82
valid_sources[0x5d]	130571	1			T1	81		T2	14		T3	80
valid_sources[0x5e]	119197	1			T1	88		T2	20		T3	64
valid_sources[0x5f]	139891	1			T1	47		T2	19		T3	55
valid_sources[0x60]	118749	1			T1	53		T2	18		T3	46
valid_sources[0x61]	486421	1			T1	80		T2	21		T3	50
valid_sources[0x62]	119453	1			T1	101		T2	16		T3	65
valid_sources[0x63]	118101	1			T1	74		T2	24		T3	64
valid_sources[0x64]	200829	1			T1	98		T2	9		T3	64
valid_sources[0x65]	118928	1			T1	67		T2	7		T3	70
valid_sources[0x66]	118316	1			T1	46		T2	15		T3	60
valid_sources[0x67]	358621	1			T1	88		T2	20		T3	73
valid_sources[0x68]	319329	1			T1	113		T2	18		T3	42
valid_sources[0x69]	119386	1			T1	50		T2	24		T3	69
valid_sources[0x6a]	118560	1			T1	132		T2	29		T3	72
valid_sources[0x6b]	118655	1			T1	75		T2	19		T3	53
valid_sources[0x6c]	121236	1			T1	107		T2	12		T3	55
valid_sources[0x6d]	119156	1			T1	71		T2	18		T3	57
valid_sources[0x6e]	118627	1			T1	79		T2	24		T3	41
valid_sources[0x6f]	134718	1			T1	144		T2	14		T3	65
valid_sources[0x70]	119042	1			T1	123		T2	15		T3	78
valid_sources[0x71]	119691	1			T1	117		T2	13		T3	70
valid_sources[0x72]	403099	1			T1	58		T2	18		T3	56
valid_sources[0x73]	118711	1			T1	42		T2	23		T3	67
valid_sources[0x74]	118525	1			T1	129		T2	17		T3	79
valid_sources[0x75]	119272	1			T1	88		T2	17		T3	69
valid_sources[0x76]	119672	1			T1	88		T2	10		T3	64
valid_sources[0x77]	119246	1			T1	128		T2	22		T3	66
valid_sources[0x78]	117211	1			T1	49		T2	15		T3	49
valid_sources[0x79]	118941	1			T1	126		T2	19		T3	75
valid_sources[0x7a]	119155	1			T1	92		T2	16		T3	66
valid_sources[0x7b]	118869	1			T1	103		T2	20		T3	74
valid_sources[0x7c]	120232	1			T1	55		T2	17		T3	55
valid_sources[0x7d]	124359	1			T1	140		T2	27		T3	55
valid_sources[0x7e]	120735	1			T1	94		T2	20		T3	66
valid_sources[0x7f]	124793	1			T1	66		T2	30		T3	62
valid_sources[0x80]	217419	1			T1	93		T2	12		T3	69

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

6683

1

T4

14

T6

14

T26

5

values[0x0]

all_enables

biggest_size

6092

1

T1

2

T4

4

T8

2

values[0x1]

all_enables

biggest_size

4677

1

T4

1

T8

2

T9

4