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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.28 100.00 97.62 100.00 100.00 99.15 99.70 98.52


Total test records in report: 894
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T310 /workspace/coverage/default/29.sram_ctrl_regwen.3762824403 Feb 18 01:28:48 PM PST 24 Feb 18 01:33:31 PM PST 24 3624398305 ps
T311 /workspace/coverage/default/27.sram_ctrl_bijection.3377418427 Feb 18 01:28:17 PM PST 24 Feb 18 01:51:21 PM PST 24 20005469831 ps
T312 /workspace/coverage/default/1.sram_ctrl_alert_test.3870745048 Feb 18 01:24:03 PM PST 24 Feb 18 01:24:04 PM PST 24 19714585 ps
T313 /workspace/coverage/default/41.sram_ctrl_lc_escalation.882571923 Feb 18 01:30:39 PM PST 24 Feb 18 01:32:53 PM PST 24 11912080694 ps
T314 /workspace/coverage/default/38.sram_ctrl_alert_test.4088097176 Feb 18 01:30:14 PM PST 24 Feb 18 01:30:15 PM PST 24 19242589 ps
T315 /workspace/coverage/default/7.sram_ctrl_max_throughput.1650257056 Feb 18 01:24:55 PM PST 24 Feb 18 01:26:45 PM PST 24 2109435638 ps
T316 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.1507343826 Feb 18 01:28:07 PM PST 24 Feb 18 01:41:32 PM PST 24 6366943175 ps
T317 /workspace/coverage/default/18.sram_ctrl_bijection.67338809 Feb 18 01:26:36 PM PST 24 Feb 18 01:37:42 PM PST 24 43243805724 ps
T318 /workspace/coverage/default/22.sram_ctrl_partial_access.959301646 Feb 18 01:27:31 PM PST 24 Feb 18 01:28:50 PM PST 24 3289930666 ps
T319 /workspace/coverage/default/31.sram_ctrl_partial_access.435610009 Feb 18 01:28:59 PM PST 24 Feb 18 01:29:32 PM PST 24 6468634886 ps
T320 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.4136494122 Feb 18 01:29:20 PM PST 24 Feb 18 01:34:33 PM PST 24 19859147457 ps
T321 /workspace/coverage/default/14.sram_ctrl_alert_test.1093052922 Feb 18 01:26:07 PM PST 24 Feb 18 01:26:08 PM PST 24 67607573 ps
T322 /workspace/coverage/default/14.sram_ctrl_bijection.3470208542 Feb 18 01:25:56 PM PST 24 Feb 18 01:49:48 PM PST 24 20022432797 ps
T323 /workspace/coverage/default/18.sram_ctrl_regwen.502035867 Feb 18 01:26:53 PM PST 24 Feb 18 01:31:47 PM PST 24 1481895900 ps
T324 /workspace/coverage/default/19.sram_ctrl_ram_cfg.935960281 Feb 18 01:27:06 PM PST 24 Feb 18 01:27:13 PM PST 24 643821993 ps
T325 /workspace/coverage/default/33.sram_ctrl_max_throughput.2617129632 Feb 18 01:29:20 PM PST 24 Feb 18 01:30:10 PM PST 24 1455198152 ps
T326 /workspace/coverage/default/24.sram_ctrl_multiple_keys.4246616875 Feb 18 01:27:57 PM PST 24 Feb 18 01:40:03 PM PST 24 36499360602 ps
T327 /workspace/coverage/default/10.sram_ctrl_bijection.1102095358 Feb 18 01:25:11 PM PST 24 Feb 18 01:55:33 PM PST 24 51476766047 ps
T328 /workspace/coverage/default/17.sram_ctrl_executable.2574024983 Feb 18 01:26:37 PM PST 24 Feb 18 01:36:05 PM PST 24 9846353323 ps
T329 /workspace/coverage/default/12.sram_ctrl_max_throughput.1119653045 Feb 18 01:25:41 PM PST 24 Feb 18 01:26:28 PM PST 24 2943407181 ps
T330 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.3300431582 Feb 18 01:30:25 PM PST 24 Feb 18 01:37:47 PM PST 24 17389733632 ps
T331 /workspace/coverage/default/8.sram_ctrl_smoke.3546771832 Feb 18 01:24:54 PM PST 24 Feb 18 01:25:06 PM PST 24 1339976034 ps
T332 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.4211323090 Feb 18 01:27:47 PM PST 24 Feb 18 02:08:47 PM PST 24 53347139255 ps
T333 /workspace/coverage/default/33.sram_ctrl_multiple_keys.2539724294 Feb 18 01:29:21 PM PST 24 Feb 18 02:03:59 PM PST 24 14608012289 ps
T334 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.3847115346 Feb 18 01:29:37 PM PST 24 Feb 18 01:36:46 PM PST 24 6041433102 ps
T335 /workspace/coverage/default/35.sram_ctrl_stress_all.884308417 Feb 18 01:29:39 PM PST 24 Feb 18 02:04:49 PM PST 24 99047940307 ps
T336 /workspace/coverage/default/2.sram_ctrl_ram_cfg.2927496996 Feb 18 01:24:26 PM PST 24 Feb 18 01:24:40 PM PST 24 1983317635 ps
T337 /workspace/coverage/default/38.sram_ctrl_smoke.1183605365 Feb 18 01:30:07 PM PST 24 Feb 18 01:30:22 PM PST 24 350269498 ps
T338 /workspace/coverage/default/0.sram_ctrl_access_during_key_req.3005541853 Feb 18 01:23:58 PM PST 24 Feb 18 02:02:46 PM PST 24 85960514097 ps
T339 /workspace/coverage/default/15.sram_ctrl_bijection.3241074717 Feb 18 01:26:08 PM PST 24 Feb 18 02:15:03 PM PST 24 172376663669 ps
T82 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.3171330913 Feb 18 01:28:10 PM PST 24 Feb 18 01:30:32 PM PST 24 5949480196 ps
T340 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.2952366905 Feb 18 01:29:31 PM PST 24 Feb 18 01:30:12 PM PST 24 1448124620 ps
T341 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.3927376337 Feb 18 01:30:39 PM PST 24 Feb 18 01:33:10 PM PST 24 43720933099 ps
T342 /workspace/coverage/default/33.sram_ctrl_lc_escalation.754035157 Feb 18 01:29:22 PM PST 24 Feb 18 01:31:06 PM PST 24 4386453861 ps
T343 /workspace/coverage/default/9.sram_ctrl_regwen.2748526365 Feb 18 01:25:04 PM PST 24 Feb 18 01:38:54 PM PST 24 72115196204 ps
T344 /workspace/coverage/default/37.sram_ctrl_stress_all.1560104988 Feb 18 01:29:56 PM PST 24 Feb 18 02:10:35 PM PST 24 61320351319 ps
T345 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.1023412595 Feb 18 01:31:26 PM PST 24 Feb 18 01:37:24 PM PST 24 4623889408 ps
T346 /workspace/coverage/default/40.sram_ctrl_mem_partial_access.2061671137 Feb 18 01:30:34 PM PST 24 Feb 18 01:31:48 PM PST 24 3971570628 ps
T347 /workspace/coverage/default/18.sram_ctrl_multiple_keys.3122430023 Feb 18 01:26:37 PM PST 24 Feb 18 01:31:55 PM PST 24 4824668000 ps
T348 /workspace/coverage/default/8.sram_ctrl_ram_cfg.1491298108 Feb 18 01:25:00 PM PST 24 Feb 18 01:25:07 PM PST 24 2582139824 ps
T349 /workspace/coverage/default/13.sram_ctrl_bijection.77152710 Feb 18 01:25:45 PM PST 24 Feb 18 01:55:01 PM PST 24 158182605949 ps
T350 /workspace/coverage/default/30.sram_ctrl_access_during_key_req.3853799377 Feb 18 01:28:57 PM PST 24 Feb 18 01:31:15 PM PST 24 2243766117 ps
T351 /workspace/coverage/default/16.sram_ctrl_regwen.53994712 Feb 18 01:26:20 PM PST 24 Feb 18 01:39:13 PM PST 24 10756109522 ps
T352 /workspace/coverage/default/17.sram_ctrl_alert_test.4032267192 Feb 18 01:26:39 PM PST 24 Feb 18 01:26:40 PM PST 24 33082809 ps
T353 /workspace/coverage/default/36.sram_ctrl_partial_access.1767907126 Feb 18 01:29:46 PM PST 24 Feb 18 01:32:03 PM PST 24 3779983815 ps
T354 /workspace/coverage/default/36.sram_ctrl_regwen.1570347643 Feb 18 01:29:46 PM PST 24 Feb 18 01:49:21 PM PST 24 129571069421 ps
T355 /workspace/coverage/default/16.sram_ctrl_partial_access.2955476664 Feb 18 01:26:16 PM PST 24 Feb 18 01:26:47 PM PST 24 5779719514 ps
T356 /workspace/coverage/default/18.sram_ctrl_smoke.3560803502 Feb 18 01:26:37 PM PST 24 Feb 18 01:26:57 PM PST 24 2159858794 ps
T357 /workspace/coverage/default/42.sram_ctrl_ram_cfg.2283642233 Feb 18 01:30:59 PM PST 24 Feb 18 01:31:06 PM PST 24 1366305808 ps
T358 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.2198795132 Feb 18 01:30:59 PM PST 24 Feb 18 01:33:12 PM PST 24 1655678605 ps
T359 /workspace/coverage/default/24.sram_ctrl_ram_cfg.2085339968 Feb 18 01:28:01 PM PST 24 Feb 18 01:28:10 PM PST 24 357092545 ps
T360 /workspace/coverage/default/46.sram_ctrl_smoke.1473156673 Feb 18 01:31:32 PM PST 24 Feb 18 01:32:01 PM PST 24 533754551 ps
T361 /workspace/coverage/default/23.sram_ctrl_smoke.2296344748 Feb 18 01:27:37 PM PST 24 Feb 18 01:27:53 PM PST 24 346032976 ps
T362 /workspace/coverage/default/35.sram_ctrl_regwen.1114184602 Feb 18 01:29:41 PM PST 24 Feb 18 01:41:57 PM PST 24 14184217840 ps
T363 /workspace/coverage/default/36.sram_ctrl_smoke.3910470046 Feb 18 01:29:40 PM PST 24 Feb 18 01:30:13 PM PST 24 4931542134 ps
T364 /workspace/coverage/default/37.sram_ctrl_mem_walk.992675018 Feb 18 01:29:58 PM PST 24 Feb 18 01:32:31 PM PST 24 41287978218 ps
T365 /workspace/coverage/default/2.sram_ctrl_partial_access.1230151183 Feb 18 01:24:19 PM PST 24 Feb 18 01:24:37 PM PST 24 902124642 ps
T366 /workspace/coverage/default/31.sram_ctrl_alert_test.2093160724 Feb 18 01:29:13 PM PST 24 Feb 18 01:29:14 PM PST 24 66370100 ps
T367 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.3080314511 Feb 18 01:24:22 PM PST 24 Feb 18 01:28:47 PM PST 24 3597457391 ps
T368 /workspace/coverage/default/31.sram_ctrl_lc_escalation.2161099900 Feb 18 01:28:58 PM PST 24 Feb 18 01:32:09 PM PST 24 8904604906 ps
T369 /workspace/coverage/default/3.sram_ctrl_max_throughput.1637436857 Feb 18 01:24:22 PM PST 24 Feb 18 01:25:32 PM PST 24 4098334138 ps
T370 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1366565170 Feb 18 01:31:44 PM PST 24 Feb 18 01:33:19 PM PST 24 794472787 ps
T371 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.2518960276 Feb 18 01:28:16 PM PST 24 Feb 18 01:31:24 PM PST 24 3947926442 ps
T372 /workspace/coverage/default/17.sram_ctrl_multiple_keys.3026636381 Feb 18 01:26:26 PM PST 24 Feb 18 01:54:09 PM PST 24 24397280079 ps
T373 /workspace/coverage/default/6.sram_ctrl_partial_access.1688549281 Feb 18 01:24:39 PM PST 24 Feb 18 01:25:04 PM PST 24 1326323772 ps
T374 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.2755433299 Feb 18 01:27:32 PM PST 24 Feb 18 01:50:19 PM PST 24 38056401494 ps
T375 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.439214470 Feb 18 01:26:37 PM PST 24 Feb 18 01:30:30 PM PST 24 3674337716 ps
T376 /workspace/coverage/default/44.sram_ctrl_partial_access.3379594928 Feb 18 01:31:11 PM PST 24 Feb 18 01:31:30 PM PST 24 385483203 ps
T377 /workspace/coverage/default/28.sram_ctrl_alert_test.2939660855 Feb 18 01:28:42 PM PST 24 Feb 18 01:28:44 PM PST 24 17698184 ps
T378 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.632931573 Feb 18 01:29:14 PM PST 24 Feb 18 01:40:24 PM PST 24 8449477089 ps
T379 /workspace/coverage/default/10.sram_ctrl_partial_access.3689298378 Feb 18 01:25:10 PM PST 24 Feb 18 01:25:48 PM PST 24 28885517699 ps
T380 /workspace/coverage/default/34.sram_ctrl_bijection.3913959735 Feb 18 01:29:26 PM PST 24 Feb 18 02:05:10 PM PST 24 95927742632 ps
T381 /workspace/coverage/default/13.sram_ctrl_ram_cfg.1916647230 Feb 18 01:25:45 PM PST 24 Feb 18 01:25:52 PM PST 24 889631935 ps
T382 /workspace/coverage/default/34.sram_ctrl_stress_all.3535308055 Feb 18 01:29:34 PM PST 24 Feb 18 02:31:33 PM PST 24 457216586160 ps
T383 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.3147218170 Feb 18 01:25:31 PM PST 24 Feb 18 01:28:02 PM PST 24 4603114164 ps
T384 /workspace/coverage/default/49.sram_ctrl_mem_walk.2290759894 Feb 18 01:32:07 PM PST 24 Feb 18 01:37:06 PM PST 24 14062161225 ps
T385 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.1176524372 Feb 18 01:25:45 PM PST 24 Feb 18 01:29:40 PM PST 24 6196621198 ps
T386 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.3020601940 Feb 18 01:30:32 PM PST 24 Feb 18 01:31:08 PM PST 24 1423134716 ps
T387 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.1439379897 Feb 18 01:27:19 PM PST 24 Feb 18 01:27:47 PM PST 24 677656953 ps
T388 /workspace/coverage/default/27.sram_ctrl_smoke.3206358482 Feb 18 01:28:18 PM PST 24 Feb 18 01:28:58 PM PST 24 3431143956 ps
T389 /workspace/coverage/default/22.sram_ctrl_regwen.2528325930 Feb 18 01:27:30 PM PST 24 Feb 18 01:35:48 PM PST 24 17871365558 ps
T390 /workspace/coverage/default/19.sram_ctrl_mem_walk.1374924310 Feb 18 01:27:05 PM PST 24 Feb 18 01:31:06 PM PST 24 15766640116 ps
T391 /workspace/coverage/default/2.sram_ctrl_regwen.3157246954 Feb 18 01:24:19 PM PST 24 Feb 18 01:35:15 PM PST 24 20758614615 ps
T392 /workspace/coverage/default/20.sram_ctrl_regwen.107723257 Feb 18 01:27:13 PM PST 24 Feb 18 01:41:09 PM PST 24 2495093462 ps
T393 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.3166071226 Feb 18 01:29:21 PM PST 24 Feb 18 01:31:36 PM PST 24 3101956416 ps
T394 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.1937643384 Feb 18 01:27:12 PM PST 24 Feb 18 01:27:45 PM PST 24 3097647999 ps
T395 /workspace/coverage/default/1.sram_ctrl_max_throughput.1255622313 Feb 18 01:24:07 PM PST 24 Feb 18 01:25:29 PM PST 24 2969413570 ps
T396 /workspace/coverage/default/17.sram_ctrl_partial_access.3217688036 Feb 18 01:26:33 PM PST 24 Feb 18 01:27:05 PM PST 24 795205162 ps
T397 /workspace/coverage/default/35.sram_ctrl_alert_test.1431566097 Feb 18 01:29:39 PM PST 24 Feb 18 01:29:42 PM PST 24 15587992 ps
T398 /workspace/coverage/default/46.sram_ctrl_ram_cfg.2631506687 Feb 18 01:31:50 PM PST 24 Feb 18 01:31:57 PM PST 24 361511840 ps
T399 /workspace/coverage/default/12.sram_ctrl_mem_walk.1145445567 Feb 18 01:25:42 PM PST 24 Feb 18 01:30:40 PM PST 24 43023853163 ps
T400 /workspace/coverage/default/34.sram_ctrl_executable.2195926449 Feb 18 01:29:35 PM PST 24 Feb 18 01:36:25 PM PST 24 70153096625 ps
T401 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.823620323 Feb 18 01:25:01 PM PST 24 Feb 18 01:25:31 PM PST 24 3337425856 ps
T402 /workspace/coverage/default/27.sram_ctrl_max_throughput.4219320773 Feb 18 01:28:18 PM PST 24 Feb 18 01:31:06 PM PST 24 1583587196 ps
T403 /workspace/coverage/default/28.sram_ctrl_regwen.3091602480 Feb 18 01:28:47 PM PST 24 Feb 18 01:57:21 PM PST 24 140739024917 ps
T404 /workspace/coverage/default/43.sram_ctrl_alert_test.1388742398 Feb 18 01:31:10 PM PST 24 Feb 18 01:31:11 PM PST 24 44810960 ps
T405 /workspace/coverage/default/23.sram_ctrl_max_throughput.2527155251 Feb 18 01:27:46 PM PST 24 Feb 18 01:28:51 PM PST 24 733848831 ps
T406 /workspace/coverage/default/30.sram_ctrl_multiple_keys.2970238983 Feb 18 01:28:52 PM PST 24 Feb 18 01:32:43 PM PST 24 2352555728 ps
T407 /workspace/coverage/default/27.sram_ctrl_regwen.1417058115 Feb 18 01:28:30 PM PST 24 Feb 18 01:41:54 PM PST 24 11302725611 ps
T408 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.389209196 Feb 18 01:29:08 PM PST 24 Feb 18 01:30:26 PM PST 24 9406830616 ps
T409 /workspace/coverage/default/47.sram_ctrl_partial_access.617971819 Feb 18 01:31:53 PM PST 24 Feb 18 01:32:21 PM PST 24 1464392575 ps
T410 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.3827398884 Feb 18 01:28:10 PM PST 24 Feb 18 01:30:53 PM PST 24 1604655415 ps
T411 /workspace/coverage/default/7.sram_ctrl_mem_walk.3381183518 Feb 18 01:24:54 PM PST 24 Feb 18 01:27:19 PM PST 24 18612531181 ps
T412 /workspace/coverage/default/49.sram_ctrl_regwen.3185129576 Feb 18 01:32:07 PM PST 24 Feb 18 01:50:50 PM PST 24 14383850268 ps
T413 /workspace/coverage/default/40.sram_ctrl_bijection.1137492817 Feb 18 01:30:22 PM PST 24 Feb 18 01:53:14 PM PST 24 169082703548 ps
T414 /workspace/coverage/default/10.sram_ctrl_max_throughput.3117625740 Feb 18 01:25:10 PM PST 24 Feb 18 01:28:05 PM PST 24 1591945271 ps
T415 /workspace/coverage/default/14.sram_ctrl_ram_cfg.3638706925 Feb 18 01:26:02 PM PST 24 Feb 18 01:26:09 PM PST 24 1880896114 ps
T416 /workspace/coverage/default/21.sram_ctrl_mem_walk.3996516185 Feb 18 01:27:24 PM PST 24 Feb 18 01:29:31 PM PST 24 2058413832 ps
T417 /workspace/coverage/default/19.sram_ctrl_alert_test.4245373986 Feb 18 01:27:11 PM PST 24 Feb 18 01:27:13 PM PST 24 11827353 ps
T418 /workspace/coverage/default/42.sram_ctrl_multiple_keys.2636617167 Feb 18 01:30:56 PM PST 24 Feb 18 01:35:40 PM PST 24 39049039402 ps
T18 /workspace/coverage/default/4.sram_ctrl_sec_cm.52352186 Feb 18 01:24:16 PM PST 24 Feb 18 01:24:20 PM PST 24 416303225 ps
T419 /workspace/coverage/default/32.sram_ctrl_regwen.2967557406 Feb 18 01:29:25 PM PST 24 Feb 18 01:53:35 PM PST 24 113750979797 ps
T420 /workspace/coverage/default/41.sram_ctrl_max_throughput.3321981122 Feb 18 01:30:33 PM PST 24 Feb 18 01:31:04 PM PST 24 2802436363 ps
T421 /workspace/coverage/default/39.sram_ctrl_smoke.151424777 Feb 18 01:30:15 PM PST 24 Feb 18 01:30:34 PM PST 24 1103787993 ps
T422 /workspace/coverage/default/22.sram_ctrl_alert_test.3450300721 Feb 18 01:27:38 PM PST 24 Feb 18 01:27:41 PM PST 24 15517759 ps
T423 /workspace/coverage/default/17.sram_ctrl_regwen.1389175546 Feb 18 01:26:39 PM PST 24 Feb 18 01:48:56 PM PST 24 3693137749 ps
T424 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.199303919 Feb 18 01:24:07 PM PST 24 Feb 18 01:28:56 PM PST 24 6100668175 ps
T425 /workspace/coverage/default/37.sram_ctrl_partial_access.3294349014 Feb 18 01:29:51 PM PST 24 Feb 18 01:30:15 PM PST 24 458968187 ps
T426 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.2603780422 Feb 18 01:31:44 PM PST 24 Feb 18 01:46:15 PM PST 24 15474131414 ps
T427 /workspace/coverage/default/49.sram_ctrl_ram_cfg.155285969 Feb 18 01:32:04 PM PST 24 Feb 18 01:32:12 PM PST 24 1296983718 ps
T428 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.1458504363 Feb 18 01:31:49 PM PST 24 Feb 18 01:35:11 PM PST 24 22846268362 ps
T429 /workspace/coverage/default/49.sram_ctrl_bijection.3856182374 Feb 18 01:32:08 PM PST 24 Feb 18 01:42:48 PM PST 24 9922790844 ps
T430 /workspace/coverage/default/24.sram_ctrl_bijection.3871499893 Feb 18 01:27:55 PM PST 24 Feb 18 01:51:39 PM PST 24 83328783358 ps
T431 /workspace/coverage/default/26.sram_ctrl_regwen.1594890867 Feb 18 01:28:11 PM PST 24 Feb 18 01:48:13 PM PST 24 56560969382 ps
T432 /workspace/coverage/default/2.sram_ctrl_bijection.2033421137 Feb 18 01:24:02 PM PST 24 Feb 18 01:53:48 PM PST 24 313277019446 ps
T433 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2663568282 Feb 18 01:31:23 PM PST 24 Feb 18 01:32:55 PM PST 24 5722756338 ps
T434 /workspace/coverage/default/9.sram_ctrl_mem_walk.2642479335 Feb 18 01:25:03 PM PST 24 Feb 18 01:27:05 PM PST 24 4030475333 ps
T435 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.1877615370 Feb 18 01:31:18 PM PST 24 Feb 18 02:00:54 PM PST 24 42978638940 ps
T436 /workspace/coverage/default/15.sram_ctrl_regwen.869262576 Feb 18 01:26:17 PM PST 24 Feb 18 01:40:03 PM PST 24 19658134802 ps
T437 /workspace/coverage/default/13.sram_ctrl_regwen.747890613 Feb 18 01:25:45 PM PST 24 Feb 18 01:39:26 PM PST 24 3370961238 ps
T438 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.485599204 Feb 18 01:28:53 PM PST 24 Feb 18 01:36:00 PM PST 24 6740584492 ps
T439 /workspace/coverage/default/6.sram_ctrl_regwen.2092096683 Feb 18 01:24:38 PM PST 24 Feb 18 01:44:29 PM PST 24 75878813835 ps
T440 /workspace/coverage/default/5.sram_ctrl_ram_cfg.444466206 Feb 18 01:24:30 PM PST 24 Feb 18 01:24:39 PM PST 24 2808131463 ps
T441 /workspace/coverage/default/13.sram_ctrl_smoke.3260254986 Feb 18 01:25:42 PM PST 24 Feb 18 01:27:53 PM PST 24 5083247724 ps
T442 /workspace/coverage/default/27.sram_ctrl_mem_walk.3833768290 Feb 18 01:28:31 PM PST 24 Feb 18 01:31:29 PM PST 24 112015345673 ps
T443 /workspace/coverage/default/36.sram_ctrl_multiple_keys.4068111536 Feb 18 01:29:40 PM PST 24 Feb 18 01:33:14 PM PST 24 13740478173 ps
T444 /workspace/coverage/default/26.sram_ctrl_ram_cfg.1592992808 Feb 18 01:28:10 PM PST 24 Feb 18 01:28:21 PM PST 24 544957317 ps
T445 /workspace/coverage/default/23.sram_ctrl_ram_cfg.3640685812 Feb 18 01:27:47 PM PST 24 Feb 18 01:27:55 PM PST 24 709891668 ps
T446 /workspace/coverage/default/14.sram_ctrl_regwen.2363078812 Feb 18 01:26:00 PM PST 24 Feb 18 01:44:02 PM PST 24 48442864596 ps
T447 /workspace/coverage/default/23.sram_ctrl_alert_test.999068223 Feb 18 01:27:55 PM PST 24 Feb 18 01:27:59 PM PST 24 59956424 ps
T448 /workspace/coverage/default/45.sram_ctrl_regwen.212592070 Feb 18 01:31:31 PM PST 24 Feb 18 01:44:26 PM PST 24 35246655843 ps
T449 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.2189802998 Feb 18 01:28:59 PM PST 24 Feb 18 01:30:15 PM PST 24 762586981 ps
T450 /workspace/coverage/default/2.sram_ctrl_stress_all.795380625 Feb 18 01:24:22 PM PST 24 Feb 18 03:26:18 PM PST 24 163805841436 ps
T451 /workspace/coverage/default/20.sram_ctrl_partial_access.2867749596 Feb 18 01:27:15 PM PST 24 Feb 18 01:27:56 PM PST 24 3221817199 ps
T452 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3238171183 Feb 18 01:25:55 PM PST 24 Feb 18 01:26:26 PM PST 24 710631954 ps
T453 /workspace/coverage/default/15.sram_ctrl_ram_cfg.621472210 Feb 18 01:26:17 PM PST 24 Feb 18 01:26:32 PM PST 24 357027714 ps
T454 /workspace/coverage/default/9.sram_ctrl_alert_test.3944714370 Feb 18 01:25:11 PM PST 24 Feb 18 01:25:12 PM PST 24 20352718 ps
T455 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1430039045 Feb 18 01:26:44 PM PST 24 Feb 18 01:35:58 PM PST 24 23655895474 ps
T456 /workspace/coverage/default/14.sram_ctrl_partial_access.736984224 Feb 18 01:25:53 PM PST 24 Feb 18 01:26:16 PM PST 24 511316594 ps
T457 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1235916423 Feb 18 01:24:00 PM PST 24 Feb 18 01:24:47 PM PST 24 729584231 ps
T458 /workspace/coverage/default/43.sram_ctrl_regwen.3533806014 Feb 18 01:31:06 PM PST 24 Feb 18 01:39:48 PM PST 24 35467286516 ps
T459 /workspace/coverage/default/48.sram_ctrl_smoke.385804707 Feb 18 01:31:53 PM PST 24 Feb 18 01:32:05 PM PST 24 935841501 ps
T460 /workspace/coverage/default/48.sram_ctrl_partial_access.788465136 Feb 18 01:31:53 PM PST 24 Feb 18 01:32:01 PM PST 24 1761802728 ps
T461 /workspace/coverage/default/15.sram_ctrl_stress_all.3487532569 Feb 18 01:26:18 PM PST 24 Feb 18 02:15:16 PM PST 24 319719197250 ps
T462 /workspace/coverage/default/46.sram_ctrl_lc_escalation.2335689472 Feb 18 01:31:50 PM PST 24 Feb 18 01:34:21 PM PST 24 52891273904 ps
T463 /workspace/coverage/default/8.sram_ctrl_lc_escalation.178585064 Feb 18 01:24:53 PM PST 24 Feb 18 01:27:30 PM PST 24 14793729119 ps
T464 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2747578189 Feb 18 01:27:24 PM PST 24 Feb 18 01:34:23 PM PST 24 6350186626 ps
T465 /workspace/coverage/default/18.sram_ctrl_max_throughput.263488446 Feb 18 01:26:50 PM PST 24 Feb 18 01:27:39 PM PST 24 2963783872 ps
T466 /workspace/coverage/default/36.sram_ctrl_stress_pipeline.2230332646 Feb 18 01:29:51 PM PST 24 Feb 18 01:35:15 PM PST 24 4160961993 ps
T467 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2317292626 Feb 18 01:32:06 PM PST 24 Feb 18 01:33:48 PM PST 24 785731950 ps
T468 /workspace/coverage/default/11.sram_ctrl_stress_all.4183008690 Feb 18 01:25:35 PM PST 24 Feb 18 02:33:17 PM PST 24 73264497886 ps
T469 /workspace/coverage/default/24.sram_ctrl_smoke.2883988158 Feb 18 01:27:55 PM PST 24 Feb 18 01:30:32 PM PST 24 917433284 ps
T470 /workspace/coverage/default/0.sram_ctrl_regwen.3254246219 Feb 18 01:24:00 PM PST 24 Feb 18 01:45:49 PM PST 24 89837815236 ps
T471 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.1464200384 Feb 18 01:24:39 PM PST 24 Feb 18 01:25:58 PM PST 24 2452201858 ps
T472 /workspace/coverage/default/9.sram_ctrl_max_throughput.1845934285 Feb 18 01:25:03 PM PST 24 Feb 18 01:25:44 PM PST 24 1013022386 ps
T473 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.1520383773 Feb 18 01:29:39 PM PST 24 Feb 18 01:30:51 PM PST 24 2879082096 ps
T474 /workspace/coverage/default/47.sram_ctrl_multiple_keys.1417511001 Feb 18 01:31:49 PM PST 24 Feb 18 01:47:08 PM PST 24 5882492510 ps
T475 /workspace/coverage/default/27.sram_ctrl_ram_cfg.2203931720 Feb 18 01:28:32 PM PST 24 Feb 18 01:28:38 PM PST 24 369447179 ps
T476 /workspace/coverage/default/7.sram_ctrl_partial_access.1739908457 Feb 18 01:24:38 PM PST 24 Feb 18 01:25:04 PM PST 24 5866786606 ps
T477 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.2442151321 Feb 18 01:24:55 PM PST 24 Feb 18 01:27:46 PM PST 24 9301150080 ps
T478 /workspace/coverage/default/33.sram_ctrl_alert_test.4148746954 Feb 18 01:29:28 PM PST 24 Feb 18 01:29:29 PM PST 24 17144235 ps
T479 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.3981982802 Feb 18 01:31:09 PM PST 24 Feb 18 01:34:36 PM PST 24 12184870707 ps
T480 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.1360305273 Feb 18 01:24:18 PM PST 24 Feb 18 01:26:13 PM PST 24 1519586637 ps
T481 /workspace/coverage/default/5.sram_ctrl_partial_access.2823200300 Feb 18 01:24:23 PM PST 24 Feb 18 01:25:18 PM PST 24 6361032984 ps
T482 /workspace/coverage/default/47.sram_ctrl_bijection.753442462 Feb 18 01:31:49 PM PST 24 Feb 18 02:05:07 PM PST 24 53684417328 ps
T483 /workspace/coverage/default/21.sram_ctrl_bijection.2323778714 Feb 18 01:27:21 PM PST 24 Feb 18 02:01:52 PM PST 24 71174060895 ps
T19 /workspace/coverage/default/3.sram_ctrl_sec_cm.2537066012 Feb 18 01:24:20 PM PST 24 Feb 18 01:24:23 PM PST 24 305406217 ps
T484 /workspace/coverage/default/11.sram_ctrl_executable.3558313759 Feb 18 01:25:26 PM PST 24 Feb 18 01:42:42 PM PST 24 65493145493 ps
T485 /workspace/coverage/default/4.sram_ctrl_partial_access.2636487539 Feb 18 01:24:16 PM PST 24 Feb 18 01:24:31 PM PST 24 382259737 ps
T486 /workspace/coverage/default/32.sram_ctrl_ram_cfg.1147083205 Feb 18 01:29:16 PM PST 24 Feb 18 01:29:23 PM PST 24 1973760947 ps
T487 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3536212149 Feb 18 01:25:11 PM PST 24 Feb 18 01:26:28 PM PST 24 3077602019 ps
T488 /workspace/coverage/default/25.sram_ctrl_partial_access.1633403724 Feb 18 01:28:02 PM PST 24 Feb 18 01:28:19 PM PST 24 4424195522 ps
T489 /workspace/coverage/default/33.sram_ctrl_partial_access.2127332847 Feb 18 01:29:20 PM PST 24 Feb 18 01:29:52 PM PST 24 12029412401 ps
T490 /workspace/coverage/default/6.sram_ctrl_executable.543046854 Feb 18 01:24:40 PM PST 24 Feb 18 01:25:07 PM PST 24 1892011408 ps
T491 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.282415915 Feb 18 01:26:22 PM PST 24 Feb 18 01:28:59 PM PST 24 789896172 ps
T492 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.226022664 Feb 18 01:30:17 PM PST 24 Feb 18 01:31:28 PM PST 24 1004504738 ps
T493 /workspace/coverage/default/7.sram_ctrl_bijection.925621010 Feb 18 01:24:39 PM PST 24 Feb 18 01:37:26 PM PST 24 231701447010 ps
T494 /workspace/coverage/default/31.sram_ctrl_max_throughput.493832094 Feb 18 01:28:58 PM PST 24 Feb 18 01:29:50 PM PST 24 727934202 ps
T495 /workspace/coverage/default/1.sram_ctrl_bijection.165280751 Feb 18 01:24:05 PM PST 24 Feb 18 02:00:01 PM PST 24 32788791266 ps
T496 /workspace/coverage/default/12.sram_ctrl_stress_all.1922124087 Feb 18 01:25:42 PM PST 24 Feb 18 02:03:47 PM PST 24 268280770742 ps
T497 /workspace/coverage/default/24.sram_ctrl_access_during_key_req.2232817086 Feb 18 01:27:56 PM PST 24 Feb 18 01:44:34 PM PST 24 6074638841 ps
T498 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.4246360239 Feb 18 01:28:48 PM PST 24 Feb 18 01:29:20 PM PST 24 13317472510 ps
T499 /workspace/coverage/default/27.sram_ctrl_partial_access.3000467649 Feb 18 01:28:20 PM PST 24 Feb 18 01:30:08 PM PST 24 848245754 ps
T500 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.1224124843 Feb 18 01:27:54 PM PST 24 Feb 18 01:28:32 PM PST 24 5762260319 ps
T501 /workspace/coverage/default/7.sram_ctrl_stress_all.318445913 Feb 18 01:24:55 PM PST 24 Feb 18 03:40:46 PM PST 24 1031437367581 ps
T502 /workspace/coverage/default/1.sram_ctrl_stress_all.1181475474 Feb 18 01:24:18 PM PST 24 Feb 18 01:44:57 PM PST 24 203958224397 ps
T503 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2836569814 Feb 18 01:24:43 PM PST 24 Feb 18 01:32:28 PM PST 24 43443971406 ps
T504 /workspace/coverage/default/17.sram_ctrl_ram_cfg.532877431 Feb 18 01:26:36 PM PST 24 Feb 18 01:26:42 PM PST 24 738707971 ps
T505 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.3821090242 Feb 18 01:25:34 PM PST 24 Feb 18 01:34:02 PM PST 24 25491595060 ps
T506 /workspace/coverage/default/16.sram_ctrl_stress_all.2572548732 Feb 18 01:26:24 PM PST 24 Feb 18 02:52:09 PM PST 24 353211418685 ps
T507 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.3159127052 Feb 18 01:30:42 PM PST 24 Feb 18 01:35:13 PM PST 24 14453242218 ps
T508 /workspace/coverage/default/4.sram_ctrl_max_throughput.210579549 Feb 18 01:24:22 PM PST 24 Feb 18 01:26:25 PM PST 24 774262001 ps
T509 /workspace/coverage/default/47.sram_ctrl_max_throughput.450751187 Feb 18 01:31:50 PM PST 24 Feb 18 01:33:38 PM PST 24 783145734 ps
T510 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.3656020096 Feb 18 01:28:36 PM PST 24 Feb 18 01:30:48 PM PST 24 6442805430 ps
T511 /workspace/coverage/default/25.sram_ctrl_regwen.1637586810 Feb 18 01:28:03 PM PST 24 Feb 18 01:40:17 PM PST 24 31250740492 ps
T512 /workspace/coverage/default/28.sram_ctrl_ram_cfg.369931511 Feb 18 01:28:35 PM PST 24 Feb 18 01:28:42 PM PST 24 1200210342 ps
T513 /workspace/coverage/default/0.sram_ctrl_bijection.4251256983 Feb 18 01:23:58 PM PST 24 Feb 18 01:41:24 PM PST 24 59082593617 ps
T514 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.2219756511 Feb 18 01:29:14 PM PST 24 Feb 18 01:31:30 PM PST 24 9480165304 ps
T515 /workspace/coverage/default/48.sram_ctrl_mem_walk.1351281516 Feb 18 01:32:01 PM PST 24 Feb 18 01:36:24 PM PST 24 8043674429 ps
T516 /workspace/coverage/default/39.sram_ctrl_stress_pipeline.1280241390 Feb 18 01:30:13 PM PST 24 Feb 18 01:32:42 PM PST 24 6240850036 ps
T517 /workspace/coverage/default/21.sram_ctrl_lc_escalation.1250794146 Feb 18 01:27:25 PM PST 24 Feb 18 01:30:35 PM PST 24 8037263653 ps
T518 /workspace/coverage/default/43.sram_ctrl_ram_cfg.344604736 Feb 18 01:31:06 PM PST 24 Feb 18 01:31:14 PM PST 24 1345628196 ps
T519 /workspace/coverage/default/34.sram_ctrl_smoke.2381248506 Feb 18 01:29:29 PM PST 24 Feb 18 01:29:45 PM PST 24 4602937160 ps
T520 /workspace/coverage/default/0.sram_ctrl_alert_test.3674622097 Feb 18 01:24:06 PM PST 24 Feb 18 01:24:07 PM PST 24 15364412 ps
T521 /workspace/coverage/default/39.sram_ctrl_bijection.1725149943 Feb 18 01:30:14 PM PST 24 Feb 18 01:53:39 PM PST 24 20026102223 ps
T522 /workspace/coverage/default/48.sram_ctrl_max_throughput.2212041039 Feb 18 01:31:53 PM PST 24 Feb 18 01:32:31 PM PST 24 712196391 ps
T523 /workspace/coverage/default/43.sram_ctrl_max_throughput.3882280480 Feb 18 01:31:05 PM PST 24 Feb 18 01:32:54 PM PST 24 3208203338 ps
T524 /workspace/coverage/default/27.sram_ctrl_alert_test.2317691598 Feb 18 01:28:32 PM PST 24 Feb 18 01:28:33 PM PST 24 15771247 ps
T525 /workspace/coverage/default/48.sram_ctrl_multiple_keys.2874505898 Feb 18 01:31:52 PM PST 24 Feb 18 01:51:55 PM PST 24 13762871202 ps
T526 /workspace/coverage/default/0.sram_ctrl_partial_access.2424197039 Feb 18 01:24:01 PM PST 24 Feb 18 01:24:15 PM PST 24 925656569 ps
T527 /workspace/coverage/default/29.sram_ctrl_ram_cfg.655197260 Feb 18 01:28:49 PM PST 24 Feb 18 01:28:57 PM PST 24 480911449 ps
T528 /workspace/coverage/default/21.sram_ctrl_multiple_keys.87381490 Feb 18 01:27:18 PM PST 24 Feb 18 01:32:38 PM PST 24 13174852095 ps
T529 /workspace/coverage/default/13.sram_ctrl_alert_test.2414759771 Feb 18 01:25:52 PM PST 24 Feb 18 01:25:54 PM PST 24 15709713 ps
T530 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.2279059956 Feb 18 01:25:10 PM PST 24 Feb 18 01:27:30 PM PST 24 1618368585 ps
T531 /workspace/coverage/default/6.sram_ctrl_multiple_keys.4178412894 Feb 18 01:24:37 PM PST 24 Feb 18 01:38:31 PM PST 24 34303990554 ps
T532 /workspace/coverage/default/26.sram_ctrl_smoke.3841125003 Feb 18 01:28:10 PM PST 24 Feb 18 01:28:42 PM PST 24 1981606482 ps
T533 /workspace/coverage/default/40.sram_ctrl_alert_test.3427392157 Feb 18 01:30:33 PM PST 24 Feb 18 01:30:36 PM PST 24 31638915 ps
T534 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.1779566937 Feb 18 01:29:08 PM PST 24 Feb 18 01:32:27 PM PST 24 2433464166 ps
T535 /workspace/coverage/default/17.sram_ctrl_max_throughput.1524049742 Feb 18 01:26:32 PM PST 24 Feb 18 01:27:30 PM PST 24 874347397 ps
T536 /workspace/coverage/default/28.sram_ctrl_multiple_keys.1088834634 Feb 18 01:28:30 PM PST 24 Feb 18 01:34:25 PM PST 24 2891151624 ps
T537 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3697789731 Feb 18 01:29:37 PM PST 24 Feb 18 01:35:09 PM PST 24 7384876316 ps
T538 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.2980787207 Feb 18 01:26:08 PM PST 24 Feb 18 01:27:23 PM PST 24 1358647262 ps
T539 /workspace/coverage/default/37.sram_ctrl_smoke.3392650317 Feb 18 01:29:52 PM PST 24 Feb 18 01:30:28 PM PST 24 1601008976 ps
T540 /workspace/coverage/default/23.sram_ctrl_mem_walk.2975459659 Feb 18 01:27:48 PM PST 24 Feb 18 01:31:56 PM PST 24 3945998301 ps
T541 /workspace/coverage/default/10.sram_ctrl_lc_escalation.2758879463 Feb 18 01:25:08 PM PST 24 Feb 18 01:26:20 PM PST 24 22210814031 ps
T542 /workspace/coverage/default/39.sram_ctrl_mem_walk.1029714697 Feb 18 01:30:24 PM PST 24 Feb 18 01:32:31 PM PST 24 3951922866 ps
T543 /workspace/coverage/default/31.sram_ctrl_multiple_keys.781627587 Feb 18 01:28:58 PM PST 24 Feb 18 01:32:05 PM PST 24 12026884453 ps
T544 /workspace/coverage/default/6.sram_ctrl_smoke.2123289753 Feb 18 01:24:38 PM PST 24 Feb 18 01:25:16 PM PST 24 3316824873 ps
T545 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.1790587593 Feb 18 01:25:00 PM PST 24 Feb 18 01:27:09 PM PST 24 6209813658 ps
T546 /workspace/coverage/default/43.sram_ctrl_smoke.929825428 Feb 18 01:31:04 PM PST 24 Feb 18 01:31:47 PM PST 24 1828343110 ps
T547 /workspace/coverage/default/14.sram_ctrl_lc_escalation.400189085 Feb 18 01:26:01 PM PST 24 Feb 18 01:29:27 PM PST 24 33740078798 ps
T548 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3991540601 Feb 18 01:24:29 PM PST 24 Feb 18 01:33:43 PM PST 24 97303336962 ps
T549 /workspace/coverage/default/47.sram_ctrl_ram_cfg.245432693 Feb 18 01:31:49 PM PST 24 Feb 18 01:32:03 PM PST 24 669981386 ps
T550 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.3453902248 Feb 18 01:32:01 PM PST 24 Feb 18 01:34:28 PM PST 24 11162949576 ps
T551 /workspace/coverage/default/16.sram_ctrl_multiple_keys.3046519279 Feb 18 01:26:16 PM PST 24 Feb 18 01:40:03 PM PST 24 16953836072 ps
T552 /workspace/coverage/default/11.sram_ctrl_mem_walk.4088865873 Feb 18 01:25:27 PM PST 24 Feb 18 01:27:37 PM PST 24 4029695736 ps
T553 /workspace/coverage/default/8.sram_ctrl_alert_test.1098175601 Feb 18 01:25:03 PM PST 24 Feb 18 01:25:06 PM PST 24 25932297 ps
T554 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.2527734526 Feb 18 01:25:25 PM PST 24 Feb 18 01:44:29 PM PST 24 9077226452 ps
T555 /workspace/coverage/default/10.sram_ctrl_smoke.4032226842 Feb 18 01:25:12 PM PST 24 Feb 18 01:25:21 PM PST 24 3449618380 ps
T556 /workspace/coverage/default/32.sram_ctrl_lc_escalation.1732155436 Feb 18 01:29:14 PM PST 24 Feb 18 01:32:19 PM PST 24 62618610654 ps
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