Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	15093127	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

125929203

1

T1

7269

T2

428

T3

1569

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	69323377	1			T1	3980		T2	1131		T3	879
values[0x0]	34353839	1			T1	1920		T2	407		T3	408
values[0x1]	37345114	1			T1	2094		T2	800		T3	453

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7691178	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

133331152

1

T1

7617

T2

1393

T3

1661

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	464249	1			T1	23		T6	414		T4	1040
valid_sources[0x01]	472110	1			T1	59		T3	2		T6	342
valid_sources[0x02]	455976	1			T1	60		T3	2		T6	331
valid_sources[0x03]	657967	1			T1	31		T6	387		T4	1016
valid_sources[0x04]	455161	1			T1	20		T3	3		T6	313
valid_sources[0x05]	475530	1			T1	58		T6	349		T4	1060
valid_sources[0x06]	453439	1			T1	30		T3	10		T6	334
valid_sources[0x07]	447352	1			T1	23		T6	305		T4	991
valid_sources[0x08]	469213	1			T1	56		T2	2338		T3	9
valid_sources[0x09]	549312	1			T1	31		T3	4		T6	395
valid_sources[0x0a]	485226	1			T1	16		T6	330		T4	1057
valid_sources[0x0b]	465516	1			T1	35		T3	45		T6	329
valid_sources[0x0c]	480658	1			T1	39		T3	11		T6	326
valid_sources[0x0d]	481329	1			T1	26		T6	384		T4	1043
valid_sources[0x0e]	509506	1			T1	38		T3	7		T6	350
valid_sources[0x0f]	818195	1			T1	20		T6	411		T4	1061
valid_sources[0x10]	586194	1			T1	43		T3	7		T6	354
valid_sources[0x11]	465106	1			T1	27		T3	13		T6	348
valid_sources[0x12]	505522	1			T1	59		T3	2		T6	308
valid_sources[0x13]	500857	1			T1	41		T3	17		T6	363
valid_sources[0x14]	485979	1			T1	27		T6	302		T4	1092
valid_sources[0x15]	465684	1			T1	35		T6	363		T4	1058
valid_sources[0x16]	658564	1			T1	53		T3	7		T6	336
valid_sources[0x17]	479929	1			T1	50		T3	1		T6	309
valid_sources[0x18]	680609	1			T1	35		T6	288		T4	1145
valid_sources[0x19]	450770	1			T1	20		T3	7		T6	373
valid_sources[0x1a]	463265	1			T1	41		T3	23		T6	342
valid_sources[0x1b]	473091	1			T1	16		T6	284		T4	1009
valid_sources[0x1c]	471134	1			T1	37		T6	375		T4	1034
valid_sources[0x1d]	538027	1			T1	20		T6	330		T4	1121
valid_sources[0x1e]	478440	1			T1	15		T6	304		T4	1027
valid_sources[0x1f]	455658	1			T1	30		T6	389		T4	1124
valid_sources[0x20]	467890	1			T1	40		T6	351		T4	1005
valid_sources[0x21]	475323	1			T1	43		T6	344		T4	1060
valid_sources[0x22]	506765	1			T1	25		T6	303		T4	1048
valid_sources[0x23]	492793	1			T1	21		T6	357		T4	1039
valid_sources[0x24]	452690	1			T1	32		T3	30		T6	341
valid_sources[0x25]	481899	1			T1	23		T3	1		T6	325
valid_sources[0x26]	518270	1			T1	24		T6	346		T4	1140
valid_sources[0x27]	468834	1			T1	38		T3	6		T6	337
valid_sources[0x28]	464835	1			T1	18		T6	283		T4	1121
valid_sources[0x29]	455681	1			T1	25		T6	314		T4	1026
valid_sources[0x2a]	461396	1			T1	34		T6	343		T4	983
valid_sources[0x2b]	483986	1			T1	29		T6	303		T4	1068
valid_sources[0x2c]	467724	1			T1	1		T6	398		T4	1067
valid_sources[0x2d]	484565	1			T1	21		T3	10		T6	331
valid_sources[0x2e]	993456	1			T1	54		T6	368		T4	990
valid_sources[0x2f]	458138	1			T1	30		T6	336		T4	1046
valid_sources[0x30]	467506	1			T1	60		T3	4		T6	349
valid_sources[0x31]	452996	1			T1	69		T6	395		T4	1033
valid_sources[0x32]	483741	1			T1	50		T6	423		T4	1019
valid_sources[0x33]	462601	1			T1	16		T6	342		T4	1057
valid_sources[0x34]	518140	1			T1	28		T3	9		T6	307
valid_sources[0x35]	469742	1			T1	44		T3	13		T6	370
valid_sources[0x36]	467765	1			T1	23		T3	11		T6	340
valid_sources[0x37]	516371	1			T1	23		T3	14		T6	289
valid_sources[0x38]	477094	1			T1	40		T3	2		T6	297
valid_sources[0x39]	454625	1			T1	36		T3	4		T6	386
valid_sources[0x3a]	469363	1			T1	19		T3	7		T6	294
valid_sources[0x3b]	453418	1			T1	32		T6	297		T4	1041
valid_sources[0x3c]	457262	1			T1	6		T6	392		T4	1024
valid_sources[0x3d]	468096	1			T1	18		T3	3		T6	333
valid_sources[0x3e]	482082	1			T1	9		T3	20		T6	337
valid_sources[0x3f]	488816	1			T1	42		T3	1		T6	366
valid_sources[0x40]	453158	1			T1	18		T6	346		T4	979
valid_sources[0x41]	508389	1			T1	20		T3	1		T6	375
valid_sources[0x42]	474224	1			T1	39		T3	3		T6	296
valid_sources[0x43]	536221	1			T1	32		T3	3		T6	316
valid_sources[0x44]	494317	1			T1	35		T3	29		T6	381
valid_sources[0x45]	462835	1			T1	37		T3	12		T6	365
valid_sources[0x46]	465211	1			T1	33		T3	14		T6	288
valid_sources[0x47]	456463	1			T1	44		T3	2		T6	388
valid_sources[0x48]	474781	1			T1	31		T3	4		T6	327
valid_sources[0x49]	490516	1			T1	19		T3	11		T6	363
valid_sources[0x4a]	509816	1			T1	52		T3	4		T6	355
valid_sources[0x4b]	702717	1			T1	24		T3	22		T6	289
valid_sources[0x4c]	453508	1			T1	32		T3	19		T6	287
valid_sources[0x4d]	485446	1			T1	33		T3	2		T6	335
valid_sources[0x4e]	460537	1			T1	8		T3	20		T6	314
valid_sources[0x4f]	518719	1			T1	59		T3	25		T6	332
valid_sources[0x50]	454294	1			T1	20		T3	11		T6	355
valid_sources[0x51]	500748	1			T1	25		T3	8		T6	339
valid_sources[0x52]	454932	1			T1	53		T3	11		T6	403
valid_sources[0x53]	464530	1			T1	27		T6	405		T4	1046
valid_sources[0x54]	1098604	1			T1	24		T3	31		T6	341
valid_sources[0x55]	463459	1			T1	17		T6	332		T4	1035
valid_sources[0x56]	497688	1			T1	52		T3	11		T6	335
valid_sources[0x57]	474836	1			T1	25		T3	2		T6	357
valid_sources[0x58]	523856	1			T1	33		T3	3		T6	364
valid_sources[0x59]	477706	1			T1	37		T3	4		T6	356
valid_sources[0x5a]	507227	1			T1	24		T6	330		T4	1001
valid_sources[0x5b]	455563	1			T1	31		T3	16		T6	388
valid_sources[0x5c]	474758	1			T1	22		T6	336		T4	1030
valid_sources[0x5d]	539205	1			T1	30		T3	4		T6	360
valid_sources[0x5e]	454474	1			T1	17		T6	328		T4	1075
valid_sources[0x5f]	467343	1			T1	13		T3	11		T6	340
valid_sources[0x60]	695904	1			T1	35		T6	341		T4	1065
valid_sources[0x61]	459194	1			T1	35		T6	302		T4	1001
valid_sources[0x62]	478530	1			T1	29		T6	298		T4	1044
valid_sources[0x63]	469564	1			T1	57		T3	19		T6	336
valid_sources[0x64]	563447	1			T1	60		T3	1		T6	376
valid_sources[0x65]	451582	1			T1	61		T3	12		T6	316
valid_sources[0x66]	506688	1			T1	24		T6	286		T4	991
valid_sources[0x67]	502999	1			T1	10		T3	8		T6	282
valid_sources[0x68]	454637	1			T1	39		T6	300		T4	1003
valid_sources[0x69]	453493	1			T1	25		T3	12		T6	312
valid_sources[0x6a]	470944	1			T1	13		T6	392		T4	1042
valid_sources[0x6b]	461514	1			T1	45		T6	311		T4	1049
valid_sources[0x6c]	484791	1			T1	31		T3	7		T6	279
valid_sources[0x6d]	491228	1			T1	29		T3	28		T6	278
valid_sources[0x6e]	474234	1			T1	22		T6	366		T4	1040
valid_sources[0x6f]	459430	1			T1	39		T3	7		T6	373
valid_sources[0x70]	481835	1			T1	37		T3	4		T6	378
valid_sources[0x71]	461612	1			T1	15		T3	1		T6	286
valid_sources[0x72]	451984	1			T1	17		T3	3		T6	348
valid_sources[0x73]	542224	1			T1	41		T3	12		T6	428
valid_sources[0x74]	464292	1			T1	10		T3	9		T6	340
valid_sources[0x75]	473412	1			T1	38		T6	405		T4	1076
valid_sources[0x76]	2818902	1			T1	21		T3	32		T6	377
valid_sources[0x77]	471800	1			T1	42		T3	7		T6	382
valid_sources[0x78]	459115	1			T1	34		T3	5		T6	320
valid_sources[0x79]	468682	1			T1	9		T6	426		T4	1076
valid_sources[0x7a]	474544	1			T1	10		T3	23		T6	283
valid_sources[0x7b]	467376	1			T1	61		T6	361		T4	1023
valid_sources[0x7c]	466217	1			T1	72		T3	30		T6	324
valid_sources[0x7d]	452439	1			T1	15		T6	299		T4	1069
valid_sources[0x7e]	1745395	1			T1	20		T6	329		T4	1029
valid_sources[0x7f]	452283	1			T1	22		T3	4		T6	338
valid_sources[0x80]	515751	1			T1	28		T6	318		T4	1034

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

61731888

1

T1

3620

T2

208

T3

789

values[0x0]

all_enables

biggest_size

32102586

1

T1

1799

T2

98

T3

386

values[0x1]

all_enables

biggest_size

32094729

1

T1

1850

T2

122

T3

394

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	45282070	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

16648

1

T3

16

T6

1

T4

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	45274243	1			T1	32856		T2	16426		T3	52503
values[0x0]	12200	1			T3	9		T10	1		T6	2
values[0x1]	12275	1			T1	2		T2	1		T3	8

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	30197852	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

15100866

1

T1

11018

T2

5472

T3

17541

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	137123	1			T2	69		T3	232		T10	18
valid_sources[0x01]	137100	1			T2	53		T3	200		T10	19
valid_sources[0x02]	136891	1			T2	73		T3	195		T10	13
valid_sources[0x03]	136098	1			T2	56		T3	233		T10	17
valid_sources[0x04]	307430	1			T2	43		T3	200		T10	13
valid_sources[0x05]	135590	1			T2	45		T3	253		T10	16
valid_sources[0x06]	277077	1			T2	91		T3	195		T10	26
valid_sources[0x07]	135857	1			T2	67		T3	167		T10	18
valid_sources[0x08]	134835	1			T2	43		T3	212		T10	26
valid_sources[0x09]	153888	1			T2	58		T3	219		T10	13
valid_sources[0x0a]	135737	1			T2	56		T3	177		T10	19
valid_sources[0x0b]	135046	1			T2	62		T3	224		T10	13
valid_sources[0x0c]	137239	1			T2	71		T3	186		T10	38
valid_sources[0x0d]	168740	1			T2	63		T3	235		T10	20
valid_sources[0x0e]	135754	1			T2	39		T3	214		T10	18
valid_sources[0x0f]	134685	1			T2	59		T3	183		T10	26
valid_sources[0x10]	168194	1			T2	99		T3	253		T10	18
valid_sources[0x11]	146701	1			T2	60		T3	212		T10	21
valid_sources[0x12]	136101	1			T2	69		T3	202		T10	9
valid_sources[0x13]	278123	1			T2	62		T3	230		T10	16
valid_sources[0x14]	136018	1			T2	53		T3	205		T10	19
valid_sources[0x15]	136185	1			T2	64		T3	211		T10	18
valid_sources[0x16]	143779	1			T2	76		T3	189		T10	36
valid_sources[0x17]	169602	1			T2	69		T3	191		T10	26
valid_sources[0x18]	197706	1			T2	67		T3	162		T10	26
valid_sources[0x19]	135268	1			T2	67		T3	237		T10	13
valid_sources[0x1a]	136117	1			T2	65		T3	217		T10	8
valid_sources[0x1b]	135962	1			T2	53		T3	211		T10	32
valid_sources[0x1c]	136503	1			T2	49		T3	203		T10	29
valid_sources[0x1d]	135661	1			T2	80		T3	241		T10	10
valid_sources[0x1e]	135927	1			T2	74		T3	189		T10	26
valid_sources[0x1f]	166688	1			T2	39		T3	164		T10	24
valid_sources[0x20]	135952	1			T2	44		T3	202		T10	8
valid_sources[0x21]	137786	1			T2	69		T3	223		T10	15
valid_sources[0x22]	138814	1			T2	44		T3	206		T10	16
valid_sources[0x23]	136292	1			T2	62		T3	199		T10	17
valid_sources[0x24]	189377	1			T2	58		T3	196		T10	18
valid_sources[0x25]	135709	1			T2	81		T3	200		T10	27
valid_sources[0x26]	135465	1			T2	55		T3	202		T10	27
valid_sources[0x27]	168431	1			T2	54		T3	199		T10	19
valid_sources[0x28]	143414	1			T2	91		T3	220		T10	19
valid_sources[0x29]	141677	1			T2	72		T3	249		T10	22
valid_sources[0x2a]	216304	1			T2	63		T3	194		T10	20
valid_sources[0x2b]	171799	1			T2	100		T3	227		T10	25
valid_sources[0x2c]	137151	1			T2	47		T3	227		T10	17
valid_sources[0x2d]	153676	1			T2	72		T3	218		T10	22
valid_sources[0x2e]	136025	1			T2	91		T3	216		T10	19
valid_sources[0x2f]	137193	1			T2	59		T3	204		T10	11
valid_sources[0x30]	186640	1			T2	52		T3	191		T10	11
valid_sources[0x31]	156480	1			T2	61		T3	232		T10	25
valid_sources[0x32]	135552	1			T2	25		T3	231		T10	11
valid_sources[0x33]	168085	1			T2	73		T3	275		T10	17
valid_sources[0x34]	136133	1			T2	71		T3	225		T10	19
valid_sources[0x35]	138466	1			T2	82		T3	191		T10	17
valid_sources[0x36]	134984	1			T2	57		T3	194		T10	15
valid_sources[0x37]	366291	1			T2	79		T3	219		T10	16
valid_sources[0x38]	203409	1			T1	32858		T2	89		T3	198
valid_sources[0x39]	135255	1			T2	52		T3	218		T10	19
valid_sources[0x3a]	147249	1			T2	23		T3	193		T10	27
valid_sources[0x3b]	217419	1			T2	43		T3	159		T10	23
valid_sources[0x3c]	319161	1			T2	94		T3	194		T10	14
valid_sources[0x3d]	185878	1			T2	57		T3	205		T10	18
valid_sources[0x3e]	169267	1			T2	59		T3	212		T10	17
valid_sources[0x3f]	136949	1			T2	90		T3	210		T10	18
valid_sources[0x40]	169337	1			T2	50		T3	217		T10	20
valid_sources[0x41]	136493	1			T2	65		T3	204		T10	9
valid_sources[0x42]	496763	1			T2	92		T3	213		T10	25
valid_sources[0x43]	135933	1			T2	70		T3	223		T10	14
valid_sources[0x44]	135461	1			T2	61		T3	224		T10	17
valid_sources[0x45]	211746	1			T2	63		T3	188		T10	11
valid_sources[0x46]	145896	1			T2	63		T3	187		T10	16
valid_sources[0x47]	208068	1			T2	67		T3	199		T10	23
valid_sources[0x48]	147270	1			T2	53		T3	189		T10	19
valid_sources[0x49]	174610	1			T2	73		T3	256		T10	14
valid_sources[0x4a]	134850	1			T2	49		T3	223		T10	18
valid_sources[0x4b]	137192	1			T2	53		T3	191		T10	11
valid_sources[0x4c]	488401	1			T2	67		T3	160		T10	18
valid_sources[0x4d]	152282	1			T2	69		T3	228		T10	16
valid_sources[0x4e]	136310	1			T2	78		T3	219		T10	7
valid_sources[0x4f]	168869	1			T2	59		T3	217		T10	17
valid_sources[0x50]	139220	1			T2	64		T3	186		T10	6
valid_sources[0x51]	612772	1			T2	44		T3	178		T10	17
valid_sources[0x52]	136838	1			T2	56		T3	205		T10	16
valid_sources[0x53]	143903	1			T2	76		T3	206		T10	19
valid_sources[0x54]	133861	1			T2	63		T3	215		T10	24
valid_sources[0x55]	135835	1			T2	55		T3	212		T10	12
valid_sources[0x56]	135771	1			T2	53		T3	173		T10	24
valid_sources[0x57]	157897	1			T2	68		T3	217		T10	20
valid_sources[0x58]	134682	1			T2	76		T3	188		T10	18
valid_sources[0x59]	135931	1			T2	73		T3	207		T10	21
valid_sources[0x5a]	137135	1			T2	35		T3	210		T10	11
valid_sources[0x5b]	218496	1			T2	65		T3	202		T10	17
valid_sources[0x5c]	153811	1			T2	85		T3	216		T10	19
valid_sources[0x5d]	136545	1			T2	67		T3	221		T10	26
valid_sources[0x5e]	152653	1			T2	63		T3	172		T10	18
valid_sources[0x5f]	134580	1			T2	46		T3	217		T10	21
valid_sources[0x60]	142957	1			T2	73		T3	179		T10	14
valid_sources[0x61]	136775	1			T2	82		T3	218		T10	23
valid_sources[0x62]	142125	1			T2	59		T3	187		T10	27
valid_sources[0x63]	178264	1			T2	64		T3	210		T10	18
valid_sources[0x64]	349423	1			T2	45		T3	189		T10	20
valid_sources[0x65]	141703	1			T2	58		T3	227		T10	15
valid_sources[0x66]	135476	1			T2	86		T3	223		T10	18
valid_sources[0x67]	151240	1			T2	68		T3	204		T10	15
valid_sources[0x68]	137862	1			T2	71		T3	212		T10	13
valid_sources[0x69]	262875	1			T2	65		T3	209		T10	24
valid_sources[0x6a]	145521	1			T2	60		T3	238		T10	20
valid_sources[0x6b]	137986	1			T2	78		T3	204		T10	19
valid_sources[0x6c]	167078	1			T2	71		T3	230		T10	28
valid_sources[0x6d]	596811	1			T2	46		T3	208		T10	14
valid_sources[0x6e]	134502	1			T2	83		T3	181		T10	14
valid_sources[0x6f]	153132	1			T2	46		T3	201		T10	20
valid_sources[0x70]	185492	1			T2	63		T3	194		T10	21
valid_sources[0x71]	282933	1			T2	45		T3	222		T10	19
valid_sources[0x72]	141479	1			T2	38		T3	172		T10	22
valid_sources[0x73]	233790	1			T2	72		T3	177		T10	17
valid_sources[0x74]	136178	1			T2	63		T3	200		T10	19
valid_sources[0x75]	137605	1			T2	73		T3	216		T10	18
valid_sources[0x76]	535628	1			T2	76		T3	173		T10	16
valid_sources[0x77]	134727	1			T2	55		T3	217		T10	30
valid_sources[0x78]	135556	1			T2	59		T3	198		T10	15
valid_sources[0x79]	401323	1			T2	46		T3	227		T10	13
valid_sources[0x7a]	137633	1			T2	75		T3	202		T10	21
valid_sources[0x7b]	138559	1			T2	56		T3	237		T10	16
valid_sources[0x7c]	443756	1			T2	36		T3	196		T10	8
valid_sources[0x7d]	433980	1			T2	83		T3	202		T10	22
valid_sources[0x7e]	136770	1			T2	101		T3	227		T10	35
valid_sources[0x7f]	137368	1			T2	93		T3	182		T10	19
valid_sources[0x80]	139099	1			T2	62		T3	188		T10	16

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

6601

1

T3

9

T17

2

T18

6

values[0x0]

all_enables

biggest_size

5815

1

T3

6

T6

1

T4

1

values[0x1]

all_enables

biggest_size

4232

1

T3

1

T11

2

T12

1