Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	15364649	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

126785537

1

T1

1469

T2

7469

T3

176324

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	69888849	1			T1	15549		T2	4138		T3	97207
values[0x0]	34597235	1			T1	5070		T2	1969		T3	46644
values[0x1]	37664102	1			T1	10724		T2	2070		T3	49998

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7819264	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

134330922

1

T1

14051

T2

7830

T3

185089

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	438048	1			T1	102		T2	79		T4	359
valid_sources[0x01]	450441	1			T1	96		T2	18		T4	602
valid_sources[0x02]	484830	1			T1	3		T2	50		T4	546
valid_sources[0x03]	452594	1			T1	175		T2	25		T4	435
valid_sources[0x04]	483985	1			T1	311		T2	13		T4	469
valid_sources[0x05]	944298	1			T1	62		T2	31		T4	452
valid_sources[0x06]	438919	1			T1	287		T2	40		T4	591
valid_sources[0x07]	461073	1			T1	207		T2	8		T4	492
valid_sources[0x08]	497964	1			T1	54		T2	40		T4	484
valid_sources[0x09]	444665	1			T1	331		T2	14		T4	457
valid_sources[0x0a]	443037	1			T1	245		T2	21		T4	367
valid_sources[0x0b]	453482	1			T1	77		T2	21		T4	531
valid_sources[0x0c]	439334	1			T1	85		T2	34		T4	552
valid_sources[0x0d]	484046	1			T2	75		T3	8110		T4	574
valid_sources[0x0e]	523509	1			T1	106		T2	33		T4	462
valid_sources[0x0f]	502531	1			T1	44		T2	18		T4	336
valid_sources[0x10]	449743	1			T1	73		T2	22		T4	535
valid_sources[0x11]	459750	1			T1	36		T2	45		T4	463
valid_sources[0x12]	458982	1			T1	265		T2	22		T4	557
valid_sources[0x13]	451295	1			T1	203		T2	35		T4	401
valid_sources[0x14]	456187	1			T1	221		T2	83		T4	534
valid_sources[0x15]	463609	1			T1	492		T2	55		T4	406
valid_sources[0x16]	484509	1			T1	179		T2	21		T4	465
valid_sources[0x17]	457708	1			T2	12		T4	450		T9	1726
valid_sources[0x18]	452377	1			T1	37		T2	24		T4	387
valid_sources[0x19]	437409	1			T1	23		T2	18		T4	536
valid_sources[0x1a]	775944	1			T1	133		T2	26		T4	488
valid_sources[0x1b]	462309	1			T1	129		T2	50		T4	479
valid_sources[0x1c]	455588	1			T1	59		T2	34		T4	497
valid_sources[0x1d]	615191	1			T1	117		T2	21		T4	565
valid_sources[0x1e]	501838	1			T1	105		T2	41		T4	514
valid_sources[0x1f]	588496	1			T1	172		T2	46		T4	263
valid_sources[0x20]	441301	1			T1	143		T2	18		T4	387
valid_sources[0x21]	443281	1			T1	92		T2	30		T4	468
valid_sources[0x22]	505795	1			T1	12		T2	77		T4	536
valid_sources[0x23]	432047	1			T1	68		T2	54		T4	450
valid_sources[0x24]	436408	1			T1	62		T2	35		T4	400
valid_sources[0x25]	441046	1			T1	257		T2	6		T4	537
valid_sources[0x26]	455429	1			T1	29		T2	5		T4	453
valid_sources[0x27]	469310	1			T1	135		T2	33		T3	5032
valid_sources[0x28]	461891	1			T1	194		T2	26		T4	11211
valid_sources[0x29]	481058	1			T1	66		T2	23		T4	402
valid_sources[0x2a]	452960	1			T1	74		T2	12		T4	421
valid_sources[0x2b]	559565	1			T1	154		T2	15		T4	418
valid_sources[0x2c]	449777	1			T1	315		T2	52		T4	504
valid_sources[0x2d]	446216	1			T1	363		T2	23		T4	509
valid_sources[0x2e]	490619	1			T1	390		T2	40		T4	484
valid_sources[0x2f]	571155	1			T1	77		T2	30		T4	599
valid_sources[0x30]	466233	1			T1	53		T2	39		T4	437
valid_sources[0x31]	492325	1			T1	207		T2	65		T4	537
valid_sources[0x32]	580657	1			T1	131		T2	45		T4	485
valid_sources[0x33]	443514	1			T1	172		T2	12		T4	514
valid_sources[0x34]	435963	1			T2	15		T4	378		T9	1811
valid_sources[0x35]	464710	1			T1	108		T2	7		T4	667
valid_sources[0x36]	468835	1			T1	37		T2	86		T4	427
valid_sources[0x37]	463336	1			T1	24		T2	13		T4	580
valid_sources[0x38]	435768	1			T1	206		T2	5		T4	550
valid_sources[0x39]	445538	1			T1	7		T2	66		T4	367
valid_sources[0x3a]	442915	1			T1	43		T2	32		T4	618
valid_sources[0x3b]	456403	1			T1	173		T2	17		T4	705
valid_sources[0x3c]	449883	1			T1	278		T2	6		T4	468
valid_sources[0x3d]	498399	1			T1	79		T2	39		T4	565
valid_sources[0x3e]	464627	1			T1	199		T2	11		T4	409
valid_sources[0x3f]	464058	1			T1	163		T2	52		T4	420
valid_sources[0x40]	461077	1			T1	144		T2	11		T3	1776
valid_sources[0x41]	451435	1			T1	100		T2	73		T4	411
valid_sources[0x42]	474205	1			T1	53		T2	13		T4	399
valid_sources[0x43]	493678	1			T1	111		T2	20		T4	480
valid_sources[0x44]	454862	1			T1	14		T2	35		T4	410
valid_sources[0x45]	498145	1			T1	61		T2	32		T4	343
valid_sources[0x46]	523461	1			T1	253		T2	7		T4	411
valid_sources[0x47]	1141202	1			T1	241		T2	9		T4	440
valid_sources[0x48]	487821	1			T1	317		T4	473		T9	1798
valid_sources[0x49]	448501	1			T1	41		T2	25		T4	385
valid_sources[0x4a]	454275	1			T1	142		T2	7		T4	720
valid_sources[0x4b]	514847	1			T1	60		T2	44		T4	499
valid_sources[0x4c]	1972235	1			T1	138		T2	116		T3	4806
valid_sources[0x4d]	481376	1			T1	174		T2	75		T4	461
valid_sources[0x4e]	486931	1			T1	147		T2	30		T4	335
valid_sources[0x4f]	440068	1			T1	134		T2	60		T4	481
valid_sources[0x50]	532116	1			T1	97		T2	19		T4	410
valid_sources[0x51]	459045	1			T1	20		T2	52		T4	508
valid_sources[0x52]	480956	1			T1	22		T2	75		T4	433
valid_sources[0x53]	468206	1			T1	232		T2	12		T3	4
valid_sources[0x54]	475734	1			T1	107		T2	17		T3	9784
valid_sources[0x55]	469348	1			T1	62		T2	39		T4	514
valid_sources[0x56]	446340	1			T1	128		T2	36		T4	561
valid_sources[0x57]	1568574	1			T1	245		T2	29		T4	17450
valid_sources[0x58]	502818	1			T2	21		T3	2967		T4	404
valid_sources[0x59]	631444	1			T1	40		T2	26		T4	411
valid_sources[0x5a]	432157	1			T1	26		T2	37		T4	515
valid_sources[0x5b]	473863	1			T1	22		T2	18		T4	448
valid_sources[0x5c]	441221	1			T1	13		T2	47		T4	571
valid_sources[0x5d]	454862	1			T1	94		T2	26		T4	485
valid_sources[0x5e]	495895	1			T1	52		T2	68		T4	514
valid_sources[0x5f]	442160	1			T1	460		T2	19		T4	596
valid_sources[0x60]	438539	1			T1	33		T2	10		T3	4483
valid_sources[0x61]	484824	1			T1	79		T2	65		T4	507
valid_sources[0x62]	440069	1			T1	61		T2	63		T4	474
valid_sources[0x63]	439457	1			T1	13		T2	5		T4	482
valid_sources[0x64]	483020	1			T1	130		T2	8		T4	453
valid_sources[0x65]	448672	1			T1	198		T2	39		T4	564
valid_sources[0x66]	459789	1			T1	39		T2	12		T4	453
valid_sources[0x67]	483060	1			T1	53		T2	29		T3	16444
valid_sources[0x68]	437420	1			T1	195		T2	51		T4	462
valid_sources[0x69]	490496	1			T2	21		T4	483		T9	1728
valid_sources[0x6a]	630552	1			T1	2		T2	18		T4	491
valid_sources[0x6b]	474929	1			T1	240		T2	14		T4	445
valid_sources[0x6c]	441932	1			T1	69		T4	433		T9	1827
valid_sources[0x6d]	451292	1			T2	22		T4	375		T9	1800
valid_sources[0x6e]	497071	1			T1	202		T2	9		T4	615
valid_sources[0x6f]	1803685	1			T1	24		T2	37		T4	402
valid_sources[0x70]	443030	1			T1	197		T2	35		T4	543
valid_sources[0x71]	463398	1			T2	71		T4	545		T9	1783
valid_sources[0x72]	466784	1			T1	143		T2	33		T4	431
valid_sources[0x73]	570554	1			T1	30		T2	51		T4	17478
valid_sources[0x74]	488215	1			T1	119		T2	29		T4	595
valid_sources[0x75]	456051	1			T1	355		T2	6		T4	396
valid_sources[0x76]	1115080	1			T1	22		T2	69		T4	663
valid_sources[0x77]	437613	1			T1	135		T2	23		T4	411
valid_sources[0x78]	489660	1			T1	292		T2	30		T4	517
valid_sources[0x79]	446302	1			T1	82		T2	28		T4	479
valid_sources[0x7a]	442248	1			T1	66		T2	37		T3	1
valid_sources[0x7b]	457169	1			T1	11		T2	8		T4	483
valid_sources[0x7c]	474782	1			T2	15		T4	309		T9	1760
valid_sources[0x7d]	568580	1			T1	95		T2	11		T4	515
valid_sources[0x7e]	466604	1			T1	180		T2	55		T3	1350
valid_sources[0x7f]	479564	1			T1	192		T2	44		T3	5232
valid_sources[0x80]	530595	1			T1	32		T2	42		T4	592

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

62164240

1

T1

110

T2

3776

T3

88327

values[0x0]

all_enables

biggest_size

32303695

1

T1

713

T2

1863

T3

44076

values[0x1]

all_enables

biggest_size

32317602

1

T1

646

T2

1830

T3

43921

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	45438356	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

16930

1

T3

14

T4

2

T9

4

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	45430104	1			T1	16474		T2	16409		T3	346316
values[0x0]	12517	1			T3	22		T4	14		T9	5
values[0x1]	12665	1			T1	1		T2	1		T3	14

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	30298038	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

15157248

1

T1

5571

T2

5489

T3

115180

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	122111	1			T1	51		T2	56		T3	1431
valid_sources[0x01]	119968	1			T1	84		T2	81		T3	1350
valid_sources[0x02]	119647	1			T1	66		T2	23		T3	1286
valid_sources[0x03]	119484	1			T1	67		T2	37		T3	1323
valid_sources[0x04]	120930	1			T1	57		T2	25		T3	1388
valid_sources[0x05]	121236	1			T1	76		T2	78		T3	1294
valid_sources[0x06]	121524	1			T1	57		T2	53		T3	1267
valid_sources[0x07]	126656	1			T1	75		T2	64		T3	1425
valid_sources[0x08]	138182	1			T1	61		T2	78		T3	1375
valid_sources[0x09]	130804	1			T1	68		T2	41		T3	1389
valid_sources[0x0a]	120591	1			T1	57		T2	81		T3	1383
valid_sources[0x0b]	127343	1			T1	48		T2	69		T3	1363
valid_sources[0x0c]	119758	1			T1	61		T2	83		T3	1364
valid_sources[0x0d]	120256	1			T1	59		T2	43		T3	1294
valid_sources[0x0e]	119956	1			T1	60		T2	84		T3	1335
valid_sources[0x0f]	120510	1			T1	62		T2	71		T3	1303
valid_sources[0x10]	128015	1			T1	72		T2	47		T3	1339
valid_sources[0x11]	120357	1			T1	66		T2	71		T3	1336
valid_sources[0x12]	291238	1			T1	62		T2	45		T3	1396
valid_sources[0x13]	144723	1			T1	59		T2	66		T3	1372
valid_sources[0x14]	120281	1			T1	71		T2	56		T3	1370
valid_sources[0x15]	120922	1			T1	56		T2	62		T3	1437
valid_sources[0x16]	122912	1			T1	47		T2	68		T3	1315
valid_sources[0x17]	121705	1			T1	60		T2	120		T3	1394
valid_sources[0x18]	157997	1			T1	57		T2	83		T3	1345
valid_sources[0x19]	122014	1			T1	48		T2	58		T3	1305
valid_sources[0x1a]	120103	1			T1	65		T2	94		T3	1361
valid_sources[0x1b]	169419	1			T1	58		T2	81		T3	1388
valid_sources[0x1c]	122784	1			T1	52		T2	66		T3	1374
valid_sources[0x1d]	425466	1			T1	61		T2	58		T3	1352
valid_sources[0x1e]	126906	1			T1	51		T2	85		T3	1331
valid_sources[0x1f]	151775	1			T1	61		T2	80		T3	1312
valid_sources[0x20]	121662	1			T1	59		T2	72		T3	1343
valid_sources[0x21]	194284	1			T1	76		T2	63		T3	1351
valid_sources[0x22]	154602	1			T1	62		T2	68		T3	1416
valid_sources[0x23]	285765	1			T1	75		T2	102		T3	1365
valid_sources[0x24]	123310	1			T1	67		T2	55		T3	1321
valid_sources[0x25]	136994	1			T1	78		T2	57		T3	1374
valid_sources[0x26]	120200	1			T1	73		T2	37		T3	1371
valid_sources[0x27]	152386	1			T1	45		T2	39		T3	1436
valid_sources[0x28]	366393	1			T1	55		T2	63		T3	1258
valid_sources[0x29]	156324	1			T1	70		T2	37		T3	1339
valid_sources[0x2a]	282056	1			T1	76		T2	69		T3	1349
valid_sources[0x2b]	956713	1			T1	46		T2	79		T3	1353
valid_sources[0x2c]	121247	1			T1	60		T2	49		T3	1413
valid_sources[0x2d]	119521	1			T1	54		T2	45		T3	1267
valid_sources[0x2e]	189964	1			T1	72		T2	44		T3	1279
valid_sources[0x2f]	247043	1			T1	72		T2	70		T3	1365
valid_sources[0x30]	1025130	1			T1	76		T2	55		T3	1295
valid_sources[0x31]	221106	1			T1	69		T2	64		T3	1301
valid_sources[0x32]	187764	1			T1	54		T2	79		T3	1355
valid_sources[0x33]	121288	1			T1	65		T2	74		T3	1336
valid_sources[0x34]	120233	1			T1	69		T2	50		T3	1390
valid_sources[0x35]	120611	1			T1	52		T2	72		T3	1360
valid_sources[0x36]	138022	1			T1	79		T2	65		T3	1379
valid_sources[0x37]	144998	1			T1	63		T2	81		T3	1311
valid_sources[0x38]	118801	1			T1	51		T2	44		T3	1373
valid_sources[0x39]	153816	1			T1	76		T2	83		T3	1322
valid_sources[0x3a]	120341	1			T1	51		T2	46		T3	1355
valid_sources[0x3b]	548748	1			T1	58		T2	58		T3	1324
valid_sources[0x3c]	120397	1			T1	54		T2	56		T3	1295
valid_sources[0x3d]	124016	1			T1	51		T2	122		T3	1418
valid_sources[0x3e]	124129	1			T1	54		T2	56		T3	1335
valid_sources[0x3f]	120872	1			T1	77		T2	87		T3	1312
valid_sources[0x40]	154213	1			T1	80		T2	69		T3	1374
valid_sources[0x41]	138491	1			T1	67		T2	38		T3	1343
valid_sources[0x42]	120628	1			T1	67		T2	68		T3	1394
valid_sources[0x43]	120474	1			T1	71		T2	110		T3	1312
valid_sources[0x44]	317334	1			T1	53		T2	75		T3	1315
valid_sources[0x45]	120848	1			T1	87		T2	84		T3	1257
valid_sources[0x46]	153454	1			T1	59		T2	50		T3	1350
valid_sources[0x47]	118378	1			T1	71		T2	60		T3	1306
valid_sources[0x48]	248495	1			T1	56		T2	67		T3	1459
valid_sources[0x49]	119875	1			T1	51		T2	54		T3	1425
valid_sources[0x4a]	126824	1			T1	44		T2	39		T3	1394
valid_sources[0x4b]	137395	1			T1	66		T2	95		T3	1371
valid_sources[0x4c]	121756	1			T1	66		T2	33		T3	1403
valid_sources[0x4d]	119570	1			T1	56		T2	41		T3	1316
valid_sources[0x4e]	185196	1			T1	61		T2	55		T3	1341
valid_sources[0x4f]	120106	1			T1	88		T2	70		T3	1390
valid_sources[0x50]	153520	1			T1	66		T2	41		T3	1431
valid_sources[0x51]	169520	1			T1	73		T2	58		T3	1349
valid_sources[0x52]	468330	1			T1	65		T2	35		T3	1301
valid_sources[0x53]	599448	1			T1	63		T2	47		T3	1329
valid_sources[0x54]	130738	1			T1	62		T2	100		T3	1305
valid_sources[0x55]	145588	1			T1	75		T2	71		T3	1382
valid_sources[0x56]	137428	1			T1	75		T2	88		T3	1420
valid_sources[0x57]	121174	1			T1	53		T2	61		T3	1362
valid_sources[0x58]	146402	1			T1	56		T2	69		T3	1350
valid_sources[0x59]	121363	1			T1	45		T2	75		T3	1415
valid_sources[0x5a]	218708	1			T1	59		T2	75		T3	1366
valid_sources[0x5b]	151951	1			T1	70		T2	71		T3	1337
valid_sources[0x5c]	123574	1			T1	75		T2	88		T3	1400
valid_sources[0x5d]	135719	1			T1	67		T2	57		T3	1345
valid_sources[0x5e]	183978	1			T1	72		T2	62		T3	1387
valid_sources[0x5f]	188049	1			T1	62		T2	52		T3	1312
valid_sources[0x60]	157124	1			T1	82		T2	75		T3	1484
valid_sources[0x61]	123962	1			T1	70		T2	67		T3	1388
valid_sources[0x62]	139144	1			T1	67		T2	60		T3	1401
valid_sources[0x63]	155415	1			T1	59		T2	61		T3	1325
valid_sources[0x64]	156184	1			T1	69		T2	63		T3	1412
valid_sources[0x65]	249617	1			T1	56		T2	59		T3	1394
valid_sources[0x66]	120417	1			T1	64		T2	58		T3	1401
valid_sources[0x67]	167135	1			T1	82		T2	68		T3	1332
valid_sources[0x68]	124682	1			T1	68		T2	90		T3	1387
valid_sources[0x69]	127199	1			T1	54		T2	71		T3	1374
valid_sources[0x6a]	123820	1			T1	52		T2	47		T3	1400
valid_sources[0x6b]	152167	1			T1	61		T2	71		T3	1332
valid_sources[0x6c]	126047	1			T1	63		T2	48		T3	1336
valid_sources[0x6d]	121870	1			T1	73		T2	101		T3	1315
valid_sources[0x6e]	137308	1			T1	67		T2	63		T3	1425
valid_sources[0x6f]	140778	1			T1	49		T2	71		T3	1349
valid_sources[0x70]	176450	1			T1	74		T2	45		T3	1387
valid_sources[0x71]	299450	1			T1	67		T2	69		T3	1345
valid_sources[0x72]	121901	1			T1	54		T2	53		T3	1328
valid_sources[0x73]	204149	1			T1	63		T2	61		T3	1334
valid_sources[0x74]	120193	1			T1	64		T2	58		T3	1381
valid_sources[0x75]	120559	1			T1	62		T2	54		T3	1348
valid_sources[0x76]	237929	1			T1	72		T2	64		T3	1358
valid_sources[0x77]	204749	1			T1	81		T2	82		T3	1367
valid_sources[0x78]	127096	1			T1	75		T2	31		T3	1364
valid_sources[0x79]	121090	1			T1	73		T2	48		T3	1328
valid_sources[0x7a]	119465	1			T1	85		T2	43		T3	1415
valid_sources[0x7b]	121070	1			T1	68		T2	45		T3	1305
valid_sources[0x7c]	120713	1			T1	47		T2	47		T3	1408
valid_sources[0x7d]	229445	1			T1	49		T2	53		T3	1397
valid_sources[0x7e]	318689	1			T1	80		T2	36		T3	1366
valid_sources[0x7f]	176613	1			T1	63		T2	52		T3	1272
valid_sources[0x80]	185887	1			T1	81		T2	77		T3	1334

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

6689

1

T10

14

T12

8

T16

3

values[0x0]

all_enables

biggest_size

6007

1

T3

11

T9

2

T10

13

values[0x1]

all_enables

biggest_size

4234

1

T3

3

T4

2

T9

2