| T546 |
/workspace/coverage/default/2.sram_ctrl_alert_test.2877197753 |
|
|
Mar 10 02:00:45 PM PDT 24 |
Mar 10 02:00:47 PM PDT 24 |
19254256 ps |
| T547 |
/workspace/coverage/default/28.sram_ctrl_smoke.3199681196 |
|
|
Mar 10 02:02:56 PM PDT 24 |
Mar 10 02:03:09 PM PDT 24 |
3968856715 ps |
| T548 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.2386069742 |
|
|
Mar 10 02:04:16 PM PDT 24 |
Mar 10 02:08:23 PM PDT 24 |
3945633391 ps |
| T549 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2621205473 |
|
|
Mar 10 02:00:55 PM PDT 24 |
Mar 10 02:10:52 PM PDT 24 |
31286658089 ps |
| T550 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1211515743 |
|
|
Mar 10 02:01:40 PM PDT 24 |
Mar 10 02:09:06 PM PDT 24 |
36177255036 ps |
| T551 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.280540156 |
|
|
Mar 10 02:00:26 PM PDT 24 |
Mar 10 02:01:36 PM PDT 24 |
2372114542 ps |
| T552 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.3959022538 |
|
|
Mar 10 02:03:23 PM PDT 24 |
Mar 10 02:04:02 PM PDT 24 |
2724700915 ps |
| T553 |
/workspace/coverage/default/24.sram_ctrl_executable.1120202980 |
|
|
Mar 10 02:02:30 PM PDT 24 |
Mar 10 02:23:09 PM PDT 24 |
38347287026 ps |
| T554 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.243851781 |
|
|
Mar 10 02:03:25 PM PDT 24 |
Mar 10 02:04:13 PM PDT 24 |
28132404129 ps |
| T555 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.2321982788 |
|
|
Mar 10 02:05:10 PM PDT 24 |
Mar 10 02:05:14 PM PDT 24 |
587700508 ps |
| T556 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2581492450 |
|
|
Mar 10 02:00:53 PM PDT 24 |
Mar 10 02:05:19 PM PDT 24 |
4351737545 ps |
| T557 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.2196020596 |
|
|
Mar 10 02:00:37 PM PDT 24 |
Mar 10 02:00:45 PM PDT 24 |
849400188 ps |
| T558 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.854637913 |
|
|
Mar 10 02:02:47 PM PDT 24 |
Mar 10 02:03:53 PM PDT 24 |
4136314920 ps |
| T559 |
/workspace/coverage/default/30.sram_ctrl_alert_test.136841242 |
|
|
Mar 10 02:03:21 PM PDT 24 |
Mar 10 02:03:22 PM PDT 24 |
11961907 ps |
| T560 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.1314946417 |
|
|
Mar 10 02:00:27 PM PDT 24 |
Mar 10 02:03:07 PM PDT 24 |
9055988748 ps |
| T561 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.181893264 |
|
|
Mar 10 02:00:50 PM PDT 24 |
Mar 10 02:01:57 PM PDT 24 |
985295340 ps |
| T562 |
/workspace/coverage/default/37.sram_ctrl_alert_test.2949374009 |
|
|
Mar 10 02:04:25 PM PDT 24 |
Mar 10 02:04:26 PM PDT 24 |
14670453 ps |
| T563 |
/workspace/coverage/default/42.sram_ctrl_smoke.3848508346 |
|
|
Mar 10 02:05:08 PM PDT 24 |
Mar 10 02:05:18 PM PDT 24 |
717767767 ps |
| T564 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.4083289137 |
|
|
Mar 10 02:05:56 PM PDT 24 |
Mar 10 02:07:44 PM PDT 24 |
820489619 ps |
| T565 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.2551322834 |
|
|
Mar 10 02:04:48 PM PDT 24 |
Mar 10 02:06:57 PM PDT 24 |
8219573776 ps |
| T566 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.379518756 |
|
|
Mar 10 02:05:26 PM PDT 24 |
Mar 10 02:08:21 PM PDT 24 |
11914032643 ps |
| T567 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.1950937291 |
|
|
Mar 10 02:02:34 PM PDT 24 |
Mar 10 02:04:55 PM PDT 24 |
4880690313 ps |
| T568 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.575792534 |
|
|
Mar 10 02:01:25 PM PDT 24 |
Mar 10 02:03:26 PM PDT 24 |
1866163284 ps |
| T569 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.691137188 |
|
|
Mar 10 02:04:57 PM PDT 24 |
Mar 10 02:09:15 PM PDT 24 |
32818584226 ps |
| T570 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.2474833651 |
|
|
Mar 10 02:02:18 PM PDT 24 |
Mar 10 02:02:22 PM PDT 24 |
680424923 ps |
| T571 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.2030268828 |
|
|
Mar 10 02:00:56 PM PDT 24 |
Mar 10 02:03:48 PM PDT 24 |
62690219559 ps |
| T572 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.2492893803 |
|
|
Mar 10 02:04:31 PM PDT 24 |
Mar 10 02:09:11 PM PDT 24 |
5657325940 ps |
| T573 |
/workspace/coverage/default/7.sram_ctrl_smoke.1410831808 |
|
|
Mar 10 02:00:51 PM PDT 24 |
Mar 10 02:02:31 PM PDT 24 |
842128270 ps |
| T574 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.2896273003 |
|
|
Mar 10 02:01:14 PM PDT 24 |
Mar 10 02:01:17 PM PDT 24 |
723232689 ps |
| T575 |
/workspace/coverage/default/29.sram_ctrl_executable.2418043771 |
|
|
Mar 10 02:03:14 PM PDT 24 |
Mar 10 02:26:15 PM PDT 24 |
22957698246 ps |
| T576 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.255338331 |
|
|
Mar 10 02:04:10 PM PDT 24 |
Mar 10 02:11:27 PM PDT 24 |
34922325832 ps |
| T577 |
/workspace/coverage/default/36.sram_ctrl_executable.179404001 |
|
|
Mar 10 02:04:15 PM PDT 24 |
Mar 10 02:13:07 PM PDT 24 |
5633513510 ps |
| T578 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.235736408 |
|
|
Mar 10 02:04:52 PM PDT 24 |
Mar 10 02:05:13 PM PDT 24 |
2964428398 ps |
| T579 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.2757195398 |
|
|
Mar 10 02:01:47 PM PDT 24 |
Mar 10 02:02:42 PM PDT 24 |
3908189678 ps |
| T580 |
/workspace/coverage/default/8.sram_ctrl_regwen.1902136573 |
|
|
Mar 10 02:00:59 PM PDT 24 |
Mar 10 02:06:31 PM PDT 24 |
12012494726 ps |
| T581 |
/workspace/coverage/default/21.sram_ctrl_partial_access.2279241923 |
|
|
Mar 10 02:02:02 PM PDT 24 |
Mar 10 02:02:18 PM PDT 24 |
933150436 ps |
| T582 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.732242140 |
|
|
Mar 10 02:03:19 PM PDT 24 |
Mar 10 02:09:01 PM PDT 24 |
16811780866 ps |
| T583 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.3899433460 |
|
|
Mar 10 02:03:16 PM PDT 24 |
Mar 10 02:06:53 PM PDT 24 |
4213332348 ps |
| T584 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.4159964704 |
|
|
Mar 10 02:04:14 PM PDT 24 |
Mar 10 02:05:32 PM PDT 24 |
2456942501 ps |
| T585 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.898407509 |
|
|
Mar 10 02:00:30 PM PDT 24 |
Mar 10 02:00:34 PM PDT 24 |
1200268746 ps |
| T586 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.2995241430 |
|
|
Mar 10 02:00:41 PM PDT 24 |
Mar 10 02:03:02 PM PDT 24 |
6887088522 ps |
| T587 |
/workspace/coverage/default/5.sram_ctrl_regwen.161224333 |
|
|
Mar 10 02:00:46 PM PDT 24 |
Mar 10 02:02:42 PM PDT 24 |
3151802484 ps |
| T588 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.3530430723 |
|
|
Mar 10 02:05:26 PM PDT 24 |
Mar 10 02:07:43 PM PDT 24 |
1632287691 ps |
| T589 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.4039521511 |
|
|
Mar 10 02:01:31 PM PDT 24 |
Mar 10 02:03:54 PM PDT 24 |
16089509558 ps |
| T590 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.2229963402 |
|
|
Mar 10 02:05:32 PM PDT 24 |
Mar 10 02:05:43 PM PDT 24 |
2855166331 ps |
| T591 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.4265965584 |
|
|
Mar 10 02:05:40 PM PDT 24 |
Mar 10 02:10:58 PM PDT 24 |
5544306370 ps |
| T592 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1863422254 |
|
|
Mar 10 02:00:52 PM PDT 24 |
Mar 10 02:17:16 PM PDT 24 |
15919970160 ps |
| T593 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.3677659102 |
|
|
Mar 10 02:01:37 PM PDT 24 |
Mar 10 02:16:13 PM PDT 24 |
87904423237 ps |
| T594 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.2783215435 |
|
|
Mar 10 02:00:47 PM PDT 24 |
Mar 10 02:01:46 PM PDT 24 |
3295436552 ps |
| T595 |
/workspace/coverage/default/27.sram_ctrl_partial_access.316447886 |
|
|
Mar 10 02:02:49 PM PDT 24 |
Mar 10 02:03:14 PM PDT 24 |
2874557322 ps |
| T596 |
/workspace/coverage/default/13.sram_ctrl_bijection.3129657614 |
|
|
Mar 10 02:01:13 PM PDT 24 |
Mar 10 02:17:53 PM PDT 24 |
239679583300 ps |
| T597 |
/workspace/coverage/default/8.sram_ctrl_partial_access.1314987023 |
|
|
Mar 10 02:00:46 PM PDT 24 |
Mar 10 02:00:53 PM PDT 24 |
745690544 ps |
| T598 |
/workspace/coverage/default/13.sram_ctrl_smoke.251344065 |
|
|
Mar 10 02:01:12 PM PDT 24 |
Mar 10 02:03:37 PM PDT 24 |
785282567 ps |
| T599 |
/workspace/coverage/default/41.sram_ctrl_alert_test.2250838862 |
|
|
Mar 10 02:05:08 PM PDT 24 |
Mar 10 02:05:09 PM PDT 24 |
53412607 ps |
| T600 |
/workspace/coverage/default/25.sram_ctrl_partial_access.2090164912 |
|
|
Mar 10 02:02:35 PM PDT 24 |
Mar 10 02:03:34 PM PDT 24 |
736481617 ps |
| T601 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.973910264 |
|
|
Mar 10 02:04:07 PM PDT 24 |
Mar 10 02:04:31 PM PDT 24 |
751753472 ps |
| T602 |
/workspace/coverage/default/28.sram_ctrl_alert_test.759487100 |
|
|
Mar 10 02:03:10 PM PDT 24 |
Mar 10 02:03:10 PM PDT 24 |
58179771 ps |
| T603 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3145486712 |
|
|
Mar 10 02:06:26 PM PDT 24 |
Mar 10 02:14:07 PM PDT 24 |
8321254651 ps |
| T604 |
/workspace/coverage/default/21.sram_ctrl_regwen.2661276449 |
|
|
Mar 10 02:02:03 PM PDT 24 |
Mar 10 02:14:59 PM PDT 24 |
32395726349 ps |
| T605 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.711676212 |
|
|
Mar 10 02:01:10 PM PDT 24 |
Mar 10 02:01:14 PM PDT 24 |
1213386548 ps |
| T606 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.1080678088 |
|
|
Mar 10 02:03:32 PM PDT 24 |
Mar 10 02:04:50 PM PDT 24 |
836490221 ps |
| T607 |
/workspace/coverage/default/6.sram_ctrl_partial_access.1865022978 |
|
|
Mar 10 02:00:43 PM PDT 24 |
Mar 10 02:00:54 PM PDT 24 |
11816171051 ps |
| T608 |
/workspace/coverage/default/21.sram_ctrl_stress_all.1476846231 |
|
|
Mar 10 02:02:08 PM PDT 24 |
Mar 10 02:39:16 PM PDT 24 |
103424536015 ps |
| T609 |
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.646878667 |
|
|
Mar 10 02:05:15 PM PDT 24 |
Mar 10 02:10:04 PM PDT 24 |
64679868716 ps |
| T610 |
/workspace/coverage/default/25.sram_ctrl_alert_test.2766837535 |
|
|
Mar 10 02:02:37 PM PDT 24 |
Mar 10 02:02:39 PM PDT 24 |
43504016 ps |
| T611 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.896147045 |
|
|
Mar 10 02:00:44 PM PDT 24 |
Mar 10 02:14:36 PM PDT 24 |
23539944321 ps |
| T612 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.4207103469 |
|
|
Mar 10 02:01:11 PM PDT 24 |
Mar 10 02:04:43 PM PDT 24 |
12451057721 ps |
| T613 |
/workspace/coverage/default/14.sram_ctrl_executable.165114122 |
|
|
Mar 10 02:01:22 PM PDT 24 |
Mar 10 02:02:41 PM PDT 24 |
1485793593 ps |
| T614 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.245592677 |
|
|
Mar 10 02:01:07 PM PDT 24 |
Mar 10 02:22:35 PM PDT 24 |
142260826979 ps |
| T615 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3260349239 |
|
|
Mar 10 02:01:12 PM PDT 24 |
Mar 10 02:01:34 PM PDT 24 |
954596637 ps |
| T616 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.2297145376 |
|
|
Mar 10 02:01:46 PM PDT 24 |
Mar 10 02:02:45 PM PDT 24 |
1903802456 ps |
| T617 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.3932962007 |
|
|
Mar 10 02:04:58 PM PDT 24 |
Mar 10 02:09:32 PM PDT 24 |
30178764612 ps |
| T618 |
/workspace/coverage/default/35.sram_ctrl_executable.3623109326 |
|
|
Mar 10 02:04:06 PM PDT 24 |
Mar 10 02:12:16 PM PDT 24 |
15208232546 ps |
| T619 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3934329583 |
|
|
Mar 10 02:06:08 PM PDT 24 |
Mar 10 02:06:12 PM PDT 24 |
1348534711 ps |
| T620 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.612584152 |
|
|
Mar 10 02:01:01 PM PDT 24 |
Mar 10 02:02:15 PM PDT 24 |
3442631687 ps |
| T621 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1126648041 |
|
|
Mar 10 02:00:35 PM PDT 24 |
Mar 10 02:00:44 PM PDT 24 |
443960703 ps |
| T622 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.1219364666 |
|
|
Mar 10 02:02:53 PM PDT 24 |
Mar 10 02:11:32 PM PDT 24 |
31062151947 ps |
| T623 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.601115364 |
|
|
Mar 10 02:05:35 PM PDT 24 |
Mar 10 02:06:11 PM PDT 24 |
3004652688 ps |
| T624 |
/workspace/coverage/default/36.sram_ctrl_regwen.2926731639 |
|
|
Mar 10 02:04:14 PM PDT 24 |
Mar 10 02:15:17 PM PDT 24 |
7853031443 ps |
| T625 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2563654276 |
|
|
Mar 10 02:01:18 PM PDT 24 |
Mar 10 02:04:02 PM PDT 24 |
3136479327 ps |
| T626 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2527672591 |
|
|
Mar 10 02:00:48 PM PDT 24 |
Mar 10 02:14:30 PM PDT 24 |
16283752787 ps |
| T627 |
/workspace/coverage/default/11.sram_ctrl_executable.519827923 |
|
|
Mar 10 02:01:00 PM PDT 24 |
Mar 10 02:18:51 PM PDT 24 |
53576111014 ps |
| T628 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.2982231118 |
|
|
Mar 10 02:01:47 PM PDT 24 |
Mar 10 02:04:30 PM PDT 24 |
3179306481 ps |
| T629 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.2688953392 |
|
|
Mar 10 02:01:26 PM PDT 24 |
Mar 10 02:02:25 PM PDT 24 |
1489277316 ps |
| T630 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.2658579644 |
|
|
Mar 10 02:00:47 PM PDT 24 |
Mar 10 02:00:54 PM PDT 24 |
1395396286 ps |
| T631 |
/workspace/coverage/default/28.sram_ctrl_stress_all.742695727 |
|
|
Mar 10 02:03:09 PM PDT 24 |
Mar 10 03:38:54 PM PDT 24 |
89410786966 ps |
| T632 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.188275618 |
|
|
Mar 10 02:04:53 PM PDT 24 |
Mar 10 02:07:06 PM PDT 24 |
769244828 ps |
| T633 |
/workspace/coverage/default/25.sram_ctrl_smoke.3543304925 |
|
|
Mar 10 02:02:37 PM PDT 24 |
Mar 10 02:03:06 PM PDT 24 |
395882368 ps |
| T37 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.3824507768 |
|
|
Mar 10 02:00:53 PM PDT 24 |
Mar 10 02:00:57 PM PDT 24 |
383951152 ps |
| T634 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.292211435 |
|
|
Mar 10 02:01:19 PM PDT 24 |
Mar 10 02:02:22 PM PDT 24 |
997809505 ps |
| T635 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.4128583365 |
|
|
Mar 10 02:03:37 PM PDT 24 |
Mar 10 02:06:01 PM PDT 24 |
3138901393 ps |
| T636 |
/workspace/coverage/default/49.sram_ctrl_partial_access.3450886036 |
|
|
Mar 10 02:06:28 PM PDT 24 |
Mar 10 02:06:36 PM PDT 24 |
741073881 ps |
| T637 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.1306382602 |
|
|
Mar 10 02:00:29 PM PDT 24 |
Mar 10 02:01:05 PM PDT 24 |
7946010929 ps |
| T638 |
/workspace/coverage/default/43.sram_ctrl_smoke.670096550 |
|
|
Mar 10 02:05:16 PM PDT 24 |
Mar 10 02:05:38 PM PDT 24 |
1722802216 ps |
| T639 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.4074996911 |
|
|
Mar 10 02:03:13 PM PDT 24 |
Mar 10 02:03:17 PM PDT 24 |
1344622536 ps |
| T640 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.3128135232 |
|
|
Mar 10 02:05:12 PM PDT 24 |
Mar 10 02:18:23 PM PDT 24 |
20659621512 ps |
| T641 |
/workspace/coverage/default/14.sram_ctrl_bijection.644169516 |
|
|
Mar 10 02:01:21 PM PDT 24 |
Mar 10 02:28:12 PM PDT 24 |
24228008648 ps |
| T642 |
/workspace/coverage/default/15.sram_ctrl_stress_all.1944308898 |
|
|
Mar 10 02:01:27 PM PDT 24 |
Mar 10 03:35:06 PM PDT 24 |
56686529938 ps |
| T643 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.2594259017 |
|
|
Mar 10 02:03:24 PM PDT 24 |
Mar 10 02:03:28 PM PDT 24 |
1680583988 ps |
| T644 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.571382627 |
|
|
Mar 10 02:00:59 PM PDT 24 |
Mar 10 02:03:11 PM PDT 24 |
30957773188 ps |
| T645 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.2961215555 |
|
|
Mar 10 02:05:02 PM PDT 24 |
Mar 10 02:37:37 PM PDT 24 |
193453075427 ps |
| T646 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3400314172 |
|
|
Mar 10 02:06:22 PM PDT 24 |
Mar 10 02:06:25 PM PDT 24 |
382785665 ps |
| T647 |
/workspace/coverage/default/3.sram_ctrl_alert_test.2058018836 |
|
|
Mar 10 02:00:44 PM PDT 24 |
Mar 10 02:00:46 PM PDT 24 |
42720482 ps |
| T648 |
/workspace/coverage/default/24.sram_ctrl_bijection.2561490084 |
|
|
Mar 10 02:02:27 PM PDT 24 |
Mar 10 02:40:07 PM PDT 24 |
33166125660 ps |
| T649 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.2739379723 |
|
|
Mar 10 02:01:42 PM PDT 24 |
Mar 10 02:21:18 PM PDT 24 |
26657006604 ps |
| T650 |
/workspace/coverage/default/40.sram_ctrl_bijection.194810730 |
|
|
Mar 10 02:04:53 PM PDT 24 |
Mar 10 02:16:37 PM PDT 24 |
42986520854 ps |
| T651 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.2660429520 |
|
|
Mar 10 02:03:20 PM PDT 24 |
Mar 10 02:03:33 PM PDT 24 |
748161935 ps |
| T652 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.3821563683 |
|
|
Mar 10 02:03:44 PM PDT 24 |
Mar 10 02:10:21 PM PDT 24 |
72752805397 ps |
| T653 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.82100017 |
|
|
Mar 10 02:03:44 PM PDT 24 |
Mar 10 02:10:41 PM PDT 24 |
11655081624 ps |
| T654 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2824295015 |
|
|
Mar 10 02:00:44 PM PDT 24 |
Mar 10 02:00:47 PM PDT 24 |
851577245 ps |
| T655 |
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.2480386591 |
|
|
Mar 10 02:03:28 PM PDT 24 |
Mar 10 02:04:33 PM PDT 24 |
4524402276 ps |
| T656 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.378375995 |
|
|
Mar 10 02:06:00 PM PDT 24 |
Mar 10 02:07:05 PM PDT 24 |
1889129983 ps |
| T657 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.3219881078 |
|
|
Mar 10 02:01:57 PM PDT 24 |
Mar 10 02:11:00 PM PDT 24 |
14631330610 ps |
| T658 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3281937096 |
|
|
Mar 10 02:06:21 PM PDT 24 |
Mar 10 02:14:22 PM PDT 24 |
35649310388 ps |
| T659 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.4121440861 |
|
|
Mar 10 02:01:25 PM PDT 24 |
Mar 10 02:05:55 PM PDT 24 |
20603717110 ps |
| T660 |
/workspace/coverage/default/32.sram_ctrl_stress_all.1292713415 |
|
|
Mar 10 02:03:40 PM PDT 24 |
Mar 10 03:47:20 PM PDT 24 |
149182567016 ps |
| T661 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.565322959 |
|
|
Mar 10 02:01:37 PM PDT 24 |
Mar 10 02:04:05 PM PDT 24 |
6013121625 ps |
| T662 |
/workspace/coverage/default/44.sram_ctrl_partial_access.2073539823 |
|
|
Mar 10 02:05:35 PM PDT 24 |
Mar 10 02:06:12 PM PDT 24 |
2241617453 ps |
| T663 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3498409271 |
|
|
Mar 10 02:00:33 PM PDT 24 |
Mar 10 02:00:48 PM PDT 24 |
2777760249 ps |
| T664 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.772153322 |
|
|
Mar 10 02:02:56 PM PDT 24 |
Mar 10 02:03:50 PM PDT 24 |
2096312776 ps |
| T665 |
/workspace/coverage/default/7.sram_ctrl_executable.3632298626 |
|
|
Mar 10 02:00:46 PM PDT 24 |
Mar 10 02:04:18 PM PDT 24 |
36383855670 ps |
| T666 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.715227358 |
|
|
Mar 10 02:05:51 PM PDT 24 |
Mar 10 02:10:17 PM PDT 24 |
11485339134 ps |
| T667 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.3861641 |
|
|
Mar 10 02:02:36 PM PDT 24 |
Mar 10 02:04:36 PM PDT 24 |
2019469898 ps |
| T668 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1706101862 |
|
|
Mar 10 02:00:47 PM PDT 24 |
Mar 10 02:10:02 PM PDT 24 |
37506753790 ps |
| T669 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2656061500 |
|
|
Mar 10 02:01:08 PM PDT 24 |
Mar 10 02:14:08 PM PDT 24 |
8544545465 ps |
| T670 |
/workspace/coverage/default/36.sram_ctrl_alert_test.3359977825 |
|
|
Mar 10 02:04:20 PM PDT 24 |
Mar 10 02:04:21 PM PDT 24 |
15714781 ps |
| T671 |
/workspace/coverage/default/2.sram_ctrl_max_throughput.1594670751 |
|
|
Mar 10 02:00:32 PM PDT 24 |
Mar 10 02:02:16 PM PDT 24 |
3167370496 ps |
| T672 |
/workspace/coverage/default/4.sram_ctrl_smoke.1406174866 |
|
|
Mar 10 02:00:43 PM PDT 24 |
Mar 10 02:00:50 PM PDT 24 |
5697420525 ps |
| T673 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3064364541 |
|
|
Mar 10 02:05:28 PM PDT 24 |
Mar 10 02:07:22 PM PDT 24 |
2923606835 ps |
| T674 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.761467250 |
|
|
Mar 10 02:03:19 PM PDT 24 |
Mar 10 02:07:21 PM PDT 24 |
14545484432 ps |
| T675 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.3302150620 |
|
|
Mar 10 02:04:15 PM PDT 24 |
Mar 10 02:06:19 PM PDT 24 |
1567434532 ps |
| T676 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.932496679 |
|
|
Mar 10 02:05:06 PM PDT 24 |
Mar 10 02:07:12 PM PDT 24 |
9862338631 ps |
| T677 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.3540682479 |
|
|
Mar 10 02:05:21 PM PDT 24 |
Mar 10 02:07:41 PM PDT 24 |
9564723834 ps |
| T678 |
/workspace/coverage/default/45.sram_ctrl_stress_all.871843288 |
|
|
Mar 10 02:05:50 PM PDT 24 |
Mar 10 03:10:48 PM PDT 24 |
243999238276 ps |
| T679 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.3257077470 |
|
|
Mar 10 02:04:56 PM PDT 24 |
Mar 10 02:12:34 PM PDT 24 |
7796268893 ps |
| T680 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.4100220132 |
|
|
Mar 10 02:00:52 PM PDT 24 |
Mar 10 02:17:18 PM PDT 24 |
24561955500 ps |
| T681 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.2586101918 |
|
|
Mar 10 02:03:45 PM PDT 24 |
Mar 10 02:03:49 PM PDT 24 |
1409072000 ps |
| T682 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3793911585 |
|
|
Mar 10 02:00:59 PM PDT 24 |
Mar 10 02:01:02 PM PDT 24 |
359532670 ps |
| T683 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.2838121247 |
|
|
Mar 10 02:00:37 PM PDT 24 |
Mar 10 02:00:41 PM PDT 24 |
352475195 ps |
| T684 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1584810269 |
|
|
Mar 10 02:00:53 PM PDT 24 |
Mar 10 02:02:00 PM PDT 24 |
5004391782 ps |
| T685 |
/workspace/coverage/default/20.sram_ctrl_smoke.483327722 |
|
|
Mar 10 02:01:53 PM PDT 24 |
Mar 10 02:02:01 PM PDT 24 |
456554223 ps |
| T686 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.1913152987 |
|
|
Mar 10 02:01:37 PM PDT 24 |
Mar 10 02:04:07 PM PDT 24 |
10156767008 ps |
| T687 |
/workspace/coverage/default/29.sram_ctrl_regwen.1215425364 |
|
|
Mar 10 02:03:16 PM PDT 24 |
Mar 10 02:25:49 PM PDT 24 |
95710349594 ps |
| T688 |
/workspace/coverage/default/16.sram_ctrl_stress_all.2032239562 |
|
|
Mar 10 02:01:33 PM PDT 24 |
Mar 10 03:20:54 PM PDT 24 |
73608974052 ps |
| T689 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.2167018426 |
|
|
Mar 10 02:00:45 PM PDT 24 |
Mar 10 02:01:59 PM PDT 24 |
1497404596 ps |
| T690 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3696809350 |
|
|
Mar 10 02:05:29 PM PDT 24 |
Mar 10 02:20:44 PM PDT 24 |
6357885078 ps |
| T691 |
/workspace/coverage/default/0.sram_ctrl_executable.1615587760 |
|
|
Mar 10 02:00:31 PM PDT 24 |
Mar 10 02:10:05 PM PDT 24 |
43690806332 ps |
| T692 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.2433566303 |
|
|
Mar 10 02:02:21 PM PDT 24 |
Mar 10 02:06:29 PM PDT 24 |
11382353063 ps |
| T693 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.574176398 |
|
|
Mar 10 02:01:10 PM PDT 24 |
Mar 10 02:03:15 PM PDT 24 |
6516591003 ps |
| T694 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.1651150131 |
|
|
Mar 10 02:03:38 PM PDT 24 |
Mar 10 02:06:11 PM PDT 24 |
8501954639 ps |
| T695 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.265634761 |
|
|
Mar 10 02:02:02 PM PDT 24 |
Mar 10 02:20:46 PM PDT 24 |
13433401389 ps |
| T696 |
/workspace/coverage/default/47.sram_ctrl_bijection.3977209114 |
|
|
Mar 10 02:06:05 PM PDT 24 |
Mar 10 02:37:06 PM PDT 24 |
84672034997 ps |
| T697 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.556201847 |
|
|
Mar 10 02:03:18 PM PDT 24 |
Mar 10 02:16:18 PM PDT 24 |
17865780827 ps |
| T698 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.3149292146 |
|
|
Mar 10 02:03:50 PM PDT 24 |
Mar 10 02:14:57 PM PDT 24 |
51369801780 ps |
| T699 |
/workspace/coverage/default/33.sram_ctrl_regwen.857139847 |
|
|
Mar 10 02:03:47 PM PDT 24 |
Mar 10 02:19:38 PM PDT 24 |
9934225980 ps |
| T700 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.1529301600 |
|
|
Mar 10 02:04:24 PM PDT 24 |
Mar 10 02:07:23 PM PDT 24 |
16268646916 ps |
| T701 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.111572483 |
|
|
Mar 10 02:00:44 PM PDT 24 |
Mar 10 02:02:48 PM PDT 24 |
7904510404 ps |
| T702 |
/workspace/coverage/default/32.sram_ctrl_executable.4024289118 |
|
|
Mar 10 02:03:38 PM PDT 24 |
Mar 10 02:21:21 PM PDT 24 |
19955913470 ps |
| T703 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.4284828613 |
|
|
Mar 10 02:01:31 PM PDT 24 |
Mar 10 02:26:17 PM PDT 24 |
12941368067 ps |
| T704 |
/workspace/coverage/default/16.sram_ctrl_bijection.3098861326 |
|
|
Mar 10 02:01:24 PM PDT 24 |
Mar 10 02:28:58 PM PDT 24 |
73809550544 ps |
| T705 |
/workspace/coverage/default/23.sram_ctrl_regwen.2267107038 |
|
|
Mar 10 02:02:22 PM PDT 24 |
Mar 10 02:04:54 PM PDT 24 |
5893738530 ps |
| T706 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.181036591 |
|
|
Mar 10 02:03:11 PM PDT 24 |
Mar 10 02:09:25 PM PDT 24 |
12733226705 ps |
| T707 |
/workspace/coverage/default/37.sram_ctrl_access_during_key_req.2949212443 |
|
|
Mar 10 02:04:22 PM PDT 24 |
Mar 10 02:21:51 PM PDT 24 |
10861701616 ps |
| T708 |
/workspace/coverage/default/40.sram_ctrl_executable.378901638 |
|
|
Mar 10 02:04:54 PM PDT 24 |
Mar 10 02:25:38 PM PDT 24 |
60610364464 ps |
| T709 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.64030821 |
|
|
Mar 10 02:03:52 PM PDT 24 |
Mar 10 02:07:39 PM PDT 24 |
3845944285 ps |
| T710 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.464921912 |
|
|
Mar 10 02:04:54 PM PDT 24 |
Mar 10 02:07:58 PM PDT 24 |
11140944995 ps |
| T711 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1224537322 |
|
|
Mar 10 02:05:47 PM PDT 24 |
Mar 10 02:20:12 PM PDT 24 |
10721345910 ps |
| T712 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.3817330847 |
|
|
Mar 10 02:03:55 PM PDT 24 |
Mar 10 02:03:59 PM PDT 24 |
4804862523 ps |
| T713 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.1756984550 |
|
|
Mar 10 02:01:26 PM PDT 24 |
Mar 10 02:02:04 PM PDT 24 |
737544373 ps |
| T714 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.1860433086 |
|
|
Mar 10 02:01:52 PM PDT 24 |
Mar 10 02:02:07 PM PDT 24 |
604276398 ps |
| T715 |
/workspace/coverage/default/49.sram_ctrl_bijection.3298813561 |
|
|
Mar 10 02:06:26 PM PDT 24 |
Mar 10 02:29:27 PM PDT 24 |
74876774726 ps |
| T716 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.1240183557 |
|
|
Mar 10 02:03:11 PM PDT 24 |
Mar 10 02:07:26 PM PDT 24 |
30300195306 ps |
| T717 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.3360906595 |
|
|
Mar 10 02:04:20 PM PDT 24 |
Mar 10 02:10:45 PM PDT 24 |
5710865647 ps |
| T718 |
/workspace/coverage/default/17.sram_ctrl_stress_all.446017370 |
|
|
Mar 10 02:01:37 PM PDT 24 |
Mar 10 03:24:00 PM PDT 24 |
336434985703 ps |
| T719 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.422310244 |
|
|
Mar 10 02:04:27 PM PDT 24 |
Mar 10 02:11:23 PM PDT 24 |
6773812715 ps |
| T720 |
/workspace/coverage/default/5.sram_ctrl_stress_all.2044489563 |
|
|
Mar 10 02:00:45 PM PDT 24 |
Mar 10 04:11:42 PM PDT 24 |
427836398686 ps |
| T721 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1039523721 |
|
|
Mar 10 02:00:52 PM PDT 24 |
Mar 10 02:07:21 PM PDT 24 |
10932902371 ps |
| T722 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.685082080 |
|
|
Mar 10 02:00:52 PM PDT 24 |
Mar 10 02:01:06 PM PDT 24 |
2854187625 ps |
| T723 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.1025069675 |
|
|
Mar 10 02:00:29 PM PDT 24 |
Mar 10 02:00:40 PM PDT 24 |
692491109 ps |
| T724 |
/workspace/coverage/default/2.sram_ctrl_stress_all.2981111528 |
|
|
Mar 10 02:00:32 PM PDT 24 |
Mar 10 02:43:07 PM PDT 24 |
121640382190 ps |
| T725 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.786910171 |
|
|
Mar 10 02:00:52 PM PDT 24 |
Mar 10 02:03:11 PM PDT 24 |
8754120930 ps |
| T726 |
/workspace/coverage/default/19.sram_ctrl_regwen.1846955845 |
|
|
Mar 10 02:01:47 PM PDT 24 |
Mar 10 02:07:56 PM PDT 24 |
19325328857 ps |
| T727 |
/workspace/coverage/default/46.sram_ctrl_alert_test.1060916890 |
|
|
Mar 10 02:06:06 PM PDT 24 |
Mar 10 02:06:07 PM PDT 24 |
15082596 ps |
| T728 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3803547759 |
|
|
Mar 10 02:01:00 PM PDT 24 |
Mar 10 02:03:46 PM PDT 24 |
11191129093 ps |
| T729 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.1803017150 |
|
|
Mar 10 02:00:35 PM PDT 24 |
Mar 10 02:01:47 PM PDT 24 |
1645356568 ps |
| T730 |
/workspace/coverage/default/14.sram_ctrl_regwen.2497351959 |
|
|
Mar 10 02:01:20 PM PDT 24 |
Mar 10 02:25:58 PM PDT 24 |
132634562444 ps |
| T731 |
/workspace/coverage/default/43.sram_ctrl_regwen.385696379 |
|
|
Mar 10 02:05:28 PM PDT 24 |
Mar 10 02:27:26 PM PDT 24 |
75262315921 ps |
| T732 |
/workspace/coverage/default/17.sram_ctrl_alert_test.2798623888 |
|
|
Mar 10 02:01:37 PM PDT 24 |
Mar 10 02:01:38 PM PDT 24 |
26126976 ps |
| T733 |
/workspace/coverage/default/42.sram_ctrl_multiple_keys.2814462094 |
|
|
Mar 10 02:05:06 PM PDT 24 |
Mar 10 02:20:01 PM PDT 24 |
9644494056 ps |
| T734 |
/workspace/coverage/default/48.sram_ctrl_regwen.63833846 |
|
|
Mar 10 02:06:22 PM PDT 24 |
Mar 10 02:20:41 PM PDT 24 |
66901591103 ps |
| T735 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.1578966464 |
|
|
Mar 10 02:01:33 PM PDT 24 |
Mar 10 02:02:46 PM PDT 24 |
8303891647 ps |
| T736 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.879255353 |
|
|
Mar 10 02:00:44 PM PDT 24 |
Mar 10 02:03:04 PM PDT 24 |
1608468049 ps |
| T737 |
/workspace/coverage/default/47.sram_ctrl_partial_access.232315467 |
|
|
Mar 10 02:06:06 PM PDT 24 |
Mar 10 02:06:25 PM PDT 24 |
1779815787 ps |
| T738 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.1931480636 |
|
|
Mar 10 02:02:18 PM PDT 24 |
Mar 10 02:07:27 PM PDT 24 |
21512313200 ps |
| T739 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.3458361601 |
|
|
Mar 10 02:02:32 PM PDT 24 |
Mar 10 02:07:05 PM PDT 24 |
4053481089 ps |
| T740 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.339062286 |
|
|
Mar 10 02:05:13 PM PDT 24 |
Mar 10 02:10:32 PM PDT 24 |
21277904043 ps |
| T741 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.1732016314 |
|
|
Mar 10 02:03:22 PM PDT 24 |
Mar 10 02:08:33 PM PDT 24 |
149320095452 ps |
| T742 |
/workspace/coverage/default/28.sram_ctrl_regwen.845354297 |
|
|
Mar 10 02:03:08 PM PDT 24 |
Mar 10 02:13:04 PM PDT 24 |
8740511119 ps |
| T743 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.2248724511 |
|
|
Mar 10 02:02:45 PM PDT 24 |
Mar 10 02:02:49 PM PDT 24 |
367653067 ps |
| T744 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.2736216449 |
|
|
Mar 10 02:04:33 PM PDT 24 |
Mar 10 02:27:20 PM PDT 24 |
16225563938 ps |
| T745 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.4067970037 |
|
|
Mar 10 02:04:34 PM PDT 24 |
Mar 10 02:04:37 PM PDT 24 |
345833895 ps |
| T746 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.313970601 |
|
|
Mar 10 02:02:27 PM PDT 24 |
Mar 10 02:02:36 PM PDT 24 |
310061155 ps |
| T747 |
/workspace/coverage/default/15.sram_ctrl_smoke.4131149433 |
|
|
Mar 10 02:01:19 PM PDT 24 |
Mar 10 02:03:07 PM PDT 24 |
440939402 ps |
| T748 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.2970930682 |
|
|
Mar 10 02:00:46 PM PDT 24 |
Mar 10 02:13:09 PM PDT 24 |
31777613979 ps |
| T749 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3017941444 |
|
|
Mar 10 02:00:50 PM PDT 24 |
Mar 10 02:12:42 PM PDT 24 |
20198021082 ps |
| T750 |
/workspace/coverage/default/42.sram_ctrl_regwen.673419287 |
|
|
Mar 10 02:05:14 PM PDT 24 |
Mar 10 02:22:08 PM PDT 24 |
2865479456 ps |
| T751 |
/workspace/coverage/default/44.sram_ctrl_stress_all.1747816366 |
|
|
Mar 10 02:05:37 PM PDT 24 |
Mar 10 03:22:50 PM PDT 24 |
210881609622 ps |
| T752 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.3884441728 |
|
|
Mar 10 02:01:57 PM PDT 24 |
Mar 10 02:06:14 PM PDT 24 |
10373937722 ps |
| T753 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.3199604189 |
|
|
Mar 10 02:01:11 PM PDT 24 |
Mar 10 02:05:57 PM PDT 24 |
13760673550 ps |
| T754 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.3001687980 |
|
|
Mar 10 02:03:47 PM PDT 24 |
Mar 10 02:19:18 PM PDT 24 |
21349391960 ps |
| T755 |
/workspace/coverage/default/27.sram_ctrl_executable.1194580551 |
|
|
Mar 10 02:02:55 PM PDT 24 |
Mar 10 02:20:38 PM PDT 24 |
17152755706 ps |
| T756 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.1515641895 |
|
|
Mar 10 02:02:56 PM PDT 24 |
Mar 10 02:03:12 PM PDT 24 |
2913359224 ps |
| T757 |
/workspace/coverage/default/43.sram_ctrl_alert_test.1158559157 |
|
|
Mar 10 02:05:27 PM PDT 24 |
Mar 10 02:05:28 PM PDT 24 |
24623430 ps |
| T758 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.3210713726 |
|
|
Mar 10 02:05:05 PM PDT 24 |
Mar 10 02:07:49 PM PDT 24 |
2398625391 ps |
| T759 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1230346915 |
|
|
Mar 10 02:00:46 PM PDT 24 |
Mar 10 02:14:07 PM PDT 24 |
8234844732 ps |
| T760 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.699547746 |
|
|
Mar 10 02:00:47 PM PDT 24 |
Mar 10 02:05:52 PM PDT 24 |
13140503560 ps |
| T761 |
/workspace/coverage/default/31.sram_ctrl_smoke.939218217 |
|
|
Mar 10 02:03:22 PM PDT 24 |
Mar 10 02:03:31 PM PDT 24 |
518861102 ps |
| T762 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3860882454 |
|
|
Mar 10 02:06:05 PM PDT 24 |
Mar 10 02:09:29 PM PDT 24 |
9366362585 ps |
| T763 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.991911215 |
|
|
Mar 10 02:04:21 PM PDT 24 |
Mar 10 02:11:28 PM PDT 24 |
35356856603 ps |
| T764 |
/workspace/coverage/default/22.sram_ctrl_bijection.335176033 |
|
|
Mar 10 02:02:07 PM PDT 24 |
Mar 10 02:09:59 PM PDT 24 |
25524474072 ps |
| T765 |
/workspace/coverage/default/11.sram_ctrl_bijection.619462826 |
|
|
Mar 10 02:00:58 PM PDT 24 |
Mar 10 02:34:51 PM PDT 24 |
168209473560 ps |
| T766 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.2966309310 |
|
|
Mar 10 02:04:53 PM PDT 24 |
Mar 10 02:11:28 PM PDT 24 |
16418477262 ps |
| T767 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1001366592 |
|
|
Mar 10 02:05:46 PM PDT 24 |
Mar 10 02:14:43 PM PDT 24 |
49487336610 ps |
| T768 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.1184209837 |
|
|
Mar 10 02:01:33 PM PDT 24 |
Mar 10 02:11:11 PM PDT 24 |
53953143644 ps |
| T769 |
/workspace/coverage/default/19.sram_ctrl_bijection.3038086255 |
|
|
Mar 10 02:01:48 PM PDT 24 |
Mar 10 02:33:32 PM PDT 24 |
374112361981 ps |
| T770 |
/workspace/coverage/default/8.sram_ctrl_alert_test.3737626430 |
|
|
Mar 10 02:00:45 PM PDT 24 |
Mar 10 02:00:47 PM PDT 24 |
14182243 ps |
| T771 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.3631211348 |
|
|
Mar 10 02:00:44 PM PDT 24 |
Mar 10 02:03:59 PM PDT 24 |
7025022614 ps |
| T772 |
/workspace/coverage/default/32.sram_ctrl_alert_test.345116907 |
|
|
Mar 10 02:03:44 PM PDT 24 |
Mar 10 02:03:45 PM PDT 24 |
18818031 ps |
| T773 |
/workspace/coverage/default/3.sram_ctrl_smoke.3416361763 |
|
|
Mar 10 02:00:43 PM PDT 24 |
Mar 10 02:01:04 PM PDT 24 |
725240004 ps |
| T774 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1086025823 |
|
|
Mar 10 02:01:37 PM PDT 24 |
Mar 10 02:03:54 PM PDT 24 |
905991712 ps |
| T775 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.4066682790 |
|
|
Mar 10 02:00:50 PM PDT 24 |
Mar 10 02:00:55 PM PDT 24 |
1301922073 ps |
| T776 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.3641692805 |
|
|
Mar 10 02:04:06 PM PDT 24 |
Mar 10 02:04:16 PM PDT 24 |
510192451 ps |
| T777 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.582333489 |
|
|
Mar 10 02:02:11 PM PDT 24 |
Mar 10 02:03:01 PM PDT 24 |
759880756 ps |
| T778 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.4185316400 |
|
|
Mar 10 02:01:05 PM PDT 24 |
Mar 10 02:04:31 PM PDT 24 |
6616196082 ps |
| T779 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.2554664792 |
|
|
Mar 10 02:01:33 PM PDT 24 |
Mar 10 02:06:41 PM PDT 24 |
20891898075 ps |
| T780 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.1678100590 |
|
|
Mar 10 02:05:12 PM PDT 24 |
Mar 10 02:05:30 PM PDT 24 |
2012310942 ps |
| T781 |
/workspace/coverage/default/31.sram_ctrl_alert_test.3445649149 |
|
|
Mar 10 02:03:30 PM PDT 24 |
Mar 10 02:03:31 PM PDT 24 |
14752816 ps |
| T782 |
/workspace/coverage/default/47.sram_ctrl_regwen.1853386588 |
|
|
Mar 10 02:06:11 PM PDT 24 |
Mar 10 02:06:32 PM PDT 24 |
5768411759 ps |
| T783 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.4006049874 |
|
|
Mar 10 02:03:41 PM PDT 24 |
Mar 10 02:34:59 PM PDT 24 |
32897432702 ps |
| T784 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3458743672 |
|
|
Mar 10 02:00:48 PM PDT 24 |
Mar 10 02:16:20 PM PDT 24 |
55994564919 ps |
| T785 |
/workspace/coverage/default/32.sram_ctrl_smoke.597598868 |
|
|
Mar 10 02:03:27 PM PDT 24 |
Mar 10 02:03:43 PM PDT 24 |
6564221861 ps |
| T786 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3810524068 |
|
|
Mar 10 02:00:49 PM PDT 24 |
Mar 10 02:16:05 PM PDT 24 |
41660206159 ps |
| T787 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.3403266429 |
|
|
Mar 10 02:00:36 PM PDT 24 |
Mar 10 02:07:14 PM PDT 24 |
15641903990 ps |
| T788 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.3191283102 |
|
|
Mar 10 02:03:30 PM PDT 24 |
Mar 10 02:07:34 PM PDT 24 |
4107438959 ps |
| T789 |
/workspace/coverage/default/29.sram_ctrl_partial_access.1470270126 |
|
|
Mar 10 02:03:11 PM PDT 24 |
Mar 10 02:03:15 PM PDT 24 |
1507372944 ps |
| T790 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.1708965892 |
|
|
Mar 10 02:02:22 PM PDT 24 |
Mar 10 02:38:52 PM PDT 24 |
92560137144 ps |
| T791 |
/workspace/coverage/default/12.sram_ctrl_executable.1601778031 |
|
|
Mar 10 02:01:07 PM PDT 24 |
Mar 10 02:20:46 PM PDT 24 |
18152548597 ps |
| T792 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.1790427340 |
|
|
Mar 10 02:03:10 PM PDT 24 |
Mar 10 02:08:07 PM PDT 24 |
21724155243 ps |
| T793 |
/workspace/coverage/default/38.sram_ctrl_bijection.1407750345 |
|
|
Mar 10 02:04:29 PM PDT 24 |
Mar 10 02:37:12 PM PDT 24 |
120967733530 ps |
| T794 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2029989686 |
|
|
Mar 10 02:00:32 PM PDT 24 |
Mar 10 02:00:36 PM PDT 24 |
353028069 ps |