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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.41 100.00 97.91 100.00 100.00 99.72 99.70 98.52


Total test records in report: 1035
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

T303 /workspace/coverage/default/38.sram_ctrl_mem_walk.2742252924 Mar 17 03:10:10 PM PDT 24 Mar 17 03:15:38 PM PDT 24 85967168919 ps
T304 /workspace/coverage/default/8.sram_ctrl_executable.812734510 Mar 17 03:06:15 PM PDT 24 Mar 17 03:15:28 PM PDT 24 11849158437 ps
T305 /workspace/coverage/default/46.sram_ctrl_lc_escalation.3402336197 Mar 17 03:11:47 PM PDT 24 Mar 17 03:13:13 PM PDT 24 48999508079 ps
T306 /workspace/coverage/default/27.sram_ctrl_smoke.2692209280 Mar 17 03:07:55 PM PDT 24 Mar 17 03:09:21 PM PDT 24 1197471843 ps
T307 /workspace/coverage/default/2.sram_ctrl_max_throughput.641892285 Mar 17 03:05:59 PM PDT 24 Mar 17 03:06:29 PM PDT 24 1444111911 ps
T308 /workspace/coverage/default/30.sram_ctrl_mem_walk.879297075 Mar 17 03:08:34 PM PDT 24 Mar 17 03:12:58 PM PDT 24 28697625600 ps
T309 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.3682573403 Mar 17 03:10:31 PM PDT 24 Mar 17 03:15:51 PM PDT 24 5626964041 ps
T310 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2994441843 Mar 17 03:07:08 PM PDT 24 Mar 17 03:07:52 PM PDT 24 2910493865 ps
T311 /workspace/coverage/default/48.sram_ctrl_executable.1458726381 Mar 17 03:12:17 PM PDT 24 Mar 17 03:12:50 PM PDT 24 4334021270 ps
T312 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.2769299370 Mar 17 03:06:06 PM PDT 24 Mar 17 03:12:46 PM PDT 24 10646664918 ps
T313 /workspace/coverage/default/19.sram_ctrl_stress_pipeline.1177424165 Mar 17 03:06:54 PM PDT 24 Mar 17 03:10:38 PM PDT 24 7747455395 ps
T314 /workspace/coverage/default/31.sram_ctrl_multiple_keys.1148566448 Mar 17 03:08:41 PM PDT 24 Mar 17 03:24:56 PM PDT 24 61327043706 ps
T315 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3329011817 Mar 17 03:09:20 PM PDT 24 Mar 17 03:10:49 PM PDT 24 3481698810 ps
T316 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2850983553 Mar 17 03:06:22 PM PDT 24 Mar 17 03:12:13 PM PDT 24 234508293489 ps
T317 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.3306751800 Mar 17 03:09:18 PM PDT 24 Mar 17 03:33:13 PM PDT 24 67742996592 ps
T318 /workspace/coverage/default/28.sram_ctrl_mem_walk.484939485 Mar 17 03:08:13 PM PDT 24 Mar 17 03:13:44 PM PDT 24 76448284379 ps
T319 /workspace/coverage/default/25.sram_ctrl_max_throughput.303604986 Mar 17 03:07:43 PM PDT 24 Mar 17 03:09:39 PM PDT 24 771108053 ps
T320 /workspace/coverage/default/0.sram_ctrl_regwen.4003291729 Mar 17 03:05:52 PM PDT 24 Mar 17 03:19:47 PM PDT 24 57211806958 ps
T321 /workspace/coverage/default/1.sram_ctrl_mem_walk.2762665325 Mar 17 03:05:57 PM PDT 24 Mar 17 03:07:59 PM PDT 24 4033280583 ps
T322 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.2276909893 Mar 17 03:06:36 PM PDT 24 Mar 17 03:07:51 PM PDT 24 2914884039 ps
T323 /workspace/coverage/default/5.sram_ctrl_max_throughput.2463194129 Mar 17 03:06:10 PM PDT 24 Mar 17 03:07:18 PM PDT 24 744418596 ps
T324 /workspace/coverage/default/24.sram_ctrl_smoke.4032388510 Mar 17 03:07:27 PM PDT 24 Mar 17 03:07:45 PM PDT 24 866812914 ps
T325 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.867201389 Mar 17 03:06:21 PM PDT 24 Mar 17 03:08:48 PM PDT 24 14139877155 ps
T326 /workspace/coverage/default/4.sram_ctrl_smoke.3600705791 Mar 17 03:06:04 PM PDT 24 Mar 17 03:06:12 PM PDT 24 2831506286 ps
T327 /workspace/coverage/default/7.sram_ctrl_multiple_keys.2423755251 Mar 17 03:06:15 PM PDT 24 Mar 17 03:23:55 PM PDT 24 66493280794 ps
T328 /workspace/coverage/default/2.sram_ctrl_lc_escalation.1641010209 Mar 17 03:05:57 PM PDT 24 Mar 17 03:06:20 PM PDT 24 3500979608 ps
T329 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.1218392810 Mar 17 03:10:51 PM PDT 24 Mar 17 03:30:15 PM PDT 24 13927025076 ps
T330 /workspace/coverage/default/35.sram_ctrl_partial_access.388138037 Mar 17 03:09:51 PM PDT 24 Mar 17 03:10:06 PM PDT 24 1887876482 ps
T331 /workspace/coverage/default/41.sram_ctrl_stress_all.3810006535 Mar 17 03:10:43 PM PDT 24 Mar 17 04:13:00 PM PDT 24 91944524391 ps
T332 /workspace/coverage/default/16.sram_ctrl_partial_access.355097088 Mar 17 03:06:40 PM PDT 24 Mar 17 03:07:55 PM PDT 24 1914241648 ps
T333 /workspace/coverage/default/48.sram_ctrl_mem_walk.1566526379 Mar 17 03:12:14 PM PDT 24 Mar 17 03:17:42 PM PDT 24 43897791600 ps
T334 /workspace/coverage/default/34.sram_ctrl_executable.2136211621 Mar 17 03:09:18 PM PDT 24 Mar 17 03:12:30 PM PDT 24 24555999339 ps
T335 /workspace/coverage/default/20.sram_ctrl_mem_walk.4139477392 Mar 17 03:07:05 PM PDT 24 Mar 17 03:11:25 PM PDT 24 8041244881 ps
T336 /workspace/coverage/default/44.sram_ctrl_partial_access.2788856076 Mar 17 03:11:17 PM PDT 24 Mar 17 03:13:11 PM PDT 24 6045428065 ps
T337 /workspace/coverage/default/37.sram_ctrl_partial_access.2485443240 Mar 17 03:09:56 PM PDT 24 Mar 17 03:12:32 PM PDT 24 1004491409 ps
T338 /workspace/coverage/default/15.sram_ctrl_multiple_keys.1612787412 Mar 17 03:06:41 PM PDT 24 Mar 17 03:21:45 PM PDT 24 47705706948 ps
T339 /workspace/coverage/default/31.sram_ctrl_partial_access.3471154174 Mar 17 03:08:43 PM PDT 24 Mar 17 03:10:04 PM PDT 24 1207851068 ps
T340 /workspace/coverage/default/31.sram_ctrl_mem_walk.2565960487 Mar 17 03:08:46 PM PDT 24 Mar 17 03:11:39 PM PDT 24 86141704930 ps
T341 /workspace/coverage/default/30.sram_ctrl_smoke.4185388697 Mar 17 03:08:26 PM PDT 24 Mar 17 03:08:47 PM PDT 24 599254956 ps
T342 /workspace/coverage/default/29.sram_ctrl_regwen.1203419312 Mar 17 03:08:22 PM PDT 24 Mar 17 03:15:23 PM PDT 24 26892649354 ps
T343 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.2284116576 Mar 17 03:08:49 PM PDT 24 Mar 17 03:15:05 PM PDT 24 6115928546 ps
T344 /workspace/coverage/default/42.sram_ctrl_smoke.309540500 Mar 17 03:10:48 PM PDT 24 Mar 17 03:10:52 PM PDT 24 404111589 ps
T345 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.1120744247 Mar 17 03:06:21 PM PDT 24 Mar 17 03:18:32 PM PDT 24 31907594620 ps
T97 /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.2741884038 Mar 17 03:07:41 PM PDT 24 Mar 17 03:08:14 PM PDT 24 2223500366 ps
T346 /workspace/coverage/default/28.sram_ctrl_multiple_keys.1472315611 Mar 17 03:08:09 PM PDT 24 Mar 17 03:29:48 PM PDT 24 35986824545 ps
T347 /workspace/coverage/default/13.sram_ctrl_executable.3492513196 Mar 17 03:06:26 PM PDT 24 Mar 17 03:15:04 PM PDT 24 7645442440 ps
T348 /workspace/coverage/default/11.sram_ctrl_partial_access.2081247421 Mar 17 03:06:21 PM PDT 24 Mar 17 03:06:29 PM PDT 24 740736407 ps
T349 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.3341106220 Mar 17 03:06:35 PM PDT 24 Mar 17 03:07:47 PM PDT 24 5690490177 ps
T350 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.4102834654 Mar 17 03:08:30 PM PDT 24 Mar 17 03:10:28 PM PDT 24 3052419092 ps
T351 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.1851543295 Mar 17 03:08:25 PM PDT 24 Mar 17 03:15:34 PM PDT 24 6102082188 ps
T352 /workspace/coverage/default/9.sram_ctrl_max_throughput.3584167563 Mar 17 03:06:21 PM PDT 24 Mar 17 03:07:30 PM PDT 24 2971288956 ps
T353 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.2125357544 Mar 17 03:08:27 PM PDT 24 Mar 17 03:09:46 PM PDT 24 9773728088 ps
T354 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.2056847943 Mar 17 03:11:22 PM PDT 24 Mar 17 03:14:07 PM PDT 24 62121694842 ps
T355 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3417402028 Mar 17 03:06:08 PM PDT 24 Mar 17 03:12:23 PM PDT 24 20823332842 ps
T356 /workspace/coverage/default/11.sram_ctrl_lc_escalation.4020214996 Mar 17 03:06:21 PM PDT 24 Mar 17 03:06:31 PM PDT 24 2854690675 ps
T357 /workspace/coverage/default/4.sram_ctrl_multiple_keys.1237004680 Mar 17 03:06:04 PM PDT 24 Mar 17 03:08:11 PM PDT 24 1503590262 ps
T358 /workspace/coverage/default/4.sram_ctrl_lc_escalation.3205809944 Mar 17 03:06:04 PM PDT 24 Mar 17 03:06:31 PM PDT 24 5632624429 ps
T359 /workspace/coverage/default/27.sram_ctrl_regwen.932937179 Mar 17 03:08:05 PM PDT 24 Mar 17 03:22:41 PM PDT 24 36199642082 ps
T360 /workspace/coverage/default/11.sram_ctrl_mem_walk.3075047571 Mar 17 03:06:23 PM PDT 24 Mar 17 03:08:57 PM PDT 24 21520551249 ps
T361 /workspace/coverage/default/31.sram_ctrl_max_throughput.2519999028 Mar 17 03:08:45 PM PDT 24 Mar 17 03:10:44 PM PDT 24 761654861 ps
T362 /workspace/coverage/default/25.sram_ctrl_regwen.2002712330 Mar 17 03:07:45 PM PDT 24 Mar 17 03:29:36 PM PDT 24 13713198164 ps
T363 /workspace/coverage/default/45.sram_ctrl_access_during_key_req.3285058481 Mar 17 03:11:30 PM PDT 24 Mar 17 03:37:47 PM PDT 24 100148368320 ps
T364 /workspace/coverage/default/31.sram_ctrl_executable.3112654432 Mar 17 03:08:44 PM PDT 24 Mar 17 03:08:56 PM PDT 24 887360616 ps
T365 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.2457269328 Mar 17 03:07:18 PM PDT 24 Mar 17 03:09:48 PM PDT 24 11210531116 ps
T366 /workspace/coverage/default/31.sram_ctrl_bijection.4146453179 Mar 17 03:08:45 PM PDT 24 Mar 17 03:51:18 PM PDT 24 375803107761 ps
T367 /workspace/coverage/default/34.sram_ctrl_regwen.1152762748 Mar 17 03:09:48 PM PDT 24 Mar 17 03:23:11 PM PDT 24 53147902236 ps
T368 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.134938073 Mar 17 03:05:53 PM PDT 24 Mar 17 03:06:02 PM PDT 24 1399615409 ps
T369 /workspace/coverage/default/22.sram_ctrl_max_throughput.2897876062 Mar 17 03:07:20 PM PDT 24 Mar 17 03:09:52 PM PDT 24 4012247430 ps
T370 /workspace/coverage/default/39.sram_ctrl_smoke.3772413502 Mar 17 03:10:11 PM PDT 24 Mar 17 03:10:26 PM PDT 24 1501918488 ps
T371 /workspace/coverage/default/27.sram_ctrl_alert_test.1674331948 Mar 17 03:08:08 PM PDT 24 Mar 17 03:08:09 PM PDT 24 29174076 ps
T372 /workspace/coverage/default/28.sram_ctrl_executable.907786551 Mar 17 03:08:13 PM PDT 24 Mar 17 03:18:21 PM PDT 24 21543472362 ps
T373 /workspace/coverage/default/34.sram_ctrl_bijection.3496762969 Mar 17 03:09:13 PM PDT 24 Mar 17 03:54:17 PM PDT 24 188610313063 ps
T374 /workspace/coverage/default/48.sram_ctrl_bijection.2352114741 Mar 17 03:12:14 PM PDT 24 Mar 17 03:20:02 PM PDT 24 27566420782 ps
T375 /workspace/coverage/default/39.sram_ctrl_ram_cfg.1189084111 Mar 17 03:10:25 PM PDT 24 Mar 17 03:10:28 PM PDT 24 361472312 ps
T376 /workspace/coverage/default/26.sram_ctrl_smoke.1913843108 Mar 17 03:07:52 PM PDT 24 Mar 17 03:08:46 PM PDT 24 4874079740 ps
T377 /workspace/coverage/default/15.sram_ctrl_alert_test.2740033202 Mar 17 03:06:43 PM PDT 24 Mar 17 03:06:44 PM PDT 24 122672796 ps
T378 /workspace/coverage/default/31.sram_ctrl_lc_escalation.2997088780 Mar 17 03:08:44 PM PDT 24 Mar 17 03:09:39 PM PDT 24 11237090054 ps
T379 /workspace/coverage/default/22.sram_ctrl_lc_escalation.1060696693 Mar 17 03:07:16 PM PDT 24 Mar 17 03:07:27 PM PDT 24 5039378367 ps
T380 /workspace/coverage/default/30.sram_ctrl_partial_access.3747112228 Mar 17 03:08:30 PM PDT 24 Mar 17 03:08:47 PM PDT 24 582138542 ps
T381 /workspace/coverage/default/43.sram_ctrl_multiple_keys.376433794 Mar 17 03:11:04 PM PDT 24 Mar 17 03:29:01 PM PDT 24 37365177227 ps
T382 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.746201918 Mar 17 03:10:43 PM PDT 24 Mar 17 03:13:06 PM PDT 24 4890053606 ps
T383 /workspace/coverage/default/20.sram_ctrl_alert_test.2539294488 Mar 17 03:07:07 PM PDT 24 Mar 17 03:07:07 PM PDT 24 25084723 ps
T384 /workspace/coverage/default/45.sram_ctrl_mem_walk.1566100234 Mar 17 03:11:46 PM PDT 24 Mar 17 03:13:48 PM PDT 24 7313828969 ps
T385 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3109446581 Mar 17 03:08:13 PM PDT 24 Mar 17 03:08:32 PM PDT 24 570880381 ps
T386 /workspace/coverage/default/40.sram_ctrl_bijection.3901473151 Mar 17 03:10:28 PM PDT 24 Mar 17 03:23:36 PM PDT 24 129771594429 ps
T387 /workspace/coverage/default/15.sram_ctrl_lc_escalation.2334188859 Mar 17 03:06:43 PM PDT 24 Mar 17 03:07:09 PM PDT 24 21402695848 ps
T388 /workspace/coverage/default/16.sram_ctrl_mem_walk.1961942504 Mar 17 03:06:41 PM PDT 24 Mar 17 03:12:50 PM PDT 24 198688773796 ps
T389 /workspace/coverage/default/16.sram_ctrl_executable.663921421 Mar 17 03:06:39 PM PDT 24 Mar 17 03:16:40 PM PDT 24 9925567694 ps
T390 /workspace/coverage/default/12.sram_ctrl_alert_test.3222337504 Mar 17 03:06:27 PM PDT 24 Mar 17 03:06:28 PM PDT 24 12743958 ps
T391 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.375271665 Mar 17 03:06:03 PM PDT 24 Mar 17 03:06:18 PM PDT 24 1442670934 ps
T392 /workspace/coverage/default/39.sram_ctrl_bijection.3000466240 Mar 17 03:10:14 PM PDT 24 Mar 17 03:34:03 PM PDT 24 91630830507 ps
T393 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.413055856 Mar 17 03:06:25 PM PDT 24 Mar 17 03:11:22 PM PDT 24 20093133011 ps
T394 /workspace/coverage/default/8.sram_ctrl_alert_test.860156656 Mar 17 03:06:16 PM PDT 24 Mar 17 03:06:17 PM PDT 24 15772503 ps
T395 /workspace/coverage/default/28.sram_ctrl_ram_cfg.1899764910 Mar 17 03:08:12 PM PDT 24 Mar 17 03:08:16 PM PDT 24 1473119587 ps
T396 /workspace/coverage/default/5.sram_ctrl_partial_access.1686625759 Mar 17 03:06:07 PM PDT 24 Mar 17 03:08:47 PM PDT 24 883671278 ps
T397 /workspace/coverage/default/4.sram_ctrl_regwen.1185017526 Mar 17 03:06:04 PM PDT 24 Mar 17 03:17:36 PM PDT 24 2234189524 ps
T398 /workspace/coverage/default/44.sram_ctrl_smoke.3719776179 Mar 17 03:11:13 PM PDT 24 Mar 17 03:11:40 PM PDT 24 652636766 ps
T399 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.2144319184 Mar 17 03:06:46 PM PDT 24 Mar 17 03:12:35 PM PDT 24 14940619642 ps
T400 /workspace/coverage/default/0.sram_ctrl_access_during_key_req.680664237 Mar 17 03:05:55 PM PDT 24 Mar 17 03:25:58 PM PDT 24 169389615456 ps
T401 /workspace/coverage/default/18.sram_ctrl_smoke.4101216157 Mar 17 03:06:45 PM PDT 24 Mar 17 03:06:59 PM PDT 24 2956834616 ps
T402 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.697414482 Mar 17 03:10:37 PM PDT 24 Mar 17 03:11:19 PM PDT 24 1467153461 ps
T403 /workspace/coverage/default/47.sram_ctrl_alert_test.2150526615 Mar 17 03:12:14 PM PDT 24 Mar 17 03:12:15 PM PDT 24 24300544 ps
T404 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2563625953 Mar 17 03:11:21 PM PDT 24 Mar 17 03:11:55 PM PDT 24 1139673802 ps
T405 /workspace/coverage/default/17.sram_ctrl_ram_cfg.2795574910 Mar 17 03:06:47 PM PDT 24 Mar 17 03:06:52 PM PDT 24 1408800636 ps
T406 /workspace/coverage/default/43.sram_ctrl_smoke.3555611197 Mar 17 03:11:03 PM PDT 24 Mar 17 03:12:10 PM PDT 24 4175415903 ps
T407 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.2178437381 Mar 17 03:06:29 PM PDT 24 Mar 17 03:08:57 PM PDT 24 9958892878 ps
T408 /workspace/coverage/default/48.sram_ctrl_smoke.3644313871 Mar 17 03:12:06 PM PDT 24 Mar 17 03:12:22 PM PDT 24 1429061096 ps
T409 /workspace/coverage/default/39.sram_ctrl_alert_test.714519750 Mar 17 03:10:23 PM PDT 24 Mar 17 03:10:24 PM PDT 24 155382287 ps
T410 /workspace/coverage/default/44.sram_ctrl_max_throughput.3337140016 Mar 17 03:11:16 PM PDT 24 Mar 17 03:12:53 PM PDT 24 1495617298 ps
T411 /workspace/coverage/default/43.sram_ctrl_mem_walk.3945540172 Mar 17 03:11:11 PM PDT 24 Mar 17 03:16:24 PM PDT 24 31419586831 ps
T412 /workspace/coverage/default/36.sram_ctrl_mem_walk.1815394501 Mar 17 03:09:52 PM PDT 24 Mar 17 03:12:06 PM PDT 24 28703916695 ps
T413 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.1380236896 Mar 17 03:06:55 PM PDT 24 Mar 17 03:08:10 PM PDT 24 1518522426 ps
T414 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.187358126 Mar 17 03:12:16 PM PDT 24 Mar 17 03:14:35 PM PDT 24 821791835 ps
T415 /workspace/coverage/default/1.sram_ctrl_smoke.3064908430 Mar 17 03:05:58 PM PDT 24 Mar 17 03:06:03 PM PDT 24 387252256 ps
T416 /workspace/coverage/default/5.sram_ctrl_ram_cfg.1885860112 Mar 17 03:06:08 PM PDT 24 Mar 17 03:06:11 PM PDT 24 677727130 ps
T417 /workspace/coverage/default/36.sram_ctrl_stress_all.1668133836 Mar 17 03:09:54 PM PDT 24 Mar 17 04:27:29 PM PDT 24 41203920331 ps
T418 /workspace/coverage/default/28.sram_ctrl_alert_test.889884239 Mar 17 03:08:17 PM PDT 24 Mar 17 03:08:18 PM PDT 24 36416295 ps
T419 /workspace/coverage/default/46.sram_ctrl_max_throughput.2352368612 Mar 17 03:12:07 PM PDT 24 Mar 17 03:14:07 PM PDT 24 792772698 ps
T420 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.4145182931 Mar 17 03:07:58 PM PDT 24 Mar 17 03:16:48 PM PDT 24 76835159374 ps
T421 /workspace/coverage/default/22.sram_ctrl_multiple_keys.1037056021 Mar 17 03:07:18 PM PDT 24 Mar 17 03:22:54 PM PDT 24 5131255164 ps
T422 /workspace/coverage/default/42.sram_ctrl_ram_cfg.1750292694 Mar 17 03:10:57 PM PDT 24 Mar 17 03:11:00 PM PDT 24 352655205 ps
T423 /workspace/coverage/default/45.sram_ctrl_alert_test.1720636860 Mar 17 03:11:46 PM PDT 24 Mar 17 03:11:47 PM PDT 24 37077719 ps
T424 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.887324382 Mar 17 03:06:01 PM PDT 24 Mar 17 03:09:27 PM PDT 24 4020362107 ps
T425 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.2077120475 Mar 17 03:07:58 PM PDT 24 Mar 17 03:36:33 PM PDT 24 19599073429 ps
T98 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.4184353204 Mar 17 03:06:24 PM PDT 24 Mar 17 03:06:46 PM PDT 24 904790652 ps
T426 /workspace/coverage/default/14.sram_ctrl_mem_walk.3268429520 Mar 17 03:06:36 PM PDT 24 Mar 17 03:09:08 PM PDT 24 16424160802 ps
T427 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.928016074 Mar 17 03:08:14 PM PDT 24 Mar 17 03:31:16 PM PDT 24 77642926997 ps
T428 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.2960893886 Mar 17 03:06:22 PM PDT 24 Mar 17 03:09:58 PM PDT 24 3437750154 ps
T429 /workspace/coverage/default/35.sram_ctrl_max_throughput.1877327395 Mar 17 03:09:50 PM PDT 24 Mar 17 03:12:24 PM PDT 24 768137845 ps
T430 /workspace/coverage/default/24.sram_ctrl_lc_escalation.2129473074 Mar 17 03:07:38 PM PDT 24 Mar 17 03:08:40 PM PDT 24 11152683871 ps
T431 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.3564483961 Mar 17 03:07:45 PM PDT 24 Mar 17 03:11:47 PM PDT 24 15780745626 ps
T432 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.3588102932 Mar 17 03:10:36 PM PDT 24 Mar 17 03:16:15 PM PDT 24 77159646124 ps
T433 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.3369870235 Mar 17 03:08:42 PM PDT 24 Mar 17 03:11:37 PM PDT 24 5194260795 ps
T434 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2364224485 Mar 17 03:09:55 PM PDT 24 Mar 17 03:10:02 PM PDT 24 2689387776 ps
T435 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.1094655205 Mar 17 03:06:39 PM PDT 24 Mar 17 03:06:57 PM PDT 24 1864569197 ps
T436 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3547422576 Mar 17 03:06:16 PM PDT 24 Mar 17 03:06:23 PM PDT 24 1375718433 ps
T437 /workspace/coverage/default/10.sram_ctrl_ram_cfg.4110548932 Mar 17 03:06:19 PM PDT 24 Mar 17 03:06:22 PM PDT 24 358860197 ps
T438 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.320463719 Mar 17 03:10:05 PM PDT 24 Mar 17 03:15:48 PM PDT 24 6658162778 ps
T439 /workspace/coverage/default/49.sram_ctrl_stress_all.1162506239 Mar 17 03:12:24 PM PDT 24 Mar 17 03:31:05 PM PDT 24 139144204215 ps
T440 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3541109402 Mar 17 03:08:55 PM PDT 24 Mar 17 03:09:57 PM PDT 24 786558101 ps
T441 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.2300119995 Mar 17 03:09:02 PM PDT 24 Mar 17 03:22:32 PM PDT 24 101944909165 ps
T442 /workspace/coverage/default/49.sram_ctrl_lc_escalation.24077296 Mar 17 03:12:23 PM PDT 24 Mar 17 03:14:00 PM PDT 24 112306479415 ps
T443 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.2407750269 Mar 17 03:11:08 PM PDT 24 Mar 17 03:34:46 PM PDT 24 20801238177 ps
T444 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.565695505 Mar 17 03:11:26 PM PDT 24 Mar 17 03:14:48 PM PDT 24 35061334569 ps
T445 /workspace/coverage/default/15.sram_ctrl_bijection.1557382863 Mar 17 03:06:37 PM PDT 24 Mar 17 03:37:13 PM PDT 24 313374577750 ps
T446 /workspace/coverage/default/40.sram_ctrl_executable.3466487557 Mar 17 03:10:35 PM PDT 24 Mar 17 03:21:49 PM PDT 24 5277195278 ps
T447 /workspace/coverage/default/38.sram_ctrl_ram_cfg.3968143231 Mar 17 03:10:06 PM PDT 24 Mar 17 03:10:10 PM PDT 24 1352720059 ps
T448 /workspace/coverage/default/22.sram_ctrl_mem_walk.2688980464 Mar 17 03:07:19 PM PDT 24 Mar 17 03:09:23 PM PDT 24 4029001429 ps
T449 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.3768059540 Mar 17 03:09:52 PM PDT 24 Mar 17 03:10:21 PM PDT 24 1479646508 ps
T450 /workspace/coverage/default/2.sram_ctrl_mem_walk.1954524282 Mar 17 03:05:57 PM PDT 24 Mar 17 03:08:36 PM PDT 24 9365765309 ps
T451 /workspace/coverage/default/32.sram_ctrl_multiple_keys.1597438456 Mar 17 03:08:51 PM PDT 24 Mar 17 03:21:01 PM PDT 24 7669131344 ps
T452 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.90308760 Mar 17 03:10:20 PM PDT 24 Mar 17 03:32:13 PM PDT 24 13898746811 ps
T453 /workspace/coverage/default/5.sram_ctrl_multiple_keys.2493949247 Mar 17 03:06:08 PM PDT 24 Mar 17 03:28:44 PM PDT 24 35791031777 ps
T454 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1039513015 Mar 17 03:12:11 PM PDT 24 Mar 17 03:16:09 PM PDT 24 82991138826 ps
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T457 /workspace/coverage/default/9.sram_ctrl_partial_access.4085206603 Mar 17 03:06:18 PM PDT 24 Mar 17 03:06:22 PM PDT 24 370195051 ps
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T459 /workspace/coverage/default/21.sram_ctrl_executable.3695678466 Mar 17 03:07:13 PM PDT 24 Mar 17 03:18:17 PM PDT 24 17802202866 ps
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T462 /workspace/coverage/default/30.sram_ctrl_multiple_keys.364865394 Mar 17 03:08:26 PM PDT 24 Mar 17 03:10:16 PM PDT 24 8167929690 ps
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T464 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.1901697047 Mar 17 03:05:57 PM PDT 24 Mar 17 03:23:51 PM PDT 24 16802863305 ps
T465 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.722528583 Mar 17 03:07:30 PM PDT 24 Mar 17 03:09:35 PM PDT 24 3203760753 ps
T466 /workspace/coverage/default/44.sram_ctrl_ram_cfg.1724223813 Mar 17 03:11:22 PM PDT 24 Mar 17 03:11:26 PM PDT 24 1359511810 ps
T467 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1450356193 Mar 17 03:11:08 PM PDT 24 Mar 17 03:12:10 PM PDT 24 4587499053 ps
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T471 /workspace/coverage/default/15.sram_ctrl_partial_access.4098788006 Mar 17 03:06:42 PM PDT 24 Mar 17 03:07:32 PM PDT 24 778788755 ps
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T477 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.2793091638 Mar 17 03:07:57 PM PDT 24 Mar 17 03:08:13 PM PDT 24 1949755116 ps
T478 /workspace/coverage/default/34.sram_ctrl_max_throughput.3309454442 Mar 17 03:09:18 PM PDT 24 Mar 17 03:11:00 PM PDT 24 768965078 ps
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T481 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.2839608614 Mar 17 03:05:56 PM PDT 24 Mar 17 03:21:55 PM PDT 24 13183925201 ps
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T483 /workspace/coverage/default/44.sram_ctrl_bijection.1037888177 Mar 17 03:11:17 PM PDT 24 Mar 17 03:24:54 PM PDT 24 186576277709 ps
T484 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.731791315 Mar 17 03:06:23 PM PDT 24 Mar 17 03:06:55 PM PDT 24 14404449725 ps
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T486 /workspace/coverage/default/18.sram_ctrl_mem_walk.3832093747 Mar 17 03:06:50 PM PDT 24 Mar 17 03:08:54 PM PDT 24 9409303073 ps
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T488 /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.3772693465 Mar 17 03:05:56 PM PDT 24 Mar 17 03:07:53 PM PDT 24 9481990120 ps
T489 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.1554364798 Mar 17 03:10:58 PM PDT 24 Mar 17 03:12:22 PM PDT 24 29023195554 ps
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T491 /workspace/coverage/default/7.sram_ctrl_lc_escalation.4126109667 Mar 17 03:06:16 PM PDT 24 Mar 17 03:07:21 PM PDT 24 82172148594 ps
T492 /workspace/coverage/default/5.sram_ctrl_mem_walk.1602299910 Mar 17 03:06:09 PM PDT 24 Mar 17 03:11:47 PM PDT 24 89636792391 ps
T493 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.542646826 Mar 17 03:09:50 PM PDT 24 Mar 17 03:14:39 PM PDT 24 8573589366 ps
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T495 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1357102042 Mar 17 03:05:53 PM PDT 24 Mar 17 03:12:55 PM PDT 24 77895795575 ps
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T497 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.3382341223 Mar 17 03:08:54 PM PDT 24 Mar 17 03:25:11 PM PDT 24 51356837307 ps
T498 /workspace/coverage/default/47.sram_ctrl_bijection.2427471349 Mar 17 03:11:59 PM PDT 24 Mar 17 03:35:33 PM PDT 24 79999003494 ps
T499 /workspace/coverage/default/6.sram_ctrl_max_throughput.1336299604 Mar 17 03:06:12 PM PDT 24 Mar 17 03:07:11 PM PDT 24 770293669 ps
T500 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.287399135 Mar 17 03:06:16 PM PDT 24 Mar 17 03:13:48 PM PDT 24 74408753344 ps
T501 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.2171594704 Mar 17 03:08:05 PM PDT 24 Mar 17 03:08:19 PM PDT 24 2759714461 ps
T502 /workspace/coverage/default/6.sram_ctrl_executable.119635930 Mar 17 03:06:07 PM PDT 24 Mar 17 03:15:00 PM PDT 24 10595032140 ps
T503 /workspace/coverage/default/14.sram_ctrl_multiple_keys.1915847734 Mar 17 03:06:32 PM PDT 24 Mar 17 03:25:06 PM PDT 24 21483359046 ps
T504 /workspace/coverage/default/6.sram_ctrl_bijection.3865107072 Mar 17 03:06:09 PM PDT 24 Mar 17 03:39:55 PM PDT 24 121572018582 ps
T505 /workspace/coverage/default/22.sram_ctrl_regwen.481484767 Mar 17 03:07:17 PM PDT 24 Mar 17 03:23:31 PM PDT 24 59153265658 ps
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T508 /workspace/coverage/default/48.sram_ctrl_alert_test.1160673522 Mar 17 03:12:18 PM PDT 24 Mar 17 03:12:19 PM PDT 24 26301828 ps
T509 /workspace/coverage/default/44.sram_ctrl_mem_walk.498135719 Mar 17 03:11:25 PM PDT 24 Mar 17 03:15:56 PM PDT 24 13905971746 ps
T510 /workspace/coverage/default/18.sram_ctrl_lc_escalation.77634414 Mar 17 03:06:49 PM PDT 24 Mar 17 03:07:24 PM PDT 24 6175956298 ps
T511 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.3799153665 Mar 17 03:05:58 PM PDT 24 Mar 17 03:08:08 PM PDT 24 1585051442 ps
T512 /workspace/coverage/default/37.sram_ctrl_mem_walk.1936815817 Mar 17 03:09:57 PM PDT 24 Mar 17 03:14:09 PM PDT 24 3945682707 ps
T513 /workspace/coverage/default/14.sram_ctrl_alert_test.2698369800 Mar 17 03:06:39 PM PDT 24 Mar 17 03:06:40 PM PDT 24 26593855 ps
T514 /workspace/coverage/default/26.sram_ctrl_partial_access.4102523153 Mar 17 03:07:56 PM PDT 24 Mar 17 03:08:09 PM PDT 24 836558567 ps
T515 /workspace/coverage/default/36.sram_ctrl_regwen.3370665824 Mar 17 03:09:55 PM PDT 24 Mar 17 03:40:06 PM PDT 24 108727077621 ps
T516 /workspace/coverage/default/33.sram_ctrl_max_throughput.142399260 Mar 17 03:09:03 PM PDT 24 Mar 17 03:09:29 PM PDT 24 722489243 ps
T517 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.683091360 Mar 17 03:11:43 PM PDT 24 Mar 17 03:14:17 PM PDT 24 2853951036 ps
T518 /workspace/coverage/default/9.sram_ctrl_lc_escalation.2567942877 Mar 17 03:06:21 PM PDT 24 Mar 17 03:06:48 PM PDT 24 15768113934 ps
T37 /workspace/coverage/default/4.sram_ctrl_sec_cm.623196515 Mar 17 03:06:04 PM PDT 24 Mar 17 03:06:08 PM PDT 24 253282215 ps
T519 /workspace/coverage/default/8.sram_ctrl_bijection.1170241803 Mar 17 03:06:22 PM PDT 24 Mar 17 03:30:38 PM PDT 24 322699971705 ps
T520 /workspace/coverage/default/19.sram_ctrl_regwen.1968215353 Mar 17 03:07:01 PM PDT 24 Mar 17 03:25:36 PM PDT 24 10345121552 ps
T521 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.715976788 Mar 17 03:06:09 PM PDT 24 Mar 17 03:07:13 PM PDT 24 1965537265 ps
T522 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.58273971 Mar 17 03:06:04 PM PDT 24 Mar 17 03:36:21 PM PDT 24 21521964100 ps
T523 /workspace/coverage/default/20.sram_ctrl_smoke.2009111616 Mar 17 03:07:03 PM PDT 24 Mar 17 03:08:08 PM PDT 24 1671329070 ps
T524 /workspace/coverage/default/6.sram_ctrl_stress_all.3985221439 Mar 17 03:06:16 PM PDT 24 Mar 17 04:50:33 PM PDT 24 51852380594 ps
T525 /workspace/coverage/default/7.sram_ctrl_stress_all.2528921977 Mar 17 03:06:15 PM PDT 24 Mar 17 03:38:40 PM PDT 24 422165796395 ps
T526 /workspace/coverage/default/27.sram_ctrl_bijection.2880623987 Mar 17 03:07:58 PM PDT 24 Mar 17 03:18:56 PM PDT 24 19859314634 ps
T527 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.3791288887 Mar 17 03:08:22 PM PDT 24 Mar 17 03:21:31 PM PDT 24 47090199696 ps
T528 /workspace/coverage/default/30.sram_ctrl_max_throughput.4027578100 Mar 17 03:08:31 PM PDT 24 Mar 17 03:08:54 PM PDT 24 2795178984 ps
T529 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.3971048734 Mar 17 03:07:31 PM PDT 24 Mar 17 03:09:04 PM PDT 24 776089505 ps
T530 /workspace/coverage/default/38.sram_ctrl_executable.2335458651 Mar 17 03:10:07 PM PDT 24 Mar 17 03:39:30 PM PDT 24 223461883488 ps
T531 /workspace/coverage/default/23.sram_ctrl_regwen.1706193768 Mar 17 03:07:29 PM PDT 24 Mar 17 03:19:26 PM PDT 24 19969548998 ps
T532 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.3628413806 Mar 17 03:06:11 PM PDT 24 Mar 17 03:09:40 PM PDT 24 2700593470 ps
T533 /workspace/coverage/default/19.sram_ctrl_access_during_key_req.4220420567 Mar 17 03:06:55 PM PDT 24 Mar 17 03:26:30 PM PDT 24 10542110856 ps
T534 /workspace/coverage/default/3.sram_ctrl_smoke.975350519 Mar 17 03:06:02 PM PDT 24 Mar 17 03:07:05 PM PDT 24 3442886209 ps
T535 /workspace/coverage/default/13.sram_ctrl_bijection.14027163 Mar 17 03:06:25 PM PDT 24 Mar 17 03:21:35 PM PDT 24 27450841147 ps
T536 /workspace/coverage/default/39.sram_ctrl_regwen.1433648629 Mar 17 03:10:24 PM PDT 24 Mar 17 03:22:37 PM PDT 24 11766657394 ps
T537 /workspace/coverage/default/19.sram_ctrl_max_throughput.3916366186 Mar 17 03:06:55 PM PDT 24 Mar 17 03:09:20 PM PDT 24 2730569655 ps
T538 /workspace/coverage/default/26.sram_ctrl_stress_all.424930280 Mar 17 03:07:55 PM PDT 24 Mar 17 05:06:28 PM PDT 24 649835581184 ps
T539 /workspace/coverage/default/18.sram_ctrl_executable.2180923344 Mar 17 03:06:52 PM PDT 24 Mar 17 03:30:37 PM PDT 24 27443094746 ps
T540 /workspace/coverage/default/6.sram_ctrl_smoke.416042545 Mar 17 03:06:09 PM PDT 24 Mar 17 03:06:24 PM PDT 24 2656284124 ps
T541 /workspace/coverage/default/16.sram_ctrl_access_during_key_req.2221251436 Mar 17 03:06:38 PM PDT 24 Mar 17 03:23:19 PM PDT 24 64322894024 ps
T542 /workspace/coverage/default/4.sram_ctrl_bijection.2637354348 Mar 17 03:06:05 PM PDT 24 Mar 17 03:26:51 PM PDT 24 288160304516 ps
T543 /workspace/coverage/default/13.sram_ctrl_smoke.2401084924 Mar 17 03:06:25 PM PDT 24 Mar 17 03:06:35 PM PDT 24 2734520054 ps
T544 /workspace/coverage/default/42.sram_ctrl_mem_walk.1276839756 Mar 17 03:10:57 PM PDT 24 Mar 17 03:13:04 PM PDT 24 2063526741 ps
T545 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.266609756 Mar 17 03:06:08 PM PDT 24 Mar 17 03:11:42 PM PDT 24 22146785616 ps
T546 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.2004954003 Mar 17 03:07:55 PM PDT 24 Mar 17 03:10:56 PM PDT 24 985139551 ps
T547 /workspace/coverage/default/29.sram_ctrl_bijection.3908817821 Mar 17 03:08:15 PM PDT 24 Mar 17 03:30:43 PM PDT 24 40987220825 ps
T548 /workspace/coverage/default/0.sram_ctrl_multiple_keys.2014484180 Mar 17 03:05:52 PM PDT 24 Mar 17 03:13:27 PM PDT 24 7576428181 ps
T549 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3902069048 Mar 17 03:06:21 PM PDT 24 Mar 17 03:11:18 PM PDT 24 21283342022 ps
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