Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	16000725	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

164728503

1

T1

3193

T3

245532

T4

143031

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	89011239	1			T1	31088		T3	135466		T4	78920
values[0x0]	44270186	1			T1	9935		T3	65013		T4	37565
values[0x1]	47447803	1			T1	21622		T3	69708		T4	40757

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	8148397	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

172580831

1

T1

28553

T3

257982

T4

150099

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	571199	1			T1	238		T3	1075		T4	422
valid_sources[0x01]	564311	1			T1	235		T3	1073		T11	18
valid_sources[0x02]	796361	1			T1	249		T3	1065		T11	15
valid_sources[0x03]	1326566	1			T1	262		T3	965		T11	10
valid_sources[0x04]	610710	1			T1	250		T3	1032		T11	12
valid_sources[0x05]	596182	1			T1	243		T3	1042		T11	15
valid_sources[0x06]	647212	1			T1	263		T3	1076		T11	10
valid_sources[0x07]	586502	1			T1	237		T3	1063		T11	17
valid_sources[0x08]	583442	1			T1	267		T3	1064		T11	14
valid_sources[0x09]	566494	1			T1	250		T3	1024		T11	7
valid_sources[0x0a]	1870237	1			T1	219		T3	1025		T11	6
valid_sources[0x0b]	578341	1			T1	254		T3	1025		T11	12
valid_sources[0x0c]	555039	1			T1	245		T3	1106		T11	9
valid_sources[0x0d]	562779	1			T1	253		T3	1151		T11	4
valid_sources[0x0e]	2164714	1			T1	227		T3	978		T11	14
valid_sources[0x0f]	601839	1			T1	253		T3	1040		T11	9
valid_sources[0x10]	672840	1			T1	243		T3	924		T11	24
valid_sources[0x11]	583632	1			T1	252		T3	1039		T11	16
valid_sources[0x12]	586142	1			T1	268		T3	1123		T11	10
valid_sources[0x13]	547702	1			T1	254		T3	1129		T11	17
valid_sources[0x14]	593080	1			T1	265		T3	1005		T11	18
valid_sources[0x15]	560519	1			T1	251		T3	1039		T11	15
valid_sources[0x16]	596358	1			T1	243		T3	1105		T11	14
valid_sources[0x17]	551778	1			T1	241		T3	1142		T11	11
valid_sources[0x18]	566266	1			T1	231		T3	1095		T11	12
valid_sources[0x19]	568305	1			T1	207		T3	971		T11	7
valid_sources[0x1a]	575801	1			T1	241		T3	1013		T11	24
valid_sources[0x1b]	554345	1			T1	244		T3	1010		T11	14
valid_sources[0x1c]	629118	1			T1	262		T3	998		T11	19
valid_sources[0x1d]	580359	1			T1	229		T3	1034		T11	8
valid_sources[0x1e]	603990	1			T1	249		T3	1055		T11	10
valid_sources[0x1f]	592391	1			T1	280		T3	1105		T11	6
valid_sources[0x20]	597162	1			T1	269		T3	975		T11	4
valid_sources[0x21]	554965	1			T1	241		T3	1068		T11	28
valid_sources[0x22]	549392	1			T1	238		T3	1008		T11	15
valid_sources[0x23]	571875	1			T1	232		T3	1089		T11	7
valid_sources[0x24]	584433	1			T1	242		T3	1203		T11	7
valid_sources[0x25]	565259	1			T1	252		T3	1078		T11	15
valid_sources[0x26]	560641	1			T1	239		T3	1196		T11	10
valid_sources[0x27]	601284	1			T1	231		T3	1103		T11	14
valid_sources[0x28]	615095	1			T1	257		T3	1029		T11	14
valid_sources[0x29]	559340	1			T1	213		T3	990		T11	11
valid_sources[0x2a]	604195	1			T1	262		T3	1029		T11	10
valid_sources[0x2b]	572014	1			T1	276		T3	1172		T11	30
valid_sources[0x2c]	572277	1			T1	237		T3	1054		T11	14
valid_sources[0x2d]	762690	1			T1	255		T3	1094		T11	25
valid_sources[0x2e]	583786	1			T1	239		T3	1079		T11	17
valid_sources[0x2f]	1267073	1			T1	221		T3	1068		T11	19
valid_sources[0x30]	653741	1			T1	198		T3	1033		T11	14
valid_sources[0x31]	551643	1			T1	280		T3	1043		T11	13
valid_sources[0x32]	568349	1			T1	246		T3	1056		T4	16
valid_sources[0x33]	569970	1			T1	240		T3	1065		T11	12
valid_sources[0x34]	592088	1			T1	246		T3	1110		T11	20
valid_sources[0x35]	762094	1			T1	234		T3	1005		T11	8
valid_sources[0x36]	1550944	1			T1	229		T3	1035		T11	17
valid_sources[0x37]	615346	1			T1	244		T3	975		T11	7
valid_sources[0x38]	549892	1			T1	266		T3	1111		T11	17
valid_sources[0x39]	621757	1			T1	215		T3	982		T11	11
valid_sources[0x3a]	558325	1			T1	259		T3	992		T11	10
valid_sources[0x3b]	562012	1			T1	239		T3	1103		T11	17
valid_sources[0x3c]	581697	1			T1	239		T3	1115		T11	19
valid_sources[0x3d]	605954	1			T1	238		T3	1066		T11	14
valid_sources[0x3e]	610230	1			T1	228		T3	1059		T11	12
valid_sources[0x3f]	607455	1			T1	240		T3	1139		T4	10000
valid_sources[0x40]	2132981	1			T1	221		T3	1075		T11	14
valid_sources[0x41]	580635	1			T1	268		T3	1052		T11	8
valid_sources[0x42]	586624	1			T1	256		T3	1120		T11	13
valid_sources[0x43]	601781	1			T1	239		T3	1124		T11	9
valid_sources[0x44]	611115	1			T1	268		T3	1096		T11	20
valid_sources[0x45]	620462	1			T1	240		T3	1013		T4	3392
valid_sources[0x46]	619850	1			T1	243		T3	942		T11	17
valid_sources[0x47]	571708	1			T1	228		T3	1074		T11	4
valid_sources[0x48]	1982004	1			T1	236		T3	1008		T11	7
valid_sources[0x49]	563594	1			T1	294		T3	967		T11	17
valid_sources[0x4a]	566609	1			T1	281		T3	1181		T11	9
valid_sources[0x4b]	946831	1			T1	254		T3	959		T11	23
valid_sources[0x4c]	556127	1			T1	238		T3	972		T11	9
valid_sources[0x4d]	823845	1			T1	213		T3	1010		T11	7
valid_sources[0x4e]	765420	1			T1	228		T3	1038		T11	12
valid_sources[0x4f]	586155	1			T1	242		T3	1198		T11	22
valid_sources[0x50]	579737	1			T1	273		T3	1096		T11	23
valid_sources[0x51]	823992	1			T1	247		T3	1082		T11	13
valid_sources[0x52]	657490	1			T1	232		T3	966		T11	9
valid_sources[0x53]	577148	1			T1	239		T3	1035		T11	15
valid_sources[0x54]	558388	1			T1	257		T3	1053		T11	12
valid_sources[0x55]	576195	1			T1	232		T3	1035		T11	27
valid_sources[0x56]	602393	1			T1	272		T3	1040		T11	10
valid_sources[0x57]	2144362	1			T1	259		T3	1072		T11	15
valid_sources[0x58]	605208	1			T1	201		T3	1083		T11	20
valid_sources[0x59]	591316	1			T1	248		T3	1062		T4	13327
valid_sources[0x5a]	573646	1			T1	238		T3	1010		T11	11
valid_sources[0x5b]	557798	1			T1	251		T3	1139		T11	5
valid_sources[0x5c]	552953	1			T1	283		T3	1092		T11	11
valid_sources[0x5d]	588665	1			T1	255		T3	1129		T11	31
valid_sources[0x5e]	586862	1			T1	222		T3	1119		T11	20
valid_sources[0x5f]	646957	1			T1	294		T3	967		T11	7
valid_sources[0x60]	618492	1			T1	240		T3	1090		T11	19
valid_sources[0x61]	601814	1			T1	253		T3	980		T11	9
valid_sources[0x62]	593271	1			T1	287		T3	1063		T4	2346
valid_sources[0x63]	561574	1			T1	278		T3	1037		T11	8
valid_sources[0x64]	556310	1			T1	238		T3	1006		T11	11
valid_sources[0x65]	614662	1			T1	236		T3	1044		T11	7
valid_sources[0x66]	563097	1			T1	234		T3	1028		T11	6
valid_sources[0x67]	571594	1			T1	271		T3	1024		T11	10
valid_sources[0x68]	567873	1			T1	219		T3	1048		T11	9
valid_sources[0x69]	626865	1			T1	222		T3	997		T11	5
valid_sources[0x6a]	629109	1			T1	227		T3	1014		T11	23
valid_sources[0x6b]	556552	1			T1	217		T3	1057		T11	18
valid_sources[0x6c]	623367	1			T1	231		T3	982		T11	12
valid_sources[0x6d]	607346	1			T1	265		T3	1212		T11	11
valid_sources[0x6e]	698626	1			T1	248		T3	1097		T11	9
valid_sources[0x6f]	579592	1			T1	241		T3	1001		T11	17
valid_sources[0x70]	630193	1			T1	256		T3	1074		T11	14
valid_sources[0x71]	552255	1			T1	242		T3	1143		T11	8
valid_sources[0x72]	575887	1			T1	250		T3	1026		T11	15
valid_sources[0x73]	570564	1			T1	274		T3	1056		T11	11
valid_sources[0x74]	555394	1			T1	226		T3	1096		T11	9
valid_sources[0x75]	546209	1			T1	251		T3	1177		T11	11
valid_sources[0x76]	577375	1			T1	223		T3	995		T11	12
valid_sources[0x77]	570193	1			T1	211		T3	1186		T11	16
valid_sources[0x78]	612015	1			T1	224		T3	1068		T4	12517
valid_sources[0x79]	552116	1			T1	273		T3	1039		T11	12
valid_sources[0x7a]	623590	1			T1	256		T3	1128		T11	15
valid_sources[0x7b]	1879144	1			T1	267		T3	1041		T11	19
valid_sources[0x7c]	3247318	1			T1	243		T3	1118		T11	21
valid_sources[0x7d]	561596	1			T1	270		T3	1060		T4	13196
valid_sources[0x7e]	565921	1			T1	252		T3	1208		T11	16
valid_sources[0x7f]	569553	1			T1	252		T3	1071		T11	14
valid_sources[0x80]	613667	1			T1	229		T3	1008		T11	13

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

80963304

1

T1

271

T3

123188

T4

71853

values[0x0]

all_enables

biggest_size

41883236

1

T1

1461

T3

61323

T4

35435

values[0x1]

all_enables

biggest_size

41881963

1

T1

1461

T3

61021

T4

35743

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	33780	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

129075

1

T3

2

T4

7

T12

42

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	48265	1			T12	19		T7	23		T8	28
values[0x0]	55442	1			T2	1		T3	5		T4	10
values[0x1]	59148	1			T1	1		T4	16		T11	2

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	25595	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

137260

1

T3

2

T4

8

T11

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	682	1			T8	1		T21	4		T31	6
valid_sources[0x01]	549	1			T8	1		T72	1		T31	9
valid_sources[0x02]	576	1			T8	2		T21	7		T31	9
valid_sources[0x03]	714	1			T8	1		T21	1		T9	1
valid_sources[0x04]	634	1			T8	3		T38	1		T21	5
valid_sources[0x05]	1036	1			T12	2		T7	2		T31	17
valid_sources[0x06]	772	1			T12	1		T31	3		T32	1
valid_sources[0x07]	608	1			T12	2		T21	1		T31	17
valid_sources[0x08]	655	1			T12	3		T21	3		T9	1
valid_sources[0x09]	557	1			T8	1		T21	5		T31	5
valid_sources[0x0a]	883	1			T7	1		T8	1		T21	4
valid_sources[0x0b]	561	1			T8	1		T31	1		T32	5
valid_sources[0x0c]	583	1			T21	1		T31	9		T32	9
valid_sources[0x0d]	739	1			T21	3		T31	16		T32	3
valid_sources[0x0e]	691	1			T12	1		T21	5		T9	2
valid_sources[0x0f]	592	1			T21	3		T31	5		T32	7
valid_sources[0x10]	656	1			T7	1		T8	1		T41	2
valid_sources[0x11]	735	1			T1	1		T12	1		T21	5
valid_sources[0x12]	482	1			T12	1		T8	1		T21	9
valid_sources[0x13]	973	1			T7	1		T8	2		T21	1
valid_sources[0x14]	638	1			T12	2		T9	1		T31	6
valid_sources[0x15]	732	1			T12	1		T9	1		T31	11
valid_sources[0x16]	800	1			T12	4		T21	1		T9	2
valid_sources[0x17]	730	1			T21	8		T9	1		T31	5
valid_sources[0x18]	631	1			T21	2		T9	2		T31	7
valid_sources[0x19]	602	1			T21	2		T9	2		T31	18
valid_sources[0x1a]	706	1			T12	4		T21	3		T31	32
valid_sources[0x1b]	499	1			T38	1		T9	1		T31	3
valid_sources[0x1c]	609	1			T31	14		T32	5		T29	1
valid_sources[0x1d]	630	1			T8	3		T21	5		T9	1
valid_sources[0x1e]	634	1			T22	1		T21	1		T31	6
valid_sources[0x1f]	584	1			T12	2		T21	5		T31	4
valid_sources[0x20]	709	1			T12	1		T41	1		T133	1
valid_sources[0x21]	673	1			T23	3		T25	2		T21	5
valid_sources[0x22]	800	1			T21	1		T31	9		T32	5
valid_sources[0x23]	516	1			T7	1		T21	5		T32	2
valid_sources[0x24]	625	1			T12	2		T14	4		T21	3
valid_sources[0x25]	816	1			T4	3		T8	2		T21	2
valid_sources[0x26]	608	1			T9	1		T31	9		T32	8
valid_sources[0x27]	598	1			T12	1		T24	9		T21	2
valid_sources[0x28]	903	1			T5	1		T12	2		T21	11
valid_sources[0x29]	637	1			T21	2		T9	2		T31	3
valid_sources[0x2a]	617	1			T12	1		T21	2		T9	2
valid_sources[0x2b]	735	1			T12	1		T7	1		T8	1
valid_sources[0x2c]	561	1			T21	3		T9	1		T31	4
valid_sources[0x2d]	535	1			T12	1		T21	7		T9	1
valid_sources[0x2e]	827	1			T21	9		T31	20		T32	2
valid_sources[0x2f]	584	1			T7	1		T8	1		T31	11
valid_sources[0x30]	555	1			T8	1		T31	26		T32	7
valid_sources[0x31]	628	1			T12	1		T7	1		T21	1
valid_sources[0x32]	550	1			T4	2		T12	1		T44	1
valid_sources[0x33]	813	1			T12	3		T21	1		T9	4
valid_sources[0x34]	489	1			T21	2		T31	3		T32	8
valid_sources[0x35]	714	1			T12	2		T8	1		T10	1
valid_sources[0x36]	663	1			T12	1		T22	1		T21	2
valid_sources[0x37]	513	1			T8	4		T21	1		T31	8
valid_sources[0x38]	760	1			T8	2		T31	5		T32	4
valid_sources[0x39]	587	1			T12	4		T8	2		T21	2
valid_sources[0x3a]	688	1			T31	18		T32	3		T45	1
valid_sources[0x3b]	530	1			T8	1		T31	6		T32	3
valid_sources[0x3c]	571	1			T12	1		T31	2		T32	2
valid_sources[0x3d]	571	1			T12	1		T8	4		T22	1
valid_sources[0x3e]	567	1			T35	1		T21	3		T9	2
valid_sources[0x3f]	473	1			T8	1		T21	2		T9	2
valid_sources[0x40]	591	1			T7	1		T8	5		T21	1
valid_sources[0x41]	759	1			T31	10		T32	4		T142	2
valid_sources[0x42]	481	1			T14	1		T21	8		T31	11
valid_sources[0x43]	640	1			T21	3		T31	12		T32	7
valid_sources[0x44]	546	1			T9	1		T31	8		T76	1
valid_sources[0x45]	496	1			T12	1		T21	2		T9	1
valid_sources[0x46]	585	1			T12	1		T8	1		T21	5
valid_sources[0x47]	589	1			T21	4		T9	2		T31	4
valid_sources[0x48]	642	1			T12	2		T8	1		T21	4
valid_sources[0x49]	557	1			T21	1		T31	9		T32	10
valid_sources[0x4a]	795	1			T8	2		T14	1		T21	1
valid_sources[0x4b]	544	1			T21	11		T9	2		T31	9
valid_sources[0x4c]	543	1			T21	10		T52	5		T31	4
valid_sources[0x4d]	620	1			T21	3		T31	2		T32	5
valid_sources[0x4e]	531	1			T7	1		T21	4		T9	1
valid_sources[0x4f]	585	1			T14	1		T21	4		T31	11
valid_sources[0x50]	467	1			T12	2		T8	1		T21	4
valid_sources[0x51]	645	1			T7	1		T14	1		T31	2
valid_sources[0x52]	591	1			T12	1		T7	1		T23	1
valid_sources[0x53]	689	1			T21	1		T9	2		T31	30
valid_sources[0x54]	500	1			T8	1		T21	4		T9	2
valid_sources[0x55]	598	1			T12	1		T8	1		T41	1
valid_sources[0x56]	716	1			T8	1		T31	32		T32	3
valid_sources[0x57]	540	1			T12	1		T21	6		T31	23
valid_sources[0x58]	599	1			T12	2		T14	2		T21	6
valid_sources[0x59]	613	1			T12	3		T18	7		T21	7
valid_sources[0x5a]	563	1			T8	1		T21	4		T31	2
valid_sources[0x5b]	617	1			T21	11		T31	3		T32	7
valid_sources[0x5c]	619	1			T8	2		T31	4		T32	6
valid_sources[0x5d]	697	1			T12	2		T7	2		T141	1
valid_sources[0x5e]	580	1			T12	2		T21	6		T9	2
valid_sources[0x5f]	540	1			T21	4		T9	1		T31	11
valid_sources[0x60]	544	1			T12	1		T21	4		T9	1
valid_sources[0x61]	520	1			T21	3		T9	1		T31	14
valid_sources[0x62]	512	1			T21	7		T9	6		T31	9
valid_sources[0x63]	576	1			T4	1		T12	1		T21	4
valid_sources[0x64]	894	1			T12	1		T32	8		T143	1
valid_sources[0x65]	538	1			T4	1		T21	3		T31	10
valid_sources[0x66]	758	1			T12	1		T21	13		T9	1
valid_sources[0x67]	705	1			T8	1		T21	4		T31	7
valid_sources[0x68]	608	1			T12	1		T7	1		T21	5
valid_sources[0x69]	673	1			T8	1		T21	10		T31	7
valid_sources[0x6a]	473	1			T21	4		T9	2		T31	12
valid_sources[0x6b]	637	1			T12	2		T8	3		T52	2
valid_sources[0x6c]	512	1			T8	1		T21	1		T9	1
valid_sources[0x6d]	622	1			T5	1		T21	2		T9	1
valid_sources[0x6e]	598	1			T12	1		T8	1		T21	1
valid_sources[0x6f]	566	1			T9	2		T56	5		T31	8
valid_sources[0x70]	887	1			T21	6		T31	5		T32	9
valid_sources[0x71]	1016	1			T12	2		T21	4		T31	14
valid_sources[0x72]	808	1			T12	1		T8	4		T21	1
valid_sources[0x73]	537	1			T12	1		T21	4		T31	2
valid_sources[0x74]	522	1			T12	2		T8	1		T21	8
valid_sources[0x75]	688	1			T12	1		T21	3		T52	6
valid_sources[0x76]	540	1			T21	4		T9	2		T31	8
valid_sources[0x77]	617	1			T12	3		T8	1		T141	1
valid_sources[0x78]	561	1			T141	1		T21	1		T9	1
valid_sources[0x79]	770	1			T12	2		T21	5		T9	1
valid_sources[0x7a]	560	1			T23	1		T21	5		T9	2
valid_sources[0x7b]	519	1			T21	1		T31	14		T32	2
valid_sources[0x7c]	519	1			T12	3		T7	1		T8	1
valid_sources[0x7d]	649	1			T7	3		T8	1		T141	1
valid_sources[0x7e]	586	1			T12	1		T8	2		T14	3
valid_sources[0x7f]	568	1			T32	3		T45	120		T46	10
valid_sources[0x80]	466	1			T12	5		T21	5		T9	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

35740

1

T12

10

T7

8

T8

14

values[0x0]

all_enables

biggest_size

47542

1

T3

2

T4

3

T12

18

values[0x1]

all_enables

biggest_size

45793

1

T4

4

T12

14

T7

5