| T542 |
/workspace/coverage/default/2.sram_ctrl_smoke.1537156348 |
|
|
Apr 02 02:27:07 PM PDT 24 |
Apr 02 02:27:13 PM PDT 24 |
723738369 ps |
| T543 |
/workspace/coverage/default/30.sram_ctrl_executable.1721817611 |
|
|
Apr 02 02:36:25 PM PDT 24 |
Apr 02 02:38:25 PM PDT 24 |
9109128201 ps |
| T544 |
/workspace/coverage/default/23.sram_ctrl_smoke.2500068268 |
|
|
Apr 02 02:33:16 PM PDT 24 |
Apr 02 02:34:45 PM PDT 24 |
3696875709 ps |
| T545 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.132624611 |
|
|
Apr 02 02:28:25 PM PDT 24 |
Apr 02 02:37:06 PM PDT 24 |
47553586816 ps |
| T546 |
/workspace/coverage/default/26.sram_ctrl_alert_test.4224221230 |
|
|
Apr 02 02:34:59 PM PDT 24 |
Apr 02 02:35:00 PM PDT 24 |
18718480 ps |
| T547 |
/workspace/coverage/default/19.sram_ctrl_regwen.4016520508 |
|
|
Apr 02 02:32:02 PM PDT 24 |
Apr 02 02:43:12 PM PDT 24 |
8179918163 ps |
| T548 |
/workspace/coverage/default/17.sram_ctrl_smoke.831747585 |
|
|
Apr 02 02:30:54 PM PDT 24 |
Apr 02 02:30:58 PM PDT 24 |
1488590899 ps |
| T549 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.2015079034 |
|
|
Apr 02 02:28:51 PM PDT 24 |
Apr 02 02:33:21 PM PDT 24 |
13779184379 ps |
| T550 |
/workspace/coverage/default/13.sram_ctrl_partial_access.3622932496 |
|
|
Apr 02 02:29:50 PM PDT 24 |
Apr 02 02:30:09 PM PDT 24 |
5523058436 ps |
| T551 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.628428306 |
|
|
Apr 02 02:30:31 PM PDT 24 |
Apr 02 02:30:40 PM PDT 24 |
735494113 ps |
| T552 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.3325134660 |
|
|
Apr 02 02:35:32 PM PDT 24 |
Apr 02 02:36:14 PM PDT 24 |
1418856132 ps |
| T553 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2758775671 |
|
|
Apr 02 02:29:30 PM PDT 24 |
Apr 02 02:29:38 PM PDT 24 |
3206712919 ps |
| T554 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.471486528 |
|
|
Apr 02 02:40:47 PM PDT 24 |
Apr 02 02:53:14 PM PDT 24 |
19885945576 ps |
| T555 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.3970514741 |
|
|
Apr 02 02:27:08 PM PDT 24 |
Apr 02 02:29:02 PM PDT 24 |
24526220097 ps |
| T556 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.416744053 |
|
|
Apr 02 02:39:51 PM PDT 24 |
Apr 02 02:43:32 PM PDT 24 |
49182980941 ps |
| T557 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.461027689 |
|
|
Apr 02 02:31:52 PM PDT 24 |
Apr 02 02:33:27 PM PDT 24 |
2857930965 ps |
| T558 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.120253738 |
|
|
Apr 02 02:32:00 PM PDT 24 |
Apr 02 02:35:47 PM PDT 24 |
18169578776 ps |
| T559 |
/workspace/coverage/default/33.sram_ctrl_smoke.1836283614 |
|
|
Apr 02 02:37:15 PM PDT 24 |
Apr 02 02:37:26 PM PDT 24 |
2123193808 ps |
| T560 |
/workspace/coverage/default/17.sram_ctrl_partial_access.2664365337 |
|
|
Apr 02 02:31:06 PM PDT 24 |
Apr 02 02:31:10 PM PDT 24 |
1371161064 ps |
| T561 |
/workspace/coverage/default/19.sram_ctrl_stress_all.815404886 |
|
|
Apr 02 02:32:14 PM PDT 24 |
Apr 02 03:19:48 PM PDT 24 |
311761632083 ps |
| T562 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.454294340 |
|
|
Apr 02 02:32:24 PM PDT 24 |
Apr 02 02:50:48 PM PDT 24 |
73460517884 ps |
| T563 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.3244984948 |
|
|
Apr 02 02:28:42 PM PDT 24 |
Apr 02 02:29:09 PM PDT 24 |
752427032 ps |
| T564 |
/workspace/coverage/default/40.sram_ctrl_stress_all.2151335958 |
|
|
Apr 02 02:39:52 PM PDT 24 |
Apr 02 03:34:00 PM PDT 24 |
31861566179 ps |
| T565 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1269097831 |
|
|
Apr 02 02:40:35 PM PDT 24 |
Apr 02 02:40:44 PM PDT 24 |
213969296 ps |
| T566 |
/workspace/coverage/default/2.sram_ctrl_bijection.93589516 |
|
|
Apr 02 02:27:10 PM PDT 24 |
Apr 02 02:54:12 PM PDT 24 |
478624545415 ps |
| T567 |
/workspace/coverage/default/21.sram_ctrl_smoke.2633856028 |
|
|
Apr 02 02:32:32 PM PDT 24 |
Apr 02 02:32:54 PM PDT 24 |
1444002493 ps |
| T568 |
/workspace/coverage/default/21.sram_ctrl_alert_test.1573125848 |
|
|
Apr 02 02:32:53 PM PDT 24 |
Apr 02 02:32:54 PM PDT 24 |
30195167 ps |
| T569 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.1239504831 |
|
|
Apr 02 02:36:54 PM PDT 24 |
Apr 02 02:39:22 PM PDT 24 |
2431507970 ps |
| T570 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2801976518 |
|
|
Apr 02 02:30:15 PM PDT 24 |
Apr 02 02:32:41 PM PDT 24 |
4770284155 ps |
| T571 |
/workspace/coverage/default/46.sram_ctrl_executable.657453367 |
|
|
Apr 02 02:40:59 PM PDT 24 |
Apr 02 02:59:47 PM PDT 24 |
24312958603 ps |
| T572 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.1494253060 |
|
|
Apr 02 02:39:34 PM PDT 24 |
Apr 02 02:43:16 PM PDT 24 |
17575414611 ps |
| T573 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.2555858565 |
|
|
Apr 02 02:39:48 PM PDT 24 |
Apr 02 02:44:47 PM PDT 24 |
42947516051 ps |
| T574 |
/workspace/coverage/default/46.sram_ctrl_bijection.740502168 |
|
|
Apr 02 02:40:49 PM PDT 24 |
Apr 02 02:56:20 PM PDT 24 |
200121094419 ps |
| T575 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.2202241614 |
|
|
Apr 02 02:36:20 PM PDT 24 |
Apr 02 02:37:56 PM PDT 24 |
58546840392 ps |
| T576 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.2742984324 |
|
|
Apr 02 02:30:05 PM PDT 24 |
Apr 02 03:02:40 PM PDT 24 |
51875106244 ps |
| T577 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.4010428530 |
|
|
Apr 02 02:41:11 PM PDT 24 |
Apr 02 02:48:25 PM PDT 24 |
3820500402 ps |
| T578 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.1152086649 |
|
|
Apr 02 02:33:24 PM PDT 24 |
Apr 02 02:34:36 PM PDT 24 |
41102274092 ps |
| T579 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.3245884404 |
|
|
Apr 02 02:32:35 PM PDT 24 |
Apr 02 02:35:15 PM PDT 24 |
34533120682 ps |
| T580 |
/workspace/coverage/default/7.sram_ctrl_executable.1759517337 |
|
|
Apr 02 02:28:09 PM PDT 24 |
Apr 02 02:33:13 PM PDT 24 |
9031471697 ps |
| T581 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.2606044126 |
|
|
Apr 02 02:30:07 PM PDT 24 |
Apr 02 02:30:15 PM PDT 24 |
716078835 ps |
| T582 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.1908514118 |
|
|
Apr 02 02:35:57 PM PDT 24 |
Apr 02 02:37:24 PM PDT 24 |
53296728572 ps |
| T102 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.1682614844 |
|
|
Apr 02 02:33:57 PM PDT 24 |
Apr 02 02:34:15 PM PDT 24 |
1373623708 ps |
| T583 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.2836750020 |
|
|
Apr 02 02:35:11 PM PDT 24 |
Apr 02 02:39:12 PM PDT 24 |
4376518281 ps |
| T584 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.223519484 |
|
|
Apr 02 02:28:28 PM PDT 24 |
Apr 02 02:29:00 PM PDT 24 |
4556863614 ps |
| T585 |
/workspace/coverage/default/31.sram_ctrl_alert_test.2039027383 |
|
|
Apr 02 02:36:45 PM PDT 24 |
Apr 02 02:36:46 PM PDT 24 |
12984325 ps |
| T586 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.3141746016 |
|
|
Apr 02 02:35:53 PM PDT 24 |
Apr 02 02:41:53 PM PDT 24 |
39513680781 ps |
| T587 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3157847603 |
|
|
Apr 02 02:26:38 PM PDT 24 |
Apr 02 02:34:24 PM PDT 24 |
14704072328 ps |
| T588 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.3686321660 |
|
|
Apr 02 02:37:51 PM PDT 24 |
Apr 02 02:37:55 PM PDT 24 |
3043106982 ps |
| T589 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2300396405 |
|
|
Apr 02 02:29:05 PM PDT 24 |
Apr 02 02:29:08 PM PDT 24 |
1357386760 ps |
| T590 |
/workspace/coverage/default/17.sram_ctrl_regwen.4068840118 |
|
|
Apr 02 02:31:10 PM PDT 24 |
Apr 02 02:34:29 PM PDT 24 |
1774943257 ps |
| T591 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.3610616008 |
|
|
Apr 02 02:37:15 PM PDT 24 |
Apr 02 02:44:11 PM PDT 24 |
31146391368 ps |
| T592 |
/workspace/coverage/default/49.sram_ctrl_executable.829106859 |
|
|
Apr 02 02:41:28 PM PDT 24 |
Apr 02 02:57:07 PM PDT 24 |
12065846371 ps |
| T593 |
/workspace/coverage/default/9.sram_ctrl_bijection.98555654 |
|
|
Apr 02 02:28:40 PM PDT 24 |
Apr 02 02:37:18 PM PDT 24 |
23259818313 ps |
| T594 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.2650163329 |
|
|
Apr 02 02:40:12 PM PDT 24 |
Apr 02 02:40:45 PM PDT 24 |
4440042017 ps |
| T595 |
/workspace/coverage/default/22.sram_ctrl_bijection.3952026712 |
|
|
Apr 02 02:32:58 PM PDT 24 |
Apr 02 03:05:16 PM PDT 24 |
469485131725 ps |
| T596 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.1981658803 |
|
|
Apr 02 02:37:23 PM PDT 24 |
Apr 02 02:38:06 PM PDT 24 |
8441903662 ps |
| T597 |
/workspace/coverage/default/13.sram_ctrl_bijection.3050520006 |
|
|
Apr 02 02:29:44 PM PDT 24 |
Apr 02 02:42:35 PM PDT 24 |
202339160470 ps |
| T598 |
/workspace/coverage/default/30.sram_ctrl_regwen.3409176835 |
|
|
Apr 02 02:36:23 PM PDT 24 |
Apr 02 02:40:58 PM PDT 24 |
3589527909 ps |
| T599 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.117726986 |
|
|
Apr 02 02:31:44 PM PDT 24 |
Apr 02 02:32:57 PM PDT 24 |
5349178632 ps |
| T600 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.3242871174 |
|
|
Apr 02 02:31:10 PM PDT 24 |
Apr 02 02:32:29 PM PDT 24 |
890754067 ps |
| T601 |
/workspace/coverage/default/2.sram_ctrl_regwen.1280975325 |
|
|
Apr 02 02:27:18 PM PDT 24 |
Apr 02 02:27:32 PM PDT 24 |
4565185378 ps |
| T602 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.847383675 |
|
|
Apr 02 02:41:22 PM PDT 24 |
Apr 02 02:42:14 PM PDT 24 |
5955275473 ps |
| T603 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3642080934 |
|
|
Apr 02 02:28:00 PM PDT 24 |
Apr 02 02:30:19 PM PDT 24 |
11834431368 ps |
| T604 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.612911522 |
|
|
Apr 02 02:40:08 PM PDT 24 |
Apr 02 02:46:12 PM PDT 24 |
42033492999 ps |
| T605 |
/workspace/coverage/default/15.sram_ctrl_bijection.1723845357 |
|
|
Apr 02 02:30:22 PM PDT 24 |
Apr 02 02:57:33 PM PDT 24 |
402925675169 ps |
| T606 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3415846835 |
|
|
Apr 02 02:41:28 PM PDT 24 |
Apr 02 02:42:37 PM PDT 24 |
44696745856 ps |
| T607 |
/workspace/coverage/default/20.sram_ctrl_bijection.4215507771 |
|
|
Apr 02 02:32:24 PM PDT 24 |
Apr 02 03:11:08 PM PDT 24 |
137966422900 ps |
| T103 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.2824793489 |
|
|
Apr 02 02:34:30 PM PDT 24 |
Apr 02 02:34:46 PM PDT 24 |
1033010299 ps |
| T608 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.2551859762 |
|
|
Apr 02 02:35:11 PM PDT 24 |
Apr 02 02:37:09 PM PDT 24 |
789431026 ps |
| T609 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1876588541 |
|
|
Apr 02 02:28:56 PM PDT 24 |
Apr 02 02:28:57 PM PDT 24 |
12478712 ps |
| T610 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.214027426 |
|
|
Apr 02 02:37:53 PM PDT 24 |
Apr 02 02:42:48 PM PDT 24 |
24335033180 ps |
| T611 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.854074720 |
|
|
Apr 02 02:41:12 PM PDT 24 |
Apr 02 02:48:41 PM PDT 24 |
17692175242 ps |
| T612 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.2198618054 |
|
|
Apr 02 02:36:30 PM PDT 24 |
Apr 02 02:38:14 PM PDT 24 |
789904265 ps |
| T613 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.1234473332 |
|
|
Apr 02 02:36:20 PM PDT 24 |
Apr 02 02:42:28 PM PDT 24 |
109991359853 ps |
| T614 |
/workspace/coverage/default/19.sram_ctrl_partial_access.3296988110 |
|
|
Apr 02 02:31:49 PM PDT 24 |
Apr 02 02:31:57 PM PDT 24 |
462340585 ps |
| T615 |
/workspace/coverage/default/26.sram_ctrl_partial_access.205130530 |
|
|
Apr 02 02:34:40 PM PDT 24 |
Apr 02 02:34:56 PM PDT 24 |
3149803529 ps |
| T616 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.4049983673 |
|
|
Apr 02 02:41:12 PM PDT 24 |
Apr 02 02:41:16 PM PDT 24 |
1353799935 ps |
| T104 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.3376264156 |
|
|
Apr 02 02:27:19 PM PDT 24 |
Apr 02 02:27:27 PM PDT 24 |
830749821 ps |
| T617 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2952903952 |
|
|
Apr 02 02:28:45 PM PDT 24 |
Apr 02 02:29:51 PM PDT 24 |
88947124602 ps |
| T618 |
/workspace/coverage/default/27.sram_ctrl_executable.2974488601 |
|
|
Apr 02 02:35:09 PM PDT 24 |
Apr 02 02:38:46 PM PDT 24 |
5423817448 ps |
| T619 |
/workspace/coverage/default/13.sram_ctrl_executable.735293518 |
|
|
Apr 02 02:29:56 PM PDT 24 |
Apr 02 02:41:47 PM PDT 24 |
7532177268 ps |
| T620 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.90278001 |
|
|
Apr 02 02:41:10 PM PDT 24 |
Apr 02 02:42:08 PM PDT 24 |
5357493676 ps |
| T621 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.4233765410 |
|
|
Apr 02 02:27:24 PM PDT 24 |
Apr 02 02:43:04 PM PDT 24 |
56354212099 ps |
| T622 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.906897672 |
|
|
Apr 02 02:30:17 PM PDT 24 |
Apr 02 02:30:20 PM PDT 24 |
1348451527 ps |
| T81 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.3317857795 |
|
|
Apr 02 02:40:22 PM PDT 24 |
Apr 02 02:41:36 PM PDT 24 |
29569324819 ps |
| T623 |
/workspace/coverage/default/2.sram_ctrl_partial_access.2895062951 |
|
|
Apr 02 02:27:10 PM PDT 24 |
Apr 02 02:27:27 PM PDT 24 |
4911842785 ps |
| T624 |
/workspace/coverage/default/8.sram_ctrl_regwen.2169208759 |
|
|
Apr 02 02:28:29 PM PDT 24 |
Apr 02 02:45:20 PM PDT 24 |
75652723305 ps |
| T625 |
/workspace/coverage/default/22.sram_ctrl_partial_access.161815816 |
|
|
Apr 02 02:33:02 PM PDT 24 |
Apr 02 02:35:09 PM PDT 24 |
2765315237 ps |
| T626 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.2588151367 |
|
|
Apr 02 02:32:35 PM PDT 24 |
Apr 02 02:39:23 PM PDT 24 |
13223628837 ps |
| T627 |
/workspace/coverage/default/44.sram_ctrl_smoke.3723454211 |
|
|
Apr 02 02:40:27 PM PDT 24 |
Apr 02 02:42:27 PM PDT 24 |
3432078739 ps |
| T628 |
/workspace/coverage/default/7.sram_ctrl_alert_test.2642114334 |
|
|
Apr 02 02:28:22 PM PDT 24 |
Apr 02 02:28:23 PM PDT 24 |
15705950 ps |
| T629 |
/workspace/coverage/default/20.sram_ctrl_stress_all.1203140175 |
|
|
Apr 02 02:32:31 PM PDT 24 |
Apr 02 03:04:14 PM PDT 24 |
119405678777 ps |
| T630 |
/workspace/coverage/default/3.sram_ctrl_bijection.2762260889 |
|
|
Apr 02 02:27:22 PM PDT 24 |
Apr 02 03:11:41 PM PDT 24 |
659702808708 ps |
| T631 |
/workspace/coverage/default/49.sram_ctrl_partial_access.3461083209 |
|
|
Apr 02 02:41:25 PM PDT 24 |
Apr 02 02:42:25 PM PDT 24 |
534940314 ps |
| T632 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.576103909 |
|
|
Apr 02 02:29:01 PM PDT 24 |
Apr 02 02:32:52 PM PDT 24 |
13001301563 ps |
| T633 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.28179611 |
|
|
Apr 02 02:38:02 PM PDT 24 |
Apr 02 02:42:05 PM PDT 24 |
16694619580 ps |
| T634 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.4238975581 |
|
|
Apr 02 02:28:11 PM PDT 24 |
Apr 02 02:32:10 PM PDT 24 |
4091725361 ps |
| T635 |
/workspace/coverage/default/6.sram_ctrl_bijection.2370581893 |
|
|
Apr 02 02:27:53 PM PDT 24 |
Apr 02 02:39:43 PM PDT 24 |
11280805700 ps |
| T636 |
/workspace/coverage/default/27.sram_ctrl_alert_test.965339853 |
|
|
Apr 02 02:35:21 PM PDT 24 |
Apr 02 02:35:22 PM PDT 24 |
209118269 ps |
| T637 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.84091269 |
|
|
Apr 02 02:40:34 PM PDT 24 |
Apr 02 02:40:37 PM PDT 24 |
360025997 ps |
| T638 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3744115677 |
|
|
Apr 02 02:40:28 PM PDT 24 |
Apr 02 02:44:07 PM PDT 24 |
27289821607 ps |
| T639 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.1715916474 |
|
|
Apr 02 02:31:57 PM PDT 24 |
Apr 02 02:33:07 PM PDT 24 |
11744120264 ps |
| T640 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.3976760194 |
|
|
Apr 02 02:34:57 PM PDT 24 |
Apr 02 02:37:00 PM PDT 24 |
10403194699 ps |
| T641 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.2499664031 |
|
|
Apr 02 02:33:47 PM PDT 24 |
Apr 02 02:35:18 PM PDT 24 |
3157874687 ps |
| T642 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.868402899 |
|
|
Apr 02 02:33:50 PM PDT 24 |
Apr 02 02:39:49 PM PDT 24 |
6354373870 ps |
| T643 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.1337807418 |
|
|
Apr 02 02:35:02 PM PDT 24 |
Apr 02 02:51:56 PM PDT 24 |
65687965207 ps |
| T644 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.508789281 |
|
|
Apr 02 02:39:01 PM PDT 24 |
Apr 02 02:42:53 PM PDT 24 |
3749527700 ps |
| T645 |
/workspace/coverage/default/1.sram_ctrl_bijection.126868958 |
|
|
Apr 02 02:26:55 PM PDT 24 |
Apr 02 02:48:29 PM PDT 24 |
59960754462 ps |
| T646 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.1943224891 |
|
|
Apr 02 02:33:31 PM PDT 24 |
Apr 02 02:34:54 PM PDT 24 |
1810974113 ps |
| T647 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.3669552746 |
|
|
Apr 02 02:34:23 PM PDT 24 |
Apr 02 02:34:26 PM PDT 24 |
655698029 ps |
| T648 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.2463088027 |
|
|
Apr 02 02:33:46 PM PDT 24 |
Apr 02 02:35:02 PM PDT 24 |
23602603268 ps |
| T649 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.3254473572 |
|
|
Apr 02 02:27:38 PM PDT 24 |
Apr 02 02:43:12 PM PDT 24 |
13124901554 ps |
| T650 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.1189348664 |
|
|
Apr 02 02:29:24 PM PDT 24 |
Apr 02 02:31:25 PM PDT 24 |
1981347823 ps |
| T651 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.3159847382 |
|
|
Apr 02 02:31:29 PM PDT 24 |
Apr 02 02:38:36 PM PDT 24 |
17607140372 ps |
| T652 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.540883151 |
|
|
Apr 02 02:39:28 PM PDT 24 |
Apr 02 02:39:32 PM PDT 24 |
346169223 ps |
| T653 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.362773106 |
|
|
Apr 02 02:40:50 PM PDT 24 |
Apr 02 02:44:33 PM PDT 24 |
3382555340 ps |
| T654 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.2878773755 |
|
|
Apr 02 02:27:25 PM PDT 24 |
Apr 02 02:33:25 PM PDT 24 |
22310744394 ps |
| T655 |
/workspace/coverage/default/23.sram_ctrl_partial_access.577834149 |
|
|
Apr 02 02:33:24 PM PDT 24 |
Apr 02 02:35:31 PM PDT 24 |
627372595 ps |
| T656 |
/workspace/coverage/default/31.sram_ctrl_smoke.1976751007 |
|
|
Apr 02 02:36:29 PM PDT 24 |
Apr 02 02:37:16 PM PDT 24 |
1055545988 ps |
| T657 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.421350400 |
|
|
Apr 02 02:29:33 PM PDT 24 |
Apr 02 02:29:36 PM PDT 24 |
1250864619 ps |
| T658 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.1860947668 |
|
|
Apr 02 02:38:59 PM PDT 24 |
Apr 02 02:40:11 PM PDT 24 |
3015564961 ps |
| T659 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.100593275 |
|
|
Apr 02 02:27:48 PM PDT 24 |
Apr 02 02:32:33 PM PDT 24 |
54941026013 ps |
| T660 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.2145797788 |
|
|
Apr 02 02:27:26 PM PDT 24 |
Apr 02 02:28:28 PM PDT 24 |
3007198612 ps |
| T661 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.2595922070 |
|
|
Apr 02 02:30:18 PM PDT 24 |
Apr 02 02:30:55 PM PDT 24 |
11926652853 ps |
| T662 |
/workspace/coverage/default/40.sram_ctrl_alert_test.2300997156 |
|
|
Apr 02 02:39:53 PM PDT 24 |
Apr 02 02:39:54 PM PDT 24 |
34240738 ps |
| T663 |
/workspace/coverage/default/33.sram_ctrl_alert_test.2209403616 |
|
|
Apr 02 02:37:45 PM PDT 24 |
Apr 02 02:37:46 PM PDT 24 |
14231533 ps |
| T664 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.4106360567 |
|
|
Apr 02 02:27:30 PM PDT 24 |
Apr 02 02:27:40 PM PDT 24 |
257681856 ps |
| T665 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1847657445 |
|
|
Apr 02 02:41:27 PM PDT 24 |
Apr 02 02:49:23 PM PDT 24 |
61375057877 ps |
| T666 |
/workspace/coverage/default/21.sram_ctrl_executable.1370574137 |
|
|
Apr 02 02:32:47 PM PDT 24 |
Apr 02 02:41:12 PM PDT 24 |
17737674260 ps |
| T667 |
/workspace/coverage/default/49.sram_ctrl_stress_all.1828562562 |
|
|
Apr 02 02:41:31 PM PDT 24 |
Apr 02 03:39:21 PM PDT 24 |
50048502096 ps |
| T668 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.2043599058 |
|
|
Apr 02 02:40:42 PM PDT 24 |
Apr 02 02:40:49 PM PDT 24 |
673525419 ps |
| T669 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.3539611107 |
|
|
Apr 02 02:35:13 PM PDT 24 |
Apr 02 02:35:17 PM PDT 24 |
346738528 ps |
| T670 |
/workspace/coverage/default/21.sram_ctrl_mem_walk.4111523432 |
|
|
Apr 02 02:32:49 PM PDT 24 |
Apr 02 02:37:17 PM PDT 24 |
55077864913 ps |
| T671 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.3941616957 |
|
|
Apr 02 02:36:26 PM PDT 24 |
Apr 02 02:36:33 PM PDT 24 |
356849501 ps |
| T672 |
/workspace/coverage/default/14.sram_ctrl_stress_all.1962435371 |
|
|
Apr 02 02:30:16 PM PDT 24 |
Apr 02 03:18:27 PM PDT 24 |
228682071686 ps |
| T673 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.242458684 |
|
|
Apr 02 02:27:16 PM PDT 24 |
Apr 02 02:27:20 PM PDT 24 |
1408980353 ps |
| T674 |
/workspace/coverage/default/37.sram_ctrl_smoke.3530027386 |
|
|
Apr 02 02:38:56 PM PDT 24 |
Apr 02 02:39:12 PM PDT 24 |
1023983176 ps |
| T675 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.347310132 |
|
|
Apr 02 02:37:07 PM PDT 24 |
Apr 02 02:39:00 PM PDT 24 |
7906538361 ps |
| T676 |
/workspace/coverage/default/39.sram_ctrl_smoke.1279060034 |
|
|
Apr 02 02:39:34 PM PDT 24 |
Apr 02 02:39:51 PM PDT 24 |
6299613217 ps |
| T677 |
/workspace/coverage/default/14.sram_ctrl_alert_test.3961696625 |
|
|
Apr 02 02:30:16 PM PDT 24 |
Apr 02 02:30:17 PM PDT 24 |
42465339 ps |
| T678 |
/workspace/coverage/default/45.sram_ctrl_regwen.731977885 |
|
|
Apr 02 02:40:46 PM PDT 24 |
Apr 02 03:00:44 PM PDT 24 |
4118515518 ps |
| T679 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2327847502 |
|
|
Apr 02 02:26:42 PM PDT 24 |
Apr 02 02:32:05 PM PDT 24 |
62991422416 ps |
| T680 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.1425504055 |
|
|
Apr 02 02:39:55 PM PDT 24 |
Apr 02 02:40:47 PM PDT 24 |
8094968600 ps |
| T681 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.586657479 |
|
|
Apr 02 02:28:46 PM PDT 24 |
Apr 02 02:43:00 PM PDT 24 |
51488249201 ps |
| T682 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1354044507 |
|
|
Apr 02 02:31:08 PM PDT 24 |
Apr 02 02:37:20 PM PDT 24 |
18916096997 ps |
| T683 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.770264603 |
|
|
Apr 02 02:38:45 PM PDT 24 |
Apr 02 02:38:49 PM PDT 24 |
372186845 ps |
| T684 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.474699843 |
|
|
Apr 02 02:40:25 PM PDT 24 |
Apr 02 02:43:40 PM PDT 24 |
8576290454 ps |
| T685 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.2713852395 |
|
|
Apr 02 02:37:34 PM PDT 24 |
Apr 02 02:38:32 PM PDT 24 |
985035500 ps |
| T686 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.1326818494 |
|
|
Apr 02 02:29:05 PM PDT 24 |
Apr 02 02:31:09 PM PDT 24 |
2039708780 ps |
| T687 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.3408259140 |
|
|
Apr 02 02:30:05 PM PDT 24 |
Apr 02 02:34:21 PM PDT 24 |
8191798548 ps |
| T688 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.2679521956 |
|
|
Apr 02 02:41:33 PM PDT 24 |
Apr 02 02:45:24 PM PDT 24 |
19696233884 ps |
| T689 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.3206279781 |
|
|
Apr 02 02:36:28 PM PDT 24 |
Apr 02 02:45:33 PM PDT 24 |
8538731429 ps |
| T690 |
/workspace/coverage/default/37.sram_ctrl_alert_test.3694801958 |
|
|
Apr 02 02:39:19 PM PDT 24 |
Apr 02 02:39:20 PM PDT 24 |
34489206 ps |
| T691 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.553952991 |
|
|
Apr 02 02:35:41 PM PDT 24 |
Apr 02 02:35:44 PM PDT 24 |
408340441 ps |
| T692 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.361808429 |
|
|
Apr 02 02:35:51 PM PDT 24 |
Apr 02 02:38:38 PM PDT 24 |
12014184741 ps |
| T693 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.616244970 |
|
|
Apr 02 02:34:29 PM PDT 24 |
Apr 02 02:35:29 PM PDT 24 |
987078042 ps |
| T694 |
/workspace/coverage/default/37.sram_ctrl_access_during_key_req.748070928 |
|
|
Apr 02 02:39:10 PM PDT 24 |
Apr 02 02:54:10 PM PDT 24 |
26879535242 ps |
| T695 |
/workspace/coverage/default/25.sram_ctrl_bijection.1800922470 |
|
|
Apr 02 02:34:03 PM PDT 24 |
Apr 02 03:04:53 PM PDT 24 |
102194314513 ps |
| T696 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3651834972 |
|
|
Apr 02 02:29:54 PM PDT 24 |
Apr 02 02:35:37 PM PDT 24 |
62996903691 ps |
| T697 |
/workspace/coverage/default/1.sram_ctrl_alert_test.4116422202 |
|
|
Apr 02 02:27:07 PM PDT 24 |
Apr 02 02:27:08 PM PDT 24 |
13311880 ps |
| T698 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.525569130 |
|
|
Apr 02 02:36:19 PM PDT 24 |
Apr 02 02:37:22 PM PDT 24 |
820031969 ps |
| T699 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.4253842152 |
|
|
Apr 02 02:34:00 PM PDT 24 |
Apr 02 02:34:39 PM PDT 24 |
8732948844 ps |
| T700 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3129081401 |
|
|
Apr 02 02:29:00 PM PDT 24 |
Apr 02 02:36:29 PM PDT 24 |
18398598567 ps |
| T701 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.2205884394 |
|
|
Apr 02 02:40:12 PM PDT 24 |
Apr 02 02:45:03 PM PDT 24 |
21299460654 ps |
| T702 |
/workspace/coverage/default/22.sram_ctrl_stress_all.796226096 |
|
|
Apr 02 02:33:17 PM PDT 24 |
Apr 02 03:30:51 PM PDT 24 |
506700532678 ps |
| T703 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.3603814671 |
|
|
Apr 02 02:37:47 PM PDT 24 |
Apr 02 02:50:02 PM PDT 24 |
33250410282 ps |
| T704 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.2791557281 |
|
|
Apr 02 02:32:58 PM PDT 24 |
Apr 02 02:39:29 PM PDT 24 |
4201739621 ps |
| T705 |
/workspace/coverage/default/40.sram_ctrl_partial_access.4159664019 |
|
|
Apr 02 02:39:45 PM PDT 24 |
Apr 02 02:41:21 PM PDT 24 |
1080395124 ps |
| T706 |
/workspace/coverage/default/4.sram_ctrl_regwen.1595931699 |
|
|
Apr 02 02:27:39 PM PDT 24 |
Apr 02 02:39:16 PM PDT 24 |
44666906096 ps |
| T707 |
/workspace/coverage/default/41.sram_ctrl_partial_access.130905364 |
|
|
Apr 02 02:39:55 PM PDT 24 |
Apr 02 02:40:18 PM PDT 24 |
1618055006 ps |
| T708 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.3677561543 |
|
|
Apr 02 02:31:40 PM PDT 24 |
Apr 02 02:31:43 PM PDT 24 |
1408305832 ps |
| T709 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.4246654561 |
|
|
Apr 02 02:40:50 PM PDT 24 |
Apr 02 02:41:50 PM PDT 24 |
990759916 ps |
| T710 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3117715058 |
|
|
Apr 02 02:41:15 PM PDT 24 |
Apr 02 03:03:55 PM PDT 24 |
13496122361 ps |
| T711 |
/workspace/coverage/default/42.sram_ctrl_regwen.3942039333 |
|
|
Apr 02 02:40:11 PM PDT 24 |
Apr 02 02:48:16 PM PDT 24 |
1930391551 ps |
| T712 |
/workspace/coverage/default/31.sram_ctrl_bijection.2484503967 |
|
|
Apr 02 02:36:28 PM PDT 24 |
Apr 02 03:02:51 PM PDT 24 |
69896403324 ps |
| T713 |
/workspace/coverage/default/0.sram_ctrl_stress_all.1119911819 |
|
|
Apr 02 02:26:50 PM PDT 24 |
Apr 02 03:46:02 PM PDT 24 |
130965970724 ps |
| T714 |
/workspace/coverage/default/16.sram_ctrl_bijection.2889047349 |
|
|
Apr 02 02:30:42 PM PDT 24 |
Apr 02 02:54:54 PM PDT 24 |
64611552814 ps |
| T715 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.2969571162 |
|
|
Apr 02 02:38:40 PM PDT 24 |
Apr 02 02:56:48 PM PDT 24 |
55677270365 ps |
| T716 |
/workspace/coverage/default/48.sram_ctrl_stress_all.2847252573 |
|
|
Apr 02 02:41:23 PM PDT 24 |
Apr 02 03:24:35 PM PDT 24 |
42640896541 ps |
| T717 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3406050204 |
|
|
Apr 02 02:27:50 PM PDT 24 |
Apr 02 02:27:53 PM PDT 24 |
1473009599 ps |
| T718 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1154092247 |
|
|
Apr 02 02:40:46 PM PDT 24 |
Apr 02 02:43:17 PM PDT 24 |
19032287605 ps |
| T719 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.258466332 |
|
|
Apr 02 02:41:15 PM PDT 24 |
Apr 02 02:45:34 PM PDT 24 |
22099952672 ps |
| T720 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.3155561029 |
|
|
Apr 02 02:36:02 PM PDT 24 |
Apr 02 02:37:14 PM PDT 24 |
2469627302 ps |
| T721 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.4020835220 |
|
|
Apr 02 02:28:17 PM PDT 24 |
Apr 02 02:30:35 PM PDT 24 |
4902528189 ps |
| T722 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.980826048 |
|
|
Apr 02 02:37:03 PM PDT 24 |
Apr 02 02:39:17 PM PDT 24 |
1588302150 ps |
| T723 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.479266182 |
|
|
Apr 02 02:29:28 PM PDT 24 |
Apr 02 02:33:55 PM PDT 24 |
4775386876 ps |
| T724 |
/workspace/coverage/default/13.sram_ctrl_regwen.1226321855 |
|
|
Apr 02 02:29:57 PM PDT 24 |
Apr 02 02:42:08 PM PDT 24 |
48128890602 ps |
| T725 |
/workspace/coverage/default/48.sram_ctrl_partial_access.3699111438 |
|
|
Apr 02 02:41:16 PM PDT 24 |
Apr 02 02:42:14 PM PDT 24 |
795243089 ps |
| T726 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.3070219764 |
|
|
Apr 02 02:29:13 PM PDT 24 |
Apr 02 02:30:08 PM PDT 24 |
4131459292 ps |
| T727 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2358616664 |
|
|
Apr 02 02:40:48 PM PDT 24 |
Apr 02 02:48:09 PM PDT 24 |
88831989986 ps |
| T728 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.2003244899 |
|
|
Apr 02 02:33:47 PM PDT 24 |
Apr 02 02:34:08 PM PDT 24 |
4181509213 ps |
| T729 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.4153602783 |
|
|
Apr 02 02:38:14 PM PDT 24 |
Apr 02 02:39:26 PM PDT 24 |
794584641 ps |
| T730 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.4294758654 |
|
|
Apr 02 02:36:19 PM PDT 24 |
Apr 02 02:36:32 PM PDT 24 |
1383440358 ps |
| T731 |
/workspace/coverage/default/39.sram_ctrl_alert_test.2786920921 |
|
|
Apr 02 02:39:44 PM PDT 24 |
Apr 02 02:39:44 PM PDT 24 |
14799075 ps |
| T732 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2951282982 |
|
|
Apr 02 02:29:52 PM PDT 24 |
Apr 02 02:30:04 PM PDT 24 |
3002009740 ps |
| T733 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.729044291 |
|
|
Apr 02 02:27:49 PM PDT 24 |
Apr 02 02:28:17 PM PDT 24 |
1114799959 ps |
| T734 |
/workspace/coverage/default/25.sram_ctrl_alert_test.3568014988 |
|
|
Apr 02 02:34:34 PM PDT 24 |
Apr 02 02:34:37 PM PDT 24 |
26491809 ps |
| T735 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.1415294733 |
|
|
Apr 02 02:34:48 PM PDT 24 |
Apr 02 02:34:56 PM PDT 24 |
2708523797 ps |
| T736 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3475204597 |
|
|
Apr 02 02:40:43 PM PDT 24 |
Apr 02 02:41:30 PM PDT 24 |
1490206273 ps |
| T737 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.1247069317 |
|
|
Apr 02 02:33:53 PM PDT 24 |
Apr 02 02:38:59 PM PDT 24 |
82656039010 ps |
| T738 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.3497086359 |
|
|
Apr 02 02:33:56 PM PDT 24 |
Apr 02 02:36:00 PM PDT 24 |
6526071482 ps |
| T739 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.440161680 |
|
|
Apr 02 02:39:41 PM PDT 24 |
Apr 02 02:40:10 PM PDT 24 |
1173059868 ps |
| T740 |
/workspace/coverage/default/6.sram_ctrl_smoke.3972566748 |
|
|
Apr 02 02:27:52 PM PDT 24 |
Apr 02 02:28:54 PM PDT 24 |
1277948172 ps |
| T741 |
/workspace/coverage/default/17.sram_ctrl_executable.2995302667 |
|
|
Apr 02 02:31:10 PM PDT 24 |
Apr 02 02:40:17 PM PDT 24 |
11678024866 ps |
| T742 |
/workspace/coverage/default/32.sram_ctrl_stress_all.1473127438 |
|
|
Apr 02 02:37:17 PM PDT 24 |
Apr 02 03:29:19 PM PDT 24 |
322234611203 ps |
| T743 |
/workspace/coverage/default/13.sram_ctrl_smoke.3089004095 |
|
|
Apr 02 02:29:41 PM PDT 24 |
Apr 02 02:31:14 PM PDT 24 |
6959733104 ps |
| T744 |
/workspace/coverage/default/12.sram_ctrl_partial_access.1119264782 |
|
|
Apr 02 02:29:31 PM PDT 24 |
Apr 02 02:29:46 PM PDT 24 |
4667279439 ps |
| T745 |
/workspace/coverage/default/25.sram_ctrl_partial_access.2726485562 |
|
|
Apr 02 02:34:03 PM PDT 24 |
Apr 02 02:34:28 PM PDT 24 |
3084860468 ps |
| T746 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3983598838 |
|
|
Apr 02 02:26:43 PM PDT 24 |
Apr 02 02:27:58 PM PDT 24 |
6349834274 ps |
| T747 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.4194581150 |
|
|
Apr 02 02:35:38 PM PDT 24 |
Apr 02 02:40:13 PM PDT 24 |
28117166786 ps |
| T748 |
/workspace/coverage/default/30.sram_ctrl_stress_all.2331553001 |
|
|
Apr 02 02:36:30 PM PDT 24 |
Apr 02 02:51:35 PM PDT 24 |
61644540818 ps |
| T749 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.589266130 |
|
|
Apr 02 02:29:30 PM PDT 24 |
Apr 02 02:32:22 PM PDT 24 |
20054483566 ps |
| T750 |
/workspace/coverage/default/5.sram_ctrl_stress_all.748735399 |
|
|
Apr 02 02:27:55 PM PDT 24 |
Apr 02 03:19:50 PM PDT 24 |
119855043357 ps |
| T751 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.959783561 |
|
|
Apr 02 02:33:44 PM PDT 24 |
Apr 02 02:36:59 PM PDT 24 |
17700345950 ps |
| T752 |
/workspace/coverage/default/15.sram_ctrl_regwen.3886771888 |
|
|
Apr 02 02:30:33 PM PDT 24 |
Apr 02 02:32:58 PM PDT 24 |
4452107338 ps |
| T753 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.4042536106 |
|
|
Apr 02 02:41:40 PM PDT 24 |
Apr 02 02:42:20 PM PDT 24 |
2914854500 ps |
| T754 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.2752504139 |
|
|
Apr 02 02:40:26 PM PDT 24 |
Apr 02 02:41:01 PM PDT 24 |
3148631448 ps |
| T755 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2607556792 |
|
|
Apr 02 02:41:24 PM PDT 24 |
Apr 02 02:45:07 PM PDT 24 |
22336871874 ps |
| T756 |
/workspace/coverage/default/29.sram_ctrl_alert_test.271213313 |
|
|
Apr 02 02:36:12 PM PDT 24 |
Apr 02 02:36:13 PM PDT 24 |
41546685 ps |
| T757 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.3368175482 |
|
|
Apr 02 02:33:05 PM PDT 24 |
Apr 02 02:33:29 PM PDT 24 |
4831075733 ps |
| T758 |
/workspace/coverage/default/47.sram_ctrl_regwen.386322375 |
|
|
Apr 02 02:41:09 PM PDT 24 |
Apr 02 02:58:50 PM PDT 24 |
39184779822 ps |
| T759 |
/workspace/coverage/default/37.sram_ctrl_stress_all.46933635 |
|
|
Apr 02 02:39:15 PM PDT 24 |
Apr 02 04:14:06 PM PDT 24 |
2176176394567 ps |
| T760 |
/workspace/coverage/default/23.sram_ctrl_regwen.86002216 |
|
|
Apr 02 02:33:27 PM PDT 24 |
Apr 02 02:34:39 PM PDT 24 |
1997607908 ps |
| T761 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.2839050983 |
|
|
Apr 02 02:32:22 PM PDT 24 |
Apr 02 02:34:00 PM PDT 24 |
915707775 ps |
| T762 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.1519225660 |
|
|
Apr 02 02:37:26 PM PDT 24 |
Apr 02 02:44:57 PM PDT 24 |
8108540472 ps |
| T763 |
/workspace/coverage/default/11.sram_ctrl_partial_access.1531961233 |
|
|
Apr 02 02:29:14 PM PDT 24 |
Apr 02 02:29:28 PM PDT 24 |
7170226911 ps |
| T764 |
/workspace/coverage/default/44.sram_ctrl_executable.745014665 |
|
|
Apr 02 02:40:31 PM PDT 24 |
Apr 02 03:07:31 PM PDT 24 |
42954377169 ps |
| T765 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.647357365 |
|
|
Apr 02 02:31:45 PM PDT 24 |
Apr 02 02:36:32 PM PDT 24 |
172160002318 ps |
| T766 |
/workspace/coverage/default/47.sram_ctrl_alert_test.957201679 |
|
|
Apr 02 02:41:13 PM PDT 24 |
Apr 02 02:41:14 PM PDT 24 |
26627766 ps |
| T767 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.2929791847 |
|
|
Apr 02 02:31:10 PM PDT 24 |
Apr 02 02:36:07 PM PDT 24 |
17929421759 ps |
| T768 |
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.3613566594 |
|
|
Apr 02 02:32:55 PM PDT 24 |
Apr 02 02:33:14 PM PDT 24 |
527097249 ps |
| T769 |
/workspace/coverage/default/39.sram_ctrl_regwen.2137532536 |
|
|
Apr 02 02:39:39 PM PDT 24 |
Apr 02 02:51:50 PM PDT 24 |
7676166345 ps |
| T770 |
/workspace/coverage/default/18.sram_ctrl_bijection.2526931255 |
|
|
Apr 02 02:31:21 PM PDT 24 |
Apr 02 02:46:03 PM PDT 24 |
42927452342 ps |
| T771 |
/workspace/coverage/default/26.sram_ctrl_executable.3676228258 |
|
|
Apr 02 02:34:51 PM PDT 24 |
Apr 02 02:41:22 PM PDT 24 |
33236499023 ps |
| T772 |
/workspace/coverage/default/46.sram_ctrl_alert_test.3474815420 |
|
|
Apr 02 02:41:02 PM PDT 24 |
Apr 02 02:41:02 PM PDT 24 |
26628560 ps |
| T773 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.3832204988 |
|
|
Apr 02 02:39:56 PM PDT 24 |
Apr 02 02:47:57 PM PDT 24 |
17466688157 ps |
| T774 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.55664064 |
|
|
Apr 02 02:29:25 PM PDT 24 |
Apr 02 02:29:34 PM PDT 24 |
199571499 ps |
| T775 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.2734398828 |
|
|
Apr 02 02:33:41 PM PDT 24 |
Apr 02 02:36:35 PM PDT 24 |
3414379569 ps |
| T776 |
/workspace/coverage/default/49.sram_ctrl_smoke.1683098875 |
|
|
Apr 02 02:41:25 PM PDT 24 |
Apr 02 02:42:57 PM PDT 24 |
2339076046 ps |
| T777 |
/workspace/coverage/default/37.sram_ctrl_bijection.3032221916 |
|
|
Apr 02 02:39:01 PM PDT 24 |
Apr 02 02:59:55 PM PDT 24 |
17399137675 ps |
| T778 |
/workspace/coverage/default/24.sram_ctrl_partial_access.2082859563 |
|
|
Apr 02 02:33:43 PM PDT 24 |
Apr 02 02:35:37 PM PDT 24 |
7418293376 ps |
| T779 |
/workspace/coverage/default/9.sram_ctrl_regwen.467813554 |
|
|
Apr 02 02:28:50 PM PDT 24 |
Apr 02 02:36:37 PM PDT 24 |
11950717735 ps |
| T780 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2214937065 |
|
|
Apr 02 02:29:06 PM PDT 24 |
Apr 02 02:30:52 PM PDT 24 |
12332951856 ps |
| T781 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1002824970 |
|
|
Apr 02 02:27:52 PM PDT 24 |
Apr 02 02:35:53 PM PDT 24 |
272395019745 ps |
| T782 |
/workspace/coverage/default/34.sram_ctrl_regwen.1412671262 |
|
|
Apr 02 02:37:50 PM PDT 24 |
Apr 02 03:01:19 PM PDT 24 |
27429778069 ps |
| T783 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.102712347 |
|
|
Apr 02 02:33:05 PM PDT 24 |
Apr 02 02:43:11 PM PDT 24 |
17467537762 ps |
| T784 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.2454063228 |
|
|
Apr 02 02:30:47 PM PDT 24 |
Apr 02 02:32:16 PM PDT 24 |
798817583 ps |
| T785 |
/workspace/coverage/default/27.sram_ctrl_regwen.436877704 |
|
|
Apr 02 02:35:14 PM PDT 24 |
Apr 02 02:52:41 PM PDT 24 |
36828078792 ps |
| T786 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.16502383 |
|
|
Apr 02 02:41:06 PM PDT 24 |
Apr 02 02:46:31 PM PDT 24 |
4713239001 ps |
| T787 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3136982514 |
|
|
Apr 02 02:29:18 PM PDT 24 |
Apr 02 02:29:36 PM PDT 24 |
2930466162 ps |