| T304 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.3928179630 |
|
|
Apr 04 01:37:12 PM PDT 24 |
Apr 04 01:38:28 PM PDT 24 |
3225995373 ps |
| T305 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.4256145230 |
|
|
Apr 04 01:58:05 PM PDT 24 |
Apr 04 01:58:09 PM PDT 24 |
1346096651 ps |
| T306 |
/workspace/coverage/default/17.sram_ctrl_stress_all.2498879983 |
|
|
Apr 04 01:41:51 PM PDT 24 |
Apr 04 02:06:21 PM PDT 24 |
32385887742 ps |
| T307 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2769003028 |
|
|
Apr 04 02:00:44 PM PDT 24 |
Apr 04 02:04:44 PM PDT 24 |
8710673011 ps |
| T308 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.171795665 |
|
|
Apr 04 01:46:36 PM PDT 24 |
Apr 04 01:47:42 PM PDT 24 |
3638389084 ps |
| T309 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.2570806506 |
|
|
Apr 04 01:55:48 PM PDT 24 |
Apr 04 01:58:15 PM PDT 24 |
20238022380 ps |
| T310 |
/workspace/coverage/default/7.sram_ctrl_smoke.2216249097 |
|
|
Apr 04 01:36:28 PM PDT 24 |
Apr 04 01:36:38 PM PDT 24 |
778256043 ps |
| T311 |
/workspace/coverage/default/2.sram_ctrl_stress_all.5114119 |
|
|
Apr 04 01:35:36 PM PDT 24 |
Apr 04 03:17:43 PM PDT 24 |
900709674446 ps |
| T312 |
/workspace/coverage/default/34.sram_ctrl_executable.3275339335 |
|
|
Apr 04 01:54:26 PM PDT 24 |
Apr 04 02:02:10 PM PDT 24 |
17981603043 ps |
| T313 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2145839523 |
|
|
Apr 04 01:59:41 PM PDT 24 |
Apr 04 01:59:55 PM PDT 24 |
2272228837 ps |
| T314 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1514415411 |
|
|
Apr 04 01:35:18 PM PDT 24 |
Apr 04 01:35:31 PM PDT 24 |
9726418953 ps |
| T315 |
/workspace/coverage/default/37.sram_ctrl_stress_all.2274514555 |
|
|
Apr 04 01:56:41 PM PDT 24 |
Apr 04 02:44:02 PM PDT 24 |
414953764856 ps |
| T316 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.366338302 |
|
|
Apr 04 01:37:34 PM PDT 24 |
Apr 04 01:37:41 PM PDT 24 |
2321472855 ps |
| T317 |
/workspace/coverage/default/27.sram_ctrl_bijection.3749952308 |
|
|
Apr 04 01:48:53 PM PDT 24 |
Apr 04 01:56:38 PM PDT 24 |
86102700938 ps |
| T318 |
/workspace/coverage/default/45.sram_ctrl_executable.2113235930 |
|
|
Apr 04 01:59:28 PM PDT 24 |
Apr 04 02:11:25 PM PDT 24 |
27287774341 ps |
| T319 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.1326381698 |
|
|
Apr 04 01:37:37 PM PDT 24 |
Apr 04 01:38:05 PM PDT 24 |
713765585 ps |
| T320 |
/workspace/coverage/default/15.sram_ctrl_executable.410716500 |
|
|
Apr 04 01:40:26 PM PDT 24 |
Apr 04 01:48:57 PM PDT 24 |
23293841338 ps |
| T321 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.2354088503 |
|
|
Apr 04 01:42:00 PM PDT 24 |
Apr 04 01:46:48 PM PDT 24 |
10868110359 ps |
| T322 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3114602482 |
|
|
Apr 04 01:53:46 PM PDT 24 |
Apr 04 01:54:52 PM PDT 24 |
2992027475 ps |
| T323 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.1211548373 |
|
|
Apr 04 01:43:27 PM PDT 24 |
Apr 04 01:44:29 PM PDT 24 |
10342391921 ps |
| T324 |
/workspace/coverage/default/40.sram_ctrl_bijection.2491851675 |
|
|
Apr 04 01:57:38 PM PDT 24 |
Apr 04 02:18:59 PM PDT 24 |
844440491439 ps |
| T119 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.2905762362 |
|
|
Apr 04 01:45:53 PM PDT 24 |
Apr 04 01:46:00 PM PDT 24 |
178186810 ps |
| T325 |
/workspace/coverage/default/15.sram_ctrl_partial_access.4138496186 |
|
|
Apr 04 01:40:15 PM PDT 24 |
Apr 04 01:40:25 PM PDT 24 |
782105207 ps |
| T150 |
/workspace/coverage/default/38.sram_ctrl_stress_all.3284549870 |
|
|
Apr 04 01:56:51 PM PDT 24 |
Apr 04 02:26:50 PM PDT 24 |
68889287740 ps |
| T326 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.3449546002 |
|
|
Apr 04 01:40:25 PM PDT 24 |
Apr 04 01:41:30 PM PDT 24 |
36163624125 ps |
| T327 |
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.2386559955 |
|
|
Apr 04 01:44:42 PM PDT 24 |
Apr 04 01:45:03 PM PDT 24 |
3331210213 ps |
| T328 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.2399238706 |
|
|
Apr 04 01:54:39 PM PDT 24 |
Apr 04 01:55:51 PM PDT 24 |
2435587827 ps |
| T329 |
/workspace/coverage/default/27.sram_ctrl_alert_test.1016846618 |
|
|
Apr 04 01:49:46 PM PDT 24 |
Apr 04 01:49:47 PM PDT 24 |
43754752 ps |
| T330 |
/workspace/coverage/default/34.sram_ctrl_alert_test.1335210146 |
|
|
Apr 04 01:54:36 PM PDT 24 |
Apr 04 01:54:37 PM PDT 24 |
19077342 ps |
| T331 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.164746011 |
|
|
Apr 04 01:41:50 PM PDT 24 |
Apr 04 01:44:30 PM PDT 24 |
57038660088 ps |
| T332 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.2727514402 |
|
|
Apr 04 01:46:49 PM PDT 24 |
Apr 04 02:07:34 PM PDT 24 |
51438789759 ps |
| T333 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.1583148569 |
|
|
Apr 04 01:35:37 PM PDT 24 |
Apr 04 01:38:59 PM PDT 24 |
206801179197 ps |
| T334 |
/workspace/coverage/default/31.sram_ctrl_executable.1642927357 |
|
|
Apr 04 01:52:23 PM PDT 24 |
Apr 04 02:03:31 PM PDT 24 |
29997148642 ps |
| T335 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.1087688636 |
|
|
Apr 04 01:42:55 PM PDT 24 |
Apr 04 01:54:20 PM PDT 24 |
25001372581 ps |
| T336 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3450083626 |
|
|
Apr 04 01:38:50 PM PDT 24 |
Apr 04 01:39:50 PM PDT 24 |
6739932532 ps |
| T337 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.3081585669 |
|
|
Apr 04 01:41:03 PM PDT 24 |
Apr 04 01:50:12 PM PDT 24 |
39769673245 ps |
| T338 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.138923847 |
|
|
Apr 04 01:47:04 PM PDT 24 |
Apr 04 01:54:08 PM PDT 24 |
18959250968 ps |
| T339 |
/workspace/coverage/default/23.sram_ctrl_partial_access.531826687 |
|
|
Apr 04 01:45:33 PM PDT 24 |
Apr 04 01:45:41 PM PDT 24 |
2901492504 ps |
| T340 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.3393603825 |
|
|
Apr 04 01:35:46 PM PDT 24 |
Apr 04 01:36:03 PM PDT 24 |
702654054 ps |
| T341 |
/workspace/coverage/default/46.sram_ctrl_partial_access.2301664848 |
|
|
Apr 04 01:59:43 PM PDT 24 |
Apr 04 02:00:01 PM PDT 24 |
1370970930 ps |
| T342 |
/workspace/coverage/default/48.sram_ctrl_alert_test.18793753 |
|
|
Apr 04 02:00:33 PM PDT 24 |
Apr 04 02:00:33 PM PDT 24 |
18349277 ps |
| T343 |
/workspace/coverage/default/21.sram_ctrl_bijection.598839854 |
|
|
Apr 04 01:43:52 PM PDT 24 |
Apr 04 02:02:40 PM PDT 24 |
16588861556 ps |
| T344 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.347143901 |
|
|
Apr 04 01:36:46 PM PDT 24 |
Apr 04 01:37:32 PM PDT 24 |
3538819544 ps |
| T345 |
/workspace/coverage/default/14.sram_ctrl_executable.2143297566 |
|
|
Apr 04 01:40:02 PM PDT 24 |
Apr 04 01:50:15 PM PDT 24 |
88410449115 ps |
| T346 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3681381912 |
|
|
Apr 04 01:38:33 PM PDT 24 |
Apr 04 01:42:47 PM PDT 24 |
23201189946 ps |
| T120 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.3227492476 |
|
|
Apr 04 01:41:15 PM PDT 24 |
Apr 04 01:41:45 PM PDT 24 |
1188720183 ps |
| T347 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.53620644 |
|
|
Apr 04 01:55:11 PM PDT 24 |
Apr 04 01:57:09 PM PDT 24 |
7599081105 ps |
| T348 |
/workspace/coverage/default/1.sram_ctrl_regwen.2480024764 |
|
|
Apr 04 01:35:18 PM PDT 24 |
Apr 04 01:36:59 PM PDT 24 |
2502233535 ps |
| T349 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.1586417333 |
|
|
Apr 04 01:56:40 PM PDT 24 |
Apr 04 01:56:52 PM PDT 24 |
725434298 ps |
| T350 |
/workspace/coverage/default/20.sram_ctrl_bijection.1952709015 |
|
|
Apr 04 01:43:21 PM PDT 24 |
Apr 04 02:17:23 PM PDT 24 |
116704863742 ps |
| T351 |
/workspace/coverage/default/47.sram_ctrl_partial_access.3404974971 |
|
|
Apr 04 01:59:59 PM PDT 24 |
Apr 04 02:00:21 PM PDT 24 |
1443567362 ps |
| T147 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3253807681 |
|
|
Apr 04 01:38:04 PM PDT 24 |
Apr 04 01:45:14 PM PDT 24 |
18583489051 ps |
| T352 |
/workspace/coverage/default/40.sram_ctrl_smoke.2361516487 |
|
|
Apr 04 01:57:27 PM PDT 24 |
Apr 04 01:58:04 PM PDT 24 |
4195918017 ps |
| T353 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2997644630 |
|
|
Apr 04 01:37:22 PM PDT 24 |
Apr 04 01:37:27 PM PDT 24 |
1462840559 ps |
| T27 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.2134248273 |
|
|
Apr 04 01:35:55 PM PDT 24 |
Apr 04 01:35:58 PM PDT 24 |
930897873 ps |
| T354 |
/workspace/coverage/default/21.sram_ctrl_partial_access.134663336 |
|
|
Apr 04 01:44:00 PM PDT 24 |
Apr 04 01:44:21 PM PDT 24 |
1556241729 ps |
| T355 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.156616381 |
|
|
Apr 04 01:59:09 PM PDT 24 |
Apr 04 02:00:15 PM PDT 24 |
1748452021 ps |
| T356 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.3526729754 |
|
|
Apr 04 01:57:45 PM PDT 24 |
Apr 04 01:58:29 PM PDT 24 |
14793764493 ps |
| T357 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.1601607538 |
|
|
Apr 04 01:43:07 PM PDT 24 |
Apr 04 01:45:27 PM PDT 24 |
14339207675 ps |
| T358 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1192627987 |
|
|
Apr 04 02:00:18 PM PDT 24 |
Apr 04 02:04:55 PM PDT 24 |
9373224518 ps |
| T359 |
/workspace/coverage/default/37.sram_ctrl_smoke.3023575489 |
|
|
Apr 04 01:56:01 PM PDT 24 |
Apr 04 01:56:15 PM PDT 24 |
990430790 ps |
| T360 |
/workspace/coverage/default/33.sram_ctrl_partial_access.228232771 |
|
|
Apr 04 01:53:28 PM PDT 24 |
Apr 04 01:54:06 PM PDT 24 |
2834003315 ps |
| T361 |
/workspace/coverage/default/2.sram_ctrl_max_throughput.2657016497 |
|
|
Apr 04 01:35:31 PM PDT 24 |
Apr 04 01:36:00 PM PDT 24 |
731890690 ps |
| T93 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.608152326 |
|
|
Apr 04 01:36:06 PM PDT 24 |
Apr 04 01:38:23 PM PDT 24 |
9962288469 ps |
| T362 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.980220718 |
|
|
Apr 04 01:37:12 PM PDT 24 |
Apr 04 01:43:45 PM PDT 24 |
16935984034 ps |
| T363 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1470673332 |
|
|
Apr 04 01:38:14 PM PDT 24 |
Apr 04 01:49:25 PM PDT 24 |
9800725331 ps |
| T364 |
/workspace/coverage/default/24.sram_ctrl_alert_test.3402734319 |
|
|
Apr 04 01:46:49 PM PDT 24 |
Apr 04 01:46:50 PM PDT 24 |
13323526 ps |
| T365 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.248624339 |
|
|
Apr 04 01:45:18 PM PDT 24 |
Apr 04 01:50:22 PM PDT 24 |
20675383968 ps |
| T366 |
/workspace/coverage/default/8.sram_ctrl_executable.3820482121 |
|
|
Apr 04 01:36:44 PM PDT 24 |
Apr 04 01:49:57 PM PDT 24 |
98908135654 ps |
| T367 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.2940390410 |
|
|
Apr 04 01:58:23 PM PDT 24 |
Apr 04 02:04:43 PM PDT 24 |
9316327989 ps |
| T368 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.3387453614 |
|
|
Apr 04 01:46:30 PM PDT 24 |
Apr 04 01:46:49 PM PDT 24 |
3212114299 ps |
| T369 |
/workspace/coverage/default/0.sram_ctrl_alert_test.450168197 |
|
|
Apr 04 01:35:15 PM PDT 24 |
Apr 04 01:35:18 PM PDT 24 |
15229034 ps |
| T370 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.2027954099 |
|
|
Apr 04 01:58:46 PM PDT 24 |
Apr 04 01:59:54 PM PDT 24 |
57872606736 ps |
| T371 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.3054150199 |
|
|
Apr 04 01:51:27 PM PDT 24 |
Apr 04 01:52:40 PM PDT 24 |
1560886400 ps |
| T372 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.4280199592 |
|
|
Apr 04 01:35:19 PM PDT 24 |
Apr 04 01:40:41 PM PDT 24 |
11676886619 ps |
| T373 |
/workspace/coverage/default/9.sram_ctrl_partial_access.2378729977 |
|
|
Apr 04 01:37:12 PM PDT 24 |
Apr 04 01:37:34 PM PDT 24 |
1097565182 ps |
| T374 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2789281460 |
|
|
Apr 04 01:36:23 PM PDT 24 |
Apr 04 01:42:27 PM PDT 24 |
20904426472 ps |
| T375 |
/workspace/coverage/default/29.sram_ctrl_stress_all.549319918 |
|
|
Apr 04 01:51:20 PM PDT 24 |
Apr 04 03:02:29 PM PDT 24 |
59616305873 ps |
| T376 |
/workspace/coverage/default/46.sram_ctrl_alert_test.3174880189 |
|
|
Apr 04 01:59:53 PM PDT 24 |
Apr 04 01:59:54 PM PDT 24 |
26601736 ps |
| T377 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.1980263186 |
|
|
Apr 04 01:54:46 PM PDT 24 |
Apr 04 01:59:15 PM PDT 24 |
5728894338 ps |
| T378 |
/workspace/coverage/default/33.sram_ctrl_bijection.335378628 |
|
|
Apr 04 01:53:19 PM PDT 24 |
Apr 04 02:20:01 PM PDT 24 |
48909422916 ps |
| T379 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.694958713 |
|
|
Apr 04 01:43:41 PM PDT 24 |
Apr 04 01:43:44 PM PDT 24 |
347688869 ps |
| T380 |
/workspace/coverage/default/25.sram_ctrl_bijection.3363996023 |
|
|
Apr 04 01:46:52 PM PDT 24 |
Apr 04 02:13:59 PM PDT 24 |
470965807903 ps |
| T381 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.215676755 |
|
|
Apr 04 01:58:14 PM PDT 24 |
Apr 04 01:59:18 PM PDT 24 |
1626977405 ps |
| T382 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3464808374 |
|
|
Apr 04 01:38:32 PM PDT 24 |
Apr 04 01:41:12 PM PDT 24 |
10462026180 ps |
| T383 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.1569377675 |
|
|
Apr 04 01:45:46 PM PDT 24 |
Apr 04 01:47:30 PM PDT 24 |
27019664719 ps |
| T384 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.1195744067 |
|
|
Apr 04 01:46:15 PM PDT 24 |
Apr 04 01:50:47 PM PDT 24 |
21199099689 ps |
| T385 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.446584816 |
|
|
Apr 04 01:51:57 PM PDT 24 |
Apr 04 01:52:00 PM PDT 24 |
687272063 ps |
| T386 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.492893260 |
|
|
Apr 04 01:36:29 PM PDT 24 |
Apr 04 01:37:20 PM PDT 24 |
791129687 ps |
| T387 |
/workspace/coverage/default/20.sram_ctrl_partial_access.1338725993 |
|
|
Apr 04 01:43:19 PM PDT 24 |
Apr 04 01:44:25 PM PDT 24 |
1937242778 ps |
| T388 |
/workspace/coverage/default/4.sram_ctrl_stress_all.4147834563 |
|
|
Apr 04 01:35:54 PM PDT 24 |
Apr 04 01:55:45 PM PDT 24 |
108235730046 ps |
| T389 |
/workspace/coverage/default/35.sram_ctrl_smoke.1046645569 |
|
|
Apr 04 01:54:37 PM PDT 24 |
Apr 04 01:55:59 PM PDT 24 |
5096252291 ps |
| T390 |
/workspace/coverage/default/10.sram_ctrl_partial_access.3809978005 |
|
|
Apr 04 01:37:32 PM PDT 24 |
Apr 04 01:38:32 PM PDT 24 |
2553988584 ps |
| T391 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.281372155 |
|
|
Apr 04 01:38:36 PM PDT 24 |
Apr 04 01:43:02 PM PDT 24 |
13706727194 ps |
| T392 |
/workspace/coverage/default/5.sram_ctrl_executable.1280107719 |
|
|
Apr 04 01:35:56 PM PDT 24 |
Apr 04 01:46:51 PM PDT 24 |
47589289240 ps |
| T393 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.4050154357 |
|
|
Apr 04 01:37:16 PM PDT 24 |
Apr 04 01:51:26 PM PDT 24 |
52565171064 ps |
| T394 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.2520462114 |
|
|
Apr 04 01:56:17 PM PDT 24 |
Apr 04 01:59:12 PM PDT 24 |
13398313317 ps |
| T395 |
/workspace/coverage/default/24.sram_ctrl_partial_access.2965587180 |
|
|
Apr 04 01:46:14 PM PDT 24 |
Apr 04 01:46:32 PM PDT 24 |
2183024028 ps |
| T396 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.678521742 |
|
|
Apr 04 01:58:52 PM PDT 24 |
Apr 04 02:00:58 PM PDT 24 |
5930427652 ps |
| T397 |
/workspace/coverage/default/8.sram_ctrl_alert_test.3053551467 |
|
|
Apr 04 01:37:13 PM PDT 24 |
Apr 04 01:37:14 PM PDT 24 |
95893804 ps |
| T398 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1733512240 |
|
|
Apr 04 01:35:17 PM PDT 24 |
Apr 04 01:35:55 PM PDT 24 |
20202075426 ps |
| T399 |
/workspace/coverage/default/27.sram_ctrl_executable.725714357 |
|
|
Apr 04 01:49:16 PM PDT 24 |
Apr 04 02:01:37 PM PDT 24 |
14426675558 ps |
| T400 |
/workspace/coverage/default/27.sram_ctrl_partial_access.3836046223 |
|
|
Apr 04 01:49:03 PM PDT 24 |
Apr 04 01:49:23 PM PDT 24 |
3060552419 ps |
| T401 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.278155666 |
|
|
Apr 04 01:38:03 PM PDT 24 |
Apr 04 01:39:16 PM PDT 24 |
3868332017 ps |
| T402 |
/workspace/coverage/default/25.sram_ctrl_executable.3179733073 |
|
|
Apr 04 01:47:19 PM PDT 24 |
Apr 04 02:14:23 PM PDT 24 |
27114192337 ps |
| T403 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.590822104 |
|
|
Apr 04 01:59:28 PM PDT 24 |
Apr 04 02:00:43 PM PDT 24 |
3760940785 ps |
| T404 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.430570297 |
|
|
Apr 04 01:41:51 PM PDT 24 |
Apr 04 01:44:21 PM PDT 24 |
10324082915 ps |
| T405 |
/workspace/coverage/default/44.sram_ctrl_bijection.456102512 |
|
|
Apr 04 01:58:59 PM PDT 24 |
Apr 04 02:08:06 PM PDT 24 |
258243917580 ps |
| T406 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.2382826939 |
|
|
Apr 04 01:40:45 PM PDT 24 |
Apr 04 01:43:06 PM PDT 24 |
20752893635 ps |
| T407 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2460887358 |
|
|
Apr 04 01:59:58 PM PDT 24 |
Apr 04 02:10:29 PM PDT 24 |
11279491296 ps |
| T408 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.800888294 |
|
|
Apr 04 01:35:36 PM PDT 24 |
Apr 04 01:35:40 PM PDT 24 |
434474567 ps |
| T409 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2112373022 |
|
|
Apr 04 01:38:35 PM PDT 24 |
Apr 04 01:40:20 PM PDT 24 |
7101753571 ps |
| T410 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.31182127 |
|
|
Apr 04 01:48:09 PM PDT 24 |
Apr 04 01:48:39 PM PDT 24 |
23114077733 ps |
| T411 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.1521092411 |
|
|
Apr 04 01:55:06 PM PDT 24 |
Apr 04 01:56:51 PM PDT 24 |
2380887534 ps |
| T412 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.1281851079 |
|
|
Apr 04 01:39:04 PM PDT 24 |
Apr 04 01:46:50 PM PDT 24 |
19566829940 ps |
| T413 |
/workspace/coverage/default/29.sram_ctrl_alert_test.2909356471 |
|
|
Apr 04 01:51:17 PM PDT 24 |
Apr 04 01:51:18 PM PDT 24 |
11823111 ps |
| T414 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.953203071 |
|
|
Apr 04 01:58:35 PM PDT 24 |
Apr 04 02:01:06 PM PDT 24 |
20338605060 ps |
| T415 |
/workspace/coverage/default/48.sram_ctrl_regwen.2722594111 |
|
|
Apr 04 02:00:31 PM PDT 24 |
Apr 04 02:13:19 PM PDT 24 |
38038283594 ps |
| T416 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.4114923807 |
|
|
Apr 04 01:56:41 PM PDT 24 |
Apr 04 01:57:45 PM PDT 24 |
30684876674 ps |
| T417 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1801892296 |
|
|
Apr 04 02:00:42 PM PDT 24 |
Apr 04 02:08:11 PM PDT 24 |
24219602394 ps |
| T418 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.2579051294 |
|
|
Apr 04 01:57:17 PM PDT 24 |
Apr 04 01:57:21 PM PDT 24 |
1412276335 ps |
| T419 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.3711783570 |
|
|
Apr 04 01:53:45 PM PDT 24 |
Apr 04 01:53:48 PM PDT 24 |
1254108567 ps |
| T420 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3570583883 |
|
|
Apr 04 01:35:06 PM PDT 24 |
Apr 04 01:52:54 PM PDT 24 |
60369733360 ps |
| T421 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.116878397 |
|
|
Apr 04 01:55:05 PM PDT 24 |
Apr 04 01:55:08 PM PDT 24 |
1351050074 ps |
| T422 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.4227329739 |
|
|
Apr 04 01:49:24 PM PDT 24 |
Apr 04 01:49:27 PM PDT 24 |
680914270 ps |
| T423 |
/workspace/coverage/default/28.sram_ctrl_partial_access.1964625318 |
|
|
Apr 04 01:50:14 PM PDT 24 |
Apr 04 01:50:36 PM PDT 24 |
5508920005 ps |
| T424 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.3106090325 |
|
|
Apr 04 01:43:39 PM PDT 24 |
Apr 04 01:47:33 PM PDT 24 |
26261783186 ps |
| T425 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1129499590 |
|
|
Apr 04 01:53:28 PM PDT 24 |
Apr 04 01:54:29 PM PDT 24 |
4626995732 ps |
| T426 |
/workspace/coverage/default/9.sram_ctrl_alert_test.2698557537 |
|
|
Apr 04 01:37:24 PM PDT 24 |
Apr 04 01:37:25 PM PDT 24 |
10347572 ps |
| T427 |
/workspace/coverage/default/11.sram_ctrl_bijection.2330876666 |
|
|
Apr 04 01:38:03 PM PDT 24 |
Apr 04 02:10:26 PM PDT 24 |
34759272748 ps |
| T428 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.4064834451 |
|
|
Apr 04 01:41:02 PM PDT 24 |
Apr 04 01:41:12 PM PDT 24 |
3110182767 ps |
| T429 |
/workspace/coverage/default/38.sram_ctrl_partial_access.1273893479 |
|
|
Apr 04 01:56:41 PM PDT 24 |
Apr 04 01:57:31 PM PDT 24 |
9915036264 ps |
| T430 |
/workspace/coverage/default/23.sram_ctrl_regwen.726115142 |
|
|
Apr 04 01:45:55 PM PDT 24 |
Apr 04 02:00:12 PM PDT 24 |
17291675975 ps |
| T431 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.96874068 |
|
|
Apr 04 01:36:15 PM PDT 24 |
Apr 04 01:37:06 PM PDT 24 |
9310503211 ps |
| T432 |
/workspace/coverage/default/10.sram_ctrl_regwen.2819169311 |
|
|
Apr 04 01:37:45 PM PDT 24 |
Apr 04 01:44:36 PM PDT 24 |
2888631201 ps |
| T433 |
/workspace/coverage/default/7.sram_ctrl_executable.3048089570 |
|
|
Apr 04 01:36:35 PM PDT 24 |
Apr 04 01:52:21 PM PDT 24 |
35375539177 ps |
| T434 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.2678747558 |
|
|
Apr 04 01:57:04 PM PDT 24 |
Apr 04 02:12:35 PM PDT 24 |
37532196707 ps |
| T435 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.2823506125 |
|
|
Apr 04 01:35:44 PM PDT 24 |
Apr 04 01:37:48 PM PDT 24 |
8920211273 ps |
| T436 |
/workspace/coverage/default/34.sram_ctrl_stress_pipeline.3618190022 |
|
|
Apr 04 01:53:54 PM PDT 24 |
Apr 04 01:58:55 PM PDT 24 |
36885312648 ps |
| T437 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3666881173 |
|
|
Apr 04 01:49:15 PM PDT 24 |
Apr 04 01:50:04 PM PDT 24 |
3767595428 ps |
| T438 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.1884479498 |
|
|
Apr 04 01:53:03 PM PDT 24 |
Apr 04 01:53:32 PM PDT 24 |
18431541283 ps |
| T439 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1552141324 |
|
|
Apr 04 01:35:10 PM PDT 24 |
Apr 04 01:46:07 PM PDT 24 |
81102938251 ps |
| T440 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.491771690 |
|
|
Apr 04 01:53:02 PM PDT 24 |
Apr 04 01:53:30 PM PDT 24 |
748737616 ps |
| T441 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.2232867740 |
|
|
Apr 04 01:40:03 PM PDT 24 |
Apr 04 01:42:08 PM PDT 24 |
7891840140 ps |
| T442 |
/workspace/coverage/default/6.sram_ctrl_executable.3048742721 |
|
|
Apr 04 01:36:19 PM PDT 24 |
Apr 04 01:49:46 PM PDT 24 |
70954784173 ps |
| T443 |
/workspace/coverage/default/44.sram_ctrl_stress_all.1769518515 |
|
|
Apr 04 01:59:17 PM PDT 24 |
Apr 04 02:25:11 PM PDT 24 |
286468665857 ps |
| T444 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.3163932357 |
|
|
Apr 04 01:49:14 PM PDT 24 |
Apr 04 02:02:17 PM PDT 24 |
9866677710 ps |
| T121 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.895613352 |
|
|
Apr 04 01:59:17 PM PDT 24 |
Apr 04 01:59:32 PM PDT 24 |
504283190 ps |
| T122 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2034797670 |
|
|
Apr 04 01:36:07 PM PDT 24 |
Apr 04 01:36:24 PM PDT 24 |
2132795323 ps |
| T445 |
/workspace/coverage/default/2.sram_ctrl_partial_access.2352816303 |
|
|
Apr 04 01:35:32 PM PDT 24 |
Apr 04 01:36:33 PM PDT 24 |
504732374 ps |
| T446 |
/workspace/coverage/default/45.sram_ctrl_smoke.942834600 |
|
|
Apr 04 01:59:17 PM PDT 24 |
Apr 04 02:00:06 PM PDT 24 |
4709574567 ps |
| T447 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1089501578 |
|
|
Apr 04 01:59:08 PM PDT 24 |
Apr 04 02:00:06 PM PDT 24 |
9741069863 ps |
| T448 |
/workspace/coverage/default/8.sram_ctrl_regwen.4027673813 |
|
|
Apr 04 01:36:44 PM PDT 24 |
Apr 04 01:52:27 PM PDT 24 |
74618419279 ps |
| T449 |
/workspace/coverage/default/14.sram_ctrl_partial_access.563844665 |
|
|
Apr 04 01:39:52 PM PDT 24 |
Apr 04 01:40:13 PM PDT 24 |
1346600412 ps |
| T450 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.359121543 |
|
|
Apr 04 02:00:31 PM PDT 24 |
Apr 04 02:00:35 PM PDT 24 |
724919314 ps |
| T451 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.1164141284 |
|
|
Apr 04 01:48:19 PM PDT 24 |
Apr 04 01:52:22 PM PDT 24 |
4111330375 ps |
| T148 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.1415399918 |
|
|
Apr 04 01:53:28 PM PDT 24 |
Apr 04 01:58:29 PM PDT 24 |
14741969655 ps |
| T452 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.602014464 |
|
|
Apr 04 01:38:53 PM PDT 24 |
Apr 04 01:40:58 PM PDT 24 |
7895047908 ps |
| T453 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.2074898102 |
|
|
Apr 04 01:35:26 PM PDT 24 |
Apr 04 01:36:06 PM PDT 24 |
6127808665 ps |
| T454 |
/workspace/coverage/default/30.sram_ctrl_stress_all.1141406934 |
|
|
Apr 04 01:51:58 PM PDT 24 |
Apr 04 02:58:51 PM PDT 24 |
55091278751 ps |
| T455 |
/workspace/coverage/default/13.sram_ctrl_stress_all.3201916844 |
|
|
Apr 04 01:39:23 PM PDT 24 |
Apr 04 02:19:24 PM PDT 24 |
56457829748 ps |
| T456 |
/workspace/coverage/default/49.sram_ctrl_regwen.3908521336 |
|
|
Apr 04 02:00:45 PM PDT 24 |
Apr 04 02:17:58 PM PDT 24 |
7444313874 ps |
| T457 |
/workspace/coverage/default/17.sram_ctrl_bijection.1916497590 |
|
|
Apr 04 01:41:25 PM PDT 24 |
Apr 04 01:58:47 PM PDT 24 |
59245782812 ps |
| T458 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.1204961253 |
|
|
Apr 04 01:58:23 PM PDT 24 |
Apr 04 01:58:53 PM PDT 24 |
10213924720 ps |
| T459 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.2953576458 |
|
|
Apr 04 01:39:21 PM PDT 24 |
Apr 04 01:40:27 PM PDT 24 |
11507294966 ps |
| T460 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.2223436548 |
|
|
Apr 04 01:44:24 PM PDT 24 |
Apr 04 01:53:38 PM PDT 24 |
35034340503 ps |
| T461 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.4090184205 |
|
|
Apr 04 01:59:28 PM PDT 24 |
Apr 04 02:02:07 PM PDT 24 |
49156831459 ps |
| T462 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.1023896326 |
|
|
Apr 04 01:53:36 PM PDT 24 |
Apr 04 01:55:29 PM PDT 24 |
2324130605 ps |
| T463 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.531574678 |
|
|
Apr 04 01:37:12 PM PDT 24 |
Apr 04 01:38:46 PM PDT 24 |
64473877856 ps |
| T464 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.3420434444 |
|
|
Apr 04 01:44:12 PM PDT 24 |
Apr 04 01:44:45 PM PDT 24 |
7640908085 ps |
| T465 |
/workspace/coverage/default/19.sram_ctrl_partial_access.3021448602 |
|
|
Apr 04 01:42:34 PM PDT 24 |
Apr 04 01:42:51 PM PDT 24 |
4218948802 ps |
| T466 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.955688733 |
|
|
Apr 04 01:54:35 PM PDT 24 |
Apr 04 02:10:51 PM PDT 24 |
23679109400 ps |
| T467 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.418864056 |
|
|
Apr 04 01:36:24 PM PDT 24 |
Apr 04 01:43:26 PM PDT 24 |
19097309446 ps |
| T468 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.211696145 |
|
|
Apr 04 01:35:34 PM PDT 24 |
Apr 04 01:39:23 PM PDT 24 |
8885837261 ps |
| T469 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2628167040 |
|
|
Apr 04 01:35:57 PM PDT 24 |
Apr 04 01:44:22 PM PDT 24 |
26077356434 ps |
| T470 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2679565772 |
|
|
Apr 04 01:36:04 PM PDT 24 |
Apr 04 01:51:20 PM PDT 24 |
28809217987 ps |
| T471 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.594887884 |
|
|
Apr 04 01:37:25 PM PDT 24 |
Apr 04 01:39:28 PM PDT 24 |
10381780283 ps |
| T472 |
/workspace/coverage/default/28.sram_ctrl_smoke.1745817749 |
|
|
Apr 04 01:50:01 PM PDT 24 |
Apr 04 01:50:15 PM PDT 24 |
710395754 ps |
| T473 |
/workspace/coverage/default/19.sram_ctrl_regwen.2138256711 |
|
|
Apr 04 01:42:54 PM PDT 24 |
Apr 04 01:56:46 PM PDT 24 |
3341909499 ps |
| T474 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3816539900 |
|
|
Apr 04 01:38:12 PM PDT 24 |
Apr 04 01:39:05 PM PDT 24 |
52244668576 ps |
| T475 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.971653564 |
|
|
Apr 04 01:52:14 PM PDT 24 |
Apr 04 01:55:59 PM PDT 24 |
16237566860 ps |
| T476 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.3588288013 |
|
|
Apr 04 01:35:56 PM PDT 24 |
Apr 04 01:36:54 PM PDT 24 |
999052721 ps |
| T477 |
/workspace/coverage/default/21.sram_ctrl_executable.2123666860 |
|
|
Apr 04 01:44:22 PM PDT 24 |
Apr 04 01:51:46 PM PDT 24 |
10742239773 ps |
| T478 |
/workspace/coverage/default/44.sram_ctrl_partial_access.501129822 |
|
|
Apr 04 01:59:00 PM PDT 24 |
Apr 04 01:59:16 PM PDT 24 |
1081174947 ps |
| T479 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.742545764 |
|
|
Apr 04 01:51:20 PM PDT 24 |
Apr 04 01:51:32 PM PDT 24 |
462041624 ps |
| T480 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.3451573270 |
|
|
Apr 04 01:57:56 PM PDT 24 |
Apr 04 02:03:52 PM PDT 24 |
15712400106 ps |
| T481 |
/workspace/coverage/default/6.sram_ctrl_stress_all.3476995039 |
|
|
Apr 04 01:36:24 PM PDT 24 |
Apr 04 02:48:45 PM PDT 24 |
225113392852 ps |
| T482 |
/workspace/coverage/default/43.sram_ctrl_alert_test.2908884178 |
|
|
Apr 04 01:58:59 PM PDT 24 |
Apr 04 01:58:59 PM PDT 24 |
13141147 ps |
| T483 |
/workspace/coverage/default/35.sram_ctrl_regwen.3781165642 |
|
|
Apr 04 01:54:54 PM PDT 24 |
Apr 04 02:12:03 PM PDT 24 |
28861083878 ps |
| T484 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.1800966609 |
|
|
Apr 04 01:42:24 PM PDT 24 |
Apr 04 01:46:31 PM PDT 24 |
78813562665 ps |
| T485 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.1515402471 |
|
|
Apr 04 01:58:10 PM PDT 24 |
Apr 04 01:59:15 PM PDT 24 |
10626404187 ps |
| T486 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.2999087905 |
|
|
Apr 04 01:55:49 PM PDT 24 |
Apr 04 01:57:46 PM PDT 24 |
6255983620 ps |
| T487 |
/workspace/coverage/default/39.sram_ctrl_stress_all.3341601980 |
|
|
Apr 04 01:57:27 PM PDT 24 |
Apr 04 04:28:07 PM PDT 24 |
1444211006124 ps |
| T488 |
/workspace/coverage/default/5.sram_ctrl_regwen.401141560 |
|
|
Apr 04 01:35:59 PM PDT 24 |
Apr 04 01:53:47 PM PDT 24 |
3928280609 ps |
| T489 |
/workspace/coverage/default/42.sram_ctrl_stress_all.3131080550 |
|
|
Apr 04 01:58:34 PM PDT 24 |
Apr 04 02:35:54 PM PDT 24 |
75881351849 ps |
| T490 |
/workspace/coverage/default/40.sram_ctrl_stress_all.195892821 |
|
|
Apr 04 01:57:48 PM PDT 24 |
Apr 04 03:16:11 PM PDT 24 |
750189373136 ps |
| T491 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.3162569394 |
|
|
Apr 04 01:55:37 PM PDT 24 |
Apr 04 01:56:32 PM PDT 24 |
1587231080 ps |
| T492 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.905642887 |
|
|
Apr 04 01:58:52 PM PDT 24 |
Apr 04 02:00:06 PM PDT 24 |
5942007349 ps |
| T493 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3768514080 |
|
|
Apr 04 01:36:34 PM PDT 24 |
Apr 04 01:36:37 PM PDT 24 |
1202317309 ps |
| T494 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.4136909986 |
|
|
Apr 04 01:50:57 PM PDT 24 |
Apr 04 01:52:14 PM PDT 24 |
1636598466 ps |
| T495 |
/workspace/coverage/default/15.sram_ctrl_regwen.4064714223 |
|
|
Apr 04 01:40:33 PM PDT 24 |
Apr 04 01:57:17 PM PDT 24 |
18504453228 ps |
| T496 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.554744555 |
|
|
Apr 04 01:45:05 PM PDT 24 |
Apr 04 01:45:44 PM PDT 24 |
4388306496 ps |
| T497 |
/workspace/coverage/default/26.sram_ctrl_partial_access.1995787014 |
|
|
Apr 04 01:47:56 PM PDT 24 |
Apr 04 01:48:03 PM PDT 24 |
736946643 ps |
| T498 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2750977166 |
|
|
Apr 04 01:40:23 PM PDT 24 |
Apr 04 01:41:19 PM PDT 24 |
3008832105 ps |
| T499 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.2541119285 |
|
|
Apr 04 01:50:48 PM PDT 24 |
Apr 04 01:59:53 PM PDT 24 |
37109977526 ps |
| T500 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.2326548222 |
|
|
Apr 04 01:51:56 PM PDT 24 |
Apr 04 01:53:11 PM PDT 24 |
10636003118 ps |
| T501 |
/workspace/coverage/default/46.sram_ctrl_stress_all.726251567 |
|
|
Apr 04 01:59:50 PM PDT 24 |
Apr 04 02:41:08 PM PDT 24 |
57909175611 ps |
| T502 |
/workspace/coverage/default/1.sram_ctrl_executable.2769220167 |
|
|
Apr 04 01:35:20 PM PDT 24 |
Apr 04 01:40:59 PM PDT 24 |
4283582566 ps |
| T503 |
/workspace/coverage/default/21.sram_ctrl_smoke.1406973791 |
|
|
Apr 04 01:43:51 PM PDT 24 |
Apr 04 01:44:00 PM PDT 24 |
826446177 ps |
| T504 |
/workspace/coverage/default/19.sram_ctrl_executable.4041120018 |
|
|
Apr 04 01:42:55 PM PDT 24 |
Apr 04 01:52:08 PM PDT 24 |
14812977942 ps |
| T505 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.214808774 |
|
|
Apr 04 01:40:15 PM PDT 24 |
Apr 04 01:49:17 PM PDT 24 |
18706204640 ps |
| T506 |
/workspace/coverage/default/1.sram_ctrl_partial_access.757919584 |
|
|
Apr 04 01:35:16 PM PDT 24 |
Apr 04 01:35:43 PM PDT 24 |
6989075879 ps |
| T507 |
/workspace/coverage/default/0.sram_ctrl_executable.1165185334 |
|
|
Apr 04 01:35:16 PM PDT 24 |
Apr 04 01:47:34 PM PDT 24 |
34544087610 ps |
| T508 |
/workspace/coverage/default/2.sram_ctrl_bijection.3359817517 |
|
|
Apr 04 01:35:27 PM PDT 24 |
Apr 04 02:13:46 PM PDT 24 |
206768919491 ps |
| T509 |
/workspace/coverage/default/4.sram_ctrl_ram_cfg.938488435 |
|
|
Apr 04 01:35:55 PM PDT 24 |
Apr 04 01:35:58 PM PDT 24 |
365869481 ps |
| T510 |
/workspace/coverage/default/36.sram_ctrl_stress_all.1897801450 |
|
|
Apr 04 01:55:49 PM PDT 24 |
Apr 04 03:14:20 PM PDT 24 |
342314470271 ps |
| T511 |
/workspace/coverage/default/39.sram_ctrl_smoke.2683261797 |
|
|
Apr 04 01:56:54 PM PDT 24 |
Apr 04 01:57:43 PM PDT 24 |
1081650031 ps |
| T512 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3952262657 |
|
|
Apr 04 01:38:14 PM PDT 24 |
Apr 04 01:38:20 PM PDT 24 |
1373353193 ps |
| T513 |
/workspace/coverage/default/40.sram_ctrl_executable.448623797 |
|
|
Apr 04 01:57:41 PM PDT 24 |
Apr 04 02:02:39 PM PDT 24 |
31248476265 ps |
| T514 |
/workspace/coverage/default/20.sram_ctrl_stress_all.2886842044 |
|
|
Apr 04 01:43:41 PM PDT 24 |
Apr 04 04:02:36 PM PDT 24 |
941212723099 ps |
| T515 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.308840580 |
|
|
Apr 04 01:44:12 PM PDT 24 |
Apr 04 01:44:24 PM PDT 24 |
697470476 ps |
| T516 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.1611169827 |
|
|
Apr 04 01:58:02 PM PDT 24 |
Apr 04 02:05:50 PM PDT 24 |
49579951954 ps |
| T517 |
/workspace/coverage/default/26.sram_ctrl_access_during_key_req.1477921065 |
|
|
Apr 04 01:48:19 PM PDT 24 |
Apr 04 01:57:15 PM PDT 24 |
30007286490 ps |
| T518 |
/workspace/coverage/default/1.sram_ctrl_bijection.2658810352 |
|
|
Apr 04 01:35:20 PM PDT 24 |
Apr 04 01:52:52 PM PDT 24 |
113485311024 ps |
| T519 |
/workspace/coverage/default/4.sram_ctrl_executable.2687109033 |
|
|
Apr 04 01:35:54 PM PDT 24 |
Apr 04 01:54:48 PM PDT 24 |
40697214749 ps |
| T520 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.3317914944 |
|
|
Apr 04 02:00:44 PM PDT 24 |
Apr 04 02:02:02 PM PDT 24 |
779822010 ps |
| T521 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2941624402 |
|
|
Apr 04 01:59:49 PM PDT 24 |
Apr 04 02:02:22 PM PDT 24 |
2526878528 ps |
| T522 |
/workspace/coverage/default/19.sram_ctrl_smoke.1236278873 |
|
|
Apr 04 01:42:34 PM PDT 24 |
Apr 04 01:43:54 PM PDT 24 |
3840575313 ps |
| T523 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.244937845 |
|
|
Apr 04 01:40:00 PM PDT 24 |
Apr 04 01:59:10 PM PDT 24 |
38080327615 ps |
| T524 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.3856447598 |
|
|
Apr 04 01:41:24 PM PDT 24 |
Apr 04 01:47:41 PM PDT 24 |
6873090318 ps |
| T525 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.730736197 |
|
|
Apr 04 01:36:33 PM PDT 24 |
Apr 04 01:37:11 PM PDT 24 |
1696155348 ps |
| T526 |
/workspace/coverage/default/31.sram_ctrl_partial_access.3544279406 |
|
|
Apr 04 01:52:12 PM PDT 24 |
Apr 04 01:52:32 PM PDT 24 |
874594686 ps |
| T527 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.1611061969 |
|
|
Apr 04 01:47:10 PM PDT 24 |
Apr 04 01:48:13 PM PDT 24 |
3001643318 ps |
| T528 |
/workspace/coverage/default/33.sram_ctrl_executable.3879816980 |
|
|
Apr 04 01:53:36 PM PDT 24 |
Apr 04 02:02:54 PM PDT 24 |
13908214955 ps |
| T529 |
/workspace/coverage/default/47.sram_ctrl_regwen.128741197 |
|
|
Apr 04 02:00:05 PM PDT 24 |
Apr 04 02:08:32 PM PDT 24 |
23425479538 ps |
| T530 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.2662563280 |
|
|
Apr 04 01:35:37 PM PDT 24 |
Apr 04 01:38:30 PM PDT 24 |
14459845197 ps |
| T531 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.2699301954 |
|
|
Apr 04 01:47:43 PM PDT 24 |
Apr 04 01:51:54 PM PDT 24 |
107849815527 ps |
| T532 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2516510166 |
|
|
Apr 04 01:43:59 PM PDT 24 |
Apr 04 01:50:33 PM PDT 24 |
35066057608 ps |
| T533 |
/workspace/coverage/default/34.sram_ctrl_partial_access.2423290167 |
|
|
Apr 04 01:54:10 PM PDT 24 |
Apr 04 01:54:23 PM PDT 24 |
4465863779 ps |
| T534 |
/workspace/coverage/default/30.sram_ctrl_alert_test.3228752385 |
|
|
Apr 04 01:51:58 PM PDT 24 |
Apr 04 01:51:58 PM PDT 24 |
15212650 ps |
| T535 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.3131711346 |
|
|
Apr 04 01:35:38 PM PDT 24 |
Apr 04 01:51:23 PM PDT 24 |
54709548051 ps |
| T536 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2238609509 |
|
|
Apr 04 01:35:21 PM PDT 24 |
Apr 04 01:35:56 PM PDT 24 |
7617616932 ps |
| T537 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.722167830 |
|
|
Apr 04 01:51:08 PM PDT 24 |
Apr 04 01:55:10 PM PDT 24 |
4195192477 ps |
| T538 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.3080451298 |
|
|
Apr 04 01:57:42 PM PDT 24 |
Apr 04 01:57:52 PM PDT 24 |
2887904327 ps |
| T539 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.411432138 |
|
|
Apr 04 02:00:44 PM PDT 24 |
Apr 04 02:05:18 PM PDT 24 |
22799705292 ps |
| T540 |
/workspace/coverage/default/11.sram_ctrl_alert_test.3254354072 |
|
|
Apr 04 01:38:23 PM PDT 24 |
Apr 04 01:38:24 PM PDT 24 |
17705936 ps |
| T541 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.2653107116 |
|
|
Apr 04 01:56:18 PM PDT 24 |
Apr 04 02:03:53 PM PDT 24 |
51402189128 ps |
| T542 |
/workspace/coverage/default/6.sram_ctrl_alert_test.1637591149 |
|
|
Apr 04 01:36:25 PM PDT 24 |
Apr 04 01:36:25 PM PDT 24 |
23648486 ps |
| T543 |
/workspace/coverage/default/4.sram_ctrl_regwen.3752538271 |
|
|
Apr 04 01:35:55 PM PDT 24 |
Apr 04 01:45:15 PM PDT 24 |
3497248176 ps |
| T544 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.3696857126 |
|
|
Apr 04 01:48:06 PM PDT 24 |
Apr 04 01:48:23 PM PDT 24 |
2787581574 ps |