Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	15802659	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

158162027

1

T1

3565

T2

98303

T3

3199

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	85703885	1			T1	898		T2	32768		T3	31468
values[0x0]	42559654	1			T1	1340		T2	32640		T3	9996
values[0x1]	45701147	1			T1	1327		T2	32895		T3	21277

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	8033308	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

165931378

1

T1

3565

T2

98303

T3

28484

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	593052	1			T2	366		T3	211		T4	77
valid_sources[0x01]	516541	1			T2	395		T3	240		T4	73
valid_sources[0x02]	530264	1			T2	377		T3	255		T4	87
valid_sources[0x03]	562914	1			T2	389		T3	231		T4	87
valid_sources[0x04]	547307	1			T1	261		T2	364		T3	249
valid_sources[0x05]	525038	1			T2	354		T3	229		T4	65
valid_sources[0x06]	511726	1			T2	364		T3	259		T4	89
valid_sources[0x07]	544587	1			T2	351		T3	273		T4	81
valid_sources[0x08]	510748	1			T2	386		T3	215		T4	79
valid_sources[0x09]	2231847	1			T2	332		T3	251		T4	90
valid_sources[0x0a]	552687	1			T2	361		T3	264		T4	71
valid_sources[0x0b]	565185	1			T1	550		T2	399		T3	226
valid_sources[0x0c]	559649	1			T2	413		T3	244		T4	73
valid_sources[0x0d]	579288	1			T2	395		T3	279		T4	62
valid_sources[0x0e]	526152	1			T2	445		T3	279		T4	90
valid_sources[0x0f]	2164485	1			T2	398		T3	272		T4	87
valid_sources[0x10]	525654	1			T1	199		T2	352		T3	230
valid_sources[0x11]	532614	1			T2	388		T3	209		T4	95
valid_sources[0x12]	514878	1			T2	398		T3	249		T4	103
valid_sources[0x13]	535692	1			T2	353		T3	250		T4	86
valid_sources[0x14]	551192	1			T2	373		T3	255		T4	90
valid_sources[0x15]	1327749	1			T2	372		T3	266		T4	70
valid_sources[0x16]	513343	1			T2	376		T3	233		T4	90
valid_sources[0x17]	516690	1			T2	383		T3	238		T4	74
valid_sources[0x18]	572161	1			T2	376		T3	264		T4	60
valid_sources[0x19]	616789	1			T2	407		T3	234		T4	88
valid_sources[0x1a]	514122	1			T2	414		T3	267		T4	107
valid_sources[0x1b]	575308	1			T2	343		T3	256		T4	80
valid_sources[0x1c]	579080	1			T2	422		T3	232		T4	75
valid_sources[0x1d]	568456	1			T2	372		T3	256		T4	90
valid_sources[0x1e]	2022075	1			T2	385		T3	261		T4	78
valid_sources[0x1f]	518062	1			T2	434		T3	286		T4	79
valid_sources[0x20]	532543	1			T2	355		T3	242		T4	83
valid_sources[0x21]	540306	1			T2	342		T3	254		T4	75
valid_sources[0x22]	564732	1			T2	368		T3	222		T4	76
valid_sources[0x23]	515689	1			T2	414		T3	215		T4	72
valid_sources[0x24]	543263	1			T2	376		T3	259		T4	80
valid_sources[0x25]	1037019	1			T2	394		T3	267		T4	73
valid_sources[0x26]	526775	1			T2	396		T3	234		T4	79
valid_sources[0x27]	524006	1			T2	429		T3	221		T4	73
valid_sources[0x28]	525165	1			T2	419		T3	248		T4	81
valid_sources[0x29]	626131	1			T2	408		T3	221		T4	97
valid_sources[0x2a]	571769	1			T2	334		T3	252		T4	89
valid_sources[0x2b]	536775	1			T2	389		T3	224		T4	76
valid_sources[0x2c]	544473	1			T2	399		T3	193		T4	74
valid_sources[0x2d]	1148172	1			T2	388		T3	251		T4	104
valid_sources[0x2e]	1880918	1			T2	410		T3	235		T4	74
valid_sources[0x2f]	540891	1			T2	375		T3	264		T4	65
valid_sources[0x30]	576098	1			T2	370		T3	228		T4	85
valid_sources[0x31]	589414	1			T2	386		T3	238		T4	74
valid_sources[0x32]	531056	1			T2	369		T3	237		T4	83
valid_sources[0x33]	530655	1			T2	371		T3	251		T4	84
valid_sources[0x34]	522095	1			T2	367		T3	225		T4	63
valid_sources[0x35]	599384	1			T2	408		T3	244		T4	108
valid_sources[0x36]	585652	1			T2	412		T3	268		T4	101
valid_sources[0x37]	557902	1			T2	388		T3	250		T4	82
valid_sources[0x38]	519202	1			T2	363		T3	229		T4	68
valid_sources[0x39]	527804	1			T2	396		T3	257		T4	70
valid_sources[0x3a]	530113	1			T2	383		T3	231		T4	62
valid_sources[0x3b]	592022	1			T2	390		T3	248		T4	80
valid_sources[0x3c]	525650	1			T2	382		T3	252		T4	80
valid_sources[0x3d]	533891	1			T2	378		T3	264		T4	81
valid_sources[0x3e]	553091	1			T2	370		T3	257		T4	64
valid_sources[0x3f]	528061	1			T2	372		T3	231		T4	56
valid_sources[0x40]	612261	1			T2	341		T3	274		T4	82
valid_sources[0x41]	545841	1			T2	412		T3	256		T4	91
valid_sources[0x42]	729372	1			T1	545		T2	391		T3	267
valid_sources[0x43]	583280	1			T2	378		T3	304		T4	69
valid_sources[0x44]	1702178	1			T2	368		T3	264		T4	71
valid_sources[0x45]	1622340	1			T2	402		T3	231		T4	96
valid_sources[0x46]	546304	1			T2	395		T3	226		T4	90
valid_sources[0x47]	544999	1			T2	421		T3	240		T4	76
valid_sources[0x48]	520963	1			T2	383		T3	240		T4	93
valid_sources[0x49]	510997	1			T2	356		T3	265		T4	84
valid_sources[0x4a]	549567	1			T2	376		T3	274		T4	86
valid_sources[0x4b]	543631	1			T2	383		T3	224		T4	99
valid_sources[0x4c]	570708	1			T2	373		T3	236		T4	91
valid_sources[0x4d]	543450	1			T2	397		T3	255		T4	66
valid_sources[0x4e]	514869	1			T1	289		T2	347		T3	255
valid_sources[0x4f]	859279	1			T2	387		T3	262		T4	72
valid_sources[0x50]	520849	1			T2	385		T3	277		T4	81
valid_sources[0x51]	514059	1			T2	358		T3	255		T4	115
valid_sources[0x52]	702753	1			T2	377		T3	235		T4	88
valid_sources[0x53]	583884	1			T2	376		T3	250		T4	65
valid_sources[0x54]	534681	1			T2	372		T3	257		T4	85
valid_sources[0x55]	521808	1			T2	368		T3	260		T4	87
valid_sources[0x56]	539755	1			T2	395		T3	219		T4	84
valid_sources[0x57]	524823	1			T2	383		T3	268		T4	91
valid_sources[0x58]	526912	1			T2	378		T3	278		T4	71
valid_sources[0x59]	535998	1			T2	388		T3	236		T4	72
valid_sources[0x5a]	554779	1			T2	400		T3	249		T4	79
valid_sources[0x5b]	529187	1			T1	103		T2	399		T3	247
valid_sources[0x5c]	616501	1			T2	380		T3	232		T4	75
valid_sources[0x5d]	518974	1			T2	397		T3	271		T4	75
valid_sources[0x5e]	513176	1			T2	368		T3	238		T4	83
valid_sources[0x5f]	550926	1			T2	400		T3	247		T4	80
valid_sources[0x60]	518976	1			T2	361		T3	237		T4	82
valid_sources[0x61]	566054	1			T2	394		T3	236		T4	82
valid_sources[0x62]	519212	1			T2	400		T3	226		T4	77
valid_sources[0x63]	516157	1			T2	361		T3	200		T4	74
valid_sources[0x64]	538760	1			T1	237		T2	405		T3	239
valid_sources[0x65]	524759	1			T2	390		T3	222		T4	77
valid_sources[0x66]	591305	1			T2	411		T3	257		T4	87
valid_sources[0x67]	518144	1			T2	366		T3	237		T4	85
valid_sources[0x68]	563578	1			T2	396		T3	265		T4	91
valid_sources[0x69]	2121255	1			T2	395		T3	282		T4	72
valid_sources[0x6a]	1129583	1			T2	360		T3	264		T4	85
valid_sources[0x6b]	1728516	1			T2	390		T3	208		T4	90
valid_sources[0x6c]	570255	1			T2	371		T3	247		T4	84
valid_sources[0x6d]	545864	1			T2	405		T3	201		T4	69
valid_sources[0x6e]	620414	1			T1	272		T2	347		T3	278
valid_sources[0x6f]	524481	1			T2	353		T3	244		T4	95
valid_sources[0x70]	530512	1			T2	420		T3	220		T4	97
valid_sources[0x71]	536861	1			T2	389		T3	213		T4	88
valid_sources[0x72]	2293657	1			T2	430		T3	276		T4	81
valid_sources[0x73]	624393	1			T2	424		T3	239		T4	97
valid_sources[0x74]	511771	1			T2	391		T3	262		T4	85
valid_sources[0x75]	590263	1			T2	389		T3	255		T4	70
valid_sources[0x76]	544217	1			T2	387		T3	223		T4	64
valid_sources[0x77]	570010	1			T2	387		T3	238		T4	85
valid_sources[0x78]	557509	1			T2	349		T3	272		T4	88
valid_sources[0x79]	517123	1			T2	397		T3	234		T4	68
valid_sources[0x7a]	514363	1			T2	400		T3	254		T4	70
valid_sources[0x7b]	1690344	1			T2	377		T3	236		T4	80
valid_sources[0x7c]	529599	1			T2	394		T3	236		T4	102
valid_sources[0x7d]	515399	1			T2	448		T3	215		T4	87
valid_sources[0x7e]	556172	1			T2	357		T3	240		T4	64
valid_sources[0x7f]	525710	1			T2	370		T3	225		T4	69
valid_sources[0x80]	526362	1			T2	381		T3	246		T4	77

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

77761963

1

T1

898

T2

32768

T3

262

values[0x0]

all_enables

biggest_size

40200907

1

T1

1340

T2

32640

T3

1472

values[0x1]

all_enables

biggest_size

40199157

1

T1

1327

T2

32895

T3

1465

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	34601	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

143493

1

T1

2379

T3

1

T4

1987

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	52154	1			T1	668		T4	600		T9	10
values[0x0]	60982	1			T1	879		T3	1		T4	732
values[0x1]	64958	1			T1	946		T4	837		T5	16

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	26423	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

151671

1

T1

2430

T3

1

T4

2077

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	813	1			T1	20		T4	5		T9	1
valid_sources[0x01]	743	1			T1	5		T4	8		T9	1
valid_sources[0x02]	611	1			T1	6		T4	1		T9	1
valid_sources[0x03]	764	1			T1	23		T4	9		T10	3
valid_sources[0x04]	809	1			T1	3		T5	2		T9	1
valid_sources[0x05]	954	1			T1	23		T4	27		T29	9
valid_sources[0x06]	832	1			T1	9		T4	13		T133	1
valid_sources[0x07]	593	1			T1	2		T4	15		T11	3
valid_sources[0x08]	565	1			T1	15		T4	16		T29	14
valid_sources[0x09]	917	1			T1	12		T4	4		T9	1
valid_sources[0x0a]	521	1			T1	8		T4	10		T29	8
valid_sources[0x0b]	705	1			T1	10		T4	10		T5	1
valid_sources[0x0c]	608	1			T1	11		T4	14		T5	3
valid_sources[0x0d]	603	1			T1	13		T4	5		T11	1
valid_sources[0x0e]	506	1			T1	6		T4	6		T29	3
valid_sources[0x0f]	537	1			T1	5		T4	1		T9	2
valid_sources[0x10]	480	1			T1	15		T4	6		T29	5
valid_sources[0x11]	951	1			T1	6		T4	9		T29	8
valid_sources[0x12]	478	1			T1	12		T4	8		T29	7
valid_sources[0x13]	641	1			T1	6		T4	6		T9	1
valid_sources[0x14]	527	1			T1	5		T4	7		T9	2
valid_sources[0x15]	570	1			T1	7		T4	20		T9	2
valid_sources[0x16]	802	1			T1	4		T4	14		T29	3
valid_sources[0x17]	797	1			T1	4		T29	8		T53	1
valid_sources[0x18]	490	1			T1	8		T4	4		T10	3
valid_sources[0x19]	623	1			T1	14		T4	14		T29	6
valid_sources[0x1a]	749	1			T1	6		T4	6		T5	2
valid_sources[0x1b]	790	1			T1	10		T4	4		T141	2
valid_sources[0x1c]	622	1			T1	3		T4	23		T133	1
valid_sources[0x1d]	745	1			T1	1		T4	4		T15	1
valid_sources[0x1e]	474	1			T1	12		T4	11		T133	1
valid_sources[0x1f]	601	1			T1	17		T4	3		T9	1
valid_sources[0x20]	529	1			T1	4		T4	11		T5	1
valid_sources[0x21]	758	1			T1	7		T4	11		T29	7
valid_sources[0x22]	567	1			T1	10		T4	5		T29	6
valid_sources[0x23]	782	1			T1	3		T4	20		T15	1
valid_sources[0x24]	632	1			T1	13		T11	1		T29	6
valid_sources[0x25]	782	1			T1	24		T4	4		T9	1
valid_sources[0x26]	642	1			T1	20		T4	4		T5	2
valid_sources[0x27]	820	1			T1	3		T4	11		T9	2
valid_sources[0x28]	702	1			T1	9		T4	19		T29	9
valid_sources[0x29]	1027	1			T1	2		T4	14		T9	1
valid_sources[0x2a]	843	1			T1	3		T29	2		T45	15
valid_sources[0x2b]	705	1			T1	5		T4	5		T9	1
valid_sources[0x2c]	524	1			T1	8		T4	12		T29	2
valid_sources[0x2d]	536	1			T1	3		T4	4		T11	1
valid_sources[0x2e]	556	1			T1	10		T4	4		T29	9
valid_sources[0x2f]	567	1			T1	7		T4	4		T11	1
valid_sources[0x30]	1150	1			T1	13		T4	5		T29	4
valid_sources[0x31]	602	1			T1	9		T4	4		T9	2
valid_sources[0x32]	893	1			T1	11		T4	3		T29	3
valid_sources[0x33]	512	1			T1	1		T4	14		T29	7
valid_sources[0x34]	557	1			T1	22		T4	3		T29	6
valid_sources[0x35]	707	1			T1	13		T4	13		T11	1
valid_sources[0x36]	749	1			T1	3		T4	7		T29	7
valid_sources[0x37]	890	1			T1	7		T4	6		T29	8
valid_sources[0x38]	591	1			T1	16		T4	16		T29	10
valid_sources[0x39]	522	1			T1	6		T4	2		T9	1
valid_sources[0x3a]	873	1			T1	13		T4	11		T29	7
valid_sources[0x3b]	560	1			T1	14		T4	17		T9	1
valid_sources[0x3c]	691	1			T1	12		T4	7		T29	2
valid_sources[0x3d]	533	1			T1	14		T4	6		T11	1
valid_sources[0x3e]	581	1			T1	9		T4	20		T29	4
valid_sources[0x3f]	1041	1			T1	6		T4	16		T15	2
valid_sources[0x40]	614	1			T1	4		T4	14		T29	2
valid_sources[0x41]	597	1			T1	25		T4	5		T5	1
valid_sources[0x42]	539	1			T1	13		T4	11		T21	1
valid_sources[0x43]	693	1			T1	11		T4	12		T29	4
valid_sources[0x44]	649	1			T1	5		T4	5		T9	1
valid_sources[0x45]	989	1			T1	15		T4	16		T29	10
valid_sources[0x46]	649	1			T1	9		T4	25		T11	1
valid_sources[0x47]	499	1			T1	13		T4	6		T11	1
valid_sources[0x48]	581	1			T1	4		T4	5		T11	2
valid_sources[0x49]	703	1			T1	17		T4	7		T9	3
valid_sources[0x4a]	698	1			T1	10		T4	2		T11	1
valid_sources[0x4b]	734	1			T1	31		T4	4		T29	6
valid_sources[0x4c]	681	1			T1	3		T4	3		T29	1
valid_sources[0x4d]	835	1			T1	9		T4	2		T11	1
valid_sources[0x4e]	587	1			T1	23		T4	4		T66	1
valid_sources[0x4f]	699	1			T1	13		T4	9		T9	1
valid_sources[0x50]	656	1			T1	6		T4	2		T29	5
valid_sources[0x51]	525	1			T1	16		T4	2		T29	8
valid_sources[0x52]	870	1			T1	19		T52	1		T28	2
valid_sources[0x53]	670	1			T1	9		T4	2		T5	3
valid_sources[0x54]	612	1			T1	15		T4	2		T9	1
valid_sources[0x55]	429	1			T1	2		T4	5		T29	6
valid_sources[0x56]	825	1			T1	7		T4	8		T9	1
valid_sources[0x57]	685	1			T1	17		T4	9		T11	1
valid_sources[0x58]	717	1			T1	10		T4	10		T29	3
valid_sources[0x59]	644	1			T1	20		T4	3		T29	3
valid_sources[0x5a]	1064	1			T1	14		T4	11		T29	5
valid_sources[0x5b]	507	1			T1	9		T4	1		T11	2
valid_sources[0x5c]	827	1			T1	18		T133	1		T29	6
valid_sources[0x5d]	812	1			T1	5		T4	17		T29	2
valid_sources[0x5e]	891	1			T1	4		T4	2		T11	2
valid_sources[0x5f]	961	1			T1	11		T4	14		T5	2
valid_sources[0x60]	605	1			T1	6		T4	4		T29	3
valid_sources[0x61]	677	1			T1	11		T4	6		T29	3
valid_sources[0x62]	693	1			T1	12		T4	28		T29	6
valid_sources[0x63]	644	1			T1	6		T4	4		T29	4
valid_sources[0x64]	548	1			T1	14		T4	12		T29	6
valid_sources[0x65]	924	1			T1	6		T4	23		T11	2
valid_sources[0x66]	796	1			T1	7		T4	14		T9	2
valid_sources[0x67]	631	1			T1	1		T4	9		T15	1
valid_sources[0x68]	810	1			T1	6		T4	17		T9	2
valid_sources[0x69]	628	1			T1	11		T4	2		T5	1
valid_sources[0x6a]	644	1			T1	7		T4	2		T9	1
valid_sources[0x6b]	514	1			T1	18		T4	1		T29	4
valid_sources[0x6c]	548	1			T1	7		T4	3		T5	1
valid_sources[0x6d]	786	1			T1	15		T4	13		T9	3
valid_sources[0x6e]	691	1			T1	5		T4	12		T29	2
valid_sources[0x6f]	540	1			T1	8		T4	4		T29	12
valid_sources[0x70]	474	1			T1	10		T4	2		T29	10
valid_sources[0x71]	622	1			T1	9		T4	2		T29	3
valid_sources[0x72]	639	1			T1	10		T4	2		T9	1
valid_sources[0x73]	500	1			T1	6		T4	11		T29	8
valid_sources[0x74]	739	1			T1	16		T4	4		T29	4
valid_sources[0x75]	642	1			T1	4		T4	29		T134	1
valid_sources[0x76]	820	1			T1	1		T4	19		T29	9
valid_sources[0x77]	840	1			T1	12		T4	9		T9	1
valid_sources[0x78]	744	1			T1	16		T4	2		T29	9
valid_sources[0x79]	931	1			T1	14		T4	3		T29	6
valid_sources[0x7a]	687	1			T1	11		T4	7		T134	1
valid_sources[0x7b]	909	1			T1	10		T4	5		T29	10
valid_sources[0x7c]	670	1			T1	15		T4	4		T29	5
valid_sources[0x7d]	1101	1			T1	6		T4	4		T11	1
valid_sources[0x7e]	647	1			T1	10		T4	6		T7	17
valid_sources[0x7f]	767	1			T1	3		T4	8		T29	4
valid_sources[0x80]	813	1			T1	8		T4	3		T29	5

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

39420

1

T1

617

T4

547

T9

6

values[0x0]

all_enables

biggest_size

52972

1

T1

872

T3

1

T4

714

values[0x1]

all_enables

biggest_size

51101

1

T1

890

T4

726

T5

2