| T297 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.4222089460 |
|
|
Apr 16 02:15:44 PM PDT 24 |
Apr 16 02:16:23 PM PDT 24 |
23256637785 ps |
| T103 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.2845804483 |
|
|
Apr 16 02:12:02 PM PDT 24 |
Apr 16 02:13:00 PM PDT 24 |
1925952471 ps |
| T298 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.201090544 |
|
|
Apr 16 02:13:34 PM PDT 24 |
Apr 16 02:36:05 PM PDT 24 |
100359828516 ps |
| T299 |
/workspace/coverage/default/13.sram_ctrl_executable.2597904964 |
|
|
Apr 16 02:12:02 PM PDT 24 |
Apr 16 02:26:49 PM PDT 24 |
20114625240 ps |
| T300 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1873101521 |
|
|
Apr 16 02:16:39 PM PDT 24 |
Apr 16 02:20:56 PM PDT 24 |
18191324035 ps |
| T301 |
/workspace/coverage/default/37.sram_ctrl_partial_access.2153952135 |
|
|
Apr 16 02:15:02 PM PDT 24 |
Apr 16 02:16:26 PM PDT 24 |
5030721686 ps |
| T302 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1928855953 |
|
|
Apr 16 02:12:18 PM PDT 24 |
Apr 16 02:17:54 PM PDT 24 |
16745855169 ps |
| T303 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.51462469 |
|
|
Apr 16 02:12:28 PM PDT 24 |
Apr 16 02:14:48 PM PDT 24 |
13755548629 ps |
| T304 |
/workspace/coverage/default/18.sram_ctrl_bijection.180660934 |
|
|
Apr 16 02:12:29 PM PDT 24 |
Apr 16 02:34:50 PM PDT 24 |
113601315886 ps |
| T305 |
/workspace/coverage/default/35.sram_ctrl_stress_all.3683206266 |
|
|
Apr 16 02:14:51 PM PDT 24 |
Apr 16 03:40:04 PM PDT 24 |
42082090435 ps |
| T306 |
/workspace/coverage/default/16.sram_ctrl_smoke.3406721136 |
|
|
Apr 16 02:12:17 PM PDT 24 |
Apr 16 02:12:36 PM PDT 24 |
872444332 ps |
| T307 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.3395880271 |
|
|
Apr 16 02:11:20 PM PDT 24 |
Apr 16 02:12:23 PM PDT 24 |
2561959669 ps |
| T308 |
/workspace/coverage/default/44.sram_ctrl_bijection.740888892 |
|
|
Apr 16 02:16:14 PM PDT 24 |
Apr 16 02:29:41 PM PDT 24 |
12153950092 ps |
| T309 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.2350765624 |
|
|
Apr 16 02:15:31 PM PDT 24 |
Apr 16 02:16:58 PM PDT 24 |
1535404514 ps |
| T310 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.4173759996 |
|
|
Apr 16 02:11:25 PM PDT 24 |
Apr 16 02:15:22 PM PDT 24 |
16778224516 ps |
| T311 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2808097746 |
|
|
Apr 16 02:11:30 PM PDT 24 |
Apr 16 02:21:04 PM PDT 24 |
22762530071 ps |
| T312 |
/workspace/coverage/default/38.sram_ctrl_regwen.4016831884 |
|
|
Apr 16 02:15:15 PM PDT 24 |
Apr 16 02:30:45 PM PDT 24 |
4346974560 ps |
| T313 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.1295010137 |
|
|
Apr 16 02:13:06 PM PDT 24 |
Apr 16 02:14:26 PM PDT 24 |
13154840418 ps |
| T314 |
/workspace/coverage/default/11.sram_ctrl_partial_access.3939523435 |
|
|
Apr 16 02:11:51 PM PDT 24 |
Apr 16 02:12:06 PM PDT 24 |
2121181252 ps |
| T315 |
/workspace/coverage/default/25.sram_ctrl_bijection.324452346 |
|
|
Apr 16 02:13:23 PM PDT 24 |
Apr 16 02:52:02 PM PDT 24 |
151114726489 ps |
| T316 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.6510227 |
|
|
Apr 16 02:13:24 PM PDT 24 |
Apr 16 02:33:27 PM PDT 24 |
20662555499 ps |
| T317 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.318265918 |
|
|
Apr 16 02:11:39 PM PDT 24 |
Apr 16 02:14:38 PM PDT 24 |
3458545908 ps |
| T318 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.71777015 |
|
|
Apr 16 02:11:19 PM PDT 24 |
Apr 16 02:12:44 PM PDT 24 |
48613775714 ps |
| T319 |
/workspace/coverage/default/1.sram_ctrl_partial_access.1555655291 |
|
|
Apr 16 02:11:22 PM PDT 24 |
Apr 16 02:11:45 PM PDT 24 |
5569286379 ps |
| T320 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.1162764192 |
|
|
Apr 16 02:13:06 PM PDT 24 |
Apr 16 02:15:54 PM PDT 24 |
19889482983 ps |
| T321 |
/workspace/coverage/default/27.sram_ctrl_executable.1351697361 |
|
|
Apr 16 02:13:37 PM PDT 24 |
Apr 16 02:28:55 PM PDT 24 |
41643310895 ps |
| T74 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.523956818 |
|
|
Apr 16 02:15:21 PM PDT 24 |
Apr 16 02:16:26 PM PDT 24 |
986054242 ps |
| T322 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.2105936592 |
|
|
Apr 16 02:13:04 PM PDT 24 |
Apr 16 02:29:14 PM PDT 24 |
45248055390 ps |
| T323 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.3400824628 |
|
|
Apr 16 02:12:03 PM PDT 24 |
Apr 16 02:13:10 PM PDT 24 |
95965290400 ps |
| T324 |
/workspace/coverage/default/26.sram_ctrl_executable.188725748 |
|
|
Apr 16 02:13:34 PM PDT 24 |
Apr 16 02:34:12 PM PDT 24 |
54211442572 ps |
| T325 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.1089947864 |
|
|
Apr 16 02:14:44 PM PDT 24 |
Apr 16 02:32:48 PM PDT 24 |
18168913106 ps |
| T326 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1560928046 |
|
|
Apr 16 02:11:41 PM PDT 24 |
Apr 16 02:12:58 PM PDT 24 |
14579702284 ps |
| T327 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.873724697 |
|
|
Apr 16 02:15:30 PM PDT 24 |
Apr 16 02:25:16 PM PDT 24 |
58396902735 ps |
| T328 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2352618280 |
|
|
Apr 16 02:16:29 PM PDT 24 |
Apr 16 02:18:22 PM PDT 24 |
1553046606 ps |
| T329 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1126693835 |
|
|
Apr 16 02:11:14 PM PDT 24 |
Apr 16 02:36:52 PM PDT 24 |
46044864072 ps |
| T330 |
/workspace/coverage/default/42.sram_ctrl_smoke.1276737619 |
|
|
Apr 16 02:15:51 PM PDT 24 |
Apr 16 02:16:38 PM PDT 24 |
4617413052 ps |
| T331 |
/workspace/coverage/default/38.sram_ctrl_stress_all.2122727823 |
|
|
Apr 16 02:15:20 PM PDT 24 |
Apr 16 03:39:34 PM PDT 24 |
158979450413 ps |
| T332 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.2491571452 |
|
|
Apr 16 02:12:02 PM PDT 24 |
Apr 16 02:16:21 PM PDT 24 |
45509923854 ps |
| T333 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.1296924797 |
|
|
Apr 16 02:11:28 PM PDT 24 |
Apr 16 02:12:21 PM PDT 24 |
774814895 ps |
| T334 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.1257575999 |
|
|
Apr 16 02:12:20 PM PDT 24 |
Apr 16 02:12:47 PM PDT 24 |
6208120953 ps |
| T335 |
/workspace/coverage/default/47.sram_ctrl_smoke.2930166076 |
|
|
Apr 16 02:16:39 PM PDT 24 |
Apr 16 02:16:54 PM PDT 24 |
1035612556 ps |
| T336 |
/workspace/coverage/default/13.sram_ctrl_partial_access.2058332508 |
|
|
Apr 16 02:12:03 PM PDT 24 |
Apr 16 02:12:21 PM PDT 24 |
1192377848 ps |
| T337 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1376730407 |
|
|
Apr 16 02:12:22 PM PDT 24 |
Apr 16 02:15:05 PM PDT 24 |
10938431304 ps |
| T338 |
/workspace/coverage/default/7.sram_ctrl_alert_test.2893462724 |
|
|
Apr 16 02:11:35 PM PDT 24 |
Apr 16 02:11:37 PM PDT 24 |
24236595 ps |
| T339 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.1348836542 |
|
|
Apr 16 02:14:01 PM PDT 24 |
Apr 16 02:18:01 PM PDT 24 |
15435551961 ps |
| T340 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2002062073 |
|
|
Apr 16 02:15:34 PM PDT 24 |
Apr 16 02:16:27 PM PDT 24 |
4023013012 ps |
| T341 |
/workspace/coverage/default/46.sram_ctrl_partial_access.1453305473 |
|
|
Apr 16 02:16:24 PM PDT 24 |
Apr 16 02:18:47 PM PDT 24 |
1087606878 ps |
| T342 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.1388723891 |
|
|
Apr 16 02:11:22 PM PDT 24 |
Apr 16 02:14:01 PM PDT 24 |
5053444066 ps |
| T343 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.2979707277 |
|
|
Apr 16 02:14:17 PM PDT 24 |
Apr 16 02:14:36 PM PDT 24 |
513592526 ps |
| T344 |
/workspace/coverage/default/16.sram_ctrl_executable.4164066169 |
|
|
Apr 16 02:12:23 PM PDT 24 |
Apr 16 02:24:44 PM PDT 24 |
29918363667 ps |
| T345 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.1533806751 |
|
|
Apr 16 02:13:43 PM PDT 24 |
Apr 16 02:16:26 PM PDT 24 |
19546557757 ps |
| T104 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.4186377548 |
|
|
Apr 16 02:13:53 PM PDT 24 |
Apr 16 02:14:12 PM PDT 24 |
2821997674 ps |
| T346 |
/workspace/coverage/default/30.sram_ctrl_bijection.860166722 |
|
|
Apr 16 02:14:02 PM PDT 24 |
Apr 16 02:48:57 PM PDT 24 |
191745281304 ps |
| T347 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1127438737 |
|
|
Apr 16 02:11:23 PM PDT 24 |
Apr 16 02:14:45 PM PDT 24 |
13180186984 ps |
| T348 |
/workspace/coverage/default/26.sram_ctrl_stress_all.441454185 |
|
|
Apr 16 02:13:33 PM PDT 24 |
Apr 16 02:49:24 PM PDT 24 |
915731553564 ps |
| T349 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.4268687982 |
|
|
Apr 16 02:16:28 PM PDT 24 |
Apr 16 02:28:54 PM PDT 24 |
104294635271 ps |
| T105 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.1366381507 |
|
|
Apr 16 02:14:38 PM PDT 24 |
Apr 16 02:15:12 PM PDT 24 |
4867175340 ps |
| T350 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2442485743 |
|
|
Apr 16 02:11:39 PM PDT 24 |
Apr 16 02:12:57 PM PDT 24 |
4859462136 ps |
| T351 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.4067747454 |
|
|
Apr 16 02:11:42 PM PDT 24 |
Apr 16 02:15:50 PM PDT 24 |
17915648240 ps |
| T352 |
/workspace/coverage/default/9.sram_ctrl_executable.2813693915 |
|
|
Apr 16 02:11:54 PM PDT 24 |
Apr 16 02:24:05 PM PDT 24 |
8388849444 ps |
| T353 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.698120062 |
|
|
Apr 16 02:11:46 PM PDT 24 |
Apr 16 02:13:54 PM PDT 24 |
1642140100 ps |
| T354 |
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1563255109 |
|
|
Apr 16 02:16:13 PM PDT 24 |
Apr 16 02:19:08 PM PDT 24 |
3061395189 ps |
| T355 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.4121323187 |
|
|
Apr 16 02:13:18 PM PDT 24 |
Apr 16 02:14:04 PM PDT 24 |
7147079199 ps |
| T356 |
/workspace/coverage/default/26.sram_ctrl_alert_test.1009319950 |
|
|
Apr 16 02:13:35 PM PDT 24 |
Apr 16 02:13:36 PM PDT 24 |
101644133 ps |
| T357 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1570738828 |
|
|
Apr 16 02:16:34 PM PDT 24 |
Apr 16 02:18:45 PM PDT 24 |
1569733461 ps |
| T358 |
/workspace/coverage/default/32.sram_ctrl_stress_all.3546186432 |
|
|
Apr 16 02:14:28 PM PDT 24 |
Apr 16 03:06:11 PM PDT 24 |
49417659009 ps |
| T106 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.4171438154 |
|
|
Apr 16 02:16:13 PM PDT 24 |
Apr 16 02:16:38 PM PDT 24 |
1749206769 ps |
| T359 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.432947604 |
|
|
Apr 16 02:16:37 PM PDT 24 |
Apr 16 02:18:08 PM PDT 24 |
2904543337 ps |
| T360 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.4182770041 |
|
|
Apr 16 02:13:20 PM PDT 24 |
Apr 16 02:44:15 PM PDT 24 |
138235571143 ps |
| T361 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1038223631 |
|
|
Apr 16 02:11:46 PM PDT 24 |
Apr 16 02:11:54 PM PDT 24 |
703482910 ps |
| T362 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.749660280 |
|
|
Apr 16 02:13:47 PM PDT 24 |
Apr 16 02:13:55 PM PDT 24 |
4791304689 ps |
| T363 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.3299841017 |
|
|
Apr 16 02:13:29 PM PDT 24 |
Apr 16 02:14:49 PM PDT 24 |
2683239334 ps |
| T364 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.2080900812 |
|
|
Apr 16 02:11:29 PM PDT 24 |
Apr 16 02:12:47 PM PDT 24 |
4781622401 ps |
| T365 |
/workspace/coverage/default/31.sram_ctrl_stress_all.3296755321 |
|
|
Apr 16 02:14:17 PM PDT 24 |
Apr 16 03:05:31 PM PDT 24 |
205815292243 ps |
| T366 |
/workspace/coverage/default/39.sram_ctrl_alert_test.4076060059 |
|
|
Apr 16 02:15:31 PM PDT 24 |
Apr 16 02:15:32 PM PDT 24 |
25681463 ps |
| T367 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.2586518073 |
|
|
Apr 16 02:11:26 PM PDT 24 |
Apr 16 02:12:20 PM PDT 24 |
3250573552 ps |
| T368 |
/workspace/coverage/default/33.sram_ctrl_partial_access.713499310 |
|
|
Apr 16 02:14:35 PM PDT 24 |
Apr 16 02:16:03 PM PDT 24 |
983551715 ps |
| T369 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.24088213 |
|
|
Apr 16 02:15:35 PM PDT 24 |
Apr 16 02:15:43 PM PDT 24 |
256769573 ps |
| T370 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.1884550276 |
|
|
Apr 16 02:11:31 PM PDT 24 |
Apr 16 02:14:04 PM PDT 24 |
5191316005 ps |
| T371 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.4045934272 |
|
|
Apr 16 02:16:50 PM PDT 24 |
Apr 16 02:24:32 PM PDT 24 |
37851410563 ps |
| T372 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.393664298 |
|
|
Apr 16 02:14:48 PM PDT 24 |
Apr 16 02:14:52 PM PDT 24 |
1409599177 ps |
| T373 |
/workspace/coverage/default/48.sram_ctrl_bijection.3799068681 |
|
|
Apr 16 02:16:51 PM PDT 24 |
Apr 16 02:42:31 PM PDT 24 |
70524311034 ps |
| T374 |
/workspace/coverage/default/5.sram_ctrl_executable.1427280583 |
|
|
Apr 16 02:11:40 PM PDT 24 |
Apr 16 02:20:46 PM PDT 24 |
21000421348 ps |
| T375 |
/workspace/coverage/default/1.sram_ctrl_alert_test.2257483505 |
|
|
Apr 16 02:11:20 PM PDT 24 |
Apr 16 02:11:22 PM PDT 24 |
76130828 ps |
| T376 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.754341931 |
|
|
Apr 16 02:15:33 PM PDT 24 |
Apr 16 02:19:56 PM PDT 24 |
15756470017 ps |
| T377 |
/workspace/coverage/default/4.sram_ctrl_partial_access.2213764971 |
|
|
Apr 16 02:11:24 PM PDT 24 |
Apr 16 02:11:40 PM PDT 24 |
3470355707 ps |
| T378 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1841051970 |
|
|
Apr 16 02:16:12 PM PDT 24 |
Apr 16 02:17:04 PM PDT 24 |
14452539124 ps |
| T379 |
/workspace/coverage/default/22.sram_ctrl_bijection.3030009952 |
|
|
Apr 16 02:13:00 PM PDT 24 |
Apr 16 02:26:21 PM PDT 24 |
75665180787 ps |
| T380 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.405104223 |
|
|
Apr 16 02:11:44 PM PDT 24 |
Apr 16 02:11:48 PM PDT 24 |
3379778093 ps |
| T381 |
/workspace/coverage/default/45.sram_ctrl_alert_test.2004573942 |
|
|
Apr 16 02:16:23 PM PDT 24 |
Apr 16 02:16:24 PM PDT 24 |
40000779 ps |
| T382 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.3642628664 |
|
|
Apr 16 02:11:18 PM PDT 24 |
Apr 16 02:15:15 PM PDT 24 |
4115308704 ps |
| T383 |
/workspace/coverage/default/29.sram_ctrl_smoke.182302831 |
|
|
Apr 16 02:13:53 PM PDT 24 |
Apr 16 02:14:07 PM PDT 24 |
714835969 ps |
| T384 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.4280478881 |
|
|
Apr 16 02:14:17 PM PDT 24 |
Apr 16 02:18:53 PM PDT 24 |
37240176757 ps |
| T385 |
/workspace/coverage/default/31.sram_ctrl_alert_test.503681333 |
|
|
Apr 16 02:14:22 PM PDT 24 |
Apr 16 02:14:24 PM PDT 24 |
26526854 ps |
| T386 |
/workspace/coverage/default/36.sram_ctrl_lc_escalation.462269150 |
|
|
Apr 16 02:14:56 PM PDT 24 |
Apr 16 02:16:10 PM PDT 24 |
24231621343 ps |
| T387 |
/workspace/coverage/default/18.sram_ctrl_regwen.2953126731 |
|
|
Apr 16 02:12:30 PM PDT 24 |
Apr 16 02:26:29 PM PDT 24 |
18308625778 ps |
| T388 |
/workspace/coverage/default/42.sram_ctrl_executable.1516670515 |
|
|
Apr 16 02:15:59 PM PDT 24 |
Apr 16 02:26:14 PM PDT 24 |
12255930232 ps |
| T389 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.3164727839 |
|
|
Apr 16 02:13:56 PM PDT 24 |
Apr 16 02:14:00 PM PDT 24 |
347706521 ps |
| T390 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.702770604 |
|
|
Apr 16 02:13:29 PM PDT 24 |
Apr 16 02:17:36 PM PDT 24 |
5064882695 ps |
| T391 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.566197827 |
|
|
Apr 16 02:14:06 PM PDT 24 |
Apr 16 02:15:12 PM PDT 24 |
2033437671 ps |
| T392 |
/workspace/coverage/default/46.sram_ctrl_alert_test.1418366150 |
|
|
Apr 16 02:16:39 PM PDT 24 |
Apr 16 02:16:40 PM PDT 24 |
11499363 ps |
| T393 |
/workspace/coverage/default/40.sram_ctrl_regwen.715823094 |
|
|
Apr 16 02:15:39 PM PDT 24 |
Apr 16 02:23:48 PM PDT 24 |
13336536172 ps |
| T394 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.2983492882 |
|
|
Apr 16 02:14:38 PM PDT 24 |
Apr 16 02:17:02 PM PDT 24 |
27580493132 ps |
| T395 |
/workspace/coverage/default/36.sram_ctrl_regwen.4272655062 |
|
|
Apr 16 02:15:01 PM PDT 24 |
Apr 16 02:33:55 PM PDT 24 |
81827998989 ps |
| T396 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.3493484456 |
|
|
Apr 16 02:12:02 PM PDT 24 |
Apr 16 02:14:26 PM PDT 24 |
5285949693 ps |
| T397 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.665930162 |
|
|
Apr 16 02:11:27 PM PDT 24 |
Apr 16 02:15:42 PM PDT 24 |
19396517402 ps |
| T398 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3466039412 |
|
|
Apr 16 02:14:28 PM PDT 24 |
Apr 16 02:15:47 PM PDT 24 |
766804669 ps |
| T399 |
/workspace/coverage/default/35.sram_ctrl_bijection.3504737669 |
|
|
Apr 16 02:14:46 PM PDT 24 |
Apr 16 02:23:56 PM PDT 24 |
8211715821 ps |
| T400 |
/workspace/coverage/default/2.sram_ctrl_bijection.600918324 |
|
|
Apr 16 02:11:24 PM PDT 24 |
Apr 16 03:00:22 PM PDT 24 |
538737556604 ps |
| T401 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1832857608 |
|
|
Apr 16 02:11:39 PM PDT 24 |
Apr 16 02:32:33 PM PDT 24 |
24028296326 ps |
| T402 |
/workspace/coverage/default/35.sram_ctrl_executable.3648524590 |
|
|
Apr 16 02:14:50 PM PDT 24 |
Apr 16 02:22:15 PM PDT 24 |
4599046250 ps |
| T403 |
/workspace/coverage/default/12.sram_ctrl_partial_access.831664558 |
|
|
Apr 16 02:11:53 PM PDT 24 |
Apr 16 02:13:16 PM PDT 24 |
1749313201 ps |
| T404 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.620066322 |
|
|
Apr 16 02:16:27 PM PDT 24 |
Apr 16 02:16:50 PM PDT 24 |
714141617 ps |
| T405 |
/workspace/coverage/default/7.sram_ctrl_stress_all.3151291579 |
|
|
Apr 16 02:11:40 PM PDT 24 |
Apr 16 04:21:06 PM PDT 24 |
306962260260 ps |
| T406 |
/workspace/coverage/default/0.sram_ctrl_regwen.470717018 |
|
|
Apr 16 02:11:19 PM PDT 24 |
Apr 16 02:14:01 PM PDT 24 |
6458271933 ps |
| T407 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.1199397934 |
|
|
Apr 16 02:12:36 PM PDT 24 |
Apr 16 02:12:46 PM PDT 24 |
2712872474 ps |
| T408 |
/workspace/coverage/default/4.sram_ctrl_bijection.2604802387 |
|
|
Apr 16 02:11:23 PM PDT 24 |
Apr 16 02:27:26 PM PDT 24 |
251871056131 ps |
| T409 |
/workspace/coverage/default/33.sram_ctrl_bijection.722033090 |
|
|
Apr 16 02:14:30 PM PDT 24 |
Apr 16 02:33:48 PM PDT 24 |
17380539785 ps |
| T410 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.1792493013 |
|
|
Apr 16 02:12:14 PM PDT 24 |
Apr 16 02:14:51 PM PDT 24 |
4752595637 ps |
| T411 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1549463230 |
|
|
Apr 16 02:16:51 PM PDT 24 |
Apr 16 02:17:10 PM PDT 24 |
3568897892 ps |
| T412 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3647286612 |
|
|
Apr 16 02:11:21 PM PDT 24 |
Apr 16 02:11:38 PM PDT 24 |
736736982 ps |
| T413 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.2857400068 |
|
|
Apr 16 02:13:29 PM PDT 24 |
Apr 16 02:13:34 PM PDT 24 |
1410895267 ps |
| T414 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.748551874 |
|
|
Apr 16 02:13:23 PM PDT 24 |
Apr 16 02:13:31 PM PDT 24 |
2802389271 ps |
| T415 |
/workspace/coverage/default/46.sram_ctrl_bijection.1533055956 |
|
|
Apr 16 02:16:25 PM PDT 24 |
Apr 16 02:46:05 PM PDT 24 |
690530365281 ps |
| T416 |
/workspace/coverage/default/30.sram_ctrl_partial_access.2993295708 |
|
|
Apr 16 02:14:03 PM PDT 24 |
Apr 16 02:14:27 PM PDT 24 |
18003946728 ps |
| T417 |
/workspace/coverage/default/21.sram_ctrl_smoke.591259087 |
|
|
Apr 16 02:12:49 PM PDT 24 |
Apr 16 02:13:05 PM PDT 24 |
1836492756 ps |
| T418 |
/workspace/coverage/default/1.sram_ctrl_stress_all.291995954 |
|
|
Apr 16 02:11:17 PM PDT 24 |
Apr 16 03:41:03 PM PDT 24 |
741169179135 ps |
| T419 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3194368641 |
|
|
Apr 16 02:11:50 PM PDT 24 |
Apr 16 02:11:54 PM PDT 24 |
711625733 ps |
| T420 |
/workspace/coverage/default/45.sram_ctrl_smoke.4043649094 |
|
|
Apr 16 02:16:17 PM PDT 24 |
Apr 16 02:16:30 PM PDT 24 |
940682366 ps |
| T421 |
/workspace/coverage/default/45.sram_ctrl_executable.213592668 |
|
|
Apr 16 02:16:19 PM PDT 24 |
Apr 16 02:28:33 PM PDT 24 |
13851454389 ps |
| T422 |
/workspace/coverage/default/19.sram_ctrl_alert_test.2275505507 |
|
|
Apr 16 02:12:41 PM PDT 24 |
Apr 16 02:12:42 PM PDT 24 |
34166066 ps |
| T423 |
/workspace/coverage/default/0.sram_ctrl_partial_access.3608882796 |
|
|
Apr 16 02:11:15 PM PDT 24 |
Apr 16 02:13:09 PM PDT 24 |
5095572522 ps |
| T424 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.2033363943 |
|
|
Apr 16 02:16:19 PM PDT 24 |
Apr 16 02:16:29 PM PDT 24 |
1420123507 ps |
| T425 |
/workspace/coverage/default/13.sram_ctrl_regwen.2211297613 |
|
|
Apr 16 02:12:03 PM PDT 24 |
Apr 16 02:25:44 PM PDT 24 |
5843588746 ps |
| T426 |
/workspace/coverage/default/41.sram_ctrl_smoke.1209280338 |
|
|
Apr 16 02:15:39 PM PDT 24 |
Apr 16 02:15:52 PM PDT 24 |
1405647407 ps |
| T427 |
/workspace/coverage/default/39.sram_ctrl_regwen.2784385411 |
|
|
Apr 16 02:15:25 PM PDT 24 |
Apr 16 02:28:20 PM PDT 24 |
96820660592 ps |
| T428 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1616725878 |
|
|
Apr 16 02:16:26 PM PDT 24 |
Apr 16 02:18:49 PM PDT 24 |
5013239829 ps |
| T429 |
/workspace/coverage/default/7.sram_ctrl_executable.1039894088 |
|
|
Apr 16 02:11:38 PM PDT 24 |
Apr 16 02:20:15 PM PDT 24 |
18895375249 ps |
| T430 |
/workspace/coverage/default/4.sram_ctrl_regwen.648678863 |
|
|
Apr 16 02:11:29 PM PDT 24 |
Apr 16 02:17:29 PM PDT 24 |
6583334119 ps |
| T431 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1661969262 |
|
|
Apr 16 02:11:16 PM PDT 24 |
Apr 16 02:14:26 PM PDT 24 |
11097616669 ps |
| T432 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2756414567 |
|
|
Apr 16 02:16:13 PM PDT 24 |
Apr 16 02:17:44 PM PDT 24 |
10689640327 ps |
| T433 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.2775628112 |
|
|
Apr 16 02:13:22 PM PDT 24 |
Apr 16 02:23:04 PM PDT 24 |
35560687896 ps |
| T434 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.2684097058 |
|
|
Apr 16 02:15:56 PM PDT 24 |
Apr 16 02:16:59 PM PDT 24 |
9725973303 ps |
| T435 |
/workspace/coverage/default/42.sram_ctrl_alert_test.774987874 |
|
|
Apr 16 02:15:59 PM PDT 24 |
Apr 16 02:16:00 PM PDT 24 |
40504103 ps |
| T436 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.2977740007 |
|
|
Apr 16 02:16:34 PM PDT 24 |
Apr 16 02:19:10 PM PDT 24 |
9345029406 ps |
| T437 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.787112743 |
|
|
Apr 16 02:13:37 PM PDT 24 |
Apr 16 02:14:38 PM PDT 24 |
21901342320 ps |
| T438 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.1458612330 |
|
|
Apr 16 02:12:32 PM PDT 24 |
Apr 16 02:13:05 PM PDT 24 |
1571631558 ps |
| T439 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.2843133247 |
|
|
Apr 16 02:13:42 PM PDT 24 |
Apr 16 02:15:48 PM PDT 24 |
1979563092 ps |
| T440 |
/workspace/coverage/default/21.sram_ctrl_partial_access.2032575528 |
|
|
Apr 16 02:12:55 PM PDT 24 |
Apr 16 02:13:14 PM PDT 24 |
909186756 ps |
| T441 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.1999490459 |
|
|
Apr 16 02:13:53 PM PDT 24 |
Apr 16 02:13:58 PM PDT 24 |
348037456 ps |
| T442 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.2461257158 |
|
|
Apr 16 02:16:00 PM PDT 24 |
Apr 16 02:16:08 PM PDT 24 |
511252815 ps |
| T443 |
/workspace/coverage/default/6.sram_ctrl_alert_test.4089458047 |
|
|
Apr 16 02:11:37 PM PDT 24 |
Apr 16 02:11:38 PM PDT 24 |
40352569 ps |
| T444 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.610990556 |
|
|
Apr 16 02:14:34 PM PDT 24 |
Apr 16 02:20:41 PM PDT 24 |
6510455171 ps |
| T445 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3142304269 |
|
|
Apr 16 02:16:50 PM PDT 24 |
Apr 16 02:18:57 PM PDT 24 |
3097415471 ps |
| T446 |
/workspace/coverage/default/14.sram_ctrl_smoke.2904980975 |
|
|
Apr 16 02:12:10 PM PDT 24 |
Apr 16 02:12:24 PM PDT 24 |
770034083 ps |
| T447 |
/workspace/coverage/default/22.sram_ctrl_executable.312397151 |
|
|
Apr 16 02:13:06 PM PDT 24 |
Apr 16 02:29:04 PM PDT 24 |
17566557131 ps |
| T448 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.4279899453 |
|
|
Apr 16 02:15:26 PM PDT 24 |
Apr 16 02:36:09 PM PDT 24 |
13322293234 ps |
| T449 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3618756740 |
|
|
Apr 16 02:11:39 PM PDT 24 |
Apr 16 02:14:44 PM PDT 24 |
3988626321 ps |
| T450 |
/workspace/coverage/default/14.sram_ctrl_bijection.2250214490 |
|
|
Apr 16 02:12:10 PM PDT 24 |
Apr 16 02:40:36 PM PDT 24 |
184094995655 ps |
| T451 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.2563125017 |
|
|
Apr 16 02:14:38 PM PDT 24 |
Apr 16 02:23:30 PM PDT 24 |
9648504506 ps |
| T452 |
/workspace/coverage/default/30.sram_ctrl_mem_walk.1385929909 |
|
|
Apr 16 02:14:07 PM PDT 24 |
Apr 16 02:18:55 PM PDT 24 |
27599816031 ps |
| T453 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.12437618 |
|
|
Apr 16 02:12:38 PM PDT 24 |
Apr 16 02:12:55 PM PDT 24 |
733571011 ps |
| T454 |
/workspace/coverage/default/5.sram_ctrl_bijection.3596611771 |
|
|
Apr 16 02:11:34 PM PDT 24 |
Apr 16 02:48:18 PM PDT 24 |
30498091824 ps |
| T455 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.112555646 |
|
|
Apr 16 02:15:59 PM PDT 24 |
Apr 16 02:27:17 PM PDT 24 |
20760670005 ps |
| T456 |
/workspace/coverage/default/22.sram_ctrl_alert_test.2850384749 |
|
|
Apr 16 02:13:04 PM PDT 24 |
Apr 16 02:13:05 PM PDT 24 |
21530082 ps |
| T457 |
/workspace/coverage/default/15.sram_ctrl_alert_test.3950677523 |
|
|
Apr 16 02:12:18 PM PDT 24 |
Apr 16 02:12:20 PM PDT 24 |
37445414 ps |
| T458 |
/workspace/coverage/default/37.sram_ctrl_stress_all.3386245336 |
|
|
Apr 16 02:15:11 PM PDT 24 |
Apr 16 03:19:39 PM PDT 24 |
332148486571 ps |
| T459 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2743799915 |
|
|
Apr 16 02:17:07 PM PDT 24 |
Apr 16 02:17:59 PM PDT 24 |
7172916964 ps |
| T460 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1825348994 |
|
|
Apr 16 02:12:21 PM PDT 24 |
Apr 16 02:12:51 PM PDT 24 |
722398084 ps |
| T461 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.1589354410 |
|
|
Apr 16 02:11:23 PM PDT 24 |
Apr 16 02:12:37 PM PDT 24 |
52167321279 ps |
| T462 |
/workspace/coverage/default/47.sram_ctrl_regwen.1722661609 |
|
|
Apr 16 02:16:44 PM PDT 24 |
Apr 16 02:23:18 PM PDT 24 |
7642264675 ps |
| T463 |
/workspace/coverage/default/44.sram_ctrl_partial_access.2324480140 |
|
|
Apr 16 02:16:10 PM PDT 24 |
Apr 16 02:16:32 PM PDT 24 |
2473562994 ps |
| T464 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.1024166172 |
|
|
Apr 16 02:12:18 PM PDT 24 |
Apr 16 02:40:47 PM PDT 24 |
12051632423 ps |
| T465 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.2337032132 |
|
|
Apr 16 02:13:38 PM PDT 24 |
Apr 16 02:15:05 PM PDT 24 |
6188640217 ps |
| T466 |
/workspace/coverage/default/9.sram_ctrl_stress_all.3191989096 |
|
|
Apr 16 02:11:47 PM PDT 24 |
Apr 16 03:42:31 PM PDT 24 |
727867720665 ps |
| T467 |
/workspace/coverage/default/1.sram_ctrl_regwen.313279374 |
|
|
Apr 16 02:11:19 PM PDT 24 |
Apr 16 02:16:24 PM PDT 24 |
3356796622 ps |
| T468 |
/workspace/coverage/default/12.sram_ctrl_bijection.2931374314 |
|
|
Apr 16 02:11:52 PM PDT 24 |
Apr 16 02:25:23 PM PDT 24 |
38552626564 ps |
| T469 |
/workspace/coverage/default/49.sram_ctrl_regwen.3132962483 |
|
|
Apr 16 02:17:02 PM PDT 24 |
Apr 16 02:36:30 PM PDT 24 |
13401505921 ps |
| T470 |
/workspace/coverage/default/34.sram_ctrl_smoke.3699206865 |
|
|
Apr 16 02:14:37 PM PDT 24 |
Apr 16 02:15:44 PM PDT 24 |
8758518870 ps |
| T471 |
/workspace/coverage/default/23.sram_ctrl_regwen.253167156 |
|
|
Apr 16 02:13:19 PM PDT 24 |
Apr 16 02:27:22 PM PDT 24 |
134286651366 ps |
| T472 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.396344149 |
|
|
Apr 16 02:14:45 PM PDT 24 |
Apr 16 02:17:05 PM PDT 24 |
4546290889 ps |
| T473 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.426421495 |
|
|
Apr 16 02:12:14 PM PDT 24 |
Apr 16 02:12:49 PM PDT 24 |
1488463207 ps |
| T474 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.2017139742 |
|
|
Apr 16 02:13:12 PM PDT 24 |
Apr 16 02:13:15 PM PDT 24 |
359970741 ps |
| T475 |
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.3536429372 |
|
|
Apr 16 02:15:13 PM PDT 24 |
Apr 16 02:17:12 PM PDT 24 |
794526321 ps |
| T476 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3890360971 |
|
|
Apr 16 02:11:58 PM PDT 24 |
Apr 16 02:14:38 PM PDT 24 |
858323378 ps |
| T477 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.1978223695 |
|
|
Apr 16 02:12:36 PM PDT 24 |
Apr 16 02:13:34 PM PDT 24 |
31159846381 ps |
| T478 |
/workspace/coverage/default/24.sram_ctrl_bijection.2159370837 |
|
|
Apr 16 02:13:18 PM PDT 24 |
Apr 16 02:21:00 PM PDT 24 |
28746677010 ps |
| T479 |
/workspace/coverage/default/21.sram_ctrl_alert_test.2760904780 |
|
|
Apr 16 02:13:00 PM PDT 24 |
Apr 16 02:13:01 PM PDT 24 |
86919148 ps |
| T480 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.1238764844 |
|
|
Apr 16 02:12:21 PM PDT 24 |
Apr 16 02:14:54 PM PDT 24 |
10612622949 ps |
| T481 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2542766459 |
|
|
Apr 16 02:16:58 PM PDT 24 |
Apr 16 02:17:59 PM PDT 24 |
8916957936 ps |
| T482 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.105792034 |
|
|
Apr 16 02:11:57 PM PDT 24 |
Apr 16 02:21:26 PM PDT 24 |
26180277117 ps |
| T483 |
/workspace/coverage/default/17.sram_ctrl_partial_access.1261860325 |
|
|
Apr 16 02:12:22 PM PDT 24 |
Apr 16 02:12:38 PM PDT 24 |
5326901255 ps |
| T484 |
/workspace/coverage/default/46.sram_ctrl_stress_all.785399017 |
|
|
Apr 16 02:16:40 PM PDT 24 |
Apr 16 03:11:14 PM PDT 24 |
97586519424 ps |
| T485 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1783857817 |
|
|
Apr 16 02:11:47 PM PDT 24 |
Apr 16 02:16:32 PM PDT 24 |
29885962109 ps |
| T486 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1214308333 |
|
|
Apr 16 02:11:37 PM PDT 24 |
Apr 16 02:11:47 PM PDT 24 |
1358605366 ps |
| T487 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.1290739838 |
|
|
Apr 16 02:11:28 PM PDT 24 |
Apr 16 02:11:36 PM PDT 24 |
5159217842 ps |
| T488 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.320991540 |
|
|
Apr 16 02:16:10 PM PDT 24 |
Apr 16 02:24:27 PM PDT 24 |
81457023114 ps |
| T489 |
/workspace/coverage/default/21.sram_ctrl_stress_all.3929729673 |
|
|
Apr 16 02:12:59 PM PDT 24 |
Apr 16 03:05:50 PM PDT 24 |
294512610721 ps |
| T490 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.3566829705 |
|
|
Apr 16 02:14:23 PM PDT 24 |
Apr 16 02:24:09 PM PDT 24 |
24827388548 ps |
| T491 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3644459791 |
|
|
Apr 16 02:11:22 PM PDT 24 |
Apr 16 02:32:11 PM PDT 24 |
29189186779 ps |
| T492 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3988275192 |
|
|
Apr 16 02:11:19 PM PDT 24 |
Apr 16 02:22:22 PM PDT 24 |
90585263598 ps |
| T493 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1769290163 |
|
|
Apr 16 02:17:09 PM PDT 24 |
Apr 16 02:17:12 PM PDT 24 |
1412250334 ps |
| T494 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1987264747 |
|
|
Apr 16 02:11:32 PM PDT 24 |
Apr 16 02:28:25 PM PDT 24 |
14127938763 ps |
| T495 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.1077560297 |
|
|
Apr 16 02:14:09 PM PDT 24 |
Apr 16 02:14:59 PM PDT 24 |
734084377 ps |
| T496 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.4254072540 |
|
|
Apr 16 02:14:32 PM PDT 24 |
Apr 16 02:14:44 PM PDT 24 |
2831416772 ps |
| T497 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.2335126777 |
|
|
Apr 16 02:11:53 PM PDT 24 |
Apr 16 02:17:19 PM PDT 24 |
85942436373 ps |
| T498 |
/workspace/coverage/default/31.sram_ctrl_partial_access.2445004848 |
|
|
Apr 16 02:14:12 PM PDT 24 |
Apr 16 02:15:18 PM PDT 24 |
1612226201 ps |
| T499 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.3312176721 |
|
|
Apr 16 02:15:06 PM PDT 24 |
Apr 16 02:15:22 PM PDT 24 |
728937041 ps |
| T500 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2633170638 |
|
|
Apr 16 02:13:34 PM PDT 24 |
Apr 16 02:13:50 PM PDT 24 |
3141004094 ps |
| T501 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.4237218572 |
|
|
Apr 16 02:11:47 PM PDT 24 |
Apr 16 02:12:26 PM PDT 24 |
26047318692 ps |
| T502 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.832612954 |
|
|
Apr 16 02:15:03 PM PDT 24 |
Apr 16 02:27:27 PM PDT 24 |
36728988168 ps |
| T503 |
/workspace/coverage/default/22.sram_ctrl_partial_access.909489641 |
|
|
Apr 16 02:13:03 PM PDT 24 |
Apr 16 02:13:09 PM PDT 24 |
3498442781 ps |
| T504 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.17615636 |
|
|
Apr 16 02:11:15 PM PDT 24 |
Apr 16 02:11:48 PM PDT 24 |
4001409253 ps |
| T505 |
/workspace/coverage/default/41.sram_ctrl_executable.199693536 |
|
|
Apr 16 02:15:42 PM PDT 24 |
Apr 16 02:31:04 PM PDT 24 |
20962356669 ps |
| T506 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.3799096718 |
|
|
Apr 16 02:13:49 PM PDT 24 |
Apr 16 02:15:00 PM PDT 24 |
19939012722 ps |
| T507 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.2392036149 |
|
|
Apr 16 02:14:54 PM PDT 24 |
Apr 16 02:18:54 PM PDT 24 |
8142255906 ps |
| T508 |
/workspace/coverage/default/27.sram_ctrl_regwen.3662303135 |
|
|
Apr 16 02:13:45 PM PDT 24 |
Apr 16 02:22:25 PM PDT 24 |
5067709955 ps |
| T509 |
/workspace/coverage/default/23.sram_ctrl_partial_access.1369811983 |
|
|
Apr 16 02:13:08 PM PDT 24 |
Apr 16 02:13:33 PM PDT 24 |
5314100660 ps |
| T510 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.854262375 |
|
|
Apr 16 02:11:39 PM PDT 24 |
Apr 16 02:14:40 PM PDT 24 |
3039369000 ps |
| T511 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.3749486662 |
|
|
Apr 16 02:16:17 PM PDT 24 |
Apr 16 02:20:10 PM PDT 24 |
8576290551 ps |
| T512 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.3769876613 |
|
|
Apr 16 02:13:58 PM PDT 24 |
Apr 16 02:14:11 PM PDT 24 |
1052689881 ps |
| T513 |
/workspace/coverage/default/5.sram_ctrl_partial_access.2008749177 |
|
|
Apr 16 02:11:32 PM PDT 24 |
Apr 16 02:11:53 PM PDT 24 |
1401732292 ps |
| T514 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.3599208649 |
|
|
Apr 16 02:12:17 PM PDT 24 |
Apr 16 02:13:05 PM PDT 24 |
768483963 ps |
| T515 |
/workspace/coverage/default/16.sram_ctrl_regwen.1548100352 |
|
|
Apr 16 02:12:21 PM PDT 24 |
Apr 16 02:23:46 PM PDT 24 |
2543410641 ps |
| T516 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.3293082114 |
|
|
Apr 16 02:16:39 PM PDT 24 |
Apr 16 02:17:16 PM PDT 24 |
750507698 ps |
| T517 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.1470361258 |
|
|
Apr 16 02:13:20 PM PDT 24 |
Apr 16 02:18:19 PM PDT 24 |
51001272684 ps |
| T518 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.3739847096 |
|
|
Apr 16 02:13:25 PM PDT 24 |
Apr 16 02:14:33 PM PDT 24 |
11821755511 ps |
| T519 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.488083777 |
|
|
Apr 16 02:16:08 PM PDT 24 |
Apr 16 02:21:17 PM PDT 24 |
52996215955 ps |
| T520 |
/workspace/coverage/default/39.sram_ctrl_partial_access.2602708979 |
|
|
Apr 16 02:15:27 PM PDT 24 |
Apr 16 02:17:57 PM PDT 24 |
2733204562 ps |
| T521 |
/workspace/coverage/default/41.sram_ctrl_stress_all.512716385 |
|
|
Apr 16 02:15:48 PM PDT 24 |
Apr 16 02:47:07 PM PDT 24 |
90832185657 ps |
| T522 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2067444209 |
|
|
Apr 16 02:16:19 PM PDT 24 |
Apr 16 02:16:23 PM PDT 24 |
349165941 ps |
| T523 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.3626996233 |
|
|
Apr 16 02:12:21 PM PDT 24 |
Apr 16 02:14:00 PM PDT 24 |
15161687626 ps |
| T524 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.3186186372 |
|
|
Apr 16 02:13:23 PM PDT 24 |
Apr 16 02:16:28 PM PDT 24 |
2567389824 ps |
| T525 |
/workspace/coverage/default/31.sram_ctrl_smoke.2869254861 |
|
|
Apr 16 02:14:11 PM PDT 24 |
Apr 16 02:14:24 PM PDT 24 |
502471966 ps |
| T526 |
/workspace/coverage/default/43.sram_ctrl_regwen.3365458006 |
|
|
Apr 16 02:16:07 PM PDT 24 |
Apr 16 02:30:10 PM PDT 24 |
12711934851 ps |
| T527 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1326744229 |
|
|
Apr 16 02:11:15 PM PDT 24 |
Apr 16 02:11:20 PM PDT 24 |
1864576177 ps |
| T528 |
/workspace/coverage/default/9.sram_ctrl_bijection.543154370 |
|
|
Apr 16 02:11:48 PM PDT 24 |
Apr 16 02:29:00 PM PDT 24 |
192590476315 ps |
| T529 |
/workspace/coverage/default/10.sram_ctrl_stress_all.3949785927 |
|
|
Apr 16 02:11:47 PM PDT 24 |
Apr 16 03:09:20 PM PDT 24 |
127318612322 ps |
| T530 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.259810048 |
|
|
Apr 16 02:12:14 PM PDT 24 |
Apr 16 02:13:22 PM PDT 24 |
19935402556 ps |
| T531 |
/workspace/coverage/default/24.sram_ctrl_regwen.1942818436 |
|
|
Apr 16 02:13:18 PM PDT 24 |
Apr 16 02:37:32 PM PDT 24 |
15382085190 ps |
| T532 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.1640580869 |
|
|
Apr 16 02:14:43 PM PDT 24 |
Apr 16 02:15:13 PM PDT 24 |
754790354 ps |
| T533 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.1007410314 |
|
|
Apr 16 02:14:46 PM PDT 24 |
Apr 16 02:15:45 PM PDT 24 |
3077011289 ps |
| T534 |
/workspace/coverage/default/10.sram_ctrl_partial_access.928774029 |
|
|
Apr 16 02:11:46 PM PDT 24 |
Apr 16 02:12:00 PM PDT 24 |
981496820 ps |
| T535 |
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.3269794434 |
|
|
Apr 16 02:14:18 PM PDT 24 |
Apr 16 02:16:57 PM PDT 24 |
20735792750 ps |
| T536 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.721697701 |
|
|
Apr 16 02:12:14 PM PDT 24 |
Apr 16 02:12:28 PM PDT 24 |
793721494 ps |
| T537 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.3787375342 |
|
|
Apr 16 02:14:30 PM PDT 24 |
Apr 16 02:15:40 PM PDT 24 |
10815760959 ps |
| T538 |
/workspace/coverage/default/42.sram_ctrl_bijection.2092959675 |
|
|
Apr 16 02:15:48 PM PDT 24 |
Apr 16 02:58:14 PM PDT 24 |
460040955504 ps |
| T539 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1176526581 |
|
|
Apr 16 02:11:54 PM PDT 24 |
Apr 16 02:12:39 PM PDT 24 |
6745379365 ps |
| T540 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.793499044 |
|
|
Apr 16 02:12:32 PM PDT 24 |
Apr 16 02:13:21 PM PDT 24 |
3024432009 ps |
| T541 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.3197005153 |
|
|
Apr 16 02:13:48 PM PDT 24 |
Apr 16 02:17:01 PM PDT 24 |
2860592127 ps |