Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.09 99.81 96.99 100.00 100.00 98.60 99.70 98.52


Total tests in report: 1035
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
86.25 86.25 98.13 98.13 77.40 77.40 88.28 88.28 100.00 100.00 92.68 92.68 94.96 94.96 52.32 52.32 /workspace/coverage/default/43.sram_ctrl_stress_all.3642860754
93.44 7.19 98.88 0.75 85.58 8.18 97.80 9.52 100.00 0.00 93.52 0.85 96.29 1.34 82.00 29.68 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.219658815
94.61 1.17 99.25 0.37 88.57 2.99 98.86 1.07 100.00 0.00 95.77 2.25 96.88 0.59 82.93 0.93 /workspace/coverage/default/1.sram_ctrl_sec_cm.688447585
95.55 0.93 99.25 0.00 90.13 1.56 98.86 0.00 100.00 0.00 96.90 1.13 97.77 0.89 85.90 2.97 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.201644015
96.43 0.89 99.25 0.00 90.78 0.65 98.86 0.00 100.00 0.00 96.90 0.00 97.77 0.00 91.47 5.57 /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2724961539
97.26 0.83 99.44 0.19 92.86 2.08 98.86 0.00 100.00 0.00 98.03 1.13 97.77 0.00 93.88 2.41 /workspace/coverage/default/17.sram_ctrl_stress_all.3993756807
97.60 0.34 99.44 0.00 92.86 0.00 98.86 0.00 100.00 0.00 98.03 0.00 97.92 0.15 96.10 2.23 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.2325908610
97.81 0.21 99.44 0.00 92.86 0.00 98.93 0.07 100.00 0.00 98.03 0.00 99.11 1.19 96.29 0.19 /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2501673871
98.01 0.20 99.72 0.28 93.12 0.26 98.93 0.00 100.00 0.00 98.31 0.28 99.11 0.00 96.85 0.56 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.1664964121
98.19 0.18 99.72 0.00 93.12 0.00 99.22 0.28 100.00 0.00 98.31 0.00 99.55 0.45 97.40 0.56 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.3212186560
98.34 0.16 99.81 0.09 93.12 0.00 99.93 0.71 100.00 0.00 98.59 0.28 99.55 0.00 97.40 0.00 /workspace/coverage/default/42.sram_ctrl_ram_cfg.701864257
98.49 0.15 99.81 0.00 93.51 0.39 99.93 0.00 100.00 0.00 98.87 0.28 99.55 0.00 97.77 0.37 /workspace/coverage/default/34.sram_ctrl_stress_all.1381669371
98.57 0.08 99.81 0.00 93.51 0.00 99.93 0.00 100.00 0.00 98.87 0.00 99.55 0.00 98.33 0.56 /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3151504364
98.64 0.07 99.81 0.00 93.90 0.39 100.00 0.07 100.00 0.00 98.87 0.00 99.55 0.00 98.33 0.00 /workspace/coverage/default/1.sram_ctrl_alert_test.232427915
98.68 0.04 99.81 0.00 94.16 0.26 100.00 0.00 100.00 0.00 98.87 0.00 99.55 0.00 98.33 0.00 /workspace/coverage/default/0.sram_ctrl_sec_cm.1671729685
98.70 0.03 99.81 0.00 94.16 0.00 100.00 0.00 100.00 0.00 98.87 0.00 99.55 0.00 98.52 0.19 /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2489620280
98.72 0.02 99.81 0.00 94.16 0.00 100.00 0.00 100.00 0.00 98.87 0.00 99.70 0.15 98.52 0.00 /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2946458906

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3331192034
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1156654737
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1223193802
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1188969482
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3607128585
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.4105319908
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3993543734
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.4070908781
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2217825181
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3203959610
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3494502274
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1099490584
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1720521004
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2004411223
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.458050792
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.503186477
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1079621276
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3473797297
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1379278101
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2367890925
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.816986852
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.431689449
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.41879995
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3762054206
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.4248142794
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3441052453
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1090260101
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2601639414
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1004673379
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1914623921
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.4059506673
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.729562956
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.379705753
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1800097615
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.4262744256
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.910695683
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3669798728
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.4164509725
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3858046484
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3304674680
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.651075991
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.20921822
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3522426690
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1084766308
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3641377913
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1454302509
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2108969012
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3360385094
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2396806007
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1181711325
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3990712402
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3948115286
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2490410713
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.760057313
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.713495651
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2207748691
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3303854681
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.95701016
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3453258887
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2755855518
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1657020895
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2109165546
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3683281273
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.484596532
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1866957733
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1802860487
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2003772086
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3677494069
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2163181081
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2364188781
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1610183646
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3086388572
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1823162927
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1544001044
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2582091534
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2265574452
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2940394177
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.675244047
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1117811331
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1413668558
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1160282349
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2484886117
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3646329520
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2627964634
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.158256658
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1563697882
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3565975440
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.86797658
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.202656836
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3909161699
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.875085129
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.872136791
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3475746258
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.90717479
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3992002891
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.615888614
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.303399970
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3297381869
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.914696334
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2336193999
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.219146700
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2040828163
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.181752874
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1591479952
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.716421806
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2660547563
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.1257129395
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.597690353
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2407444462
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.898175691
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.909722289
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3307135219
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.3002950415
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2043995441
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.203169653
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3767609159
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2342775816
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.789536671
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2670413982
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3909204672
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.3445795419
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.944047624
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.674664322
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3064298858
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.807472590
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1683614326
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1025175752
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2581392852
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.547331667
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.4063154482
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3208547557
/workspace/coverage/default/0.sram_ctrl_alert_test.238326234
/workspace/coverage/default/0.sram_ctrl_bijection.2010229028
/workspace/coverage/default/0.sram_ctrl_executable.2422402328
/workspace/coverage/default/0.sram_ctrl_lc_escalation.392861352
/workspace/coverage/default/0.sram_ctrl_max_throughput.3425638901
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2901084214
/workspace/coverage/default/0.sram_ctrl_mem_walk.1742693393
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3999994034
/workspace/coverage/default/0.sram_ctrl_partial_access.3558222723
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3943853198
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3650552080
/workspace/coverage/default/0.sram_ctrl_regwen.355618068
/workspace/coverage/default/0.sram_ctrl_smoke.536883866
/workspace/coverage/default/0.sram_ctrl_stress_all.433435733
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3946640051
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3016035934
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3893907734
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.214914577
/workspace/coverage/default/1.sram_ctrl_bijection.4150093211
/workspace/coverage/default/1.sram_ctrl_executable.1219243017
/workspace/coverage/default/1.sram_ctrl_lc_escalation.236685511
/workspace/coverage/default/1.sram_ctrl_max_throughput.152262212
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3049598028
/workspace/coverage/default/1.sram_ctrl_mem_walk.3828971589
/workspace/coverage/default/1.sram_ctrl_multiple_keys.4107027772
/workspace/coverage/default/1.sram_ctrl_partial_access.1392105904
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.972206476
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1342608275
/workspace/coverage/default/1.sram_ctrl_regwen.1046296199
/workspace/coverage/default/1.sram_ctrl_smoke.1379949246
/workspace/coverage/default/1.sram_ctrl_stress_all.3391899407
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.769759608
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.4159359073
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.4058936298
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.4126370247
/workspace/coverage/default/10.sram_ctrl_alert_test.2016711738
/workspace/coverage/default/10.sram_ctrl_bijection.2971002957
/workspace/coverage/default/10.sram_ctrl_executable.3221985069
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3188576256
/workspace/coverage/default/10.sram_ctrl_max_throughput.335415028
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.476571599
/workspace/coverage/default/10.sram_ctrl_mem_walk.1699346147
/workspace/coverage/default/10.sram_ctrl_multiple_keys.4039980724
/workspace/coverage/default/10.sram_ctrl_partial_access.2513761977
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1111563942
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3333419607
/workspace/coverage/default/10.sram_ctrl_regwen.402221578
/workspace/coverage/default/10.sram_ctrl_smoke.1135663075
/workspace/coverage/default/10.sram_ctrl_stress_all.1304187429
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.183060318
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1645946141
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.506564670
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1392292684
/workspace/coverage/default/11.sram_ctrl_alert_test.3224099899
/workspace/coverage/default/11.sram_ctrl_bijection.3170939728
/workspace/coverage/default/11.sram_ctrl_executable.2660751566
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1936295123
/workspace/coverage/default/11.sram_ctrl_max_throughput.2976787188
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2881674400
/workspace/coverage/default/11.sram_ctrl_mem_walk.3102781326
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3190740437
/workspace/coverage/default/11.sram_ctrl_partial_access.2101970176
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.4008392277
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2947307336
/workspace/coverage/default/11.sram_ctrl_regwen.3582074287
/workspace/coverage/default/11.sram_ctrl_smoke.3569025784
/workspace/coverage/default/11.sram_ctrl_stress_all.394707649
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.252851687
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.420155510
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3507265017
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.4058264079
/workspace/coverage/default/12.sram_ctrl_alert_test.1736052510
/workspace/coverage/default/12.sram_ctrl_bijection.493240702
/workspace/coverage/default/12.sram_ctrl_executable.82953470
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2730701066
/workspace/coverage/default/12.sram_ctrl_max_throughput.2139579668
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3583259293
/workspace/coverage/default/12.sram_ctrl_mem_walk.421193581
/workspace/coverage/default/12.sram_ctrl_multiple_keys.649923255
/workspace/coverage/default/12.sram_ctrl_partial_access.4153321742
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/workspace/coverage/default/43.sram_ctrl_alert_test.2560837620
/workspace/coverage/default/43.sram_ctrl_bijection.3182233694
/workspace/coverage/default/43.sram_ctrl_executable.691469448
/workspace/coverage/default/43.sram_ctrl_lc_escalation.107882005
/workspace/coverage/default/43.sram_ctrl_max_throughput.1901622323
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.2384296903
/workspace/coverage/default/43.sram_ctrl_mem_walk.1458612452
/workspace/coverage/default/43.sram_ctrl_multiple_keys.728159338
/workspace/coverage/default/43.sram_ctrl_partial_access.1423990960
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3404547544
/workspace/coverage/default/43.sram_ctrl_ram_cfg.1691432671
/workspace/coverage/default/43.sram_ctrl_regwen.4268177884
/workspace/coverage/default/43.sram_ctrl_smoke.2609818656
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.864558350
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3172073234
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.668693932
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.938027171
/workspace/coverage/default/44.sram_ctrl_alert_test.201712397
/workspace/coverage/default/44.sram_ctrl_bijection.3144277556
/workspace/coverage/default/44.sram_ctrl_executable.2093942533
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1640635716
/workspace/coverage/default/44.sram_ctrl_max_throughput.2993832679
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3055152572
/workspace/coverage/default/44.sram_ctrl_mem_walk.4115763193
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3634791641
/workspace/coverage/default/44.sram_ctrl_partial_access.3996728016
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2812361980
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2058186413
/workspace/coverage/default/44.sram_ctrl_regwen.3898920071
/workspace/coverage/default/44.sram_ctrl_smoke.1250679692
/workspace/coverage/default/44.sram_ctrl_stress_all.1588097834
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2634109009
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3458487598
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1552341051
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3445455211
/workspace/coverage/default/45.sram_ctrl_alert_test.165324087
/workspace/coverage/default/45.sram_ctrl_bijection.3189958693
/workspace/coverage/default/45.sram_ctrl_executable.154352637
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1397718594
/workspace/coverage/default/45.sram_ctrl_max_throughput.1281948232
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.796415311
/workspace/coverage/default/45.sram_ctrl_mem_walk.3048138035
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2713851711
/workspace/coverage/default/45.sram_ctrl_partial_access.2471069707
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.560295643
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3963381221
/workspace/coverage/default/45.sram_ctrl_regwen.3284786882
/workspace/coverage/default/45.sram_ctrl_smoke.405568264
/workspace/coverage/default/45.sram_ctrl_stress_all.1971460720
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3064400197
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2677623067
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1818962068
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.364871365
/workspace/coverage/default/46.sram_ctrl_alert_test.758129783
/workspace/coverage/default/46.sram_ctrl_bijection.454155669
/workspace/coverage/default/46.sram_ctrl_executable.3487563601
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3302910268
/workspace/coverage/default/46.sram_ctrl_max_throughput.2334695208
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.598536633
/workspace/coverage/default/46.sram_ctrl_mem_walk.2498981559
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1573627388
/workspace/coverage/default/46.sram_ctrl_partial_access.4255344200
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.875751817
/workspace/coverage/default/46.sram_ctrl_ram_cfg.911486454
/workspace/coverage/default/46.sram_ctrl_regwen.1759005806
/workspace/coverage/default/46.sram_ctrl_smoke.1542477155
/workspace/coverage/default/46.sram_ctrl_stress_all.3369854975
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1611557408
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.398858864
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3410093979
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3465395679
/workspace/coverage/default/47.sram_ctrl_alert_test.2725058118
/workspace/coverage/default/47.sram_ctrl_bijection.943509080
/workspace/coverage/default/47.sram_ctrl_executable.3506524656
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3939557095
/workspace/coverage/default/47.sram_ctrl_max_throughput.1628463643
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2830679667
/workspace/coverage/default/47.sram_ctrl_mem_walk.819270399
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3958848317
/workspace/coverage/default/47.sram_ctrl_partial_access.3088189654
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1541024160
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2777728620
/workspace/coverage/default/47.sram_ctrl_regwen.583053191
/workspace/coverage/default/47.sram_ctrl_smoke.871283649
/workspace/coverage/default/47.sram_ctrl_stress_all.2172265576
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3026775645
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.637246787
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3961548796
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1125769611
/workspace/coverage/default/48.sram_ctrl_alert_test.2141403372
/workspace/coverage/default/48.sram_ctrl_bijection.3669787488
/workspace/coverage/default/48.sram_ctrl_executable.833444209
/workspace/coverage/default/48.sram_ctrl_lc_escalation.4289177415
/workspace/coverage/default/48.sram_ctrl_max_throughput.3846826986
/workspace/coverage/default/48.sram_ctrl_mem_walk.2169532966
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3261836992
/workspace/coverage/default/48.sram_ctrl_partial_access.3477610319
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.4095075585
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1338288671
/workspace/coverage/default/48.sram_ctrl_regwen.2744815951
/workspace/coverage/default/48.sram_ctrl_smoke.435315889
/workspace/coverage/default/48.sram_ctrl_stress_all.2238473642
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.759503417
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2910785381
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.595037637
/workspace/coverage/default/49.sram_ctrl_alert_test.391240858
/workspace/coverage/default/49.sram_ctrl_bijection.581149514
/workspace/coverage/default/49.sram_ctrl_executable.2695039992
/workspace/coverage/default/49.sram_ctrl_lc_escalation.4280897754
/workspace/coverage/default/49.sram_ctrl_max_throughput.2966023270
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.898200906
/workspace/coverage/default/49.sram_ctrl_mem_walk.3739560997
/workspace/coverage/default/49.sram_ctrl_multiple_keys.71895870
/workspace/coverage/default/49.sram_ctrl_partial_access.1718359188
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2994071612
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3772335749
/workspace/coverage/default/49.sram_ctrl_regwen.4170593319
/workspace/coverage/default/49.sram_ctrl_smoke.2327501754
/workspace/coverage/default/49.sram_ctrl_stress_all.37755025
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.724830610
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1746939550
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3566365037
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.954088223
/workspace/coverage/default/5.sram_ctrl_alert_test.1952368941
/workspace/coverage/default/5.sram_ctrl_bijection.681653901
/workspace/coverage/default/5.sram_ctrl_executable.2496413516
/workspace/coverage/default/5.sram_ctrl_lc_escalation.32394994
/workspace/coverage/default/5.sram_ctrl_max_throughput.2122576444
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1646798077
/workspace/coverage/default/5.sram_ctrl_mem_walk.923987403
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1857541387
/workspace/coverage/default/5.sram_ctrl_partial_access.589913088
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.979134498
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1809166646
/workspace/coverage/default/5.sram_ctrl_regwen.2121925811
/workspace/coverage/default/5.sram_ctrl_smoke.1769991102
/workspace/coverage/default/5.sram_ctrl_stress_all.2644747458
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1331877497
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.804995781
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2925712856
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3957856646
/workspace/coverage/default/6.sram_ctrl_alert_test.2744414092
/workspace/coverage/default/6.sram_ctrl_bijection.3104015579
/workspace/coverage/default/6.sram_ctrl_executable.1220711200
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1459761247
/workspace/coverage/default/6.sram_ctrl_max_throughput.1892788310
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.4261370148
/workspace/coverage/default/6.sram_ctrl_mem_walk.170550180
/workspace/coverage/default/6.sram_ctrl_multiple_keys.683467569
/workspace/coverage/default/6.sram_ctrl_partial_access.4060964355
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.887379969
/workspace/coverage/default/6.sram_ctrl_ram_cfg.635986568
/workspace/coverage/default/6.sram_ctrl_regwen.1800872462
/workspace/coverage/default/6.sram_ctrl_smoke.1582131471
/workspace/coverage/default/6.sram_ctrl_stress_all.1432350925
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2446992250
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3821625479
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1005907951
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3998168498
/workspace/coverage/default/7.sram_ctrl_alert_test.1870766907
/workspace/coverage/default/7.sram_ctrl_bijection.3373439212
/workspace/coverage/default/7.sram_ctrl_executable.157662127
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3139039053
/workspace/coverage/default/7.sram_ctrl_max_throughput.1291473614
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1358997705
/workspace/coverage/default/7.sram_ctrl_mem_walk.3319293297
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2903663996
/workspace/coverage/default/7.sram_ctrl_partial_access.351480017
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2604817356
/workspace/coverage/default/7.sram_ctrl_ram_cfg.4018567552
/workspace/coverage/default/7.sram_ctrl_regwen.3007349258
/workspace/coverage/default/7.sram_ctrl_smoke.3275028663
/workspace/coverage/default/7.sram_ctrl_stress_all.783837486
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.315634096
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1484103474
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4207627068
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2595889188
/workspace/coverage/default/8.sram_ctrl_alert_test.1819649416
/workspace/coverage/default/8.sram_ctrl_bijection.1736087490
/workspace/coverage/default/8.sram_ctrl_executable.2532697784
/workspace/coverage/default/8.sram_ctrl_lc_escalation.4248047913
/workspace/coverage/default/8.sram_ctrl_max_throughput.180231710
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2131732735
/workspace/coverage/default/8.sram_ctrl_mem_walk.2786889585
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3789687704
/workspace/coverage/default/8.sram_ctrl_partial_access.4095827760
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.4001129625
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3844707834
/workspace/coverage/default/8.sram_ctrl_regwen.3121535460
/workspace/coverage/default/8.sram_ctrl_smoke.4152715723
/workspace/coverage/default/8.sram_ctrl_stress_all.129455239
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2489516523
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2529951091
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1322053436
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2164747286
/workspace/coverage/default/9.sram_ctrl_alert_test.2932512942
/workspace/coverage/default/9.sram_ctrl_bijection.3232355052
/workspace/coverage/default/9.sram_ctrl_executable.148593131
/workspace/coverage/default/9.sram_ctrl_lc_escalation.515997184
/workspace/coverage/default/9.sram_ctrl_max_throughput.2237071182
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2181505723
/workspace/coverage/default/9.sram_ctrl_mem_walk.3377164672
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3767876457
/workspace/coverage/default/9.sram_ctrl_partial_access.2545884894
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1660889536
/workspace/coverage/default/9.sram_ctrl_ram_cfg.944473871
/workspace/coverage/default/9.sram_ctrl_regwen.1053020368
/workspace/coverage/default/9.sram_ctrl_smoke.2730681631
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3079170775
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.819086534
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.939545413



Total test records in report: 1035
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/27.sram_ctrl_smoke.1604965966 Apr 21 02:43:39 PM PDT 24 Apr 21 02:43:57 PM PDT 24 2267173854 ps
T2 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.3104625023 Apr 21 02:44:10 PM PDT 24 Apr 21 02:44:53 PM PDT 24 2954674111 ps
T3 /workspace/coverage/default/43.sram_ctrl_stress_all.3642860754 Apr 21 02:47:35 PM PDT 24 Apr 21 03:08:21 PM PDT 24 27847166865 ps
T5 /workspace/coverage/default/37.sram_ctrl_smoke.3714864326 Apr 21 02:46:01 PM PDT 24 Apr 21 02:46:59 PM PDT 24 1154704397 ps
T9 /workspace/coverage/default/47.sram_ctrl_multiple_keys.3958848317 Apr 21 02:48:16 PM PDT 24 Apr 21 03:00:56 PM PDT 24 25350153108 ps
T10 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.1848064200 Apr 21 02:44:14 PM PDT 24 Apr 21 02:45:17 PM PDT 24 993719937 ps
T4 /workspace/coverage/default/26.sram_ctrl_partial_access.3744254499 Apr 21 02:43:24 PM PDT 24 Apr 21 02:43:47 PM PDT 24 907178026 ps
T11 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.201644015 Apr 21 02:48:41 PM PDT 24 Apr 21 02:51:16 PM PDT 24 10365431935 ps
T12 /workspace/coverage/default/12.sram_ctrl_regwen.2712121271 Apr 21 02:40:04 PM PDT 24 Apr 21 02:50:11 PM PDT 24 14479542992 ps
T13 /workspace/coverage/default/4.sram_ctrl_bijection.1966287419 Apr 21 02:37:47 PM PDT 24 Apr 21 02:56:37 PM PDT 24 16753683039 ps
T17 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.219658815 Apr 21 02:48:43 PM PDT 24 Apr 21 02:48:51 PM PDT 24 904435024 ps
T16 /workspace/coverage/default/7.sram_ctrl_partial_access.351480017 Apr 21 02:38:30 PM PDT 24 Apr 21 02:38:45 PM PDT 24 1081099705 ps
T18 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.1664964121 Apr 21 02:40:31 PM PDT 24 Apr 21 03:18:01 PM PDT 24 79559561023 ps
T26 /workspace/coverage/default/4.sram_ctrl_executable.1685294355 Apr 21 02:37:49 PM PDT 24 Apr 21 02:40:24 PM PDT 24 11657401624 ps
T52 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.2546433549 Apr 21 02:42:14 PM PDT 24 Apr 21 02:48:38 PM PDT 24 5370130053 ps
T14 /workspace/coverage/default/23.sram_ctrl_partial_access.4168142460 Apr 21 02:42:41 PM PDT 24 Apr 21 02:43:22 PM PDT 24 759128251 ps
T53 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3410093979 Apr 21 02:48:03 PM PDT 24 Apr 21 02:48:31 PM PDT 24 2842327872 ps
T54 /workspace/coverage/default/7.sram_ctrl_bijection.3373439212 Apr 21 02:38:30 PM PDT 24 Apr 21 02:51:41 PM PDT 24 19939763311 ps
T25 /workspace/coverage/default/40.sram_ctrl_regwen.1231927074 Apr 21 02:46:46 PM PDT 24 Apr 21 03:27:54 PM PDT 24 69701850614 ps
T8 /workspace/coverage/default/14.sram_ctrl_stress_all.3077938049 Apr 21 02:40:40 PM PDT 24 Apr 21 03:38:23 PM PDT 24 134981648753 ps
T27 /workspace/coverage/default/32.sram_ctrl_smoke.3544718535 Apr 21 02:44:49 PM PDT 24 Apr 21 02:45:39 PM PDT 24 1670915979 ps
T138 /workspace/coverage/default/25.sram_ctrl_smoke.603408122 Apr 21 02:43:08 PM PDT 24 Apr 21 02:43:14 PM PDT 24 448126649 ps
T55 /workspace/coverage/default/13.sram_ctrl_regwen.3157712505 Apr 21 02:40:14 PM PDT 24 Apr 21 02:45:55 PM PDT 24 5744614759 ps
T15 /workspace/coverage/default/12.sram_ctrl_multiple_keys.649923255 Apr 21 02:39:54 PM PDT 24 Apr 21 02:51:16 PM PDT 24 15230861547 ps
T6 /workspace/coverage/default/0.sram_ctrl_stress_all.433435733 Apr 21 02:36:50 PM PDT 24 Apr 21 03:03:43 PM PDT 24 26998900505 ps
T22 /workspace/coverage/default/7.sram_ctrl_alert_test.1870766907 Apr 21 02:38:43 PM PDT 24 Apr 21 02:38:44 PM PDT 24 44095410 ps
T42 /workspace/coverage/default/33.sram_ctrl_executable.931202387 Apr 21 02:45:09 PM PDT 24 Apr 21 02:51:23 PM PDT 24 17997332349 ps
T28 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.660515085 Apr 21 02:42:36 PM PDT 24 Apr 21 02:43:02 PM PDT 24 3194615157 ps
T30 /workspace/coverage/default/46.sram_ctrl_ram_cfg.911486454 Apr 21 02:48:11 PM PDT 24 Apr 21 02:48:15 PM PDT 24 358207315 ps
T7 /workspace/coverage/default/41.sram_ctrl_lc_escalation.4143331880 Apr 21 02:46:57 PM PDT 24 Apr 21 02:48:20 PM PDT 24 12731520471 ps
T43 /workspace/coverage/default/1.sram_ctrl_executable.1219243017 Apr 21 02:36:54 PM PDT 24 Apr 21 03:04:04 PM PDT 24 20625696411 ps
T139 /workspace/coverage/default/6.sram_ctrl_max_throughput.1892788310 Apr 21 02:38:19 PM PDT 24 Apr 21 02:39:28 PM PDT 24 1233691482 ps
T56 /workspace/coverage/default/48.sram_ctrl_lc_escalation.4289177415 Apr 21 02:48:33 PM PDT 24 Apr 21 02:50:12 PM PDT 24 54275658837 ps
T137 /workspace/coverage/default/19.sram_ctrl_multiple_keys.2476691870 Apr 21 02:41:46 PM PDT 24 Apr 21 02:45:34 PM PDT 24 5395938641 ps
T140 /workspace/coverage/default/5.sram_ctrl_partial_access.589913088 Apr 21 02:37:57 PM PDT 24 Apr 21 02:38:05 PM PDT 24 2826792202 ps
T90 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.2529951091 Apr 21 02:38:47 PM PDT 24 Apr 21 02:45:06 PM PDT 24 5486335224 ps
T141 /workspace/coverage/default/0.sram_ctrl_mem_walk.1742693393 Apr 21 02:36:42 PM PDT 24 Apr 21 02:39:24 PM PDT 24 10759183318 ps
T142 /workspace/coverage/default/1.sram_ctrl_multiple_keys.4107027772 Apr 21 02:36:54 PM PDT 24 Apr 21 02:47:12 PM PDT 24 38501599598 ps
T19 /workspace/coverage/default/1.sram_ctrl_sec_cm.688447585 Apr 21 02:37:03 PM PDT 24 Apr 21 02:37:06 PM PDT 24 366554568 ps
T31 /workspace/coverage/default/42.sram_ctrl_ram_cfg.701864257 Apr 21 02:47:13 PM PDT 24 Apr 21 02:47:16 PM PDT 24 357823905 ps
T23 /workspace/coverage/default/29.sram_ctrl_alert_test.2137115774 Apr 21 02:44:20 PM PDT 24 Apr 21 02:44:21 PM PDT 24 28537908 ps
T35 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.2164747286 Apr 21 02:39:09 PM PDT 24 Apr 21 02:52:19 PM PDT 24 10254365403 ps
T36 /workspace/coverage/default/20.sram_ctrl_stress_pipeline.1425602254 Apr 21 02:42:02 PM PDT 24 Apr 21 02:46:54 PM PDT 24 4512352453 ps
T32 /workspace/coverage/default/37.sram_ctrl_ram_cfg.3468715921 Apr 21 02:46:07 PM PDT 24 Apr 21 02:46:11 PM PDT 24 382130587 ps
T37 /workspace/coverage/default/47.sram_ctrl_regwen.583053191 Apr 21 02:48:20 PM PDT 24 Apr 21 03:03:50 PM PDT 24 30166689789 ps
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T40 /workspace/coverage/default/45.sram_ctrl_smoke.405568264 Apr 21 02:47:46 PM PDT 24 Apr 21 02:47:54 PM PDT 24 2934781875 ps
T29 /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.2122991053 Apr 21 02:42:25 PM PDT 24 Apr 21 02:42:46 PM PDT 24 796495571 ps
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T143 /workspace/coverage/default/32.sram_ctrl_max_throughput.385151867 Apr 21 02:44:51 PM PDT 24 Apr 21 02:44:59 PM PDT 24 678636724 ps
T45 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3064400197 Apr 21 02:47:57 PM PDT 24 Apr 21 02:50:59 PM PDT 24 4320018623 ps
T144 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2068048426 Apr 21 02:42:02 PM PDT 24 Apr 21 02:42:57 PM PDT 24 1471760726 ps
T145 /workspace/coverage/default/8.sram_ctrl_partial_access.4095827760 Apr 21 02:38:47 PM PDT 24 Apr 21 02:38:57 PM PDT 24 2884600148 ps
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T46 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3265758236 Apr 21 02:37:31 PM PDT 24 Apr 21 02:41:29 PM PDT 24 5147092144 ps
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T47 /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.252851687 Apr 21 02:39:52 PM PDT 24 Apr 21 02:39:58 PM PDT 24 545968325 ps
T147 /workspace/coverage/default/34.sram_ctrl_executable.496047927 Apr 21 02:45:22 PM PDT 24 Apr 21 02:45:42 PM PDT 24 2743049909 ps
T41 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.3613736771 Apr 21 02:46:31 PM PDT 24 Apr 21 02:46:55 PM PDT 24 4993074699 ps
T148 /workspace/coverage/default/20.sram_ctrl_max_throughput.540931153 Apr 21 02:42:04 PM PDT 24 Apr 21 02:42:10 PM PDT 24 700238512 ps
T73 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.233138204 Apr 21 02:43:45 PM PDT 24 Apr 21 02:45:49 PM PDT 24 1661304690 ps
T24 /workspace/coverage/default/1.sram_ctrl_alert_test.232427915 Apr 21 02:37:05 PM PDT 24 Apr 21 02:37:06 PM PDT 24 16698443 ps
T149 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.86396723 Apr 21 02:42:57 PM PDT 24 Apr 21 02:43:05 PM PDT 24 2185529887 ps
T48 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.3212186560 Apr 21 02:45:39 PM PDT 24 Apr 21 02:45:47 PM PDT 24 861031419 ps
T109 /workspace/coverage/default/2.sram_ctrl_ram_cfg.2445349316 Apr 21 02:37:17 PM PDT 24 Apr 21 02:37:21 PM PDT 24 351109925 ps
T110 /workspace/coverage/default/37.sram_ctrl_bijection.1482165447 Apr 21 02:46:00 PM PDT 24 Apr 21 03:05:02 PM PDT 24 71269807788 ps
T111 /workspace/coverage/default/23.sram_ctrl_ram_cfg.4171527916 Apr 21 02:42:46 PM PDT 24 Apr 21 02:42:50 PM PDT 24 1349950424 ps
T112 /workspace/coverage/default/18.sram_ctrl_multiple_keys.76989414 Apr 21 02:41:33 PM PDT 24 Apr 21 02:58:47 PM PDT 24 11816303351 ps
T49 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.1090607823 Apr 21 02:44:00 PM PDT 24 Apr 21 02:46:37 PM PDT 24 3191453446 ps
T74 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.2044819888 Apr 21 02:42:20 PM PDT 24 Apr 21 03:04:52 PM PDT 24 57530545761 ps
T113 /workspace/coverage/default/23.sram_ctrl_alert_test.1277137305 Apr 21 02:42:47 PM PDT 24 Apr 21 02:42:48 PM PDT 24 14175026 ps
T114 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3728259319 Apr 21 02:40:31 PM PDT 24 Apr 21 02:41:20 PM PDT 24 2974420512 ps
T115 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.1400959663 Apr 21 02:37:48 PM PDT 24 Apr 21 02:39:32 PM PDT 24 778271763 ps
T150 /workspace/coverage/default/13.sram_ctrl_ram_cfg.1481744743 Apr 21 02:40:18 PM PDT 24 Apr 21 02:40:22 PM PDT 24 1984472181 ps
T151 /workspace/coverage/default/40.sram_ctrl_multiple_keys.1377909072 Apr 21 02:46:40 PM PDT 24 Apr 21 02:59:31 PM PDT 24 7968729843 ps
T152 /workspace/coverage/default/9.sram_ctrl_lc_escalation.515997184 Apr 21 02:39:09 PM PDT 24 Apr 21 02:40:13 PM PDT 24 16863493399 ps
T153 /workspace/coverage/default/39.sram_ctrl_mem_walk.2940740106 Apr 21 02:46:35 PM PDT 24 Apr 21 02:50:45 PM PDT 24 7900564156 ps
T130 /workspace/coverage/default/2.sram_ctrl_stress_all.1712863792 Apr 21 02:37:16 PM PDT 24 Apr 21 03:17:37 PM PDT 24 398445821945 ps
T154 /workspace/coverage/default/38.sram_ctrl_multiple_keys.34329051 Apr 21 02:46:13 PM PDT 24 Apr 21 03:05:11 PM PDT 24 7259742963 ps
T155 /workspace/coverage/default/27.sram_ctrl_alert_test.2940920156 Apr 21 02:43:48 PM PDT 24 Apr 21 02:43:49 PM PDT 24 22574341 ps
T156 /workspace/coverage/default/21.sram_ctrl_ram_cfg.2173692276 Apr 21 02:42:22 PM PDT 24 Apr 21 02:42:26 PM PDT 24 368042392 ps
T157 /workspace/coverage/default/45.sram_ctrl_partial_access.2471069707 Apr 21 02:47:46 PM PDT 24 Apr 21 02:47:56 PM PDT 24 442511029 ps
T91 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.560295643 Apr 21 02:47:50 PM PDT 24 Apr 21 02:52:50 PM PDT 24 4952814894 ps
T158 /workspace/coverage/default/11.sram_ctrl_ram_cfg.2947307336 Apr 21 02:39:48 PM PDT 24 Apr 21 02:39:53 PM PDT 24 6688618642 ps
T92 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.1483744904 Apr 21 02:46:11 PM PDT 24 Apr 21 02:51:44 PM PDT 24 77702895334 ps
T159 /workspace/coverage/default/20.sram_ctrl_mem_walk.2385935658 Apr 21 02:42:08 PM PDT 24 Apr 21 02:47:05 PM PDT 24 14349181134 ps
T160 /workspace/coverage/default/31.sram_ctrl_ram_cfg.457578226 Apr 21 02:44:41 PM PDT 24 Apr 21 02:44:45 PM PDT 24 358534182 ps
T161 /workspace/coverage/default/49.sram_ctrl_max_throughput.2966023270 Apr 21 02:48:52 PM PDT 24 Apr 21 02:49:05 PM PDT 24 694003738 ps
T162 /workspace/coverage/default/38.sram_ctrl_lc_escalation.630131864 Apr 21 02:46:19 PM PDT 24 Apr 21 02:47:22 PM PDT 24 137444125743 ps
T163 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.4254711417 Apr 21 02:46:13 PM PDT 24 Apr 21 02:46:42 PM PDT 24 14190954796 ps
T164 /workspace/coverage/default/24.sram_ctrl_bijection.2512780316 Apr 21 02:42:47 PM PDT 24 Apr 21 03:12:52 PM PDT 24 99650581661 ps
T75 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.2030004528 Apr 21 02:42:33 PM PDT 24 Apr 21 03:13:17 PM PDT 24 94804369281 ps
T165 /workspace/coverage/default/48.sram_ctrl_ram_cfg.1338288671 Apr 21 02:48:35 PM PDT 24 Apr 21 02:48:38 PM PDT 24 348981122 ps
T166 /workspace/coverage/default/30.sram_ctrl_bijection.1115478971 Apr 21 02:44:25 PM PDT 24 Apr 21 03:15:21 PM PDT 24 76822336149 ps
T167 /workspace/coverage/default/13.sram_ctrl_alert_test.1810218414 Apr 21 02:40:24 PM PDT 24 Apr 21 02:40:25 PM PDT 24 18646228 ps
T76 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.472077159 Apr 21 02:45:38 PM PDT 24 Apr 21 02:46:57 PM PDT 24 9781455017 ps
T168 /workspace/coverage/default/21.sram_ctrl_mem_walk.3957025572 Apr 21 02:42:23 PM PDT 24 Apr 21 02:44:25 PM PDT 24 10385371786 ps
T169 /workspace/coverage/default/38.sram_ctrl_ram_cfg.3339725361 Apr 21 02:46:25 PM PDT 24 Apr 21 02:46:30 PM PDT 24 1523329727 ps
T93 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.804995781 Apr 21 02:37:57 PM PDT 24 Apr 21 02:42:57 PM PDT 24 9745011834 ps
T170 /workspace/coverage/default/13.sram_ctrl_mem_walk.2449322359 Apr 21 02:40:21 PM PDT 24 Apr 21 02:42:47 PM PDT 24 10763648112 ps
T171 /workspace/coverage/default/2.sram_ctrl_alert_test.2721616050 Apr 21 02:37:15 PM PDT 24 Apr 21 02:37:16 PM PDT 24 24001582 ps
T131 /workspace/coverage/default/15.sram_ctrl_executable.3061407111 Apr 21 02:40:52 PM PDT 24 Apr 21 03:06:57 PM PDT 24 23569256540 ps
T172 /workspace/coverage/default/47.sram_ctrl_alert_test.2725058118 Apr 21 02:48:22 PM PDT 24 Apr 21 02:48:23 PM PDT 24 48995152 ps
T173 /workspace/coverage/default/33.sram_ctrl_smoke.4085586948 Apr 21 02:45:00 PM PDT 24 Apr 21 02:45:17 PM PDT 24 3169706993 ps
T174 /workspace/coverage/default/31.sram_ctrl_max_throughput.2744487751 Apr 21 02:44:35 PM PDT 24 Apr 21 02:45:50 PM PDT 24 942848657 ps
T175 /workspace/coverage/default/12.sram_ctrl_mem_walk.421193581 Apr 21 02:40:04 PM PDT 24 Apr 21 02:44:54 PM PDT 24 28657235089 ps
T44 /workspace/coverage/default/24.sram_ctrl_executable.3071445339 Apr 21 02:42:58 PM PDT 24 Apr 21 02:59:27 PM PDT 24 35956816579 ps
T94 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.2325908610 Apr 21 02:47:06 PM PDT 24 Apr 21 02:56:03 PM PDT 24 25139830414 ps
T95 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.3172073234 Apr 21 02:47:25 PM PDT 24 Apr 21 02:50:41 PM PDT 24 3073014995 ps
T132 /workspace/coverage/default/2.sram_ctrl_executable.301293109 Apr 21 02:37:12 PM PDT 24 Apr 21 02:37:48 PM PDT 24 4948753185 ps
T77 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.364871365 Apr 21 02:48:07 PM PDT 24 Apr 21 02:53:30 PM PDT 24 12515650994 ps
T176 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.3821625479 Apr 21 02:38:13 PM PDT 24 Apr 21 02:42:02 PM PDT 24 3384752420 ps
T177 /workspace/coverage/default/7.sram_ctrl_mem_walk.3319293297 Apr 21 02:38:36 PM PDT 24 Apr 21 02:40:59 PM PDT 24 7092839041 ps
T178 /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.1337691488 Apr 21 02:45:16 PM PDT 24 Apr 21 02:54:18 PM PDT 24 28517618192 ps
T179 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.1746939550 Apr 21 02:48:46 PM PDT 24 Apr 21 02:51:46 PM PDT 24 7125170225 ps
T180 /workspace/coverage/default/46.sram_ctrl_alert_test.758129783 Apr 21 02:48:14 PM PDT 24 Apr 21 02:48:15 PM PDT 24 31753623 ps
T133 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.3076848772 Apr 21 02:37:10 PM PDT 24 Apr 21 02:43:33 PM PDT 24 36524900051 ps
T181 /workspace/coverage/default/17.sram_ctrl_stress_all.3993756807 Apr 21 02:41:28 PM PDT 24 Apr 21 04:52:23 PM PDT 24 272124356270 ps
T182 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.1447360601 Apr 21 02:46:05 PM PDT 24 Apr 21 02:50:15 PM PDT 24 19069192009 ps
T86 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.1932679884 Apr 21 02:42:26 PM PDT 24 Apr 21 02:45:02 PM PDT 24 19556390959 ps
T183 /workspace/coverage/default/15.sram_ctrl_multiple_keys.3780809187 Apr 21 02:40:43 PM PDT 24 Apr 21 02:57:41 PM PDT 24 24966878723 ps
T184 /workspace/coverage/default/13.sram_ctrl_executable.2109087994 Apr 21 02:40:15 PM PDT 24 Apr 21 02:41:16 PM PDT 24 4701621717 ps
T185 /workspace/coverage/default/18.sram_ctrl_smoke.3971660284 Apr 21 02:41:29 PM PDT 24 Apr 21 02:41:48 PM PDT 24 1137833922 ps
T186 /workspace/coverage/default/10.sram_ctrl_max_throughput.335415028 Apr 21 02:39:24 PM PDT 24 Apr 21 02:41:03 PM PDT 24 820142787 ps
T187 /workspace/coverage/default/47.sram_ctrl_executable.3506524656 Apr 21 02:48:17 PM PDT 24 Apr 21 02:50:14 PM PDT 24 8320058295 ps
T188 /workspace/coverage/default/38.sram_ctrl_max_throughput.3213500180 Apr 21 02:46:15 PM PDT 24 Apr 21 02:47:29 PM PDT 24 1502741369 ps
T189 /workspace/coverage/default/45.sram_ctrl_ram_cfg.3963381221 Apr 21 02:47:51 PM PDT 24 Apr 21 02:47:55 PM PDT 24 677006011 ps
T190 /workspace/coverage/default/8.sram_ctrl_max_throughput.180231710 Apr 21 02:38:47 PM PDT 24 Apr 21 02:39:04 PM PDT 24 1429691160 ps
T191 /workspace/coverage/default/29.sram_ctrl_partial_access.718393283 Apr 21 02:44:12 PM PDT 24 Apr 21 02:44:29 PM PDT 24 5531307546 ps
T192 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.1218526327 Apr 21 02:37:10 PM PDT 24 Apr 21 02:37:18 PM PDT 24 1415878057 ps
T193 /workspace/coverage/default/42.sram_ctrl_lc_escalation.2639724123 Apr 21 02:47:10 PM PDT 24 Apr 21 02:48:47 PM PDT 24 27286547751 ps
T194 /workspace/coverage/default/31.sram_ctrl_regwen.2389082595 Apr 21 02:44:41 PM PDT 24 Apr 21 02:57:22 PM PDT 24 141013781191 ps
T195 /workspace/coverage/default/34.sram_ctrl_max_throughput.4231812683 Apr 21 02:45:15 PM PDT 24 Apr 21 02:47:28 PM PDT 24 4026502699 ps
T196 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.610901415 Apr 21 02:45:06 PM PDT 24 Apr 21 02:51:27 PM PDT 24 77064100232 ps
T197 /workspace/coverage/default/29.sram_ctrl_bijection.2910406016 Apr 21 02:44:07 PM PDT 24 Apr 21 03:36:34 PM PDT 24 344722181329 ps
T198 /workspace/coverage/default/31.sram_ctrl_alert_test.1753080180 Apr 21 02:44:45 PM PDT 24 Apr 21 02:44:46 PM PDT 24 15348974 ps
T199 /workspace/coverage/default/8.sram_ctrl_executable.2532697784 Apr 21 02:38:52 PM PDT 24 Apr 21 02:45:28 PM PDT 24 54871517664 ps
T200 /workspace/coverage/default/31.sram_ctrl_stress_all.954673403 Apr 21 02:44:45 PM PDT 24 Apr 21 04:06:20 PM PDT 24 285905421638 ps
T201 /workspace/coverage/default/39.sram_ctrl_executable.1411429112 Apr 21 02:46:31 PM PDT 24 Apr 21 02:50:08 PM PDT 24 11603101079 ps
T202 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.2617026733 Apr 21 02:46:46 PM PDT 24 Apr 21 03:10:49 PM PDT 24 55196238823 ps
T203 /workspace/coverage/default/32.sram_ctrl_regwen.1235453272 Apr 21 02:44:57 PM PDT 24 Apr 21 02:54:42 PM PDT 24 4506937253 ps
T204 /workspace/coverage/default/29.sram_ctrl_ram_cfg.3624585947 Apr 21 02:44:14 PM PDT 24 Apr 21 02:44:18 PM PDT 24 2112026267 ps
T205 /workspace/coverage/default/13.sram_ctrl_multiple_keys.2723697262 Apr 21 02:40:07 PM PDT 24 Apr 21 03:13:53 PM PDT 24 22029317202 ps
T206 /workspace/coverage/default/3.sram_ctrl_ram_cfg.877341765 Apr 21 02:37:32 PM PDT 24 Apr 21 02:37:36 PM PDT 24 1532945503 ps
T207 /workspace/coverage/default/26.sram_ctrl_smoke.1897950196 Apr 21 02:43:20 PM PDT 24 Apr 21 02:43:38 PM PDT 24 4373007760 ps
T208 /workspace/coverage/default/19.sram_ctrl_lc_escalation.2985062411 Apr 21 02:41:47 PM PDT 24 Apr 21 02:42:11 PM PDT 24 11985412890 ps
T209 /workspace/coverage/default/13.sram_ctrl_partial_access.2230615148 Apr 21 02:40:10 PM PDT 24 Apr 21 02:40:21 PM PDT 24 779421301 ps
T210 /workspace/coverage/default/42.sram_ctrl_smoke.3680140719 Apr 21 02:47:02 PM PDT 24 Apr 21 02:47:10 PM PDT 24 739741656 ps
T134 /workspace/coverage/default/34.sram_ctrl_stress_all.1381669371 Apr 21 02:45:29 PM PDT 24 Apr 21 04:33:56 PM PDT 24 728787286582 ps
T211 /workspace/coverage/default/5.sram_ctrl_stress_all.2644747458 Apr 21 02:38:08 PM PDT 24 Apr 21 04:08:48 PM PDT 24 189202689592 ps
T212 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.161181148 Apr 21 02:45:15 PM PDT 24 Apr 21 02:49:17 PM PDT 24 4187746741 ps
T213 /workspace/coverage/default/24.sram_ctrl_alert_test.40492232 Apr 21 02:43:09 PM PDT 24 Apr 21 02:43:10 PM PDT 24 23838163 ps
T214 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.1190141109 Apr 21 02:47:06 PM PDT 24 Apr 21 02:48:15 PM PDT 24 1510459598 ps
T215 /workspace/coverage/default/43.sram_ctrl_ram_cfg.1691432671 Apr 21 02:47:25 PM PDT 24 Apr 21 02:47:29 PM PDT 24 709248512 ps
T216 /workspace/coverage/default/15.sram_ctrl_smoke.3492616810 Apr 21 02:40:44 PM PDT 24 Apr 21 02:40:58 PM PDT 24 2809644095 ps
T217 /workspace/coverage/default/15.sram_ctrl_alert_test.746546927 Apr 21 02:40:55 PM PDT 24 Apr 21 02:40:56 PM PDT 24 44977316 ps
T218 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.1125769611 Apr 21 02:48:32 PM PDT 24 Apr 21 02:58:38 PM PDT 24 9662086772 ps
T219 /workspace/coverage/default/30.sram_ctrl_regwen.4246779358 Apr 21 02:44:25 PM PDT 24 Apr 21 03:12:17 PM PDT 24 8517988246 ps
T220 /workspace/coverage/default/7.sram_ctrl_smoke.3275028663 Apr 21 02:38:25 PM PDT 24 Apr 21 02:38:38 PM PDT 24 1355901638 ps
T221 /workspace/coverage/default/40.sram_ctrl_stress_all.2988637855 Apr 21 02:46:48 PM PDT 24 Apr 21 04:16:35 PM PDT 24 145506556184 ps
T222 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2086484869 Apr 21 02:45:51 PM PDT 24 Apr 21 02:45:59 PM PDT 24 2834158024 ps
T223 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.349705878 Apr 21 02:46:24 PM PDT 24 Apr 21 02:49:23 PM PDT 24 4908472705 ps
T224 /workspace/coverage/default/46.sram_ctrl_bijection.454155669 Apr 21 02:48:04 PM PDT 24 Apr 21 03:41:08 PM PDT 24 305012912235 ps
T225 /workspace/coverage/default/27.sram_ctrl_multiple_keys.811018258 Apr 21 02:43:40 PM PDT 24 Apr 21 02:56:00 PM PDT 24 19534687738 ps
T226 /workspace/coverage/default/18.sram_ctrl_bijection.3405622675 Apr 21 02:41:30 PM PDT 24 Apr 21 03:13:56 PM PDT 24 368796732460 ps
T227 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.4000230368 Apr 21 02:41:02 PM PDT 24 Apr 21 02:49:19 PM PDT 24 43467623621 ps
T228 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4207627068 Apr 21 02:38:29 PM PDT 24 Apr 21 02:39:20 PM PDT 24 1478058148 ps
T229 /workspace/coverage/default/24.sram_ctrl_partial_access.158552578 Apr 21 02:42:50 PM PDT 24 Apr 21 02:43:03 PM PDT 24 2986580456 ps
T230 /workspace/coverage/default/7.sram_ctrl_max_throughput.1291473614 Apr 21 02:38:31 PM PDT 24 Apr 21 02:40:45 PM PDT 24 3776898690 ps
T231 /workspace/coverage/default/25.sram_ctrl_multiple_keys.330352595 Apr 21 02:43:08 PM PDT 24 Apr 21 03:09:10 PM PDT 24 296369390673 ps
T232 /workspace/coverage/default/19.sram_ctrl_stress_pipeline.3331503526 Apr 21 02:41:49 PM PDT 24 Apr 21 02:46:31 PM PDT 24 5264172613 ps
T233 /workspace/coverage/default/37.sram_ctrl_max_throughput.4060687262 Apr 21 02:46:07 PM PDT 24 Apr 21 02:46:17 PM PDT 24 686719478 ps
T234 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.2433483793 Apr 21 02:37:51 PM PDT 24 Apr 21 02:40:24 PM PDT 24 17367309710 ps
T235 /workspace/coverage/default/10.sram_ctrl_partial_access.2513761977 Apr 21 02:39:18 PM PDT 24 Apr 21 02:39:36 PM PDT 24 1723997813 ps
T236 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.598536633 Apr 21 02:48:12 PM PDT 24 Apr 21 02:49:21 PM PDT 24 3802400146 ps
T50 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.915030236 Apr 21 02:45:57 PM PDT 24 Apr 21 02:46:13 PM PDT 24 507602441 ps
T237 /workspace/coverage/default/43.sram_ctrl_smoke.2609818656 Apr 21 02:47:20 PM PDT 24 Apr 21 02:47:27 PM PDT 24 688618954 ps
T238 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.775256528 Apr 21 02:45:11 PM PDT 24 Apr 21 03:07:11 PM PDT 24 75624223073 ps
T239 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.4215241432 Apr 21 02:42:29 PM PDT 24 Apr 21 02:50:28 PM PDT 24 73184953894 ps
T240 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.1850040310 Apr 21 02:40:28 PM PDT 24 Apr 21 02:43:42 PM PDT 24 8847788700 ps
T241 /workspace/coverage/default/38.sram_ctrl_executable.2001265901 Apr 21 02:46:16 PM PDT 24 Apr 21 02:50:21 PM PDT 24 2042847532 ps
T242 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.428917041 Apr 21 02:41:33 PM PDT 24 Apr 21 02:44:23 PM PDT 24 3120605940 ps
T243 /workspace/coverage/default/36.sram_ctrl_bijection.1271385860 Apr 21 02:45:50 PM PDT 24 Apr 21 03:39:30 PM PDT 24 218221771021 ps
T244 /workspace/coverage/default/35.sram_ctrl_stress_all.1427012694 Apr 21 02:45:42 PM PDT 24 Apr 21 04:30:35 PM PDT 24 457993283661 ps
T245 /workspace/coverage/default/30.sram_ctrl_partial_access.694959678 Apr 21 02:44:17 PM PDT 24 Apr 21 02:44:38 PM PDT 24 1449395560 ps
T246 /workspace/coverage/default/12.sram_ctrl_max_throughput.2139579668 Apr 21 02:39:57 PM PDT 24 Apr 21 02:40:06 PM PDT 24 5234717767 ps
T247 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.3213236945 Apr 21 02:40:50 PM PDT 24 Apr 21 02:47:51 PM PDT 24 19071420035 ps
T117 /workspace/coverage/default/33.sram_ctrl_lc_escalation.670580908 Apr 21 02:45:10 PM PDT 24 Apr 21 02:45:21 PM PDT 24 1305065440 ps
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