Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	15679817	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

165550982

1

T1

3143

T2

1275

T3

2897

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	89317876	1			T1	31456		T2	3576		T3	1568
values[0x0]	44401481	1			T1	9943		T2	1191		T3	784
values[0x1]	47511442	1			T1	21277		T2	2375		T3	843

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7993395	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

173237404

1

T1

28157

T2

4221

T3

3049

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	645037	1			T1	253		T2	37		T3	13
valid_sources[0x01]	565758	1			T1	226		T2	18		T3	9
valid_sources[0x02]	560118	1			T1	261		T2	33		T3	1
valid_sources[0x03]	573762	1			T1	242		T2	24		T4	355
valid_sources[0x04]	567384	1			T1	245		T2	28		T4	348
valid_sources[0x05]	583972	1			T1	250		T2	21		T3	1
valid_sources[0x06]	558696	1			T1	262		T2	30		T3	3
valid_sources[0x07]	577005	1			T1	240		T2	31		T3	20
valid_sources[0x08]	555241	1			T1	193		T2	25		T3	29
valid_sources[0x09]	543725	1			T1	266		T2	27		T3	15
valid_sources[0x0a]	569445	1			T1	251		T2	12		T3	3
valid_sources[0x0b]	541054	1			T1	230		T2	42		T3	2
valid_sources[0x0c]	552247	1			T1	264		T2	32		T3	8
valid_sources[0x0d]	551795	1			T1	257		T2	30		T3	10
valid_sources[0x0e]	676031	1			T1	265		T2	38		T3	8
valid_sources[0x0f]	546940	1			T1	255		T2	42		T3	27
valid_sources[0x10]	605038	1			T1	239		T2	33		T3	13
valid_sources[0x11]	540007	1			T1	267		T2	34		T3	2
valid_sources[0x12]	577750	1			T1	238		T2	32		T4	369
valid_sources[0x13]	579876	1			T1	232		T2	40		T3	7
valid_sources[0x14]	540372	1			T1	233		T2	44		T3	8
valid_sources[0x15]	655591	1			T1	241		T2	23		T3	48
valid_sources[0x16]	549524	1			T1	225		T2	36		T3	5
valid_sources[0x17]	621016	1			T1	243		T2	11		T3	7
valid_sources[0x18]	540376	1			T1	261		T2	17		T3	2
valid_sources[0x19]	562836	1			T1	229		T2	15		T4	376
valid_sources[0x1a]	543591	1			T1	231		T2	26		T3	15
valid_sources[0x1b]	916089	1			T1	271		T2	31		T3	1
valid_sources[0x1c]	581444	1			T1	231		T2	44		T3	31
valid_sources[0x1d]	570113	1			T1	225		T2	23		T3	16
valid_sources[0x1e]	600925	1			T1	271		T2	25		T4	378
valid_sources[0x1f]	591985	1			T1	263		T2	29		T3	24
valid_sources[0x20]	560356	1			T1	243		T2	48		T4	380
valid_sources[0x21]	587342	1			T1	222		T2	27		T4	389
valid_sources[0x22]	585024	1			T1	245		T2	19		T3	16
valid_sources[0x23]	573424	1			T1	254		T2	28		T3	14
valid_sources[0x24]	2003254	1			T1	219		T2	41		T3	6
valid_sources[0x25]	586285	1			T1	287		T2	40		T3	26
valid_sources[0x26]	559884	1			T1	239		T2	23		T3	2
valid_sources[0x27]	566933	1			T1	251		T2	41		T3	8
valid_sources[0x28]	555469	1			T1	212		T2	23		T3	4
valid_sources[0x29]	583930	1			T1	226		T2	26		T3	27
valid_sources[0x2a]	2057162	1			T1	258		T2	34		T4	372
valid_sources[0x2b]	2091236	1			T1	219		T2	24		T3	20
valid_sources[0x2c]	551964	1			T1	226		T2	29		T4	381
valid_sources[0x2d]	998079	1			T1	247		T2	27		T3	32
valid_sources[0x2e]	551123	1			T1	274		T2	28		T3	22
valid_sources[0x2f]	574669	1			T1	253		T2	31		T3	62
valid_sources[0x30]	547499	1			T1	258		T2	21		T3	16
valid_sources[0x31]	567539	1			T1	229		T2	20		T3	20
valid_sources[0x32]	552362	1			T1	254		T2	46		T3	21
valid_sources[0x33]	951387	1			T1	253		T2	28		T3	26
valid_sources[0x34]	547888	1			T1	261		T2	28		T3	26
valid_sources[0x35]	670320	1			T1	223		T2	34		T3	20
valid_sources[0x36]	617182	1			T1	232		T2	20		T3	26
valid_sources[0x37]	572247	1			T1	230		T2	29		T3	16
valid_sources[0x38]	583368	1			T1	266		T2	24		T3	3
valid_sources[0x39]	561650	1			T1	257		T2	47		T3	6
valid_sources[0x3a]	558862	1			T1	247		T2	17		T3	24
valid_sources[0x3b]	1949405	1			T1	217		T2	18		T3	7
valid_sources[0x3c]	570712	1			T1	274		T2	32		T3	14
valid_sources[0x3d]	559613	1			T1	250		T2	23		T3	12
valid_sources[0x3e]	558505	1			T1	281		T2	39		T3	8
valid_sources[0x3f]	563627	1			T1	259		T2	14		T3	18
valid_sources[0x40]	568915	1			T1	245		T2	25		T3	48
valid_sources[0x41]	582117	1			T1	277		T2	25		T3	10
valid_sources[0x42]	592164	1			T1	254		T2	33		T3	35
valid_sources[0x43]	623879	1			T1	253		T2	17		T3	3
valid_sources[0x44]	580034	1			T1	210		T2	27		T3	11
valid_sources[0x45]	572096	1			T1	267		T2	25		T3	3
valid_sources[0x46]	593151	1			T1	249		T2	17		T3	46
valid_sources[0x47]	573633	1			T1	264		T2	31		T3	14
valid_sources[0x48]	590637	1			T1	241		T2	18		T4	363
valid_sources[0x49]	574370	1			T1	240		T2	19		T3	23
valid_sources[0x4a]	624177	1			T1	225		T2	24		T3	17
valid_sources[0x4b]	622933	1			T1	281		T2	18		T3	12
valid_sources[0x4c]	677529	1			T1	249		T2	29		T3	21
valid_sources[0x4d]	790429	1			T1	239		T2	24		T3	17
valid_sources[0x4e]	589886	1			T1	270		T2	25		T3	2
valid_sources[0x4f]	591017	1			T1	229		T2	32		T3	11
valid_sources[0x50]	554399	1			T1	243		T2	37		T3	2
valid_sources[0x51]	555618	1			T1	250		T2	26		T3	2
valid_sources[0x52]	551149	1			T1	254		T2	23		T4	399
valid_sources[0x53]	636011	1			T1	249		T2	25		T3	33
valid_sources[0x54]	546238	1			T1	236		T2	30		T3	39
valid_sources[0x55]	537137	1			T1	208		T2	21		T3	1
valid_sources[0x56]	563035	1			T1	243		T2	36		T3	7
valid_sources[0x57]	568749	1			T1	249		T2	33		T3	13
valid_sources[0x58]	559731	1			T1	266		T2	23		T3	10
valid_sources[0x59]	559817	1			T1	244		T2	23		T3	18
valid_sources[0x5a]	564847	1			T1	223		T2	25		T4	403
valid_sources[0x5b]	602941	1			T1	253		T2	16		T3	4
valid_sources[0x5c]	555978	1			T1	243		T2	37		T4	393
valid_sources[0x5d]	572022	1			T1	236		T2	33		T3	9
valid_sources[0x5e]	1746466	1			T1	269		T2	34		T3	21
valid_sources[0x5f]	552149	1			T1	222		T2	31		T3	22
valid_sources[0x60]	548643	1			T1	258		T2	19		T4	394
valid_sources[0x61]	2145241	1			T1	248		T2	17		T3	6
valid_sources[0x62]	560662	1			T1	200		T2	37		T4	418
valid_sources[0x63]	559067	1			T1	260		T2	30		T4	397
valid_sources[0x64]	565602	1			T1	224		T2	33		T3	5
valid_sources[0x65]	548124	1			T1	208		T2	39		T3	17
valid_sources[0x66]	596292	1			T1	247		T2	22		T3	5
valid_sources[0x67]	544044	1			T1	226		T2	26		T3	21
valid_sources[0x68]	590815	1			T1	214		T2	40		T3	2
valid_sources[0x69]	584678	1			T1	269		T2	28		T4	397
valid_sources[0x6a]	559455	1			T1	241		T2	16		T3	16
valid_sources[0x6b]	2222606	1			T1	253		T2	32		T4	399
valid_sources[0x6c]	560606	1			T1	250		T2	23		T3	1
valid_sources[0x6d]	684896	1			T1	227		T2	34		T3	14
valid_sources[0x6e]	627171	1			T1	293		T2	20		T3	35
valid_sources[0x6f]	539402	1			T1	239		T2	23		T3	16
valid_sources[0x70]	1198227	1			T1	236		T2	32		T4	412
valid_sources[0x71]	638625	1			T1	233		T2	23		T3	14
valid_sources[0x72]	543882	1			T1	221		T2	19		T3	17
valid_sources[0x73]	562550	1			T1	257		T2	28		T3	4
valid_sources[0x74]	557119	1			T1	222		T2	23		T3	20
valid_sources[0x75]	702098	1			T1	224		T2	33		T3	2
valid_sources[0x76]	583357	1			T1	217		T2	23		T3	4
valid_sources[0x77]	667339	1			T1	250		T2	29		T3	34
valid_sources[0x78]	684733	1			T1	221		T2	26		T3	20
valid_sources[0x79]	552458	1			T1	237		T2	26		T3	13
valid_sources[0x7a]	624295	1			T1	274		T2	31		T4	383
valid_sources[0x7b]	569493	1			T1	232		T2	28		T3	32
valid_sources[0x7c]	575924	1			T1	275		T2	37		T3	11
valid_sources[0x7d]	611916	1			T1	257		T2	46		T3	5
valid_sources[0x7e]	574229	1			T1	258		T2	17		T3	4
valid_sources[0x7f]	596937	1			T1	260		T2	39		T3	12
valid_sources[0x80]	1564763	1			T1	230		T2	20		T4	403

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

81434649

1

T1

283

T2

673

T3

1424

values[0x0]

all_enables

biggest_size

42059913

1

T1

1444

T2

314

T3

744

values[0x1]

all_enables

biggest_size

42056420

1

T1

1416

T2

288

T3

729

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	34982	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

163280

1

T1

1

T3

22

T10

2612

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	57208	1			T3	29		T10	690		T11	373
values[0x0]	68191	1			T1	1		T2	1		T3	17
values[0x1]	72863	1			T3	15		T6	1		T9	1

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	26214	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

172048

1

T1

1

T3

28

T10

2674

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	794	1			T10	5		T11	4		T14	14
valid_sources[0x01]	579	1			T10	9		T11	6		T12	1
valid_sources[0x02]	538	1			T10	17		T11	6		T95	1
valid_sources[0x03]	790	1			T10	7		T11	6		T14	7
valid_sources[0x04]	751	1			T10	13		T11	9		T20	1
valid_sources[0x05]	798	1			T10	12		T11	3		T14	14
valid_sources[0x06]	710	1			T10	17		T11	5		T14	3
valid_sources[0x07]	739	1			T10	12		T11	7		T14	4
valid_sources[0x08]	915	1			T10	11		T11	6		T14	8
valid_sources[0x09]	596	1			T3	2		T10	12		T11	5
valid_sources[0x0a]	574	1			T10	7		T11	3		T42	3
valid_sources[0x0b]	828	1			T10	8		T11	6		T14	7
valid_sources[0x0c]	816	1			T10	13		T11	5		T14	6
valid_sources[0x0d]	975	1			T3	1		T10	14		T11	8
valid_sources[0x0e]	727	1			T10	14		T11	2		T14	7
valid_sources[0x0f]	717	1			T10	5		T11	6		T14	10
valid_sources[0x10]	732	1			T10	12		T11	7		T14	8
valid_sources[0x11]	604	1			T10	8		T11	1		T7	1
valid_sources[0x12]	723	1			T10	12		T11	5		T16	2
valid_sources[0x13]	795	1			T10	13		T11	7		T95	2
valid_sources[0x14]	695	1			T10	12		T11	4		T95	1
valid_sources[0x15]	690	1			T10	13		T11	2		T14	7
valid_sources[0x16]	728	1			T10	19		T11	6		T14	9
valid_sources[0x17]	605	1			T10	5		T11	5		T14	10
valid_sources[0x18]	849	1			T10	4		T11	6		T14	11
valid_sources[0x19]	1075	1			T3	1		T10	13		T11	2
valid_sources[0x1a]	713	1			T10	10		T11	7		T14	9
valid_sources[0x1b]	495	1			T10	7		T11	5		T14	6
valid_sources[0x1c]	672	1			T10	10		T11	5		T20	1
valid_sources[0x1d]	729	1			T10	7		T11	7		T14	12
valid_sources[0x1e]	633	1			T10	6		T11	7		T14	5
valid_sources[0x1f]	753	1			T10	8		T11	4		T14	6
valid_sources[0x20]	689	1			T10	12		T11	2		T14	9
valid_sources[0x21]	674	1			T10	9		T11	3		T14	5
valid_sources[0x22]	922	1			T10	6		T11	5		T95	1
valid_sources[0x23]	769	1			T3	1		T10	13		T11	6
valid_sources[0x24]	881	1			T3	1		T10	4		T11	6
valid_sources[0x25]	806	1			T10	8		T11	9		T95	1
valid_sources[0x26]	984	1			T10	7		T11	3		T14	13
valid_sources[0x27]	621	1			T10	13		T11	7		T14	6
valid_sources[0x28]	713	1			T3	1		T10	8		T11	6
valid_sources[0x29]	754	1			T10	8		T11	14		T14	10
valid_sources[0x2a]	1100	1			T10	11		T11	8		T20	2
valid_sources[0x2b]	873	1			T10	10		T11	2		T14	5
valid_sources[0x2c]	1162	1			T10	7		T11	6		T14	7
valid_sources[0x2d]	684	1			T10	7		T11	7		T14	9
valid_sources[0x2e]	905	1			T10	3		T7	1		T14	7
valid_sources[0x2f]	962	1			T10	4		T11	6		T14	5
valid_sources[0x30]	1205	1			T10	13		T11	4		T14	10
valid_sources[0x31]	625	1			T3	1		T10	12		T11	6
valid_sources[0x32]	588	1			T3	1		T10	7		T11	8
valid_sources[0x33]	594	1			T10	8		T11	5		T14	8
valid_sources[0x34]	952	1			T10	9		T11	4		T14	11
valid_sources[0x35]	755	1			T10	13		T11	5		T14	7
valid_sources[0x36]	847	1			T10	5		T11	3		T14	10
valid_sources[0x37]	1346	1			T10	12		T11	6		T14	15
valid_sources[0x38]	759	1			T10	10		T11	5		T67	1
valid_sources[0x39]	864	1			T1	1		T10	9		T11	3
valid_sources[0x3a]	913	1			T10	11		T11	5		T14	4
valid_sources[0x3b]	821	1			T10	3		T11	5		T14	7
valid_sources[0x3c]	594	1			T3	1		T10	8		T11	10
valid_sources[0x3d]	631	1			T10	17		T11	3		T95	1
valid_sources[0x3e]	572	1			T10	8		T11	3		T14	2
valid_sources[0x3f]	989	1			T3	1		T10	10		T11	3
valid_sources[0x40]	586	1			T10	17		T11	8		T14	3
valid_sources[0x41]	757	1			T10	13		T11	3		T14	8
valid_sources[0x42]	1029	1			T10	9		T11	7		T14	11
valid_sources[0x43]	694	1			T10	8		T11	5		T14	9
valid_sources[0x44]	638	1			T10	7		T11	5		T14	8
valid_sources[0x45]	698	1			T3	1		T10	16		T11	5
valid_sources[0x46]	692	1			T10	3		T11	4		T14	7
valid_sources[0x47]	581	1			T10	22		T11	2		T20	1
valid_sources[0x48]	725	1			T10	4		T11	4		T14	11
valid_sources[0x49]	716	1			T3	1		T10	18		T11	7
valid_sources[0x4a]	712	1			T10	7		T11	6		T14	4
valid_sources[0x4b]	874	1			T10	25		T11	5		T14	10
valid_sources[0x4c]	796	1			T10	7		T11	7		T14	6
valid_sources[0x4d]	644	1			T10	25		T11	7		T14	7
valid_sources[0x4e]	739	1			T10	9		T11	4		T95	1
valid_sources[0x4f]	765	1			T10	9		T11	5		T14	10
valid_sources[0x50]	597	1			T10	7		T11	4		T14	15
valid_sources[0x51]	954	1			T10	14		T11	6		T14	8
valid_sources[0x52]	712	1			T10	12		T11	4		T7	4
valid_sources[0x53]	847	1			T10	12		T11	5		T14	8
valid_sources[0x54]	880	1			T10	11		T11	7		T20	1
valid_sources[0x55]	1088	1			T3	1		T10	8		T11	4
valid_sources[0x56]	731	1			T10	3		T11	8		T14	6
valid_sources[0x57]	769	1			T10	8		T11	8		T14	4
valid_sources[0x58]	692	1			T10	7		T11	4		T14	3
valid_sources[0x59]	877	1			T10	5		T11	2		T14	11
valid_sources[0x5a]	1147	1			T10	14		T11	2		T14	4
valid_sources[0x5b]	828	1			T3	1		T10	8		T11	4
valid_sources[0x5c]	1107	1			T10	16		T11	9		T54	1
valid_sources[0x5d]	719	1			T10	10		T11	5		T14	8
valid_sources[0x5e]	643	1			T10	12		T11	7		T14	12
valid_sources[0x5f]	908	1			T10	9		T11	7		T14	5
valid_sources[0x60]	690	1			T10	7		T11	5		T14	9
valid_sources[0x61]	530	1			T10	7		T11	4		T14	10
valid_sources[0x62]	733	1			T3	1		T10	9		T11	4
valid_sources[0x63]	833	1			T10	8		T11	7		T14	9
valid_sources[0x64]	921	1			T10	9		T11	5		T14	5
valid_sources[0x65]	704	1			T10	14		T11	2		T95	2
valid_sources[0x66]	731	1			T10	5		T11	4		T14	5
valid_sources[0x67]	743	1			T10	11		T11	2		T14	8
valid_sources[0x68]	815	1			T6	1		T10	14		T11	1
valid_sources[0x69]	659	1			T3	1		T10	11		T11	5
valid_sources[0x6a]	745	1			T3	2		T10	8		T11	8
valid_sources[0x6b]	932	1			T10	7		T11	5		T95	1
valid_sources[0x6c]	532	1			T10	8		T11	9		T53	2
valid_sources[0x6d]	669	1			T3	1		T10	13		T11	4
valid_sources[0x6e]	1047	1			T3	1		T10	9		T11	13
valid_sources[0x6f]	908	1			T10	16		T11	6		T14	8
valid_sources[0x70]	638	1			T10	20		T11	3		T14	8
valid_sources[0x71]	832	1			T10	12		T11	5		T14	3
valid_sources[0x72]	759	1			T3	2		T10	13		T11	8
valid_sources[0x73]	656	1			T10	6		T11	6		T14	5
valid_sources[0x74]	988	1			T3	1		T10	4		T11	10
valid_sources[0x75]	600	1			T3	2		T10	16		T11	7
valid_sources[0x76]	753	1			T10	16		T11	8		T14	8
valid_sources[0x77]	733	1			T3	2		T10	19		T11	6
valid_sources[0x78]	796	1			T10	16		T11	4		T14	10
valid_sources[0x79]	993	1			T3	1		T10	8		T11	4
valid_sources[0x7a]	708	1			T10	15		T11	3		T14	5
valid_sources[0x7b]	759	1			T10	11		T11	7		T14	12
valid_sources[0x7c]	748	1			T10	3		T11	5		T14	8
valid_sources[0x7d]	624	1			T3	1		T10	10		T11	7
valid_sources[0x7e]	841	1			T10	13		T11	8		T14	14
valid_sources[0x7f]	638	1			T3	1		T10	5		T11	11
valid_sources[0x80]	577	1			T10	6		T11	4		T14	8

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

44535

1

T3

13

T10

648

T11

323

values[0x0]

all_enables

biggest_size

60321

1

T1

1

T3

6

T10

1025

values[0x1]

all_enables

biggest_size

58424

1

T3

3

T10

939

T11

472