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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.09 99.81 96.99 100.00 100.00 98.60 99.70 98.52


Total test records in report: 1036
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T548 /workspace/coverage/default/30.sram_ctrl_access_during_key_req.1504032550 Apr 28 03:03:06 PM PDT 24 Apr 28 03:14:49 PM PDT 24 9929393101 ps
T549 /workspace/coverage/default/0.sram_ctrl_regwen.300448326 Apr 28 03:00:00 PM PDT 24 Apr 28 03:00:07 PM PDT 24 386207550 ps
T550 /workspace/coverage/default/0.sram_ctrl_mem_walk.3546721501 Apr 28 02:59:54 PM PDT 24 Apr 28 03:02:16 PM PDT 24 27474127038 ps
T551 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.4027749147 Apr 28 03:05:26 PM PDT 24 Apr 28 03:24:39 PM PDT 24 29590785550 ps
T552 /workspace/coverage/default/39.sram_ctrl_bijection.983813480 Apr 28 03:04:58 PM PDT 24 Apr 28 03:28:42 PM PDT 24 119951920934 ps
T553 /workspace/coverage/default/17.sram_ctrl_partial_access.1749831618 Apr 28 03:01:02 PM PDT 24 Apr 28 03:02:21 PM PDT 24 2407114121 ps
T554 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.1041913791 Apr 28 03:00:46 PM PDT 24 Apr 28 03:01:23 PM PDT 24 790837259 ps
T555 /workspace/coverage/default/39.sram_ctrl_alert_test.3530835225 Apr 28 03:05:13 PM PDT 24 Apr 28 03:05:14 PM PDT 24 17031349 ps
T556 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.254485329 Apr 28 03:00:03 PM PDT 24 Apr 28 03:01:09 PM PDT 24 11795727653 ps
T557 /workspace/coverage/default/26.sram_ctrl_alert_test.385052491 Apr 28 03:02:34 PM PDT 24 Apr 28 03:02:35 PM PDT 24 27441756 ps
T558 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.2033788756 Apr 28 03:00:07 PM PDT 24 Apr 28 03:09:45 PM PDT 24 23022807934 ps
T559 /workspace/coverage/default/48.sram_ctrl_regwen.494437359 Apr 28 03:06:58 PM PDT 24 Apr 28 03:12:39 PM PDT 24 34773456936 ps
T560 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.1678195176 Apr 28 03:00:08 PM PDT 24 Apr 28 03:02:43 PM PDT 24 8765007906 ps
T561 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3205735076 Apr 28 03:00:14 PM PDT 24 Apr 28 03:03:38 PM PDT 24 18732106728 ps
T562 /workspace/coverage/default/33.sram_ctrl_max_throughput.2627552273 Apr 28 03:03:45 PM PDT 24 Apr 28 03:05:46 PM PDT 24 769193544 ps
T563 /workspace/coverage/default/14.sram_ctrl_ram_cfg.2307346710 Apr 28 03:00:51 PM PDT 24 Apr 28 03:00:56 PM PDT 24 1400823657 ps
T564 /workspace/coverage/default/37.sram_ctrl_regwen.341371761 Apr 28 03:04:31 PM PDT 24 Apr 28 03:15:48 PM PDT 24 9794337977 ps
T565 /workspace/coverage/default/37.sram_ctrl_access_during_key_req.3659393102 Apr 28 03:04:33 PM PDT 24 Apr 28 03:15:48 PM PDT 24 45749626127 ps
T566 /workspace/coverage/default/7.sram_ctrl_ram_cfg.3696261744 Apr 28 03:00:17 PM PDT 24 Apr 28 03:00:25 PM PDT 24 1774598412 ps
T567 /workspace/coverage/default/47.sram_ctrl_bijection.717071933 Apr 28 03:06:41 PM PDT 24 Apr 28 03:49:15 PM PDT 24 424005886028 ps
T568 /workspace/coverage/default/1.sram_ctrl_max_throughput.556976801 Apr 28 03:00:01 PM PDT 24 Apr 28 03:01:14 PM PDT 24 2990442959 ps
T569 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2147393769 Apr 28 03:01:31 PM PDT 24 Apr 28 03:01:38 PM PDT 24 3031106846 ps
T570 /workspace/coverage/default/36.sram_ctrl_ram_cfg.2271892529 Apr 28 03:04:20 PM PDT 24 Apr 28 03:04:23 PM PDT 24 407479432 ps
T571 /workspace/coverage/default/5.sram_ctrl_mem_walk.4010075774 Apr 28 03:00:13 PM PDT 24 Apr 28 03:02:50 PM PDT 24 10665529626 ps
T572 /workspace/coverage/default/20.sram_ctrl_regwen.1300694858 Apr 28 03:01:37 PM PDT 24 Apr 28 03:09:51 PM PDT 24 8181403476 ps
T573 /workspace/coverage/default/14.sram_ctrl_mem_walk.2413848354 Apr 28 03:00:54 PM PDT 24 Apr 28 03:03:29 PM PDT 24 35696586624 ps
T574 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.1841562579 Apr 28 03:01:01 PM PDT 24 Apr 28 03:04:11 PM PDT 24 3038690855 ps
T575 /workspace/coverage/default/21.sram_ctrl_executable.1412816824 Apr 28 03:01:40 PM PDT 24 Apr 28 03:06:02 PM PDT 24 4913491393 ps
T576 /workspace/coverage/default/42.sram_ctrl_executable.4081421158 Apr 28 03:05:51 PM PDT 24 Apr 28 03:15:02 PM PDT 24 3752480738 ps
T577 /workspace/coverage/default/27.sram_ctrl_mem_walk.2680640794 Apr 28 03:02:39 PM PDT 24 Apr 28 03:06:40 PM PDT 24 16421542577 ps
T578 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.3128082803 Apr 28 03:02:40 PM PDT 24 Apr 28 03:08:45 PM PDT 24 22339625428 ps
T579 /workspace/coverage/default/6.sram_ctrl_mem_walk.1284813015 Apr 28 03:00:12 PM PDT 24 Apr 28 03:04:09 PM PDT 24 14599004220 ps
T580 /workspace/coverage/default/2.sram_ctrl_stress_all.1763150428 Apr 28 03:00:05 PM PDT 24 Apr 28 03:07:13 PM PDT 24 18174119744 ps
T581 /workspace/coverage/default/25.sram_ctrl_smoke.317125471 Apr 28 03:02:14 PM PDT 24 Apr 28 03:02:25 PM PDT 24 667283798 ps
T582 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.699358551 Apr 28 03:00:18 PM PDT 24 Apr 28 03:02:25 PM PDT 24 3094765564 ps
T583 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.475379002 Apr 28 03:06:20 PM PDT 24 Apr 28 03:08:27 PM PDT 24 4701689897 ps
T584 /workspace/coverage/default/44.sram_ctrl_smoke.81169127 Apr 28 03:06:02 PM PDT 24 Apr 28 03:06:10 PM PDT 24 608315487 ps
T585 /workspace/coverage/default/34.sram_ctrl_alert_test.4050350537 Apr 28 03:04:07 PM PDT 24 Apr 28 03:04:08 PM PDT 24 22872484 ps
T586 /workspace/coverage/default/15.sram_ctrl_partial_access.2328428826 Apr 28 03:00:57 PM PDT 24 Apr 28 03:01:19 PM PDT 24 4796433022 ps
T587 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.1280502395 Apr 28 03:00:02 PM PDT 24 Apr 28 03:13:04 PM PDT 24 37297515735 ps
T588 /workspace/coverage/default/22.sram_ctrl_alert_test.1087294283 Apr 28 03:01:54 PM PDT 24 Apr 28 03:01:56 PM PDT 24 16934589 ps
T589 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.2418630116 Apr 28 03:05:58 PM PDT 24 Apr 28 03:08:29 PM PDT 24 4662403889 ps
T590 /workspace/coverage/default/36.sram_ctrl_regwen.1387058831 Apr 28 03:04:20 PM PDT 24 Apr 28 03:20:27 PM PDT 24 2650155040 ps
T591 /workspace/coverage/default/47.sram_ctrl_partial_access.995128574 Apr 28 03:06:41 PM PDT 24 Apr 28 03:06:53 PM PDT 24 766205898 ps
T592 /workspace/coverage/default/8.sram_ctrl_multiple_keys.3654465503 Apr 28 03:00:13 PM PDT 24 Apr 28 03:17:06 PM PDT 24 49510851951 ps
T593 /workspace/coverage/default/4.sram_ctrl_partial_access.1350523000 Apr 28 03:00:04 PM PDT 24 Apr 28 03:00:11 PM PDT 24 699623457 ps
T594 /workspace/coverage/default/37.sram_ctrl_lc_escalation.4084773626 Apr 28 03:04:33 PM PDT 24 Apr 28 03:04:52 PM PDT 24 17880274217 ps
T595 /workspace/coverage/default/1.sram_ctrl_ram_cfg.216590167 Apr 28 03:00:05 PM PDT 24 Apr 28 03:00:10 PM PDT 24 1245393481 ps
T596 /workspace/coverage/default/12.sram_ctrl_ram_cfg.3562450359 Apr 28 03:00:30 PM PDT 24 Apr 28 03:00:40 PM PDT 24 1430260800 ps
T597 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.3367106833 Apr 28 03:06:08 PM PDT 24 Apr 28 03:08:17 PM PDT 24 6197600154 ps
T598 /workspace/coverage/default/15.sram_ctrl_bijection.3317116554 Apr 28 03:00:53 PM PDT 24 Apr 28 03:35:58 PM PDT 24 45023280271 ps
T599 /workspace/coverage/default/40.sram_ctrl_multiple_keys.3145118580 Apr 28 03:05:16 PM PDT 24 Apr 28 03:05:59 PM PDT 24 506226187 ps
T600 /workspace/coverage/default/17.sram_ctrl_ram_cfg.1970911811 Apr 28 03:01:08 PM PDT 24 Apr 28 03:01:13 PM PDT 24 350098164 ps
T601 /workspace/coverage/default/6.sram_ctrl_stress_all.3833937787 Apr 28 03:00:11 PM PDT 24 Apr 28 04:14:25 PM PDT 24 56675255551 ps
T602 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.1309804722 Apr 28 03:04:38 PM PDT 24 Apr 28 03:07:12 PM PDT 24 64313490131 ps
T603 /workspace/coverage/default/36.sram_ctrl_lc_escalation.2374024096 Apr 28 03:04:20 PM PDT 24 Apr 28 03:04:58 PM PDT 24 54845170983 ps
T604 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.1470829432 Apr 28 03:05:31 PM PDT 24 Apr 28 03:10:40 PM PDT 24 23565773304 ps
T605 /workspace/coverage/default/6.sram_ctrl_mem_partial_access.1675557354 Apr 28 03:00:26 PM PDT 24 Apr 28 03:01:49 PM PDT 24 5340009548 ps
T606 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3826043184 Apr 28 02:59:57 PM PDT 24 Apr 28 03:00:19 PM PDT 24 2852505744 ps
T607 /workspace/coverage/default/16.sram_ctrl_smoke.1962920628 Apr 28 03:00:59 PM PDT 24 Apr 28 03:01:06 PM PDT 24 1615207059 ps
T608 /workspace/coverage/default/7.sram_ctrl_smoke.598908127 Apr 28 03:00:16 PM PDT 24 Apr 28 03:02:16 PM PDT 24 773577541 ps
T609 /workspace/coverage/default/36.sram_ctrl_stress_pipeline.1317277115 Apr 28 03:04:15 PM PDT 24 Apr 28 03:07:42 PM PDT 24 6781304810 ps
T610 /workspace/coverage/default/19.sram_ctrl_partial_access.3482253826 Apr 28 03:01:21 PM PDT 24 Apr 28 03:01:43 PM PDT 24 2710426273 ps
T611 /workspace/coverage/default/24.sram_ctrl_smoke.449902802 Apr 28 03:02:02 PM PDT 24 Apr 28 03:02:09 PM PDT 24 2783778028 ps
T612 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.258295651 Apr 28 03:02:15 PM PDT 24 Apr 28 03:04:12 PM PDT 24 3608645251 ps
T613 /workspace/coverage/default/46.sram_ctrl_ram_cfg.3352161669 Apr 28 03:06:34 PM PDT 24 Apr 28 03:06:38 PM PDT 24 6669675578 ps
T614 /workspace/coverage/default/13.sram_ctrl_access_during_key_req.327210863 Apr 28 03:00:44 PM PDT 24 Apr 28 03:06:43 PM PDT 24 17364661113 ps
T615 /workspace/coverage/default/20.sram_ctrl_partial_access.1142640975 Apr 28 03:01:31 PM PDT 24 Apr 28 03:01:48 PM PDT 24 1127562157 ps
T616 /workspace/coverage/default/41.sram_ctrl_mem_walk.530586924 Apr 28 03:05:29 PM PDT 24 Apr 28 03:07:50 PM PDT 24 14329271994 ps
T617 /workspace/coverage/default/27.sram_ctrl_regwen.2828240415 Apr 28 03:02:39 PM PDT 24 Apr 28 03:15:05 PM PDT 24 11463124293 ps
T618 /workspace/coverage/default/49.sram_ctrl_max_throughput.4194009219 Apr 28 03:07:11 PM PDT 24 Apr 28 03:08:48 PM PDT 24 1562597421 ps
T619 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.2383606178 Apr 28 03:04:16 PM PDT 24 Apr 28 03:04:59 PM PDT 24 2024071281 ps
T620 /workspace/coverage/default/0.sram_ctrl_partial_access.3937057080 Apr 28 03:00:01 PM PDT 24 Apr 28 03:00:15 PM PDT 24 1147745504 ps
T621 /workspace/coverage/default/43.sram_ctrl_mem_walk.4279098577 Apr 28 03:05:57 PM PDT 24 Apr 28 03:11:01 PM PDT 24 86028224562 ps
T622 /workspace/coverage/default/11.sram_ctrl_lc_escalation.903772004 Apr 28 03:00:21 PM PDT 24 Apr 28 03:01:34 PM PDT 24 36893832296 ps
T623 /workspace/coverage/default/25.sram_ctrl_max_throughput.3953564611 Apr 28 03:02:23 PM PDT 24 Apr 28 03:03:07 PM PDT 24 1489187149 ps
T624 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.4113542283 Apr 28 03:01:37 PM PDT 24 Apr 28 03:09:54 PM PDT 24 14357768835 ps
T625 /workspace/coverage/default/0.sram_ctrl_bijection.2487969609 Apr 28 03:00:00 PM PDT 24 Apr 28 03:23:32 PM PDT 24 95484464281 ps
T626 /workspace/coverage/default/24.sram_ctrl_regwen.88223612 Apr 28 03:02:10 PM PDT 24 Apr 28 03:37:50 PM PDT 24 17427333496 ps
T627 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3747367796 Apr 28 03:07:05 PM PDT 24 Apr 28 03:08:32 PM PDT 24 1923644778 ps
T628 /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.2764162468 Apr 28 03:04:01 PM PDT 24 Apr 28 03:11:44 PM PDT 24 78426828206 ps
T629 /workspace/coverage/default/8.sram_ctrl_mem_walk.980703999 Apr 28 03:00:17 PM PDT 24 Apr 28 03:04:38 PM PDT 24 35821693020 ps
T630 /workspace/coverage/default/9.sram_ctrl_lc_escalation.1358769456 Apr 28 03:00:18 PM PDT 24 Apr 28 03:01:47 PM PDT 24 52644727412 ps
T631 /workspace/coverage/default/28.sram_ctrl_executable.1866646369 Apr 28 03:02:51 PM PDT 24 Apr 28 03:26:01 PM PDT 24 27923809960 ps
T632 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.1893823177 Apr 28 03:03:50 PM PDT 24 Apr 28 03:05:08 PM PDT 24 12452763540 ps
T633 /workspace/coverage/default/29.sram_ctrl_regwen.1083216873 Apr 28 03:03:03 PM PDT 24 Apr 28 03:14:16 PM PDT 24 3824511605 ps
T634 /workspace/coverage/default/33.sram_ctrl_bijection.4050169227 Apr 28 03:03:41 PM PDT 24 Apr 28 03:41:48 PM PDT 24 236507318488 ps
T635 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3959460600 Apr 28 03:00:19 PM PDT 24 Apr 28 03:00:44 PM PDT 24 2351666476 ps
T636 /workspace/coverage/default/45.sram_ctrl_alert_test.2454879857 Apr 28 03:06:26 PM PDT 24 Apr 28 03:06:27 PM PDT 24 13050958 ps
T637 /workspace/coverage/default/35.sram_ctrl_partial_access.2435145472 Apr 28 03:04:11 PM PDT 24 Apr 28 03:04:31 PM PDT 24 1243643489 ps
T638 /workspace/coverage/default/48.sram_ctrl_max_throughput.3109614786 Apr 28 03:06:59 PM PDT 24 Apr 28 03:07:50 PM PDT 24 2683853304 ps
T639 /workspace/coverage/default/23.sram_ctrl_regwen.2453432179 Apr 28 03:02:04 PM PDT 24 Apr 28 03:15:12 PM PDT 24 42351624478 ps
T640 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3158577326 Apr 28 03:00:17 PM PDT 24 Apr 28 03:00:28 PM PDT 24 689053024 ps
T641 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.819085168 Apr 28 03:06:50 PM PDT 24 Apr 28 03:07:02 PM PDT 24 1211401591 ps
T642 /workspace/coverage/default/33.sram_ctrl_lc_escalation.156750367 Apr 28 03:03:44 PM PDT 24 Apr 28 03:05:27 PM PDT 24 16260720174 ps
T643 /workspace/coverage/default/17.sram_ctrl_mem_walk.2803275334 Apr 28 03:01:09 PM PDT 24 Apr 28 03:03:31 PM PDT 24 14058127966 ps
T644 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.4244826639 Apr 28 02:59:59 PM PDT 24 Apr 28 03:03:49 PM PDT 24 14022677507 ps
T645 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.1617078518 Apr 28 03:02:23 PM PDT 24 Apr 28 03:05:04 PM PDT 24 36253052406 ps
T646 /workspace/coverage/default/22.sram_ctrl_mem_partial_access.1924287419 Apr 28 03:01:54 PM PDT 24 Apr 28 03:04:16 PM PDT 24 19893008780 ps
T647 /workspace/coverage/default/47.sram_ctrl_ram_cfg.1075198109 Apr 28 03:06:50 PM PDT 24 Apr 28 03:06:54 PM PDT 24 1402126871 ps
T648 /workspace/coverage/default/17.sram_ctrl_smoke.1426365813 Apr 28 03:01:06 PM PDT 24 Apr 28 03:01:45 PM PDT 24 758916613 ps
T649 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.1210311945 Apr 28 03:01:03 PM PDT 24 Apr 28 03:02:21 PM PDT 24 2659482329 ps
T650 /workspace/coverage/default/17.sram_ctrl_max_throughput.999228259 Apr 28 03:01:10 PM PDT 24 Apr 28 03:01:23 PM PDT 24 699652385 ps
T651 /workspace/coverage/default/29.sram_ctrl_stress_all.3619701962 Apr 28 03:03:04 PM PDT 24 Apr 28 04:11:44 PM PDT 24 49777852097 ps
T652 /workspace/coverage/default/11.sram_ctrl_regwen.463479564 Apr 28 03:00:17 PM PDT 24 Apr 28 03:15:11 PM PDT 24 138208873699 ps
T653 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.4037430933 Apr 28 03:03:28 PM PDT 24 Apr 28 03:08:28 PM PDT 24 16496375725 ps
T654 /workspace/coverage/default/10.sram_ctrl_stress_all.3593901157 Apr 28 03:00:17 PM PDT 24 Apr 28 04:56:06 PM PDT 24 190686894074 ps
T655 /workspace/coverage/default/38.sram_ctrl_ram_cfg.353909709 Apr 28 03:04:46 PM PDT 24 Apr 28 03:04:50 PM PDT 24 360668333 ps
T656 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.1558343796 Apr 28 03:04:06 PM PDT 24 Apr 28 03:04:14 PM PDT 24 1025738027 ps
T657 /workspace/coverage/default/16.sram_ctrl_lc_escalation.2225642900 Apr 28 03:01:02 PM PDT 24 Apr 28 03:02:38 PM PDT 24 62260275857 ps
T111 /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.152383280 Apr 28 03:00:16 PM PDT 24 Apr 28 03:01:03 PM PDT 24 1829592451 ps
T658 /workspace/coverage/default/49.sram_ctrl_stress_all.3171849199 Apr 28 03:07:15 PM PDT 24 Apr 28 05:16:48 PM PDT 24 454502362270 ps
T659 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.2403475567 Apr 28 03:03:11 PM PDT 24 Apr 28 03:04:28 PM PDT 24 10253285221 ps
T660 /workspace/coverage/default/33.sram_ctrl_mem_walk.2673304742 Apr 28 03:03:52 PM PDT 24 Apr 28 03:06:10 PM PDT 24 12297854269 ps
T661 /workspace/coverage/default/8.sram_ctrl_max_throughput.3535349113 Apr 28 03:00:13 PM PDT 24 Apr 28 03:00:33 PM PDT 24 2912155542 ps
T662 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.2512469306 Apr 28 03:03:01 PM PDT 24 Apr 28 03:17:11 PM PDT 24 52714217327 ps
T663 /workspace/coverage/default/4.sram_ctrl_regwen.225738783 Apr 28 03:00:07 PM PDT 24 Apr 28 03:08:18 PM PDT 24 9118415574 ps
T664 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.4197022475 Apr 28 03:00:01 PM PDT 24 Apr 28 03:07:56 PM PDT 24 20418774804 ps
T665 /workspace/coverage/default/41.sram_ctrl_ram_cfg.342628071 Apr 28 03:05:30 PM PDT 24 Apr 28 03:05:34 PM PDT 24 348984779 ps
T666 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.4081544630 Apr 28 03:02:40 PM PDT 24 Apr 28 03:04:44 PM PDT 24 808483864 ps
T667 /workspace/coverage/default/17.sram_ctrl_stress_all.2051195590 Apr 28 03:01:15 PM PDT 24 Apr 28 04:58:27 PM PDT 24 1157005252010 ps
T668 /workspace/coverage/default/45.sram_ctrl_access_during_key_req.3626478518 Apr 28 03:06:21 PM PDT 24 Apr 28 03:17:23 PM PDT 24 14630669803 ps
T669 /workspace/coverage/default/32.sram_ctrl_alert_test.2800500870 Apr 28 03:03:40 PM PDT 24 Apr 28 03:03:42 PM PDT 24 44802486 ps
T670 /workspace/coverage/default/16.sram_ctrl_executable.4068441414 Apr 28 03:01:04 PM PDT 24 Apr 28 03:23:17 PM PDT 24 42841973594 ps
T671 /workspace/coverage/default/38.sram_ctrl_bijection.1105692446 Apr 28 03:04:42 PM PDT 24 Apr 28 03:37:15 PM PDT 24 29176493408 ps
T672 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.3443191284 Apr 28 03:01:13 PM PDT 24 Apr 28 03:03:36 PM PDT 24 18892058469 ps
T673 /workspace/coverage/default/49.sram_ctrl_ram_cfg.2012374038 Apr 28 03:07:15 PM PDT 24 Apr 28 03:07:19 PM PDT 24 720811236 ps
T674 /workspace/coverage/default/43.sram_ctrl_partial_access.3175121868 Apr 28 03:05:48 PM PDT 24 Apr 28 03:06:07 PM PDT 24 1797155574 ps
T675 /workspace/coverage/default/43.sram_ctrl_smoke.3720747217 Apr 28 03:05:49 PM PDT 24 Apr 28 03:06:07 PM PDT 24 1876196069 ps
T676 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.2469112827 Apr 28 03:03:00 PM PDT 24 Apr 28 03:03:49 PM PDT 24 3064872066 ps
T677 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.2871902598 Apr 28 03:04:11 PM PDT 24 Apr 28 03:05:48 PM PDT 24 5454695237 ps
T678 /workspace/coverage/default/16.sram_ctrl_stress_all.332240629 Apr 28 03:01:02 PM PDT 24 Apr 28 03:53:03 PM PDT 24 169432652898 ps
T679 /workspace/coverage/default/19.sram_ctrl_lc_escalation.1447082004 Apr 28 03:01:26 PM PDT 24 Apr 28 03:01:47 PM PDT 24 11408400846 ps
T680 /workspace/coverage/default/3.sram_ctrl_lc_escalation.1988990920 Apr 28 03:00:05 PM PDT 24 Apr 28 03:01:19 PM PDT 24 12349474777 ps
T681 /workspace/coverage/default/42.sram_ctrl_regwen.396241766 Apr 28 03:05:44 PM PDT 24 Apr 28 03:27:53 PM PDT 24 46406199766 ps
T682 /workspace/coverage/default/2.sram_ctrl_max_throughput.3101427886 Apr 28 03:00:06 PM PDT 24 Apr 28 03:00:14 PM PDT 24 2675721120 ps
T683 /workspace/coverage/default/13.sram_ctrl_bijection.3054326628 Apr 28 03:00:35 PM PDT 24 Apr 28 03:24:57 PM PDT 24 428779987053 ps
T684 /workspace/coverage/default/3.sram_ctrl_stress_all.1311685638 Apr 28 03:00:13 PM PDT 24 Apr 28 03:43:21 PM PDT 24 36488115679 ps
T685 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1109444397 Apr 28 03:00:19 PM PDT 24 Apr 28 03:03:15 PM PDT 24 2416233371 ps
T686 /workspace/coverage/default/29.sram_ctrl_executable.2313218917 Apr 28 03:03:00 PM PDT 24 Apr 28 03:10:31 PM PDT 24 12944117326 ps
T112 /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.2124723425 Apr 28 03:04:38 PM PDT 24 Apr 28 03:04:58 PM PDT 24 3479330280 ps
T687 /workspace/coverage/default/11.sram_ctrl_bijection.3171003714 Apr 28 03:00:18 PM PDT 24 Apr 28 03:11:59 PM PDT 24 129013627545 ps
T688 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.1198442292 Apr 28 03:00:58 PM PDT 24 Apr 28 03:04:50 PM PDT 24 30182724102 ps
T689 /workspace/coverage/default/47.sram_ctrl_stress_all.995433466 Apr 28 03:06:50 PM PDT 24 Apr 28 04:33:46 PM PDT 24 147509476881 ps
T690 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.3163460600 Apr 28 03:00:19 PM PDT 24 Apr 28 03:25:44 PM PDT 24 21536491945 ps
T691 /workspace/coverage/default/16.sram_ctrl_ram_cfg.1012474369 Apr 28 03:01:06 PM PDT 24 Apr 28 03:01:11 PM PDT 24 471598858 ps
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T716 /workspace/coverage/default/11.sram_ctrl_partial_access.1086599996 Apr 28 03:00:20 PM PDT 24 Apr 28 03:00:42 PM PDT 24 1228827300 ps
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T719 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.3420725165 Apr 28 03:00:28 PM PDT 24 Apr 28 03:01:36 PM PDT 24 951933213 ps
T720 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.2557603885 Apr 28 03:01:00 PM PDT 24 Apr 28 03:03:07 PM PDT 24 1569531256 ps
T721 /workspace/coverage/default/28.sram_ctrl_multiple_keys.278617300 Apr 28 03:02:49 PM PDT 24 Apr 28 03:21:32 PM PDT 24 9369074323 ps
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T723 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.78404633 Apr 28 03:01:29 PM PDT 24 Apr 28 03:09:22 PM PDT 24 76405606190 ps
T724 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.1010999937 Apr 28 03:02:29 PM PDT 24 Apr 28 03:09:18 PM PDT 24 15636789325 ps
T725 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.3289485004 Apr 28 03:04:48 PM PDT 24 Apr 28 03:05:06 PM PDT 24 926495756 ps
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T731 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.3938753329 Apr 28 03:03:46 PM PDT 24 Apr 28 03:08:13 PM PDT 24 10901207896 ps
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T733 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.3701950214 Apr 28 03:00:37 PM PDT 24 Apr 28 03:03:47 PM PDT 24 31069112575 ps
T734 /workspace/coverage/default/0.sram_ctrl_alert_test.1797999464 Apr 28 02:59:52 PM PDT 24 Apr 28 02:59:53 PM PDT 24 56845335 ps
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T736 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3720397402 Apr 28 03:04:11 PM PDT 24 Apr 28 03:12:09 PM PDT 24 20177910536 ps
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T31 /workspace/coverage/default/3.sram_ctrl_sec_cm.3055371102 Apr 28 03:00:08 PM PDT 24 Apr 28 03:00:11 PM PDT 24 303983674 ps
T738 /workspace/coverage/default/21.sram_ctrl_alert_test.1580851212 Apr 28 03:01:47 PM PDT 24 Apr 28 03:01:51 PM PDT 24 38621516 ps
T739 /workspace/coverage/default/44.sram_ctrl_mem_walk.3923130896 Apr 28 03:06:10 PM PDT 24 Apr 28 03:08:11 PM PDT 24 7902043124 ps
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T741 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.1183053051 Apr 28 03:04:22 PM PDT 24 Apr 28 03:06:05 PM PDT 24 3407612139 ps
T742 /workspace/coverage/default/20.sram_ctrl_max_throughput.282994748 Apr 28 03:01:30 PM PDT 24 Apr 28 03:01:39 PM PDT 24 1382290283 ps
T743 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.530887483 Apr 28 03:05:15 PM PDT 24 Apr 28 03:08:19 PM PDT 24 2886644345 ps
T744 /workspace/coverage/default/13.sram_ctrl_partial_access.3715425171 Apr 28 03:00:39 PM PDT 24 Apr 28 03:01:00 PM PDT 24 1526356583 ps
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T746 /workspace/coverage/default/21.sram_ctrl_partial_access.4253975090 Apr 28 03:01:42 PM PDT 24 Apr 28 03:02:01 PM PDT 24 11658827389 ps
T747 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.2880589048 Apr 28 03:05:23 PM PDT 24 Apr 28 03:08:00 PM PDT 24 4321760820 ps
T748 /workspace/coverage/default/30.sram_ctrl_multiple_keys.880692511 Apr 28 03:03:03 PM PDT 24 Apr 28 03:15:59 PM PDT 24 70717892244 ps
T749 /workspace/coverage/default/18.sram_ctrl_alert_test.1172080121 Apr 28 03:01:20 PM PDT 24 Apr 28 03:01:22 PM PDT 24 14193806 ps
T750 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.1648623181 Apr 28 03:00:06 PM PDT 24 Apr 28 03:02:05 PM PDT 24 3042913747 ps
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T754 /workspace/coverage/default/27.sram_ctrl_multiple_keys.3894096571 Apr 28 03:02:36 PM PDT 24 Apr 28 03:25:02 PM PDT 24 53061255308 ps
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T758 /workspace/coverage/default/19.sram_ctrl_regwen.1176818353 Apr 28 03:01:25 PM PDT 24 Apr 28 03:15:14 PM PDT 24 8216209057 ps
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T762 /workspace/coverage/default/31.sram_ctrl_alert_test.1272903564 Apr 28 03:03:22 PM PDT 24 Apr 28 03:03:23 PM PDT 24 12583342 ps
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T764 /workspace/coverage/default/34.sram_ctrl_stress_all.1565765532 Apr 28 03:04:06 PM PDT 24 Apr 28 03:38:43 PM PDT 24 1095016587186 ps
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T766 /workspace/coverage/default/40.sram_ctrl_mem_partial_access.1403434311 Apr 28 03:05:31 PM PDT 24 Apr 28 03:07:54 PM PDT 24 9146849228 ps
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T769 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.2448449086 Apr 28 03:00:16 PM PDT 24 Apr 28 03:01:19 PM PDT 24 996441516 ps
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T772 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2280749006 Apr 28 03:00:35 PM PDT 24 Apr 28 03:01:02 PM PDT 24 2044625135 ps
T773 /workspace/coverage/default/38.sram_ctrl_executable.3306964403 Apr 28 03:04:51 PM PDT 24 Apr 28 03:14:52 PM PDT 24 64378755152 ps
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T775 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2875044473 Apr 28 03:00:16 PM PDT 24 Apr 28 03:05:05 PM PDT 24 12215742393 ps
T776 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.1045251346 Apr 28 03:03:05 PM PDT 24 Apr 28 03:04:40 PM PDT 24 803223270 ps
T777 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.2433237264 Apr 28 03:01:59 PM PDT 24 Apr 28 03:08:32 PM PDT 24 5628570698 ps
T778 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.3456852444 Apr 28 03:04:47 PM PDT 24 Apr 28 03:07:57 PM PDT 24 7979193118 ps
T779 /workspace/coverage/default/30.sram_ctrl_lc_escalation.594904201 Apr 28 03:03:07 PM PDT 24 Apr 28 03:03:53 PM PDT 24 16330999855 ps
T780 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.1557669347 Apr 28 03:00:11 PM PDT 24 Apr 28 03:01:29 PM PDT 24 3211779938 ps
T781 /workspace/coverage/default/16.sram_ctrl_mem_walk.2911332439 Apr 28 03:01:04 PM PDT 24 Apr 28 03:03:28 PM PDT 24 17247872889 ps
T782 /workspace/coverage/default/7.sram_ctrl_alert_test.1690910799 Apr 28 03:00:17 PM PDT 24 Apr 28 03:00:23 PM PDT 24 16748127 ps
T783 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.2087323164 Apr 28 03:03:16 PM PDT 24 Apr 28 03:06:30 PM PDT 24 14387983946 ps
T784 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.113994330 Apr 28 03:01:26 PM PDT 24 Apr 28 03:07:38 PM PDT 24 11589310656 ps
T785 /workspace/coverage/default/33.sram_ctrl_ram_cfg.4175020771 Apr 28 03:03:51 PM PDT 24 Apr 28 03:03:55 PM PDT 24 2797858368 ps
T786 /workspace/coverage/default/39.sram_ctrl_executable.4130159830 Apr 28 03:05:02 PM PDT 24 Apr 28 03:05:40 PM PDT 24 2458993932 ps
T787 /workspace/coverage/default/11.sram_ctrl_max_throughput.1276966669 Apr 28 03:00:21 PM PDT 24 Apr 28 03:00:39 PM PDT 24 2750763321 ps
T788 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.3285964164 Apr 28 03:00:10 PM PDT 24 Apr 28 03:04:52 PM PDT 24 43680830176 ps
T789 /workspace/coverage/default/10.sram_ctrl_regwen.2063957412 Apr 28 03:00:18 PM PDT 24 Apr 28 03:02:13 PM PDT 24 6353215206 ps
T790 /workspace/coverage/default/40.sram_ctrl_mem_walk.3468137374 Apr 28 03:05:29 PM PDT 24 Apr 28 03:07:47 PM PDT 24 13260067368 ps
T791 /workspace/coverage/default/11.sram_ctrl_multiple_keys.1169698 Apr 28 03:00:27 PM PDT 24 Apr 28 03:08:24 PM PDT 24 7351850632 ps
T792 /workspace/coverage/default/40.sram_ctrl_executable.611429678 Apr 28 03:05:24 PM PDT 24 Apr 28 03:17:43 PM PDT 24 6492482815 ps
T793 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.1057764669 Apr 28 03:02:07 PM PDT 24 Apr 28 03:28:01 PM PDT 24 111935360408 ps
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