| T312 |
/workspace/coverage/default/24.sram_ctrl_alert_test.224319816 |
|
|
Apr 30 01:19:58 PM PDT 24 |
Apr 30 01:19:59 PM PDT 24 |
30905857 ps |
| T313 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.682295657 |
|
|
Apr 30 01:26:39 PM PDT 24 |
Apr 30 01:38:12 PM PDT 24 |
118641352005 ps |
| T314 |
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.1808232768 |
|
|
Apr 30 01:18:34 PM PDT 24 |
Apr 30 01:19:26 PM PDT 24 |
1352224602 ps |
| T315 |
/workspace/coverage/default/42.sram_ctrl_partial_access.2133548827 |
|
|
Apr 30 01:26:20 PM PDT 24 |
Apr 30 01:26:26 PM PDT 24 |
391063789 ps |
| T316 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.731764944 |
|
|
Apr 30 01:21:23 PM PDT 24 |
Apr 30 01:22:24 PM PDT 24 |
787166221 ps |
| T317 |
/workspace/coverage/default/5.sram_ctrl_stress_all.2692590471 |
|
|
Apr 30 01:11:52 PM PDT 24 |
Apr 30 02:31:48 PM PDT 24 |
602955111308 ps |
| T318 |
/workspace/coverage/default/36.sram_ctrl_stress_all.2427474537 |
|
|
Apr 30 01:24:25 PM PDT 24 |
Apr 30 01:56:01 PM PDT 24 |
253528226131 ps |
| T319 |
/workspace/coverage/default/11.sram_ctrl_bijection.1375358378 |
|
|
Apr 30 01:14:06 PM PDT 24 |
Apr 30 01:38:07 PM PDT 24 |
268901695600 ps |
| T320 |
/workspace/coverage/default/5.sram_ctrl_partial_access.2525428456 |
|
|
Apr 30 01:11:44 PM PDT 24 |
Apr 30 01:12:00 PM PDT 24 |
863159561 ps |
| T321 |
/workspace/coverage/default/21.sram_ctrl_mem_walk.3787991949 |
|
|
Apr 30 01:18:33 PM PDT 24 |
Apr 30 01:21:02 PM PDT 24 |
137705546521 ps |
| T322 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2521921519 |
|
|
Apr 30 01:13:11 PM PDT 24 |
Apr 30 01:13:40 PM PDT 24 |
727853099 ps |
| T323 |
/workspace/coverage/default/34.sram_ctrl_smoke.3716612093 |
|
|
Apr 30 01:23:36 PM PDT 24 |
Apr 30 01:24:00 PM PDT 24 |
1207484587 ps |
| T324 |
/workspace/coverage/default/43.sram_ctrl_executable.343515818 |
|
|
Apr 30 01:26:54 PM PDT 24 |
Apr 30 01:39:52 PM PDT 24 |
27687038947 ps |
| T325 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.3901020177 |
|
|
Apr 30 01:23:13 PM PDT 24 |
Apr 30 01:30:43 PM PDT 24 |
10047499193 ps |
| T326 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2082983738 |
|
|
Apr 30 01:12:32 PM PDT 24 |
Apr 30 01:21:06 PM PDT 24 |
79399586108 ps |
| T327 |
/workspace/coverage/default/35.sram_ctrl_smoke.963296818 |
|
|
Apr 30 01:23:50 PM PDT 24 |
Apr 30 01:26:09 PM PDT 24 |
479382703 ps |
| T328 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.1292211614 |
|
|
Apr 30 01:17:49 PM PDT 24 |
Apr 30 01:22:55 PM PDT 24 |
17394024337 ps |
| T329 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.4176545483 |
|
|
Apr 30 01:18:51 PM PDT 24 |
Apr 30 01:21:28 PM PDT 24 |
4362680384 ps |
| T330 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2660011150 |
|
|
Apr 30 01:14:42 PM PDT 24 |
Apr 30 01:21:47 PM PDT 24 |
43786419655 ps |
| T331 |
/workspace/coverage/default/11.sram_ctrl_executable.869039585 |
|
|
Apr 30 01:14:20 PM PDT 24 |
Apr 30 01:20:23 PM PDT 24 |
7747180761 ps |
| T332 |
/workspace/coverage/default/49.sram_ctrl_alert_test.1086583432 |
|
|
Apr 30 01:28:54 PM PDT 24 |
Apr 30 01:28:55 PM PDT 24 |
39104151 ps |
| T333 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.2432951569 |
|
|
Apr 30 01:16:39 PM PDT 24 |
Apr 30 01:17:35 PM PDT 24 |
3064439638 ps |
| T334 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.2215978476 |
|
|
Apr 30 01:11:38 PM PDT 24 |
Apr 30 01:13:31 PM PDT 24 |
2841346583 ps |
| T335 |
/workspace/coverage/default/35.sram_ctrl_executable.3890401207 |
|
|
Apr 30 01:23:58 PM PDT 24 |
Apr 30 01:46:26 PM PDT 24 |
77597434963 ps |
| T336 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1623662190 |
|
|
Apr 30 01:14:19 PM PDT 24 |
Apr 30 01:14:23 PM PDT 24 |
410807774 ps |
| T337 |
/workspace/coverage/default/32.sram_ctrl_smoke.1827771023 |
|
|
Apr 30 01:22:42 PM PDT 24 |
Apr 30 01:22:49 PM PDT 24 |
1599004525 ps |
| T338 |
/workspace/coverage/default/4.sram_ctrl_smoke.3192149950 |
|
|
Apr 30 01:11:39 PM PDT 24 |
Apr 30 01:12:03 PM PDT 24 |
6847489156 ps |
| T339 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3909597099 |
|
|
Apr 30 01:27:14 PM PDT 24 |
Apr 30 01:42:44 PM PDT 24 |
40175585936 ps |
| T340 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.3766427173 |
|
|
Apr 30 01:24:42 PM PDT 24 |
Apr 30 01:25:59 PM PDT 24 |
9853504102 ps |
| T341 |
/workspace/coverage/default/34.sram_ctrl_executable.4110903201 |
|
|
Apr 30 01:23:42 PM PDT 24 |
Apr 30 01:43:19 PM PDT 24 |
45282874453 ps |
| T342 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1179468430 |
|
|
Apr 30 01:11:17 PM PDT 24 |
Apr 30 01:14:23 PM PDT 24 |
8148406348 ps |
| T343 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3851541966 |
|
|
Apr 30 01:11:03 PM PDT 24 |
Apr 30 01:18:24 PM PDT 24 |
38317427376 ps |
| T344 |
/workspace/coverage/default/34.sram_ctrl_stress_pipeline.146189063 |
|
|
Apr 30 01:23:35 PM PDT 24 |
Apr 30 01:26:37 PM PDT 24 |
5009918542 ps |
| T345 |
/workspace/coverage/default/16.sram_ctrl_regwen.3335554388 |
|
|
Apr 30 01:16:19 PM PDT 24 |
Apr 30 01:43:56 PM PDT 24 |
5153920188 ps |
| T346 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.775077235 |
|
|
Apr 30 01:11:38 PM PDT 24 |
Apr 30 01:13:13 PM PDT 24 |
1555876158 ps |
| T347 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.3025861065 |
|
|
Apr 30 01:16:14 PM PDT 24 |
Apr 30 01:22:25 PM PDT 24 |
45882317682 ps |
| T348 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.1506375187 |
|
|
Apr 30 01:20:17 PM PDT 24 |
Apr 30 01:25:19 PM PDT 24 |
46918425000 ps |
| T108 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.660946509 |
|
|
Apr 30 01:14:53 PM PDT 24 |
Apr 30 01:15:17 PM PDT 24 |
1937857731 ps |
| T349 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.1194692665 |
|
|
Apr 30 01:24:19 PM PDT 24 |
Apr 30 01:46:59 PM PDT 24 |
76462089998 ps |
| T350 |
/workspace/coverage/default/22.sram_ctrl_smoke.4143446521 |
|
|
Apr 30 01:18:32 PM PDT 24 |
Apr 30 01:20:04 PM PDT 24 |
2101875718 ps |
| T351 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.3206282704 |
|
|
Apr 30 01:21:25 PM PDT 24 |
Apr 30 01:22:58 PM PDT 24 |
162110143552 ps |
| T352 |
/workspace/coverage/default/23.sram_ctrl_mem_walk.3527671884 |
|
|
Apr 30 01:19:25 PM PDT 24 |
Apr 30 01:21:45 PM PDT 24 |
26552473964 ps |
| T353 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.1603455611 |
|
|
Apr 30 01:11:39 PM PDT 24 |
Apr 30 01:15:50 PM PDT 24 |
3945728883 ps |
| T354 |
/workspace/coverage/default/30.sram_ctrl_smoke.1678163651 |
|
|
Apr 30 01:22:03 PM PDT 24 |
Apr 30 01:22:38 PM PDT 24 |
2316660432 ps |
| T355 |
/workspace/coverage/default/6.sram_ctrl_executable.2072657603 |
|
|
Apr 30 01:12:00 PM PDT 24 |
Apr 30 01:24:07 PM PDT 24 |
52294777765 ps |
| T356 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.1693976666 |
|
|
Apr 30 01:20:47 PM PDT 24 |
Apr 30 01:22:00 PM PDT 24 |
2644600538 ps |
| T357 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.4007600711 |
|
|
Apr 30 01:26:40 PM PDT 24 |
Apr 30 01:31:02 PM PDT 24 |
3985764418 ps |
| T358 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3411641749 |
|
|
Apr 30 01:14:18 PM PDT 24 |
Apr 30 01:16:35 PM PDT 24 |
9055338652 ps |
| T359 |
/workspace/coverage/default/36.sram_ctrl_smoke.1424708608 |
|
|
Apr 30 01:24:11 PM PDT 24 |
Apr 30 01:24:28 PM PDT 24 |
573425773 ps |
| T360 |
/workspace/coverage/default/14.sram_ctrl_partial_access.3445585579 |
|
|
Apr 30 01:15:21 PM PDT 24 |
Apr 30 01:15:44 PM PDT 24 |
954861487 ps |
| T361 |
/workspace/coverage/default/6.sram_ctrl_smoke.504305593 |
|
|
Apr 30 01:11:51 PM PDT 24 |
Apr 30 01:11:55 PM PDT 24 |
714176989 ps |
| T362 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.4163867029 |
|
|
Apr 30 01:24:30 PM PDT 24 |
Apr 30 01:31:34 PM PDT 24 |
7122955839 ps |
| T363 |
/workspace/coverage/default/8.sram_ctrl_bijection.4023708384 |
|
|
Apr 30 01:12:31 PM PDT 24 |
Apr 30 01:53:51 PM PDT 24 |
632688187403 ps |
| T364 |
/workspace/coverage/default/44.sram_ctrl_regwen.1846481380 |
|
|
Apr 30 01:27:14 PM PDT 24 |
Apr 30 01:44:09 PM PDT 24 |
5768276105 ps |
| T365 |
/workspace/coverage/default/4.sram_ctrl_regwen.1508602100 |
|
|
Apr 30 01:11:38 PM PDT 24 |
Apr 30 01:23:29 PM PDT 24 |
6286252343 ps |
| T366 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.677251124 |
|
|
Apr 30 01:28:12 PM PDT 24 |
Apr 30 01:39:53 PM PDT 24 |
45572002129 ps |
| T109 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.427671314 |
|
|
Apr 30 01:26:15 PM PDT 24 |
Apr 30 01:26:52 PM PDT 24 |
2903517350 ps |
| T367 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2279208937 |
|
|
Apr 30 01:13:48 PM PDT 24 |
Apr 30 01:13:52 PM PDT 24 |
716399493 ps |
| T368 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1951176823 |
|
|
Apr 30 01:27:04 PM PDT 24 |
Apr 30 01:28:27 PM PDT 24 |
1517293256 ps |
| T369 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.224835063 |
|
|
Apr 30 01:26:15 PM PDT 24 |
Apr 30 01:27:18 PM PDT 24 |
2625441051 ps |
| T370 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.318518285 |
|
|
Apr 30 01:23:22 PM PDT 24 |
Apr 30 01:23:26 PM PDT 24 |
1400805455 ps |
| T371 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.2406654272 |
|
|
Apr 30 01:22:02 PM PDT 24 |
Apr 30 01:27:20 PM PDT 24 |
5353246239 ps |
| T372 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.236678107 |
|
|
Apr 30 01:23:57 PM PDT 24 |
Apr 30 01:29:35 PM PDT 24 |
12066020889 ps |
| T373 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3681508718 |
|
|
Apr 30 01:27:28 PM PDT 24 |
Apr 30 01:27:44 PM PDT 24 |
10742472812 ps |
| T374 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.2457919922 |
|
|
Apr 30 01:27:04 PM PDT 24 |
Apr 30 01:29:15 PM PDT 24 |
946454488 ps |
| T375 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1466345164 |
|
|
Apr 30 01:24:23 PM PDT 24 |
Apr 30 01:24:34 PM PDT 24 |
302024027 ps |
| T376 |
/workspace/coverage/default/7.sram_ctrl_bijection.1499168806 |
|
|
Apr 30 01:12:13 PM PDT 24 |
Apr 30 01:42:46 PM PDT 24 |
126435962294 ps |
| T377 |
/workspace/coverage/default/11.sram_ctrl_partial_access.2681030053 |
|
|
Apr 30 01:14:15 PM PDT 24 |
Apr 30 01:14:26 PM PDT 24 |
1872926667 ps |
| T378 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1305540860 |
|
|
Apr 30 01:19:14 PM PDT 24 |
Apr 30 01:19:23 PM PDT 24 |
4530082423 ps |
| T379 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.3293687179 |
|
|
Apr 30 01:17:55 PM PDT 24 |
Apr 30 01:18:11 PM PDT 24 |
711136480 ps |
| T380 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.3886889384 |
|
|
Apr 30 01:24:54 PM PDT 24 |
Apr 30 01:29:44 PM PDT 24 |
20524495896 ps |
| T381 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.553816158 |
|
|
Apr 30 01:28:50 PM PDT 24 |
Apr 30 01:34:35 PM PDT 24 |
30024981648 ps |
| T382 |
/workspace/coverage/default/29.sram_ctrl_smoke.4279363204 |
|
|
Apr 30 01:21:49 PM PDT 24 |
Apr 30 01:24:03 PM PDT 24 |
810004949 ps |
| T383 |
/workspace/coverage/default/14.sram_ctrl_stress_all.2434869722 |
|
|
Apr 30 01:15:33 PM PDT 24 |
Apr 30 02:33:47 PM PDT 24 |
648907732684 ps |
| T384 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.501828623 |
|
|
Apr 30 01:21:35 PM PDT 24 |
Apr 30 01:21:38 PM PDT 24 |
713568962 ps |
| T385 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.1055323101 |
|
|
Apr 30 01:23:01 PM PDT 24 |
Apr 30 01:25:21 PM PDT 24 |
8547642915 ps |
| T386 |
/workspace/coverage/default/28.sram_ctrl_partial_access.2486941319 |
|
|
Apr 30 01:21:25 PM PDT 24 |
Apr 30 01:21:44 PM PDT 24 |
1261600421 ps |
| T387 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3077442096 |
|
|
Apr 30 01:15:20 PM PDT 24 |
Apr 30 01:21:33 PM PDT 24 |
26849397925 ps |
| T388 |
/workspace/coverage/default/4.sram_ctrl_executable.156329015 |
|
|
Apr 30 01:11:38 PM PDT 24 |
Apr 30 01:12:57 PM PDT 24 |
4600661850 ps |
| T389 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.557620248 |
|
|
Apr 30 01:16:33 PM PDT 24 |
Apr 30 01:20:33 PM PDT 24 |
4282533739 ps |
| T390 |
/workspace/coverage/default/45.sram_ctrl_partial_access.3399660261 |
|
|
Apr 30 01:27:21 PM PDT 24 |
Apr 30 01:27:43 PM PDT 24 |
3869193909 ps |
| T391 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.3252038241 |
|
|
Apr 30 01:18:46 PM PDT 24 |
Apr 30 01:18:55 PM PDT 24 |
700097158 ps |
| T392 |
/workspace/coverage/default/21.sram_ctrl_executable.3131190870 |
|
|
Apr 30 01:18:25 PM PDT 24 |
Apr 30 01:23:04 PM PDT 24 |
16686468306 ps |
| T393 |
/workspace/coverage/default/49.sram_ctrl_partial_access.3669336346 |
|
|
Apr 30 01:28:49 PM PDT 24 |
Apr 30 01:29:09 PM PDT 24 |
1551244355 ps |
| T394 |
/workspace/coverage/default/34.sram_ctrl_stress_all.3680901223 |
|
|
Apr 30 01:23:53 PM PDT 24 |
Apr 30 02:29:52 PM PDT 24 |
188892876891 ps |
| T395 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.2621201382 |
|
|
Apr 30 01:19:06 PM PDT 24 |
Apr 30 01:24:01 PM PDT 24 |
10129401772 ps |
| T396 |
/workspace/coverage/default/42.sram_ctrl_alert_test.1397301588 |
|
|
Apr 30 01:26:40 PM PDT 24 |
Apr 30 01:26:41 PM PDT 24 |
39365572 ps |
| T397 |
/workspace/coverage/default/24.sram_ctrl_stress_all.1546139261 |
|
|
Apr 30 01:19:50 PM PDT 24 |
Apr 30 01:53:02 PM PDT 24 |
101997290256 ps |
| T398 |
/workspace/coverage/default/15.sram_ctrl_smoke.2026135878 |
|
|
Apr 30 01:15:36 PM PDT 24 |
Apr 30 01:15:45 PM PDT 24 |
642547087 ps |
| T399 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.1803814753 |
|
|
Apr 30 01:17:32 PM PDT 24 |
Apr 30 01:27:02 PM PDT 24 |
6939477614 ps |
| T400 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.3830532297 |
|
|
Apr 30 01:16:20 PM PDT 24 |
Apr 30 01:18:45 PM PDT 24 |
10347550821 ps |
| T401 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.1634977319 |
|
|
Apr 30 01:22:28 PM PDT 24 |
Apr 30 01:22:35 PM PDT 24 |
695652520 ps |
| T402 |
/workspace/coverage/default/15.sram_ctrl_regwen.700153454 |
|
|
Apr 30 01:15:54 PM PDT 24 |
Apr 30 01:19:06 PM PDT 24 |
9003337698 ps |
| T403 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.313995331 |
|
|
Apr 30 01:15:14 PM PDT 24 |
Apr 30 01:28:31 PM PDT 24 |
15503136848 ps |
| T404 |
/workspace/coverage/default/11.sram_ctrl_stress_all.1779420434 |
|
|
Apr 30 01:14:20 PM PDT 24 |
Apr 30 02:44:17 PM PDT 24 |
1635197112407 ps |
| T405 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.2110039912 |
|
|
Apr 30 01:23:58 PM PDT 24 |
Apr 30 01:24:08 PM PDT 24 |
1225166869 ps |
| T406 |
/workspace/coverage/default/19.sram_ctrl_stress_all.3917759461 |
|
|
Apr 30 01:17:33 PM PDT 24 |
Apr 30 03:19:53 PM PDT 24 |
204715477624 ps |
| T407 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.868547574 |
|
|
Apr 30 01:12:27 PM PDT 24 |
Apr 30 01:12:30 PM PDT 24 |
844208975 ps |
| T408 |
/workspace/coverage/default/48.sram_ctrl_bijection.1558412595 |
|
|
Apr 30 01:28:18 PM PDT 24 |
Apr 30 02:08:05 PM PDT 24 |
174256428855 ps |
| T409 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1299922032 |
|
|
Apr 30 01:26:53 PM PDT 24 |
Apr 30 01:27:19 PM PDT 24 |
1442668849 ps |
| T410 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3700502123 |
|
|
Apr 30 01:12:12 PM PDT 24 |
Apr 30 01:27:11 PM PDT 24 |
22442019592 ps |
| T411 |
/workspace/coverage/default/18.sram_ctrl_executable.2353157424 |
|
|
Apr 30 01:17:04 PM PDT 24 |
Apr 30 01:41:05 PM PDT 24 |
27574947545 ps |
| T412 |
/workspace/coverage/default/23.sram_ctrl_executable.3201523198 |
|
|
Apr 30 01:19:15 PM PDT 24 |
Apr 30 01:23:49 PM PDT 24 |
2614424114 ps |
| T413 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.1101373737 |
|
|
Apr 30 01:11:27 PM PDT 24 |
Apr 30 01:11:31 PM PDT 24 |
1401622013 ps |
| T414 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.2629808823 |
|
|
Apr 30 01:17:12 PM PDT 24 |
Apr 30 01:17:19 PM PDT 24 |
204145034 ps |
| T415 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1468810186 |
|
|
Apr 30 01:27:59 PM PDT 24 |
Apr 30 01:30:17 PM PDT 24 |
2896603886 ps |
| T416 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2026851864 |
|
|
Apr 30 01:17:21 PM PDT 24 |
Apr 30 01:25:53 PM PDT 24 |
20819819343 ps |
| T23 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.555769533 |
|
|
Apr 30 01:11:15 PM PDT 24 |
Apr 30 01:11:17 PM PDT 24 |
114981324 ps |
| T39 |
/workspace/coverage/default/35.sram_ctrl_stress_all.1440027079 |
|
|
Apr 30 01:24:10 PM PDT 24 |
Apr 30 02:15:03 PM PDT 24 |
37614111222 ps |
| T40 |
/workspace/coverage/default/38.sram_ctrl_smoke.3168696253 |
|
|
Apr 30 01:24:44 PM PDT 24 |
Apr 30 01:24:55 PM PDT 24 |
1441345513 ps |
| T41 |
/workspace/coverage/default/31.sram_ctrl_smoke.3073815670 |
|
|
Apr 30 01:22:23 PM PDT 24 |
Apr 30 01:22:33 PM PDT 24 |
477240895 ps |
| T42 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1100778373 |
|
|
Apr 30 01:11:39 PM PDT 24 |
Apr 30 01:30:25 PM PDT 24 |
21171635676 ps |
| T43 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.3951713358 |
|
|
Apr 30 01:19:36 PM PDT 24 |
Apr 30 01:26:07 PM PDT 24 |
25397637946 ps |
| T44 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.492678241 |
|
|
Apr 30 01:16:41 PM PDT 24 |
Apr 30 01:18:14 PM PDT 24 |
55256883252 ps |
| T45 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.2927603168 |
|
|
Apr 30 01:28:22 PM PDT 24 |
Apr 30 01:29:02 PM PDT 24 |
768919567 ps |
| T46 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.4288179306 |
|
|
Apr 30 01:13:31 PM PDT 24 |
Apr 30 01:32:17 PM PDT 24 |
8487661936 ps |
| T47 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.3194993492 |
|
|
Apr 30 01:24:17 PM PDT 24 |
Apr 30 01:25:56 PM PDT 24 |
779419448 ps |
| T417 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1603983863 |
|
|
Apr 30 01:13:05 PM PDT 24 |
Apr 30 01:19:28 PM PDT 24 |
30067607515 ps |
| T418 |
/workspace/coverage/default/35.sram_ctrl_alert_test.3085634781 |
|
|
Apr 30 01:24:11 PM PDT 24 |
Apr 30 01:24:12 PM PDT 24 |
38915221 ps |
| T419 |
/workspace/coverage/default/29.sram_ctrl_stress_all.3860208387 |
|
|
Apr 30 01:21:55 PM PDT 24 |
Apr 30 01:42:54 PM PDT 24 |
55784858835 ps |
| T420 |
/workspace/coverage/default/12.sram_ctrl_partial_access.82375117 |
|
|
Apr 30 01:14:35 PM PDT 24 |
Apr 30 01:14:52 PM PDT 24 |
1974196069 ps |
| T421 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.372706523 |
|
|
Apr 30 01:23:43 PM PDT 24 |
Apr 30 01:28:35 PM PDT 24 |
50931755165 ps |
| T422 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.3712156893 |
|
|
Apr 30 01:18:14 PM PDT 24 |
Apr 30 01:24:39 PM PDT 24 |
7475291291 ps |
| T423 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.903214326 |
|
|
Apr 30 01:13:05 PM PDT 24 |
Apr 30 01:13:45 PM PDT 24 |
725229684 ps |
| T424 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1479494287 |
|
|
Apr 30 01:12:37 PM PDT 24 |
Apr 30 01:13:40 PM PDT 24 |
10429589788 ps |
| T425 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2191268079 |
|
|
Apr 30 01:28:51 PM PDT 24 |
Apr 30 01:28:54 PM PDT 24 |
1680001047 ps |
| T426 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.3227650431 |
|
|
Apr 30 01:23:48 PM PDT 24 |
Apr 30 01:25:00 PM PDT 24 |
9756486482 ps |
| T427 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2010673569 |
|
|
Apr 30 01:27:04 PM PDT 24 |
Apr 30 01:30:34 PM PDT 24 |
37193389836 ps |
| T428 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1107572566 |
|
|
Apr 30 01:12:57 PM PDT 24 |
Apr 30 01:16:34 PM PDT 24 |
3911515942 ps |
| T429 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.3462579590 |
|
|
Apr 30 01:15:08 PM PDT 24 |
Apr 30 01:29:09 PM PDT 24 |
19177139758 ps |
| T430 |
/workspace/coverage/default/31.sram_ctrl_bijection.205192486 |
|
|
Apr 30 01:22:23 PM PDT 24 |
Apr 30 01:38:08 PM PDT 24 |
192177746749 ps |
| T431 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.1004403695 |
|
|
Apr 30 01:19:41 PM PDT 24 |
Apr 30 01:28:15 PM PDT 24 |
69716310767 ps |
| T432 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.3210575674 |
|
|
Apr 30 01:11:39 PM PDT 24 |
Apr 30 01:36:15 PM PDT 24 |
24889491958 ps |
| T433 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1464657012 |
|
|
Apr 30 01:14:14 PM PDT 24 |
Apr 30 01:19:31 PM PDT 24 |
18066515809 ps |
| T434 |
/workspace/coverage/default/46.sram_ctrl_stress_all.2759292325 |
|
|
Apr 30 01:27:52 PM PDT 24 |
Apr 30 01:52:39 PM PDT 24 |
29287752606 ps |
| T435 |
/workspace/coverage/default/33.sram_ctrl_smoke.998811410 |
|
|
Apr 30 01:23:08 PM PDT 24 |
Apr 30 01:25:24 PM PDT 24 |
3473993540 ps |
| T436 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.1209786159 |
|
|
Apr 30 01:21:04 PM PDT 24 |
Apr 30 01:22:37 PM PDT 24 |
48061211774 ps |
| T437 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.3457078046 |
|
|
Apr 30 01:16:13 PM PDT 24 |
Apr 30 01:17:42 PM PDT 24 |
9712935290 ps |
| T438 |
/workspace/coverage/default/17.sram_ctrl_regwen.825950347 |
|
|
Apr 30 01:16:45 PM PDT 24 |
Apr 30 01:22:21 PM PDT 24 |
1364228475 ps |
| T439 |
/workspace/coverage/default/48.sram_ctrl_executable.669819055 |
|
|
Apr 30 01:28:27 PM PDT 24 |
Apr 30 01:48:10 PM PDT 24 |
43750115499 ps |
| T440 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3249755965 |
|
|
Apr 30 01:11:00 PM PDT 24 |
Apr 30 01:11:04 PM PDT 24 |
351852290 ps |
| T441 |
/workspace/coverage/default/31.sram_ctrl_ram_cfg.2483105163 |
|
|
Apr 30 01:22:30 PM PDT 24 |
Apr 30 01:22:35 PM PDT 24 |
1407452925 ps |
| T442 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.1215665544 |
|
|
Apr 30 01:15:28 PM PDT 24 |
Apr 30 01:20:14 PM PDT 24 |
76448973081 ps |
| T443 |
/workspace/coverage/default/10.sram_ctrl_smoke.2565713555 |
|
|
Apr 30 01:13:30 PM PDT 24 |
Apr 30 01:13:34 PM PDT 24 |
3202613269 ps |
| T444 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.1167530074 |
|
|
Apr 30 01:27:34 PM PDT 24 |
Apr 30 01:32:03 PM PDT 24 |
13920742884 ps |
| T445 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.59602094 |
|
|
Apr 30 01:11:12 PM PDT 24 |
Apr 30 01:11:25 PM PDT 24 |
2468513842 ps |
| T446 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.3188809454 |
|
|
Apr 30 01:24:25 PM PDT 24 |
Apr 30 01:25:26 PM PDT 24 |
4089453094 ps |
| T447 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.884153992 |
|
|
Apr 30 01:28:34 PM PDT 24 |
Apr 30 01:30:07 PM PDT 24 |
2192092085 ps |
| T448 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1017556705 |
|
|
Apr 30 01:27:39 PM PDT 24 |
Apr 30 01:28:04 PM PDT 24 |
3790793836 ps |
| T24 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.3599382686 |
|
|
Apr 30 01:11:47 PM PDT 24 |
Apr 30 01:11:49 PM PDT 24 |
125495137 ps |
| T449 |
/workspace/coverage/default/28.sram_ctrl_smoke.2382674358 |
|
|
Apr 30 01:21:19 PM PDT 24 |
Apr 30 01:21:25 PM PDT 24 |
1401319928 ps |
| T110 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1702191779 |
|
|
Apr 30 01:27:13 PM PDT 24 |
Apr 30 01:27:33 PM PDT 24 |
8352807488 ps |
| T450 |
/workspace/coverage/default/44.sram_ctrl_bijection.412983955 |
|
|
Apr 30 01:27:05 PM PDT 24 |
Apr 30 01:58:37 PM PDT 24 |
27590509465 ps |
| T451 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.4160621288 |
|
|
Apr 30 01:25:47 PM PDT 24 |
Apr 30 01:29:40 PM PDT 24 |
15146935114 ps |
| T452 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.1934329447 |
|
|
Apr 30 01:24:32 PM PDT 24 |
Apr 30 01:29:17 PM PDT 24 |
16182479495 ps |
| T453 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.2034607945 |
|
|
Apr 30 01:19:26 PM PDT 24 |
Apr 30 01:20:36 PM PDT 24 |
997501126 ps |
| T454 |
/workspace/coverage/default/23.sram_ctrl_alert_test.3620482404 |
|
|
Apr 30 01:19:35 PM PDT 24 |
Apr 30 01:19:36 PM PDT 24 |
20448234 ps |
| T455 |
/workspace/coverage/default/47.sram_ctrl_alert_test.180192372 |
|
|
Apr 30 01:28:11 PM PDT 24 |
Apr 30 01:28:12 PM PDT 24 |
13843711 ps |
| T456 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.66819794 |
|
|
Apr 30 01:12:12 PM PDT 24 |
Apr 30 01:14:53 PM PDT 24 |
3089733328 ps |
| T457 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.653188640 |
|
|
Apr 30 01:25:09 PM PDT 24 |
Apr 30 01:27:06 PM PDT 24 |
7053083597 ps |
| T458 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.3720569443 |
|
|
Apr 30 01:24:10 PM PDT 24 |
Apr 30 01:27:12 PM PDT 24 |
2397272958 ps |
| T459 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.130823336 |
|
|
Apr 30 01:14:19 PM PDT 24 |
Apr 30 01:14:34 PM PDT 24 |
486964611 ps |
| T460 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.3675753548 |
|
|
Apr 30 01:25:21 PM PDT 24 |
Apr 30 01:27:13 PM PDT 24 |
1634605152 ps |
| T461 |
/workspace/coverage/default/20.sram_ctrl_regwen.1945282351 |
|
|
Apr 30 01:18:03 PM PDT 24 |
Apr 30 01:19:28 PM PDT 24 |
3844745716 ps |
| T462 |
/workspace/coverage/default/43.sram_ctrl_smoke.1109847617 |
|
|
Apr 30 01:26:40 PM PDT 24 |
Apr 30 01:26:50 PM PDT 24 |
2132417205 ps |
| T463 |
/workspace/coverage/default/31.sram_ctrl_alert_test.376173488 |
|
|
Apr 30 01:22:42 PM PDT 24 |
Apr 30 01:22:43 PM PDT 24 |
19487045 ps |
| T464 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3881464691 |
|
|
Apr 30 01:28:00 PM PDT 24 |
Apr 30 01:45:15 PM PDT 24 |
19662989715 ps |
| T465 |
/workspace/coverage/default/39.sram_ctrl_partial_access.2797970807 |
|
|
Apr 30 01:25:21 PM PDT 24 |
Apr 30 01:26:15 PM PDT 24 |
4244709656 ps |
| T466 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.1011702741 |
|
|
Apr 30 01:22:51 PM PDT 24 |
Apr 30 01:35:23 PM PDT 24 |
22703971918 ps |
| T467 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3818170285 |
|
|
Apr 30 01:19:00 PM PDT 24 |
Apr 30 01:19:33 PM PDT 24 |
1250717445 ps |
| T468 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.916349701 |
|
|
Apr 30 01:16:47 PM PDT 24 |
Apr 30 01:21:32 PM PDT 24 |
14358303819 ps |
| T469 |
/workspace/coverage/default/27.sram_ctrl_executable.2504464386 |
|
|
Apr 30 01:21:05 PM PDT 24 |
Apr 30 01:39:13 PM PDT 24 |
14766937880 ps |
| T470 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.423228894 |
|
|
Apr 30 01:13:30 PM PDT 24 |
Apr 30 01:14:35 PM PDT 24 |
958221686 ps |
| T471 |
/workspace/coverage/default/41.sram_ctrl_executable.1545457547 |
|
|
Apr 30 01:26:11 PM PDT 24 |
Apr 30 01:41:16 PM PDT 24 |
11623572012 ps |
| T472 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.4046501024 |
|
|
Apr 30 01:20:15 PM PDT 24 |
Apr 30 01:39:04 PM PDT 24 |
184621015106 ps |
| T473 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1173157969 |
|
|
Apr 30 01:14:08 PM PDT 24 |
Apr 30 01:16:34 PM PDT 24 |
4677498525 ps |
| T474 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.1612755420 |
|
|
Apr 30 01:16:20 PM PDT 24 |
Apr 30 01:18:33 PM PDT 24 |
28167596560 ps |
| T475 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3039685220 |
|
|
Apr 30 01:14:08 PM PDT 24 |
Apr 30 01:30:52 PM PDT 24 |
100220116118 ps |
| T111 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.441111893 |
|
|
Apr 30 01:25:08 PM PDT 24 |
Apr 30 01:25:13 PM PDT 24 |
211551216 ps |
| T476 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.107606106 |
|
|
Apr 30 01:15:20 PM PDT 24 |
Apr 30 01:15:33 PM PDT 24 |
2758385042 ps |
| T477 |
/workspace/coverage/default/22.sram_ctrl_bijection.2231945776 |
|
|
Apr 30 01:18:41 PM PDT 24 |
Apr 30 01:51:59 PM PDT 24 |
449045910578 ps |
| T478 |
/workspace/coverage/default/25.sram_ctrl_partial_access.2989527142 |
|
|
Apr 30 01:20:05 PM PDT 24 |
Apr 30 01:20:16 PM PDT 24 |
2754618683 ps |
| T479 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.1414315806 |
|
|
Apr 30 01:11:02 PM PDT 24 |
Apr 30 01:13:32 PM PDT 24 |
10652473893 ps |
| T480 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.2229001090 |
|
|
Apr 30 01:20:14 PM PDT 24 |
Apr 30 01:20:18 PM PDT 24 |
345483991 ps |
| T481 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.2434238584 |
|
|
Apr 30 01:23:01 PM PDT 24 |
Apr 30 01:23:17 PM PDT 24 |
3708470221 ps |
| T482 |
/workspace/coverage/default/43.sram_ctrl_stress_all.1517179809 |
|
|
Apr 30 01:27:05 PM PDT 24 |
Apr 30 03:47:02 PM PDT 24 |
407230470480 ps |
| T483 |
/workspace/coverage/default/22.sram_ctrl_partial_access.2612786327 |
|
|
Apr 30 01:18:39 PM PDT 24 |
Apr 30 01:19:46 PM PDT 24 |
6021830261 ps |
| T484 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3122588704 |
|
|
Apr 30 01:26:32 PM PDT 24 |
Apr 30 01:26:54 PM PDT 24 |
2937658586 ps |
| T485 |
/workspace/coverage/default/28.sram_ctrl_stress_all.2519458074 |
|
|
Apr 30 01:21:36 PM PDT 24 |
Apr 30 02:01:26 PM PDT 24 |
52051669675 ps |
| T486 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2273722026 |
|
|
Apr 30 01:14:40 PM PDT 24 |
Apr 30 01:16:22 PM PDT 24 |
3252661187 ps |
| T487 |
/workspace/coverage/default/31.sram_ctrl_stress_all.1822914072 |
|
|
Apr 30 01:22:42 PM PDT 24 |
Apr 30 02:44:37 PM PDT 24 |
69325252262 ps |
| T488 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.333566192 |
|
|
Apr 30 01:28:08 PM PDT 24 |
Apr 30 01:36:43 PM PDT 24 |
13457788229 ps |
| T489 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.1065616699 |
|
|
Apr 30 01:24:10 PM PDT 24 |
Apr 30 01:25:16 PM PDT 24 |
4966785385 ps |
| T490 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.1071177222 |
|
|
Apr 30 01:14:19 PM PDT 24 |
Apr 30 01:18:18 PM PDT 24 |
15769637684 ps |
| T112 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2777963315 |
|
|
Apr 30 01:16:27 PM PDT 24 |
Apr 30 01:17:23 PM PDT 24 |
28354313042 ps |
| T491 |
/workspace/coverage/default/44.sram_ctrl_stress_all.3170462644 |
|
|
Apr 30 01:27:23 PM PDT 24 |
Apr 30 02:51:56 PM PDT 24 |
387145213985 ps |
| T492 |
/workspace/coverage/default/1.sram_ctrl_alert_test.2742101464 |
|
|
Apr 30 01:11:14 PM PDT 24 |
Apr 30 01:11:14 PM PDT 24 |
37192150 ps |
| T493 |
/workspace/coverage/default/46.sram_ctrl_alert_test.2702661903 |
|
|
Apr 30 01:27:54 PM PDT 24 |
Apr 30 01:27:55 PM PDT 24 |
38039111 ps |
| T494 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.233606951 |
|
|
Apr 30 01:23:44 PM PDT 24 |
Apr 30 01:25:23 PM PDT 24 |
7635528319 ps |
| T495 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1771942372 |
|
|
Apr 30 01:27:29 PM PDT 24 |
Apr 30 01:45:44 PM PDT 24 |
15497649414 ps |
| T496 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3613421805 |
|
|
Apr 30 01:14:27 PM PDT 24 |
Apr 30 01:22:54 PM PDT 24 |
24879413592 ps |
| T25 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.1278636738 |
|
|
Apr 30 01:11:33 PM PDT 24 |
Apr 30 01:11:37 PM PDT 24 |
956784983 ps |
| T497 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1365683695 |
|
|
Apr 30 01:27:21 PM PDT 24 |
Apr 30 01:31:21 PM PDT 24 |
4556719218 ps |
| T498 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.843640748 |
|
|
Apr 30 01:19:34 PM PDT 24 |
Apr 30 01:22:04 PM PDT 24 |
3805484802 ps |
| T499 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.3890149750 |
|
|
Apr 30 01:17:55 PM PDT 24 |
Apr 30 01:18:43 PM PDT 24 |
8730020104 ps |
| T500 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.537572007 |
|
|
Apr 30 01:22:22 PM PDT 24 |
Apr 30 01:27:02 PM PDT 24 |
7899634570 ps |
| T501 |
/workspace/coverage/default/3.sram_ctrl_alert_test.4042431739 |
|
|
Apr 30 01:11:38 PM PDT 24 |
Apr 30 01:11:39 PM PDT 24 |
63559062 ps |
| T502 |
/workspace/coverage/default/13.sram_ctrl_stress_all.2036254893 |
|
|
Apr 30 01:15:13 PM PDT 24 |
Apr 30 01:56:39 PM PDT 24 |
46066701356 ps |
| T503 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.1496041351 |
|
|
Apr 30 01:23:42 PM PDT 24 |
Apr 30 01:24:59 PM PDT 24 |
47525711503 ps |
| T504 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.4227749364 |
|
|
Apr 30 01:22:54 PM PDT 24 |
Apr 30 01:23:21 PM PDT 24 |
2967783693 ps |
| T505 |
/workspace/coverage/default/33.sram_ctrl_bijection.628259271 |
|
|
Apr 30 01:23:09 PM PDT 24 |
Apr 30 01:32:03 PM PDT 24 |
8558677313 ps |
| T506 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2930440032 |
|
|
Apr 30 01:27:52 PM PDT 24 |
Apr 30 01:29:55 PM PDT 24 |
5743454252 ps |
| T507 |
/workspace/coverage/default/27.sram_ctrl_smoke.1107778503 |
|
|
Apr 30 01:20:47 PM PDT 24 |
Apr 30 01:21:11 PM PDT 24 |
1460217892 ps |
| T508 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.3357324354 |
|
|
Apr 30 01:18:18 PM PDT 24 |
Apr 30 01:23:27 PM PDT 24 |
30581928810 ps |
| T509 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.1052127369 |
|
|
Apr 30 01:26:32 PM PDT 24 |
Apr 30 01:26:36 PM PDT 24 |
360311496 ps |
| T510 |
/workspace/coverage/default/13.sram_ctrl_bijection.647840305 |
|
|
Apr 30 01:15:00 PM PDT 24 |
Apr 30 01:35:21 PM PDT 24 |
55383569924 ps |
| T511 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1195221972 |
|
|
Apr 30 01:11:58 PM PDT 24 |
Apr 30 01:12:13 PM PDT 24 |
1464238368 ps |
| T512 |
/workspace/coverage/default/7.sram_ctrl_regwen.958411114 |
|
|
Apr 30 01:12:19 PM PDT 24 |
Apr 30 01:35:04 PM PDT 24 |
19046601734 ps |
| T513 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.3582090628 |
|
|
Apr 30 01:26:28 PM PDT 24 |
Apr 30 01:28:06 PM PDT 24 |
2996907336 ps |
| T514 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.778681979 |
|
|
Apr 30 01:17:33 PM PDT 24 |
Apr 30 01:17:58 PM PDT 24 |
1081600832 ps |
| T515 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2184055510 |
|
|
Apr 30 01:27:34 PM PDT 24 |
Apr 30 01:27:39 PM PDT 24 |
453392102 ps |
| T516 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.1033432586 |
|
|
Apr 30 01:20:06 PM PDT 24 |
Apr 30 01:29:18 PM PDT 24 |
64309558495 ps |
| T517 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.3998718762 |
|
|
Apr 30 01:20:29 PM PDT 24 |
Apr 30 01:21:53 PM PDT 24 |
807384590 ps |
| T518 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.3972933676 |
|
|
Apr 30 01:14:59 PM PDT 24 |
Apr 30 01:27:01 PM PDT 24 |
41932572595 ps |
| T519 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.1568959749 |
|
|
Apr 30 01:11:22 PM PDT 24 |
Apr 30 01:13:42 PM PDT 24 |
4376052323 ps |
| T520 |
/workspace/coverage/default/3.sram_ctrl_smoke.1272240898 |
|
|
Apr 30 01:11:20 PM PDT 24 |
Apr 30 01:11:36 PM PDT 24 |
3288546472 ps |
| T521 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.2432115764 |
|
|
Apr 30 01:25:47 PM PDT 24 |
Apr 30 01:30:23 PM PDT 24 |
4430299922 ps |
| T522 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2770536889 |
|
|
Apr 30 01:28:18 PM PDT 24 |
Apr 30 01:33:39 PM PDT 24 |
1436362392 ps |
| T523 |
/workspace/coverage/default/37.sram_ctrl_regwen.775741380 |
|
|
Apr 30 01:24:41 PM PDT 24 |
Apr 30 01:26:23 PM PDT 24 |
1663461491 ps |
| T524 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.2578172432 |
|
|
Apr 30 01:14:14 PM PDT 24 |
Apr 30 01:15:17 PM PDT 24 |
776726909 ps |
| T525 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.4281052597 |
|
|
Apr 30 01:21:50 PM PDT 24 |
Apr 30 01:26:05 PM PDT 24 |
2424439052 ps |
| T526 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.2567482042 |
|
|
Apr 30 01:16:45 PM PDT 24 |
Apr 30 01:16:57 PM PDT 24 |
2638075323 ps |
| T527 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.4292328513 |
|
|
Apr 30 01:11:11 PM PDT 24 |
Apr 30 01:15:12 PM PDT 24 |
15762797865 ps |
| T528 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.555511965 |
|
|
Apr 30 01:17:48 PM PDT 24 |
Apr 30 01:18:28 PM PDT 24 |
1451106292 ps |
| T529 |
/workspace/coverage/default/15.sram_ctrl_stress_all.2098585220 |
|
|
Apr 30 01:15:59 PM PDT 24 |
Apr 30 02:17:49 PM PDT 24 |
289540701700 ps |
| T530 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.2862627533 |
|
|
Apr 30 01:26:47 PM PDT 24 |
Apr 30 01:27:48 PM PDT 24 |
1717718968 ps |
| T531 |
/workspace/coverage/default/44.sram_ctrl_executable.4253045733 |
|
|
Apr 30 01:27:14 PM PDT 24 |
Apr 30 01:37:09 PM PDT 24 |
8256394276 ps |
| T532 |
/workspace/coverage/default/14.sram_ctrl_regwen.820317575 |
|
|
Apr 30 01:15:26 PM PDT 24 |
Apr 30 01:26:31 PM PDT 24 |
3049965669 ps |
| T533 |
/workspace/coverage/default/36.sram_ctrl_lc_escalation.2178943924 |
|
|
Apr 30 01:24:16 PM PDT 24 |
Apr 30 01:25:19 PM PDT 24 |
10678999385 ps |
| T534 |
/workspace/coverage/default/30.sram_ctrl_partial_access.2106146115 |
|
|
Apr 30 01:22:05 PM PDT 24 |
Apr 30 01:22:21 PM PDT 24 |
563479317 ps |
| T535 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.955488620 |
|
|
Apr 30 01:19:18 PM PDT 24 |
Apr 30 01:19:30 PM PDT 24 |
1635016790 ps |
| T536 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1302317838 |
|
|
Apr 30 01:13:54 PM PDT 24 |
Apr 30 01:16:57 PM PDT 24 |
3550374637 ps |
| T537 |
/workspace/coverage/default/0.sram_ctrl_partial_access.2280330981 |
|
|
Apr 30 01:11:01 PM PDT 24 |
Apr 30 01:11:19 PM PDT 24 |
1342856650 ps |
| T538 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.3003773133 |
|
|
Apr 30 01:24:37 PM PDT 24 |
Apr 30 01:25:46 PM PDT 24 |
785582783 ps |
| T539 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.589734100 |
|
|
Apr 30 01:22:30 PM PDT 24 |
Apr 30 01:26:22 PM PDT 24 |
14307399551 ps |
| T540 |
/workspace/coverage/default/11.sram_ctrl_regwen.1274076446 |
|
|
Apr 30 01:14:20 PM PDT 24 |
Apr 30 01:16:03 PM PDT 24 |
28254218245 ps |
| T541 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.1976772109 |
|
|
Apr 30 01:21:26 PM PDT 24 |
Apr 30 01:26:12 PM PDT 24 |
20292656585 ps |
| T542 |
/workspace/coverage/default/42.sram_ctrl_executable.109353698 |
|
|
Apr 30 01:26:33 PM PDT 24 |
Apr 30 01:40:01 PM PDT 24 |
59193687586 ps |
| T543 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.826372476 |
|
|
Apr 30 01:11:19 PM PDT 24 |
Apr 30 01:11:54 PM PDT 24 |
734487130 ps |
| T544 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2078427595 |
|
|
Apr 30 01:12:25 PM PDT 24 |
Apr 30 01:13:57 PM PDT 24 |
10115922374 ps |