Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	17124516	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

155765698

1

T1

214019

T2

491645

T3

226865

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	85184777	1			T1	117477		T2	270034		T3	125098
values[0x0]	42145138	1			T1	56895		T2	130671		T3	59809
values[0x1]	45560299	1			T1	61046		T2	140242		T3	64863

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	8696004	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

164194210

1

T1

224862

T2

516268

T3

238287

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	626836	1			T1	1130		T2	2297		T3	943
valid_sources[0x01]	617182	1			T1	1038		T2	2095		T3	956
valid_sources[0x02]	591472	1			T1	1116		T2	1995		T3	1006
valid_sources[0x03]	584533	1			T1	1237		T2	2000		T3	986
valid_sources[0x04]	619124	1			T1	776		T2	2275		T3	977
valid_sources[0x05]	999240	1			T1	904		T2	1919		T3	982
valid_sources[0x06]	617733	1			T1	955		T2	2109		T3	978
valid_sources[0x07]	1393209	1			T1	1052		T2	1993		T3	966
valid_sources[0x08]	625144	1			T1	910		T2	2203		T3	952
valid_sources[0x09]	614241	1			T1	837		T2	2227		T3	981
valid_sources[0x0a]	583301	1			T1	1046		T2	1991		T3	949
valid_sources[0x0b]	632449	1			T1	1029		T2	2026		T3	928
valid_sources[0x0c]	661757	1			T1	885		T2	1997		T3	975
valid_sources[0x0d]	585953	1			T1	867		T2	2029		T3	984
valid_sources[0x0e]	689256	1			T1	956		T2	2276		T3	959
valid_sources[0x0f]	621840	1			T1	738		T2	2237		T3	990
valid_sources[0x10]	654838	1			T1	1103		T2	2361		T3	972
valid_sources[0x11]	692238	1			T1	1093		T2	2136		T3	1015
valid_sources[0x12]	600340	1			T1	899		T2	2284		T3	973
valid_sources[0x13]	624347	1			T1	1128		T2	1995		T3	978
valid_sources[0x14]	605124	1			T1	1039		T2	2089		T3	956
valid_sources[0x15]	563619	1			T1	1350		T2	2049		T3	914
valid_sources[0x16]	570017	1			T1	692		T2	2037		T3	996
valid_sources[0x17]	636894	1			T1	917		T2	2122		T3	1010
valid_sources[0x18]	632732	1			T1	1155		T2	2202		T3	986
valid_sources[0x19]	590996	1			T1	1154		T2	2155		T3	991
valid_sources[0x1a]	570615	1			T1	796		T2	2276		T3	1025
valid_sources[0x1b]	570311	1			T1	715		T2	2228		T3	932
valid_sources[0x1c]	601268	1			T1	618		T2	1904		T3	1016
valid_sources[0x1d]	569583	1			T1	1030		T2	2034		T3	973
valid_sources[0x1e]	620533	1			T1	861		T2	2059		T3	974
valid_sources[0x1f]	649842	1			T1	815		T2	2068		T3	1007
valid_sources[0x20]	577804	1			T1	993		T2	2159		T3	957
valid_sources[0x21]	569522	1			T1	893		T2	2163		T3	976
valid_sources[0x22]	602546	1			T1	951		T2	2172		T3	1004
valid_sources[0x23]	590014	1			T1	806		T2	2232		T3	939
valid_sources[0x24]	587194	1			T1	1014		T2	2005		T3	933
valid_sources[0x25]	1642497	1			T1	875		T2	2235		T3	956
valid_sources[0x26]	631183	1			T1	950		T2	1973		T3	1001
valid_sources[0x27]	658285	1			T1	801		T2	2151		T3	994
valid_sources[0x28]	597791	1			T1	958		T2	1854		T3	989
valid_sources[0x29]	1106790	1			T1	1160		T2	2182		T3	1021
valid_sources[0x2a]	583741	1			T1	1003		T2	2120		T3	949
valid_sources[0x2b]	620820	1			T1	779		T2	2084		T3	1085
valid_sources[0x2c]	1198598	1			T1	952		T2	2291		T3	1008
valid_sources[0x2d]	647053	1			T1	731		T2	1967		T3	964
valid_sources[0x2e]	585723	1			T1	833		T2	2112		T3	989
valid_sources[0x2f]	569347	1			T1	814		T2	2137		T3	1008
valid_sources[0x30]	593030	1			T1	873		T2	2191		T3	912
valid_sources[0x31]	609924	1			T1	1007		T2	2248		T3	1007
valid_sources[0x32]	601648	1			T1	1048		T2	2095		T3	955
valid_sources[0x33]	690247	1			T1	901		T2	2068		T3	998
valid_sources[0x34]	576989	1			T1	1015		T2	1962		T3	954
valid_sources[0x35]	631870	1			T1	961		T2	2178		T3	977
valid_sources[0x36]	576781	1			T1	721		T2	1974		T3	979
valid_sources[0x37]	599827	1			T1	826		T2	2052		T3	970
valid_sources[0x38]	656059	1			T1	876		T2	1880		T3	940
valid_sources[0x39]	574983	1			T1	865		T2	2009		T3	1001
valid_sources[0x3a]	585623	1			T1	821		T2	1973		T3	957
valid_sources[0x3b]	703030	1			T1	1097		T2	2255		T3	982
valid_sources[0x3c]	659518	1			T1	1002		T2	2206		T3	941
valid_sources[0x3d]	630187	1			T1	795		T2	2049		T3	977
valid_sources[0x3e]	588735	1			T1	1064		T2	2116		T3	971
valid_sources[0x3f]	2010857	1			T1	925		T2	1991		T3	947
valid_sources[0x40]	595415	1			T1	720		T2	1877		T3	871
valid_sources[0x41]	583492	1			T1	847		T2	2081		T3	1008
valid_sources[0x42]	570354	1			T1	809		T2	2279		T3	993
valid_sources[0x43]	570955	1			T1	986		T2	2099		T3	992
valid_sources[0x44]	718067	1			T1	845		T2	2243		T3	944
valid_sources[0x45]	1842821	1			T1	894		T2	2021		T3	971
valid_sources[0x46]	596595	1			T1	1241		T2	2278		T3	1019
valid_sources[0x47]	662657	1			T1	825		T2	2173		T3	1003
valid_sources[0x48]	639978	1			T1	967		T2	2047		T3	962
valid_sources[0x49]	586240	1			T1	822		T2	2262		T3	954
valid_sources[0x4a]	574163	1			T1	891		T2	2021		T3	967
valid_sources[0x4b]	621702	1			T1	923		T2	1937		T3	966
valid_sources[0x4c]	590605	1			T1	1037		T2	1894		T3	971
valid_sources[0x4d]	590318	1			T1	1022		T2	2122		T3	949
valid_sources[0x4e]	584951	1			T1	910		T2	1855		T3	980
valid_sources[0x4f]	663091	1			T1	775		T2	2105		T3	1038
valid_sources[0x50]	578238	1			T1	748		T2	2172		T3	934
valid_sources[0x51]	577794	1			T1	941		T2	2354		T3	985
valid_sources[0x52]	597490	1			T1	725		T2	1955		T3	985
valid_sources[0x53]	608899	1			T1	887		T2	2064		T3	951
valid_sources[0x54]	571049	1			T1	954		T2	2137		T3	969
valid_sources[0x55]	566604	1			T1	965		T2	1879		T3	984
valid_sources[0x56]	598268	1			T1	832		T2	2056		T3	965
valid_sources[0x57]	694502	1			T1	870		T2	2010		T3	991
valid_sources[0x58]	570654	1			T1	831		T2	2161		T3	1055
valid_sources[0x59]	629276	1			T1	966		T2	2120		T3	995
valid_sources[0x5a]	579522	1			T1	854		T2	2183		T3	1025
valid_sources[0x5b]	625929	1			T1	1062		T2	2283		T3	984
valid_sources[0x5c]	571467	1			T1	784		T2	1961		T3	904
valid_sources[0x5d]	633674	1			T1	796		T2	2119		T3	1028
valid_sources[0x5e]	592786	1			T1	973		T2	2308		T3	1003
valid_sources[0x5f]	565642	1			T1	818		T2	2043		T3	1011
valid_sources[0x60]	592891	1			T1	1018		T2	2155		T3	950
valid_sources[0x61]	576309	1			T1	878		T2	1934		T3	957
valid_sources[0x62]	651265	1			T1	1123		T2	2299		T3	974
valid_sources[0x63]	586944	1			T1	677		T2	1988		T3	988
valid_sources[0x64]	2141406	1			T1	816		T2	2280		T3	1045
valid_sources[0x65]	571835	1			T1	781		T2	2019		T3	982
valid_sources[0x66]	585456	1			T1	887		T2	1960		T3	988
valid_sources[0x67]	1447601	1			T1	831		T2	1866		T3	975
valid_sources[0x68]	646369	1			T1	908		T2	1816		T3	918
valid_sources[0x69]	579105	1			T1	917		T2	2179		T3	980
valid_sources[0x6a]	583027	1			T1	1070		T2	2160		T3	1008
valid_sources[0x6b]	688451	1			T1	891		T2	2062		T3	969
valid_sources[0x6c]	629787	1			T1	1146		T2	2069		T3	941
valid_sources[0x6d]	610541	1			T1	842		T2	2156		T3	1047
valid_sources[0x6e]	632563	1			T1	1011		T2	2117		T3	975
valid_sources[0x6f]	607768	1			T1	879		T2	2024		T3	950
valid_sources[0x70]	631149	1			T1	851		T2	2057		T3	925
valid_sources[0x71]	611129	1			T1	1055		T2	2051		T3	958
valid_sources[0x72]	631088	1			T1	946		T2	2233		T3	1018
valid_sources[0x73]	606985	1			T1	907		T2	2204		T3	965
valid_sources[0x74]	644437	1			T1	883		T2	1928		T3	946
valid_sources[0x75]	624046	1			T1	1021		T2	1986		T3	1010
valid_sources[0x76]	591633	1			T1	1092		T2	2167		T3	981
valid_sources[0x77]	624761	1			T1	960		T2	1953		T3	975
valid_sources[0x78]	1842295	1			T1	902		T2	2171		T3	1003
valid_sources[0x79]	1612157	1			T1	1006		T2	2218		T3	945
valid_sources[0x7a]	605229	1			T1	950		T2	2016		T3	1002
valid_sources[0x7b]	582670	1			T1	925		T2	1981		T3	1021
valid_sources[0x7c]	567767	1			T1	889		T2	2155		T3	1041
valid_sources[0x7d]	617797	1			T1	974		T2	1813		T3	1012
valid_sources[0x7e]	625319	1			T1	767		T2	2041		T3	975
valid_sources[0x7f]	662072	1			T1	978		T2	2211		T3	1046
valid_sources[0x80]	582989	1			T1	1062		T2	1891		T3	945

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

76576462

1

T1

106759

T2

245460

T3

113639

values[0x0]

all_enables

biggest_size

39592029

1

T1

53701

T2

123271

T3

56322

values[0x1]

all_enables

biggest_size

39597207

1

T1

53559

T2

122914

T3

56904

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	35145	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

169077

1

T1

1

T2

24

T3

2

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	58596	1			T2	10		T9	1193		T12	1106
values[0x0]	70336	1			T1	5		T2	39		T3	4
values[0x1]	75290	1			T1	5		T2	43		T3	2

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	26318	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

177904

1

T1

2

T2

31

T3

2

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	702	1			T2	2		T12	11		T18	1
valid_sources[0x01]	906	1			T12	14		T31	2		T59	1
valid_sources[0x02]	785	1			T9	101		T18	1		T31	1
valid_sources[0x03]	577	1			T4	1		T12	45		T31	1
valid_sources[0x04]	961	1			T9	310		T12	16		T14	1
valid_sources[0x05]	682	1			T9	36		T12	31		T45	6
valid_sources[0x06]	941	1			T3	1		T9	154		T12	11
valid_sources[0x07]	636	1			T12	71		T139	1		T140	1
valid_sources[0x08]	993	1			T9	3		T12	1		T7	2
valid_sources[0x09]	1065	1			T10	1		T12	44		T59	1
valid_sources[0x0a]	661	1			T9	69		T12	3		T141	2
valid_sources[0x0b]	840	1			T12	20		T72	2		T7	2
valid_sources[0x0c]	805	1			T2	3		T12	18		T59	5
valid_sources[0x0d]	575	1			T9	12		T12	9		T103	3
valid_sources[0x0e]	975	1			T59	1		T142	2		T7	1
valid_sources[0x0f]	784	1			T1	1		T31	1		T7	1
valid_sources[0x10]	1009	1			T4	8		T12	1		T28	1
valid_sources[0x11]	968	1			T48	1		T143	1		T144	1
valid_sources[0x12]	773	1			T12	1		T87	2		T144	1
valid_sources[0x13]	711	1			T2	1		T4	1		T9	3
valid_sources[0x14]	1065	1			T3	1		T9	2		T12	33
valid_sources[0x15]	634	1			T2	2		T4	1		T12	6
valid_sources[0x16]	825	1			T12	4		T145	1		T28	1
valid_sources[0x17]	675	1			T12	2		T146	1		T51	6
valid_sources[0x18]	824	1			T2	2		T12	7		T147	2
valid_sources[0x19]	971	1			T2	2		T10	1		T12	43
valid_sources[0x1a]	772	1			T3	1		T4	1		T12	9
valid_sources[0x1b]	628	1			T2	1		T12	4		T148	1
valid_sources[0x1c]	663	1			T2	9		T12	5		T149	1
valid_sources[0x1d]	625	1			T2	2		T9	8		T30	2
valid_sources[0x1e]	619	1			T10	2		T12	19		T23	6
valid_sources[0x1f]	639	1			T12	9		T133	1		T150	1
valid_sources[0x20]	577	1			T12	2		T52	6		T53	25
valid_sources[0x21]	1551	1			T9	74		T12	4		T49	2
valid_sources[0x22]	999	1			T12	7		T31	1		T47	2
valid_sources[0x23]	701	1			T12	30		T31	1		T26	1
valid_sources[0x24]	1046	1			T9	2		T12	17		T7	1
valid_sources[0x25]	571	1			T2	3		T12	4		T133	2
valid_sources[0x26]	825	1			T12	2		T151	3		T29	85
valid_sources[0x27]	592	1			T12	15		T31	3		T50	1
valid_sources[0x28]	883	1			T2	1		T12	17		T47	2
valid_sources[0x29]	684	1			T12	24		T18	1		T46	1
valid_sources[0x2a]	711	1			T9	2		T12	2		T133	1
valid_sources[0x2b]	505	1			T12	2		T152	4		T50	2
valid_sources[0x2c]	716	1			T9	212		T12	38		T72	1
valid_sources[0x2d]	841	1			T9	18		T12	2		T18	1
valid_sources[0x2e]	808	1			T12	1		T7	1		T28	1
valid_sources[0x2f]	678	1			T12	69		T48	1		T50	56
valid_sources[0x30]	581	1			T9	1		T12	14		T153	2
valid_sources[0x31]	828	1			T9	1		T12	35		T51	1
valid_sources[0x32]	1145	1			T9	1		T12	16		T13	4
valid_sources[0x33]	828	1			T1	1		T2	4		T9	1
valid_sources[0x34]	919	1			T12	26		T133	2		T31	1
valid_sources[0x35]	1072	1			T9	220		T31	78		T47	2
valid_sources[0x36]	907	1			T9	27		T12	10		T26	1
valid_sources[0x37]	597	1			T12	7		T31	3		T19	6
valid_sources[0x38]	685	1			T31	2		T45	1		T7	1
valid_sources[0x39]	796	1			T9	2		T12	26		T133	1
valid_sources[0x3a]	1087	1			T9	169		T12	32		T31	1
valid_sources[0x3b]	713	1			T12	54		T49	5		T72	1
valid_sources[0x3c]	825	1			T154	1		T39	1		T152	1
valid_sources[0x3d]	945	1			T12	17		T7	1		T153	15
valid_sources[0x3e]	643	1			T12	18		T49	3		T7	2
valid_sources[0x3f]	747	1			T10	1		T12	36		T26	1
valid_sources[0x40]	961	1			T9	2		T12	12		T48	1
valid_sources[0x41]	830	1			T12	3		T45	1		T46	1
valid_sources[0x42]	1178	1			T12	7		T28	1		T146	2
valid_sources[0x43]	1044	1			T12	19		T47	1		T51	5
valid_sources[0x44]	670	1			T12	11		T45	2		T50	3
valid_sources[0x45]	1019	1			T9	99		T12	17		T49	1
valid_sources[0x46]	828	1			T1	1		T9	162		T12	11
valid_sources[0x47]	545	1			T4	2		T9	2		T12	28
valid_sources[0x48]	651	1			T9	3		T12	10		T22	2
valid_sources[0x49]	730	1			T8	2		T12	1		T145	2
valid_sources[0x4a]	1121	1			T9	64		T12	7		T72	7
valid_sources[0x4b]	1032	1			T9	66		T12	1		T144	2
valid_sources[0x4c]	1002	1			T9	157		T12	6		T22	4
valid_sources[0x4d]	650	1			T9	8		T12	5		T26	4
valid_sources[0x4e]	737	1			T11	2		T12	67		T50	4
valid_sources[0x4f]	764	1			T10	1		T12	29		T18	1
valid_sources[0x50]	768	1			T87	1		T50	16		T138	3
valid_sources[0x51]	943	1			T9	1		T10	2		T12	12
valid_sources[0x52]	718	1			T9	67		T12	27		T45	1
valid_sources[0x53]	733	1			T11	1		T12	1		T44	1
valid_sources[0x54]	932	1			T12	1		T59	1		T7	1
valid_sources[0x55]	625	1			T12	7		T52	6		T53	13
valid_sources[0x56]	650	1			T9	1		T12	49		T30	5
valid_sources[0x57]	805	1			T2	1		T9	2		T12	37
valid_sources[0x58]	1049	1			T9	1		T12	5		T31	1
valid_sources[0x59]	1063	1			T12	1		T31	3		T41	44
valid_sources[0x5a]	658	1			T1	1		T9	2		T12	35
valid_sources[0x5b]	894	1			T12	46		T22	1		T72	13
valid_sources[0x5c]	927	1			T12	13		T59	6		T30	8
valid_sources[0x5d]	855	1			T12	12		T40	5		T51	9
valid_sources[0x5e]	947	1			T12	18		T31	1		T87	3
valid_sources[0x5f]	824	1			T9	162		T12	11		T45	3
valid_sources[0x60]	876	1			T12	8		T149	1		T50	96
valid_sources[0x61]	790	1			T9	1		T12	29		T44	1
valid_sources[0x62]	752	1			T2	1		T12	58		T87	2
valid_sources[0x63]	960	1			T12	14		T133	1		T7	6
valid_sources[0x64]	636	1			T12	1		T139	1		T48	1
valid_sources[0x65]	940	1			T2	1		T4	6		T9	6
valid_sources[0x66]	622	1			T9	27		T133	1		T47	4
valid_sources[0x67]	726	1			T9	2		T12	12		T133	1
valid_sources[0x68]	790	1			T9	1		T10	1		T12	44
valid_sources[0x69]	1188	1			T77	1		T31	166		T59	2
valid_sources[0x6a]	726	1			T9	152		T12	22		T59	3
valid_sources[0x6b]	520	1			T31	3		T151	3		T152	2
valid_sources[0x6c]	893	1			T12	17		T148	1		T48	1
valid_sources[0x6d]	677	1			T9	1		T12	1		T59	2
valid_sources[0x6e]	608	1			T12	30		T32	1		T28	1
valid_sources[0x6f]	715	1			T1	1		T9	115		T12	14
valid_sources[0x70]	909	1			T12	35		T44	1		T119	4
valid_sources[0x71]	692	1			T12	18		T51	9		T118	1
valid_sources[0x72]	677	1			T12	61		T18	1		T28	1
valid_sources[0x73]	554	1			T9	5		T12	39		T155	1
valid_sources[0x74]	555	1			T2	2		T12	10		T134	3
valid_sources[0x75]	583	1			T12	2		T48	2		T51	6
valid_sources[0x76]	657	1			T2	4		T12	22		T133	1
valid_sources[0x77]	768	1			T9	2		T12	19		T18	1
valid_sources[0x78]	1017	1			T11	2		T12	12		T31	1
valid_sources[0x79]	673	1			T12	61		T143	1		T28	1
valid_sources[0x7a]	762	1			T12	78		T31	1		T44	1
valid_sources[0x7b]	1010	1			T9	175		T12	14		T70	1
valid_sources[0x7c]	984	1			T9	1		T144	1		T156	1
valid_sources[0x7d]	837	1			T12	12		T133	2		T31	1
valid_sources[0x7e]	563	1			T9	9		T12	3		T59	5
valid_sources[0x7f]	563	1			T12	2		T145	2		T144	1
valid_sources[0x80]	618	1			T9	1		T12	1		T49	3

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

45789

1

T2

5

T9

1103

T12

1024

values[0x0]

all_enables

biggest_size

62457

1

T1

1

T2

13

T3

1

values[0x1]

all_enables

biggest_size

60831

1

T2

6

T3

1

T8

1